Fork of mbed for KL05Z based smart sensor which has no crystal on the board, so MCG FEI mode is required.

Dependents:   smart-sensor-KL05Z-debug

Fork of mbed-src by Ermanno Brusadin

Committer:
r14793
Date:
Mon Jan 29 15:38:37 2018 +0000
Revision:
1:da408b460382
Parent:
0:0a673c671a56
changed KL05 MCG mode to FEI for smart sensor boards (no crystal)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
ebrus 0:0a673c671a56 1 /* mbed Microcontroller Library
ebrus 0:0a673c671a56 2 * Copyright (c) 2006-2013 ARM Limited
ebrus 0:0a673c671a56 3 *
ebrus 0:0a673c671a56 4 * Licensed under the Apache License, Version 2.0 (the "License");
ebrus 0:0a673c671a56 5 * you may not use this file except in compliance with the License.
ebrus 0:0a673c671a56 6 * You may obtain a copy of the License at
ebrus 0:0a673c671a56 7 *
ebrus 0:0a673c671a56 8 * http://www.apache.org/licenses/LICENSE-2.0
ebrus 0:0a673c671a56 9 *
ebrus 0:0a673c671a56 10 * Unless required by applicable law or agreed to in writing, software
ebrus 0:0a673c671a56 11 * distributed under the License is distributed on an "AS IS" BASIS,
ebrus 0:0a673c671a56 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
ebrus 0:0a673c671a56 13 * See the License for the specific language governing permissions and
ebrus 0:0a673c671a56 14 * limitations under the License.
ebrus 0:0a673c671a56 15 */
ebrus 0:0a673c671a56 16 #ifndef MBED_I2C_H
ebrus 0:0a673c671a56 17 #define MBED_I2C_H
ebrus 0:0a673c671a56 18
ebrus 0:0a673c671a56 19 #include "platform.h"
ebrus 0:0a673c671a56 20
ebrus 0:0a673c671a56 21 #if DEVICE_I2C
ebrus 0:0a673c671a56 22
ebrus 0:0a673c671a56 23 #include "i2c_api.h"
ebrus 0:0a673c671a56 24
ebrus 0:0a673c671a56 25 namespace mbed {
ebrus 0:0a673c671a56 26
ebrus 0:0a673c671a56 27 /** An I2C Master, used for communicating with I2C slave devices
ebrus 0:0a673c671a56 28 *
ebrus 0:0a673c671a56 29 * Example:
ebrus 0:0a673c671a56 30 * @code
ebrus 0:0a673c671a56 31 * // Read from I2C slave at address 0x62
ebrus 0:0a673c671a56 32 *
ebrus 0:0a673c671a56 33 * #include "mbed.h"
ebrus 0:0a673c671a56 34 *
ebrus 0:0a673c671a56 35 * I2C i2c(p28, p27);
ebrus 0:0a673c671a56 36 *
ebrus 0:0a673c671a56 37 * int main() {
ebrus 0:0a673c671a56 38 * int address = 0x62;
ebrus 0:0a673c671a56 39 * char data[2];
ebrus 0:0a673c671a56 40 * i2c.read(address, data, 2);
ebrus 0:0a673c671a56 41 * }
ebrus 0:0a673c671a56 42 * @endcode
ebrus 0:0a673c671a56 43 */
ebrus 0:0a673c671a56 44 class I2C {
ebrus 0:0a673c671a56 45
ebrus 0:0a673c671a56 46 public:
ebrus 0:0a673c671a56 47 enum RxStatus {
ebrus 0:0a673c671a56 48 NoData,
ebrus 0:0a673c671a56 49 MasterGeneralCall,
ebrus 0:0a673c671a56 50 MasterWrite,
ebrus 0:0a673c671a56 51 MasterRead
ebrus 0:0a673c671a56 52 };
ebrus 0:0a673c671a56 53
ebrus 0:0a673c671a56 54 enum Acknowledge {
ebrus 0:0a673c671a56 55 NoACK = 0,
ebrus 0:0a673c671a56 56 ACK = 1
ebrus 0:0a673c671a56 57 };
ebrus 0:0a673c671a56 58
ebrus 0:0a673c671a56 59 /** Create an I2C Master interface, connected to the specified pins
ebrus 0:0a673c671a56 60 *
ebrus 0:0a673c671a56 61 * @param sda I2C data line pin
ebrus 0:0a673c671a56 62 * @param scl I2C clock line pin
ebrus 0:0a673c671a56 63 */
ebrus 0:0a673c671a56 64 I2C(PinName sda, PinName scl);
ebrus 0:0a673c671a56 65
ebrus 0:0a673c671a56 66 /** Set the frequency of the I2C interface
ebrus 0:0a673c671a56 67 *
ebrus 0:0a673c671a56 68 * @param hz The bus frequency in hertz
ebrus 0:0a673c671a56 69 */
ebrus 0:0a673c671a56 70 void frequency(int hz);
ebrus 0:0a673c671a56 71
ebrus 0:0a673c671a56 72 /** Read from an I2C slave
ebrus 0:0a673c671a56 73 *
ebrus 0:0a673c671a56 74 * Performs a complete read transaction. The bottom bit of
ebrus 0:0a673c671a56 75 * the address is forced to 1 to indicate a read.
ebrus 0:0a673c671a56 76 *
ebrus 0:0a673c671a56 77 * @param address 8-bit I2C slave address [ addr | 1 ]
ebrus 0:0a673c671a56 78 * @param data Pointer to the byte-array to read data in to
ebrus 0:0a673c671a56 79 * @param length Number of bytes to read
ebrus 0:0a673c671a56 80 * @param repeated Repeated start, true - don't send stop at end
ebrus 0:0a673c671a56 81 *
ebrus 0:0a673c671a56 82 * @returns
ebrus 0:0a673c671a56 83 * 0 on success (ack),
ebrus 0:0a673c671a56 84 * non-0 on failure (nack)
ebrus 0:0a673c671a56 85 */
ebrus 0:0a673c671a56 86 int read(int address, char *data, int length, bool repeated = false);
ebrus 0:0a673c671a56 87
ebrus 0:0a673c671a56 88 /** Read a single byte from the I2C bus
ebrus 0:0a673c671a56 89 *
ebrus 0:0a673c671a56 90 * @param ack indicates if the byte is to be acknowledged (1 = acknowledge)
ebrus 0:0a673c671a56 91 *
ebrus 0:0a673c671a56 92 * @returns
ebrus 0:0a673c671a56 93 * the byte read
ebrus 0:0a673c671a56 94 */
ebrus 0:0a673c671a56 95 int read(int ack);
ebrus 0:0a673c671a56 96
ebrus 0:0a673c671a56 97 /** Write to an I2C slave
ebrus 0:0a673c671a56 98 *
ebrus 0:0a673c671a56 99 * Performs a complete write transaction. The bottom bit of
ebrus 0:0a673c671a56 100 * the address is forced to 0 to indicate a write.
ebrus 0:0a673c671a56 101 *
ebrus 0:0a673c671a56 102 * @param address 8-bit I2C slave address [ addr | 0 ]
ebrus 0:0a673c671a56 103 * @param data Pointer to the byte-array data to send
ebrus 0:0a673c671a56 104 * @param length Number of bytes to send
ebrus 0:0a673c671a56 105 * @param repeated Repeated start, true - do not send stop at end
ebrus 0:0a673c671a56 106 *
ebrus 0:0a673c671a56 107 * @returns
ebrus 0:0a673c671a56 108 * 0 on success (ack),
ebrus 0:0a673c671a56 109 * non-0 on failure (nack)
ebrus 0:0a673c671a56 110 */
ebrus 0:0a673c671a56 111 int write(int address, const char *data, int length, bool repeated = false);
ebrus 0:0a673c671a56 112
ebrus 0:0a673c671a56 113 /** Write single byte out on the I2C bus
ebrus 0:0a673c671a56 114 *
ebrus 0:0a673c671a56 115 * @param data data to write out on bus
ebrus 0:0a673c671a56 116 *
ebrus 0:0a673c671a56 117 * @returns
ebrus 0:0a673c671a56 118 * '1' if an ACK was received,
ebrus 0:0a673c671a56 119 * '0' otherwise
ebrus 0:0a673c671a56 120 */
ebrus 0:0a673c671a56 121 int write(int data);
ebrus 0:0a673c671a56 122
ebrus 0:0a673c671a56 123 /** Creates a start condition on the I2C bus
ebrus 0:0a673c671a56 124 */
ebrus 0:0a673c671a56 125
ebrus 0:0a673c671a56 126 void start(void);
ebrus 0:0a673c671a56 127
ebrus 0:0a673c671a56 128 /** Creates a stop condition on the I2C bus
ebrus 0:0a673c671a56 129 */
ebrus 0:0a673c671a56 130 void stop(void);
ebrus 0:0a673c671a56 131
ebrus 0:0a673c671a56 132 protected:
ebrus 0:0a673c671a56 133 void aquire();
ebrus 0:0a673c671a56 134
ebrus 0:0a673c671a56 135 i2c_t _i2c;
ebrus 0:0a673c671a56 136 static I2C *_owner;
ebrus 0:0a673c671a56 137 int _hz;
ebrus 0:0a673c671a56 138 };
ebrus 0:0a673c671a56 139
ebrus 0:0a673c671a56 140 } // namespace mbed
ebrus 0:0a673c671a56 141
ebrus 0:0a673c671a56 142 #endif
ebrus 0:0a673c671a56 143
ebrus 0:0a673c671a56 144 #endif