Paul Paterson / mbed-src-CanNucleoF0

mbed library sources, include can_api for nucleo-f091rc

Dependents:   CanNucleoF0_example

Fork of mbed-src by mbed official

targets/hal/TARGET_Freescale/TARGET_KL25Z/PeripheralNames.h@17:151ab7482c89, 2013-08-08 (annotated)

Committer:
emilmont
Date:
Thu Aug 08 15:42:46 2013 +0100
Revision:
17:151ab7482c89
Parent:
13:0645d8841f51
Child:
50:b08ceb75017d
Synch with latest https://github.com/mbedmicro/mbed changes

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 17:151ab7482c89 1 /* mbed Microcontroller Library
emilmont 17:151ab7482c89 2 * Copyright (c) 2006-2013 ARM Limited
emilmont 17:151ab7482c89 3 *
emilmont 17:151ab7482c89 4 * Licensed under the Apache License, Version 2.0 (the "License");
emilmont 17:151ab7482c89 5 * you may not use this file except in compliance with the License.
emilmont 17:151ab7482c89 6 * You may obtain a copy of the License at
emilmont 17:151ab7482c89 7 *
emilmont 17:151ab7482c89 8 * http://www.apache.org/licenses/LICENSE-2.0
emilmont 17:151ab7482c89 9 *
emilmont 17:151ab7482c89 10 * Unless required by applicable law or agreed to in writing, software
emilmont 17:151ab7482c89 11 * distributed under the License is distributed on an "AS IS" BASIS,
emilmont 17:151ab7482c89 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
emilmont 17:151ab7482c89 13 * See the License for the specific language governing permissions and
emilmont 17:151ab7482c89 14 * limitations under the License.
emilmont 17:151ab7482c89 15 */
emilmont 17:151ab7482c89 16 #ifndef MBED_PERIPHERALNAMES_H
emilmont 17:151ab7482c89 17 #define MBED_PERIPHERALNAMES_H
emilmont 17:151ab7482c89 18
emilmont 17:151ab7482c89 19 #include "cmsis.h"
emilmont 17:151ab7482c89 20
emilmont 17:151ab7482c89 21 #ifdef __cplusplus
emilmont 17:151ab7482c89 22 extern "C" {
emilmont 17:151ab7482c89 23 #endif
emilmont 17:151ab7482c89 24
emilmont 17:151ab7482c89 25 typedef enum {
emilmont 17:151ab7482c89 26 UART_0 = (int)UART0_BASE,
emilmont 17:151ab7482c89 27 UART_1 = (int)UART1_BASE,
emilmont 17:151ab7482c89 28 UART_2 = (int)UART2_BASE
emilmont 17:151ab7482c89 29 } UARTName;
emilmont 17:151ab7482c89 30 #define STDIO_UART_TX USBTX
emilmont 17:151ab7482c89 31 #define STDIO_UART_RX USBRX
emilmont 17:151ab7482c89 32 #define STDIO_UART UART_0
emilmont 17:151ab7482c89 33
emilmont 17:151ab7482c89 34 typedef enum {
emilmont 17:151ab7482c89 35 I2C_0 = (int)I2C0_BASE,
emilmont 17:151ab7482c89 36 I2C_1 = (int)I2C1_BASE,
emilmont 17:151ab7482c89 37 } I2CName;
emilmont 17:151ab7482c89 38
emilmont 17:151ab7482c89 39 #define TPM_SHIFT 8
emilmont 17:151ab7482c89 40 typedef enum {
emilmont 17:151ab7482c89 41 PWM_1 = (0 << TPM_SHIFT) | (0), // TPM0 CH0
emilmont 17:151ab7482c89 42 PWM_2 = (0 << TPM_SHIFT) | (1), // TPM0 CH1
emilmont 17:151ab7482c89 43 PWM_3 = (0 << TPM_SHIFT) | (2), // TPM0 CH2
emilmont 17:151ab7482c89 44 PWM_4 = (0 << TPM_SHIFT) | (3), // TPM0 CH3
emilmont 17:151ab7482c89 45 PWM_5 = (0 << TPM_SHIFT) | (4), // TPM0 CH4
emilmont 17:151ab7482c89 46 PWM_6 = (0 << TPM_SHIFT) | (5), // TPM0 CH5
emilmont 17:151ab7482c89 47
emilmont 17:151ab7482c89 48 PWM_7 = (1 << TPM_SHIFT) | (0), // TPM1 CH0
emilmont 17:151ab7482c89 49 PWM_8 = (1 << TPM_SHIFT) | (1), // TPM1 CH1
emilmont 17:151ab7482c89 50
emilmont 17:151ab7482c89 51 PWM_9 = (2 << TPM_SHIFT) | (0), // TPM2 CH0
emilmont 17:151ab7482c89 52 PWM_10 = (2 << TPM_SHIFT) | (1) // TPM2 CH1
emilmont 17:151ab7482c89 53 } PWMName;
emilmont 17:151ab7482c89 54
emilmont 17:151ab7482c89 55 #define CHANNELS_A_SHIFT 5
emilmont 17:151ab7482c89 56 typedef enum {
emilmont 17:151ab7482c89 57 ADC0_SE0 = 0,
emilmont 17:151ab7482c89 58 ADC0_SE3 = 3,
emilmont 17:151ab7482c89 59 ADC0_SE4a = (1 << CHANNELS_A_SHIFT) | (4),
emilmont 17:151ab7482c89 60 ADC0_SE4b = 4,
emilmont 17:151ab7482c89 61 ADC0_SE5b = 5,
emilmont 17:151ab7482c89 62 ADC0_SE6b = 6,
emilmont 17:151ab7482c89 63 ADC0_SE7a = (1 << CHANNELS_A_SHIFT) | (7),
emilmont 17:151ab7482c89 64 ADC0_SE7b = 7,
emilmont 17:151ab7482c89 65 ADC0_SE8 = 8,
emilmont 17:151ab7482c89 66 ADC0_SE9 = 9,
emilmont 17:151ab7482c89 67 ADC0_SE11 = 11,
emilmont 17:151ab7482c89 68 ADC0_SE12 = 12,
emilmont 17:151ab7482c89 69 ADC0_SE13 = 13,
emilmont 17:151ab7482c89 70 ADC0_SE14 = 14,
emilmont 17:151ab7482c89 71 ADC0_SE15 = 15,
emilmont 17:151ab7482c89 72 ADC0_SE23 = 23
emilmont 17:151ab7482c89 73 } ADCName;
emilmont 17:151ab7482c89 74
emilmont 17:151ab7482c89 75 typedef enum {
emilmont 17:151ab7482c89 76 DAC_0 = 0
emilmont 17:151ab7482c89 77 } DACName;
emilmont 17:151ab7482c89 78
emilmont 17:151ab7482c89 79
emilmont 17:151ab7482c89 80 typedef enum {
emilmont 17:151ab7482c89 81 SPI_0 = (int)SPI0_BASE,
emilmont 17:151ab7482c89 82 SPI_1 = (int)SPI1_BASE,
emilmont 17:151ab7482c89 83 } SPIName;
emilmont 17:151ab7482c89 84
emilmont 17:151ab7482c89 85 #ifdef __cplusplus
emilmont 17:151ab7482c89 86 }
emilmont 17:151ab7482c89 87 #endif
emilmont 17:151ab7482c89 88
emilmont 17:151ab7482c89 89 #endif