Paul Paterson / mbed-dev

Fork of mbed-dev by mbed official

Committer:
<>
Date:
Fri Sep 02 15:07:44 2016 +0100
Revision:
144:ef7eb2e8f9f7
Parent:
0:9b334a45a8ff
This updates the lib to the mbed lib v125

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 #include "W7500x_crg.h"
<> 144:ef7eb2e8f9f7 2
<> 144:ef7eb2e8f9f7 3 void CRG_DeInit(void)
<> 144:ef7eb2e8f9f7 4 {
<> 144:ef7eb2e8f9f7 5 //To Do
<> 144:ef7eb2e8f9f7 6 }
<> 144:ef7eb2e8f9f7 7
<> 144:ef7eb2e8f9f7 8 void CRG_OSC_PowerDownEnable(FunctionalState NewState)
<> 144:ef7eb2e8f9f7 9 {
<> 144:ef7eb2e8f9f7 10 if(NewState != DISABLE) CRG->OSC_PDR = CRG_OSC_PDR_PD;
<> 144:ef7eb2e8f9f7 11 else CRG->OSC_PDR = CRG_OSC_PDR_NRMLOP;
<> 144:ef7eb2e8f9f7 12 }
<> 144:ef7eb2e8f9f7 13
<> 144:ef7eb2e8f9f7 14 void CRG_PLL_PowerDownEnable(FunctionalState NewState)
<> 144:ef7eb2e8f9f7 15 {
<> 144:ef7eb2e8f9f7 16 if(NewState != DISABLE) CRG->PLL_PDR = CRG_PLL_PDR_PD;
<> 144:ef7eb2e8f9f7 17 else CRG->PLL_PDR = CRG_PLL_PDR_NRMLOP;
<> 144:ef7eb2e8f9f7 18 }
<> 144:ef7eb2e8f9f7 19
<> 144:ef7eb2e8f9f7 20 void CRG_PLL_OutputEnable(FunctionalState NewState)
<> 144:ef7eb2e8f9f7 21 {
<> 144:ef7eb2e8f9f7 22 if(NewState != DISABLE) CRG->PLL_OER = CRG_PLL_OER_EN;
<> 144:ef7eb2e8f9f7 23 else CRG->PLL_OER = CRG_PLL_OER_DIS;
<> 144:ef7eb2e8f9f7 24 }
<> 144:ef7eb2e8f9f7 25
<> 144:ef7eb2e8f9f7 26 void CRG_PLL_BypassEnable(FunctionalState NewState)
<> 144:ef7eb2e8f9f7 27 {
<> 144:ef7eb2e8f9f7 28 if(NewState != DISABLE) CRG->PLL_BPR = CRG_PLL_BPR_EN;
<> 144:ef7eb2e8f9f7 29 else CRG->PLL_BPR = CRG_PLL_BPR_DIS;
<> 144:ef7eb2e8f9f7 30 }
<> 144:ef7eb2e8f9f7 31
<> 144:ef7eb2e8f9f7 32 void CRG_PLL_InputFrequencySelect(CRG_CLK_SOURCE src)
<> 144:ef7eb2e8f9f7 33 {
<> 144:ef7eb2e8f9f7 34 assert_param(IS_CRG_PLL_SRC(src));
<> 144:ef7eb2e8f9f7 35
<> 144:ef7eb2e8f9f7 36 if( src == CRG_RCLK ) CRG->PLL_IFSR = CRG_PLL_IFSR_RCLK;
<> 144:ef7eb2e8f9f7 37 else CRG->PLL_IFSR = CRG_PLL_IFSR_OCLK;
<> 144:ef7eb2e8f9f7 38 }
<> 144:ef7eb2e8f9f7 39
<> 144:ef7eb2e8f9f7 40 void CRG_FCLK_SourceSelect(CRG_CLK_SOURCE src)
<> 144:ef7eb2e8f9f7 41 {
<> 144:ef7eb2e8f9f7 42 assert_param(IS_CRG_FCLK_SRC(src));
<> 144:ef7eb2e8f9f7 43
<> 144:ef7eb2e8f9f7 44 if ( src == CRG_RCLK ) CRG->FCLK_SSR = CRG_FCLK_SSR_RCLK;
<> 144:ef7eb2e8f9f7 45 else if ( src == CRG_OCLK ) CRG->FCLK_SSR = CRG_FCLK_SSR_OCLK;
<> 144:ef7eb2e8f9f7 46 else CRG->FCLK_SSR = CRG_FCLK_SSR_MCLK;
<> 144:ef7eb2e8f9f7 47 }
<> 144:ef7eb2e8f9f7 48
<> 144:ef7eb2e8f9f7 49 void CRG_FCLK_SetPrescale(CRG_PREDIV prediv)
<> 144:ef7eb2e8f9f7 50 {
<> 144:ef7eb2e8f9f7 51 assert_param(IS_CRG_FCLK_PREDIV(prediv));
<> 144:ef7eb2e8f9f7 52
<> 144:ef7eb2e8f9f7 53 if ( prediv == CRG_PREDIV1 ) CRG->FCLK_PVSR = CRG_FCLK_PVSR_DIV1;
<> 144:ef7eb2e8f9f7 54 else if ( prediv == CRG_PREDIV2 ) CRG->FCLK_PVSR = CRG_FCLK_PVSR_DIV2;
<> 144:ef7eb2e8f9f7 55 else if ( prediv == CRG_PREDIV4 ) CRG->FCLK_PVSR = CRG_FCLK_PVSR_DIV4;
<> 144:ef7eb2e8f9f7 56 else CRG->FCLK_PVSR = CRG_FCLK_PVSR_DIV8;
<> 144:ef7eb2e8f9f7 57 }
<> 144:ef7eb2e8f9f7 58
<> 144:ef7eb2e8f9f7 59 void CRG_SSPCLK_SourceSelect(CRG_CLK_SOURCE src)
<> 144:ef7eb2e8f9f7 60 {
<> 144:ef7eb2e8f9f7 61 assert_param(IS_CRG_SSPCLK_SRC(src));
<> 144:ef7eb2e8f9f7 62
<> 144:ef7eb2e8f9f7 63 if ( src == CRG_CLK_DIS ) CRG->SSPCLK_SSR = CRG_SSPCLK_SSR_DIS;
<> 144:ef7eb2e8f9f7 64 else if ( src == CRG_MCLK ) CRG->SSPCLK_SSR = CRG_SSPCLK_SSR_MCLK;
<> 144:ef7eb2e8f9f7 65 else if ( src == CRG_RCLK ) CRG->SSPCLK_SSR = CRG_SSPCLK_SSR_RCLK;
<> 144:ef7eb2e8f9f7 66 else CRG->SSPCLK_SSR = CRG_SSPCLK_SSR_OCLK;
<> 144:ef7eb2e8f9f7 67 }
<> 144:ef7eb2e8f9f7 68
<> 144:ef7eb2e8f9f7 69 void CRG_SSPCLK_SetPrescale(CRG_PREDIV prediv)
<> 144:ef7eb2e8f9f7 70 {
<> 144:ef7eb2e8f9f7 71 assert_param(IS_CRG_SSPCLK_PREDIV(prediv));
<> 144:ef7eb2e8f9f7 72
<> 144:ef7eb2e8f9f7 73 if ( prediv == CRG_PREDIV1 ) CRG->SSPCLK_PVSR = CRG_SSPCLK_PVSR_DIV1;
<> 144:ef7eb2e8f9f7 74 else if ( prediv == CRG_PREDIV2 ) CRG->SSPCLK_PVSR = CRG_SSPCLK_PVSR_DIV2;
<> 144:ef7eb2e8f9f7 75 else if ( prediv == CRG_PREDIV4 ) CRG->SSPCLK_PVSR = CRG_SSPCLK_PVSR_DIV4;
<> 144:ef7eb2e8f9f7 76 else CRG->SSPCLK_PVSR = CRG_SSPCLK_PVSR_DIV8;
<> 144:ef7eb2e8f9f7 77 }
<> 144:ef7eb2e8f9f7 78
<> 144:ef7eb2e8f9f7 79 void CRG_ADCCLK_SourceSelect(CRG_CLK_SOURCE src)
<> 144:ef7eb2e8f9f7 80 {
<> 144:ef7eb2e8f9f7 81 assert_param(IS_CRG_ADCCLK_SRC(src));
<> 144:ef7eb2e8f9f7 82
<> 144:ef7eb2e8f9f7 83 if ( src == CRG_CLK_DIS ) CRG->ADCCLK_SSR = CRG_ADCCLK_SSR_DIS;
<> 144:ef7eb2e8f9f7 84 else if ( src == CRG_MCLK ) CRG->ADCCLK_SSR = CRG_ADCCLK_SSR_MCLK;
<> 144:ef7eb2e8f9f7 85 else if ( src == CRG_RCLK ) CRG->ADCCLK_SSR = CRG_ADCCLK_SSR_RCLK;
<> 144:ef7eb2e8f9f7 86 else CRG->ADCCLK_SSR = CRG_ADCCLK_SSR_OCLK;
<> 144:ef7eb2e8f9f7 87 }
<> 144:ef7eb2e8f9f7 88
<> 144:ef7eb2e8f9f7 89 void CRG_ADCCLK_SetPrescale(CRG_PREDIV prediv)
<> 144:ef7eb2e8f9f7 90 {
<> 144:ef7eb2e8f9f7 91 assert_param(IS_CRG_ADCCLK_PREDIV(prediv));
<> 144:ef7eb2e8f9f7 92
<> 144:ef7eb2e8f9f7 93 if ( prediv == CRG_PREDIV1 ) CRG->ADCCLK_PVSR = CRG_ADCCLK_PVSR_DIV1;
<> 144:ef7eb2e8f9f7 94 else if ( prediv == CRG_PREDIV2 ) CRG->ADCCLK_PVSR = CRG_ADCCLK_PVSR_DIV2;
<> 144:ef7eb2e8f9f7 95 else if ( prediv == CRG_PREDIV4 ) CRG->ADCCLK_PVSR = CRG_ADCCLK_PVSR_DIV4;
<> 144:ef7eb2e8f9f7 96 else CRG->ADCCLK_PVSR = CRG_ADCCLK_PVSR_DIV8;
<> 144:ef7eb2e8f9f7 97 }
<> 144:ef7eb2e8f9f7 98
<> 144:ef7eb2e8f9f7 99 void CRG_TIMERCLK_SourceSelect(CRG_TIMER num, CRG_CLK_SOURCE src)
<> 144:ef7eb2e8f9f7 100 {
<> 144:ef7eb2e8f9f7 101 assert_param(IS_CRG_TIMERCLK_NUM(num));
<> 144:ef7eb2e8f9f7 102 assert_param(IS_CRG_TIMERCLK_SRC(src));
<> 144:ef7eb2e8f9f7 103
<> 144:ef7eb2e8f9f7 104 if ( src == CRG_CLK_DIS ) CRG_SET_TIMERCLK_SSR(num,CRG_TIMERCLK_SSR_DIS);
<> 144:ef7eb2e8f9f7 105 else if ( src == CRG_MCLK ) CRG_SET_TIMERCLK_SSR(num,CRG_TIMERCLK_SSR_MCLK);
<> 144:ef7eb2e8f9f7 106 else if ( src == CRG_RCLK ) CRG_SET_TIMERCLK_SSR(num,CRG_TIMERCLK_SSR_RCLK);
<> 144:ef7eb2e8f9f7 107 else CRG_SET_TIMERCLK_SSR(num,CRG_TIMERCLK_SSR_OCLK);
<> 144:ef7eb2e8f9f7 108 }
<> 144:ef7eb2e8f9f7 109
<> 144:ef7eb2e8f9f7 110 void CRG_TIMERCLK_SetPrescale(CRG_TIMER num, CRG_PREDIV prediv)
<> 144:ef7eb2e8f9f7 111 {
<> 144:ef7eb2e8f9f7 112 assert_param(IS_CRG_TIMERCLK_NUM(num));
<> 144:ef7eb2e8f9f7 113 assert_param(IS_CRG_TIMERCLK_PREDIV(prediv));
<> 144:ef7eb2e8f9f7 114
<> 144:ef7eb2e8f9f7 115 if ( prediv == CRG_PREDIV1 ) CRG_SET_TIMERCLK_PREDIV(num,CRG_TIMERCLK_PVSR_DIV1);
<> 144:ef7eb2e8f9f7 116 else if ( prediv == CRG_PREDIV2 ) CRG_SET_TIMERCLK_PREDIV(num,CRG_TIMERCLK_PVSR_DIV2);
<> 144:ef7eb2e8f9f7 117 else if ( prediv == CRG_PREDIV4 ) CRG_SET_TIMERCLK_PREDIV(num,CRG_TIMERCLK_PVSR_DIV4);
<> 144:ef7eb2e8f9f7 118 else if ( prediv == CRG_PREDIV8 ) CRG_SET_TIMERCLK_PREDIV(num,CRG_TIMERCLK_PVSR_DIV8);
<> 144:ef7eb2e8f9f7 119 else if ( prediv == CRG_PREDIV16 ) CRG_SET_TIMERCLK_PREDIV(num,CRG_TIMERCLK_PVSR_DIV16);
<> 144:ef7eb2e8f9f7 120 else if ( prediv == CRG_PREDIV32 ) CRG_SET_TIMERCLK_PREDIV(num,CRG_TIMERCLK_PVSR_DIV32);
<> 144:ef7eb2e8f9f7 121 else if ( prediv == CRG_PREDIV64 ) CRG_SET_TIMERCLK_PREDIV(num,CRG_TIMERCLK_PVSR_DIV64);
<> 144:ef7eb2e8f9f7 122 else CRG_SET_TIMERCLK_PREDIV(num,CRG_TIMERCLK_PVSR_DIV128);
<> 144:ef7eb2e8f9f7 123 }
<> 144:ef7eb2e8f9f7 124
<> 144:ef7eb2e8f9f7 125 void CRG_PWMCLK_SourceSelect(CRG_PWM num, CRG_CLK_SOURCE src)
<> 144:ef7eb2e8f9f7 126 {
<> 144:ef7eb2e8f9f7 127 assert_param(IS_CRG_PWMCLK_NUM(num));
<> 144:ef7eb2e8f9f7 128 assert_param(IS_CRG_PWMCLK_SRC(src));
<> 144:ef7eb2e8f9f7 129
<> 144:ef7eb2e8f9f7 130 if ( src == CRG_CLK_DIS ) CRG_SET_PWMCLK_SSR(num,CRG_PWMCLK_SSR_DIS);
<> 144:ef7eb2e8f9f7 131 else if ( src == CRG_MCLK ) CRG_SET_PWMCLK_SSR(num,CRG_PWMCLK_SSR_MCLK);
<> 144:ef7eb2e8f9f7 132 else if ( src == CRG_RCLK ) CRG_SET_PWMCLK_SSR(num,CRG_PWMCLK_SSR_RCLK);
<> 144:ef7eb2e8f9f7 133 else CRG_SET_PWMCLK_SSR(num,CRG_PWMCLK_SSR_OCLK);
<> 144:ef7eb2e8f9f7 134 }
<> 144:ef7eb2e8f9f7 135
<> 144:ef7eb2e8f9f7 136 void CRG_PWMCLK_SetPrescale(CRG_PWM num, CRG_PREDIV prediv)
<> 144:ef7eb2e8f9f7 137 {
<> 144:ef7eb2e8f9f7 138 assert_param(IS_CRG_PWMCLK_NUM(num));
<> 144:ef7eb2e8f9f7 139 assert_param(IS_CRG_PWMCLK_PREDIV(prediv));
<> 144:ef7eb2e8f9f7 140
<> 144:ef7eb2e8f9f7 141 if ( prediv == CRG_PREDIV1 ) CRG_SET_PWMCLK_PREDIV(num,CRG_PWMCLK_PVSR_DIV1);
<> 144:ef7eb2e8f9f7 142 else if ( prediv == CRG_PREDIV2 ) CRG_SET_PWMCLK_PREDIV(num,CRG_PWMCLK_PVSR_DIV2);
<> 144:ef7eb2e8f9f7 143 else if ( prediv == CRG_PREDIV4 ) CRG_SET_PWMCLK_PREDIV(num,CRG_PWMCLK_PVSR_DIV4);
<> 144:ef7eb2e8f9f7 144 else if ( prediv == CRG_PREDIV8 ) CRG_SET_PWMCLK_PREDIV(num,CRG_PWMCLK_PVSR_DIV8);
<> 144:ef7eb2e8f9f7 145 else if ( prediv == CRG_PREDIV16 ) CRG_SET_PWMCLK_PREDIV(num,CRG_PWMCLK_PVSR_DIV16);
<> 144:ef7eb2e8f9f7 146 else if ( prediv == CRG_PREDIV32 ) CRG_SET_PWMCLK_PREDIV(num,CRG_PWMCLK_PVSR_DIV32);
<> 144:ef7eb2e8f9f7 147 else if ( prediv == CRG_PREDIV64 ) CRG_SET_PWMCLK_PREDIV(num,CRG_PWMCLK_PVSR_DIV64);
<> 144:ef7eb2e8f9f7 148 else CRG_SET_PWMCLK_PREDIV(num,CRG_PWMCLK_PVSR_DIV128);
<> 144:ef7eb2e8f9f7 149 }
<> 144:ef7eb2e8f9f7 150
<> 144:ef7eb2e8f9f7 151 void CRG_RTC_HS_SourceSelect(CRG_CLK_SOURCE src)
<> 144:ef7eb2e8f9f7 152 {
<> 144:ef7eb2e8f9f7 153 assert_param(IS_CRG_RTC_HS_SRC(src));
<> 144:ef7eb2e8f9f7 154
<> 144:ef7eb2e8f9f7 155 if ( src == CRG_CLK_DIS ) CRG->RTC_HS_SSR = CRG_RTC_HS_SSR_DIS;
<> 144:ef7eb2e8f9f7 156 else if ( src == CRG_MCLK ) CRG->RTC_HS_SSR = CRG_RTC_HS_SSR_MCLK;
<> 144:ef7eb2e8f9f7 157 else if ( src == CRG_RCLK ) CRG->RTC_HS_SSR = CRG_RTC_HS_SSR_RCLK;
<> 144:ef7eb2e8f9f7 158 else CRG->RTC_HS_SSR = CRG_RTC_HS_SSR_OCLK;
<> 144:ef7eb2e8f9f7 159
<> 144:ef7eb2e8f9f7 160 if ( src != CRG_CLK_DIS ) CRG_RTC_SourceSelect(CRG_CLK_HIGH);
<> 144:ef7eb2e8f9f7 161 }
<> 144:ef7eb2e8f9f7 162
<> 144:ef7eb2e8f9f7 163 void CRG_RTC_HS_SetPrescale(CRG_PREDIV prediv)
<> 144:ef7eb2e8f9f7 164 {
<> 144:ef7eb2e8f9f7 165 assert_param(IS_CRG_RTC_HS_PREDIV(prediv));
<> 144:ef7eb2e8f9f7 166
<> 144:ef7eb2e8f9f7 167 if ( prediv == CRG_PREDIV1 ) CRG->RTC_HS_PVSR = CRG_RTC_HS_PVSR_DIV1;
<> 144:ef7eb2e8f9f7 168 else if ( prediv == CRG_PREDIV2 ) CRG->RTC_HS_PVSR = CRG_RTC_HS_PVSR_DIV2;
<> 144:ef7eb2e8f9f7 169 else if ( prediv == CRG_PREDIV4 ) CRG->RTC_HS_PVSR = CRG_RTC_HS_PVSR_DIV4;
<> 144:ef7eb2e8f9f7 170 else if ( prediv == CRG_PREDIV8 ) CRG->RTC_HS_PVSR = CRG_RTC_HS_PVSR_DIV8;
<> 144:ef7eb2e8f9f7 171 else if ( prediv == CRG_PREDIV16 ) CRG->RTC_HS_PVSR = CRG_RTC_HS_PVSR_DIV16;
<> 144:ef7eb2e8f9f7 172 else if ( prediv == CRG_PREDIV32 ) CRG->RTC_HS_PVSR = CRG_RTC_HS_PVSR_DIV32;
<> 144:ef7eb2e8f9f7 173 else if ( prediv == CRG_PREDIV64 ) CRG->RTC_HS_PVSR = CRG_RTC_HS_PVSR_DIV64;
<> 144:ef7eb2e8f9f7 174 else CRG->RTC_HS_PVSR = CRG_RTC_HS_PVSR_DIV128;
<> 144:ef7eb2e8f9f7 175 }
<> 144:ef7eb2e8f9f7 176
<> 144:ef7eb2e8f9f7 177 void CRG_RTC_SourceSelect(CRG_CLK_LOW_SOURCE src)
<> 144:ef7eb2e8f9f7 178 {
<> 144:ef7eb2e8f9f7 179 assert_param(IS_CRG_RTC_LOW_SRC(src));
<> 144:ef7eb2e8f9f7 180
<> 144:ef7eb2e8f9f7 181 if (src == CRG_CLK_LOW)
<> 144:ef7eb2e8f9f7 182 {
<> 144:ef7eb2e8f9f7 183 CRG_RTC_HS_SourceSelect(CRG_CLK_DIS);
<> 144:ef7eb2e8f9f7 184 CRG->RTC_SSR = CRG_RTC_SSR_LW;
<> 144:ef7eb2e8f9f7 185 }
<> 144:ef7eb2e8f9f7 186 else
<> 144:ef7eb2e8f9f7 187 {
<> 144:ef7eb2e8f9f7 188 CRG->RTC_SSR = CRG_RTC_SSR_HS;
<> 144:ef7eb2e8f9f7 189 }
<> 144:ef7eb2e8f9f7 190 }
<> 144:ef7eb2e8f9f7 191
<> 144:ef7eb2e8f9f7 192 void CRG_WDOGCLK_HS_SourceSelect(CRG_CLK_SOURCE src)
<> 144:ef7eb2e8f9f7 193 {
<> 144:ef7eb2e8f9f7 194 assert_param(IS_CRG_WDOGCLK_HS_SRC(src));
<> 144:ef7eb2e8f9f7 195
<> 144:ef7eb2e8f9f7 196 if ( src == CRG_CLK_DIS ) CRG->WDOGCLK_HS_SSR = CRG_WDOGCLK_HS_SSR_DIS;
<> 144:ef7eb2e8f9f7 197 else if ( src == CRG_MCLK ) CRG->WDOGCLK_HS_SSR = CRG_WDOGCLK_HS_SSR_MCLK;
<> 144:ef7eb2e8f9f7 198 else if ( src == CRG_RCLK ) CRG->WDOGCLK_HS_SSR = CRG_WDOGCLK_HS_SSR_RCLK;
<> 144:ef7eb2e8f9f7 199 else CRG->WDOGCLK_HS_SSR = CRG_WDOGCLK_HS_SSR_OCLK;
<> 144:ef7eb2e8f9f7 200
<> 144:ef7eb2e8f9f7 201 if ( src != CRG_CLK_DIS ) CRG_WDOGCLK_SourceSelect(CRG_CLK_HIGH);
<> 144:ef7eb2e8f9f7 202 }
<> 144:ef7eb2e8f9f7 203
<> 144:ef7eb2e8f9f7 204 void CRG_WDOGCLK_HS_SetPrescale(CRG_PREDIV prediv)
<> 144:ef7eb2e8f9f7 205 {
<> 144:ef7eb2e8f9f7 206 assert_param(IS_CRG_WDOGCLK_HS_PREDIV(prediv));
<> 144:ef7eb2e8f9f7 207
<> 144:ef7eb2e8f9f7 208 if ( prediv == CRG_PREDIV1 ) CRG->WDOGCLK_HS_PVSR = CRG_WDOGCLK_HS_PVSR_DIV1;
<> 144:ef7eb2e8f9f7 209 else if ( prediv == CRG_PREDIV2 ) CRG->WDOGCLK_HS_PVSR = CRG_WDOGCLK_HS_PVSR_DIV2;
<> 144:ef7eb2e8f9f7 210 else if ( prediv == CRG_PREDIV4 ) CRG->WDOGCLK_HS_PVSR = CRG_WDOGCLK_HS_PVSR_DIV4;
<> 144:ef7eb2e8f9f7 211 else if ( prediv == CRG_PREDIV8 ) CRG->WDOGCLK_HS_PVSR = CRG_WDOGCLK_HS_PVSR_DIV8;
<> 144:ef7eb2e8f9f7 212 else if ( prediv == CRG_PREDIV16 ) CRG->WDOGCLK_HS_PVSR = CRG_WDOGCLK_HS_PVSR_DIV16;
<> 144:ef7eb2e8f9f7 213 else if ( prediv == CRG_PREDIV32 ) CRG->WDOGCLK_HS_PVSR = CRG_WDOGCLK_HS_PVSR_DIV32;
<> 144:ef7eb2e8f9f7 214 else if ( prediv == CRG_PREDIV64 ) CRG->WDOGCLK_HS_PVSR = CRG_WDOGCLK_HS_PVSR_DIV64;
<> 144:ef7eb2e8f9f7 215 else CRG->WDOGCLK_HS_PVSR = CRG_WDOGCLK_HS_PVSR_DIV128;
<> 144:ef7eb2e8f9f7 216 }
<> 144:ef7eb2e8f9f7 217
<> 144:ef7eb2e8f9f7 218 void CRG_WDOGCLK_SourceSelect(CRG_CLK_LOW_SOURCE src)
<> 144:ef7eb2e8f9f7 219 {
<> 144:ef7eb2e8f9f7 220 assert_param(IS_CRG_WDOGCLK_LOW_SRC(src));
<> 144:ef7eb2e8f9f7 221
<> 144:ef7eb2e8f9f7 222 if (src == CRG_CLK_LOW)
<> 144:ef7eb2e8f9f7 223 {
<> 144:ef7eb2e8f9f7 224 CRG_WDOGCLK_HS_SourceSelect(CRG_CLK_DIS);
<> 144:ef7eb2e8f9f7 225 CRG->WDOGCLK_SSR = CRG_WDOGCLK_SSR_LW;
<> 144:ef7eb2e8f9f7 226 }
<> 144:ef7eb2e8f9f7 227 else
<> 144:ef7eb2e8f9f7 228 {
<> 144:ef7eb2e8f9f7 229 CRG->WDOGCLK_SSR = CRG_WDOGCLK_SSR_HS;
<> 144:ef7eb2e8f9f7 230 }
<> 144:ef7eb2e8f9f7 231 }
<> 144:ef7eb2e8f9f7 232
<> 144:ef7eb2e8f9f7 233 void CRG_UARTCLK_SourceSelect(CRG_CLK_SOURCE src)
<> 144:ef7eb2e8f9f7 234 {
<> 144:ef7eb2e8f9f7 235 assert_param(IS_CRG_UARTCLK_SRC(src));
<> 144:ef7eb2e8f9f7 236
<> 144:ef7eb2e8f9f7 237 if ( src == CRG_CLK_DIS ) CRG->UARTCLK_SSR = CRG_UARTCLK_SSR_DIS;
<> 144:ef7eb2e8f9f7 238 else if ( src == CRG_MCLK ) CRG->UARTCLK_SSR = CRG_UARTCLK_SSR_MCLK;
<> 144:ef7eb2e8f9f7 239 else if ( src == CRG_RCLK ) CRG->UARTCLK_SSR = CRG_UARTCLK_SSR_RCLK;
<> 144:ef7eb2e8f9f7 240 else CRG->UARTCLK_SSR = CRG_UARTCLK_SSR_OCLK;
<> 144:ef7eb2e8f9f7 241 }
<> 144:ef7eb2e8f9f7 242
<> 144:ef7eb2e8f9f7 243 void CRG_UARTCLK_SetPrescale(CRG_PREDIV prediv)
<> 144:ef7eb2e8f9f7 244 {
<> 144:ef7eb2e8f9f7 245 assert_param(IS_CRG_UARTCLK_PREDIV(prediv));
<> 144:ef7eb2e8f9f7 246
<> 144:ef7eb2e8f9f7 247 if ( prediv == CRG_PREDIV1 ) CRG->UARTCLK_PVSR = CRG_UARTCLK_PVSR_DIV1;
<> 144:ef7eb2e8f9f7 248 else if ( prediv == CRG_PREDIV2 ) CRG->UARTCLK_PVSR = CRG_UARTCLK_PVSR_DIV2;
<> 144:ef7eb2e8f9f7 249 else if ( prediv == CRG_PREDIV4 ) CRG->UARTCLK_PVSR = CRG_UARTCLK_PVSR_DIV4;
<> 144:ef7eb2e8f9f7 250 else CRG->UARTCLK_PVSR = CRG_UARTCLK_PVSR_DIV8;
<> 144:ef7eb2e8f9f7 251 }
<> 144:ef7eb2e8f9f7 252
<> 144:ef7eb2e8f9f7 253 void CRG_MII_Enable(FunctionalState rx_clk, FunctionalState tx_clk)
<> 144:ef7eb2e8f9f7 254 {
<> 144:ef7eb2e8f9f7 255 assert_param(IS_FUNCTIONAL_STATE(rx_clk));
<> 144:ef7eb2e8f9f7 256 assert_param(IS_FUNCTIONAL_STATE(tx_clk));
<> 144:ef7eb2e8f9f7 257
<> 144:ef7eb2e8f9f7 258 if ( rx_clk != DISABLE ) CRG->MIICLK_ECR |= CRG_MIICLK_ECR_EN_RXCLK;
<> 144:ef7eb2e8f9f7 259 else CRG->MIICLK_ECR &= ~(CRG_MIICLK_ECR_EN_RXCLK);
<> 144:ef7eb2e8f9f7 260
<> 144:ef7eb2e8f9f7 261 if ( tx_clk != DISABLE ) CRG->MIICLK_ECR |= CRG_MIICLK_ECR_EN_TXCLK;
<> 144:ef7eb2e8f9f7 262 else CRG->MIICLK_ECR &= ~(CRG_MIICLK_ECR_EN_TXCLK);
<> 144:ef7eb2e8f9f7 263 }
<> 144:ef7eb2e8f9f7 264
<> 144:ef7eb2e8f9f7 265 void CRG_SetMonitoringClock(uint32_t value)
<> 144:ef7eb2e8f9f7 266 {
<> 144:ef7eb2e8f9f7 267 assert_param(IS_CRG_MONCLK_SSR(value));
<> 144:ef7eb2e8f9f7 268
<> 144:ef7eb2e8f9f7 269 CRG->MONCLK_SSR = value;
<> 144:ef7eb2e8f9f7 270 }
<> 144:ef7eb2e8f9f7 271
<> 144:ef7eb2e8f9f7 272 uint32_t CRG_GetMonitoringClock(void)
<> 144:ef7eb2e8f9f7 273 {
<> 144:ef7eb2e8f9f7 274 return (uint8_t)CRG->MONCLK_SSR;
<> 144:ef7eb2e8f9f7 275 }
<> 144:ef7eb2e8f9f7 276