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targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_i2s_ex.h@144:ef7eb2e8f9f7, 2016-09-02 (annotated)
- Committer:
- <>
- Date:
- Fri Sep 02 15:07:44 2016 +0100
- Revision:
- 144:ef7eb2e8f9f7
- Parent:
- 0:9b334a45a8ff
This updates the lib to the mbed lib v125
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 144:ef7eb2e8f9f7 | 1 | /** |
<> | 144:ef7eb2e8f9f7 | 2 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 3 | * @file stm32f3xx_hal_i2s_ex.h |
<> | 144:ef7eb2e8f9f7 | 4 | * @author MCD Application Team |
<> | 144:ef7eb2e8f9f7 | 5 | * @version V1.3.0 |
<> | 144:ef7eb2e8f9f7 | 6 | * @date 01-July-2016 |
<> | 144:ef7eb2e8f9f7 | 7 | * @brief Header file of I2S HAL Extended module. |
<> | 144:ef7eb2e8f9f7 | 8 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 9 | * @attention |
<> | 144:ef7eb2e8f9f7 | 10 | * |
<> | 144:ef7eb2e8f9f7 | 11 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
<> | 144:ef7eb2e8f9f7 | 12 | * |
<> | 144:ef7eb2e8f9f7 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
<> | 144:ef7eb2e8f9f7 | 14 | * are permitted provided that the following conditions are met: |
<> | 144:ef7eb2e8f9f7 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
<> | 144:ef7eb2e8f9f7 | 16 | * this list of conditions and the following disclaimer. |
<> | 144:ef7eb2e8f9f7 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
<> | 144:ef7eb2e8f9f7 | 18 | * this list of conditions and the following disclaimer in the documentation |
<> | 144:ef7eb2e8f9f7 | 19 | * and/or other materials provided with the distribution. |
<> | 144:ef7eb2e8f9f7 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
<> | 144:ef7eb2e8f9f7 | 21 | * may be used to endorse or promote products derived from this software |
<> | 144:ef7eb2e8f9f7 | 22 | * without specific prior written permission. |
<> | 144:ef7eb2e8f9f7 | 23 | * |
<> | 144:ef7eb2e8f9f7 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
<> | 144:ef7eb2e8f9f7 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
<> | 144:ef7eb2e8f9f7 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
<> | 144:ef7eb2e8f9f7 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
<> | 144:ef7eb2e8f9f7 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
<> | 144:ef7eb2e8f9f7 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
<> | 144:ef7eb2e8f9f7 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
<> | 144:ef7eb2e8f9f7 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
<> | 144:ef7eb2e8f9f7 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
<> | 144:ef7eb2e8f9f7 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
<> | 144:ef7eb2e8f9f7 | 34 | * |
<> | 144:ef7eb2e8f9f7 | 35 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 36 | */ |
<> | 144:ef7eb2e8f9f7 | 37 | |
<> | 144:ef7eb2e8f9f7 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 39 | #ifndef __STM32F3xx_HAL_I2S_EX_H |
<> | 144:ef7eb2e8f9f7 | 40 | #define __STM32F3xx_HAL_I2S_EX_H |
<> | 144:ef7eb2e8f9f7 | 41 | |
<> | 144:ef7eb2e8f9f7 | 42 | #ifdef __cplusplus |
<> | 144:ef7eb2e8f9f7 | 43 | extern "C" { |
<> | 144:ef7eb2e8f9f7 | 44 | #endif |
<> | 144:ef7eb2e8f9f7 | 45 | |
<> | 144:ef7eb2e8f9f7 | 46 | #if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \ |
<> | 144:ef7eb2e8f9f7 | 47 | defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \ |
<> | 144:ef7eb2e8f9f7 | 48 | defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) || \ |
<> | 144:ef7eb2e8f9f7 | 49 | defined(STM32F373xC) || defined(STM32F378xx) |
<> | 144:ef7eb2e8f9f7 | 50 | |
<> | 144:ef7eb2e8f9f7 | 51 | /* Includes ------------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 52 | #include "stm32f3xx_hal_def.h" |
<> | 144:ef7eb2e8f9f7 | 53 | |
<> | 144:ef7eb2e8f9f7 | 54 | /** @addtogroup STM32F3xx_HAL_Driver |
<> | 144:ef7eb2e8f9f7 | 55 | * @{ |
<> | 144:ef7eb2e8f9f7 | 56 | */ |
<> | 144:ef7eb2e8f9f7 | 57 | |
<> | 144:ef7eb2e8f9f7 | 58 | /** @addtogroup I2SEx I2SEx |
<> | 144:ef7eb2e8f9f7 | 59 | * @{ |
<> | 144:ef7eb2e8f9f7 | 60 | */ |
<> | 144:ef7eb2e8f9f7 | 61 | |
<> | 144:ef7eb2e8f9f7 | 62 | /* Exported types ------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 63 | /* Exported constants --------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 64 | /* Exported macros ------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 65 | /** @defgroup I2SEx_Exported_Macros I2S Extended Exported Macros |
<> | 144:ef7eb2e8f9f7 | 66 | * @{ |
<> | 144:ef7eb2e8f9f7 | 67 | */ |
<> | 144:ef7eb2e8f9f7 | 68 | #if defined(SPI_I2S_FULLDUPLEX_SUPPORT) |
<> | 144:ef7eb2e8f9f7 | 69 | #define I2SxEXT(__INSTANCE__) ((__INSTANCE__) == (SPI2)? (SPI_TypeDef *)(I2S2ext_BASE): (SPI_TypeDef *)(I2S3ext_BASE)) |
<> | 144:ef7eb2e8f9f7 | 70 | |
<> | 144:ef7eb2e8f9f7 | 71 | /** @brief Enable or disable the specified I2SExt peripheral. |
<> | 144:ef7eb2e8f9f7 | 72 | * @param __HANDLE__: specifies the I2S Handle. |
<> | 144:ef7eb2e8f9f7 | 73 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 74 | */ |
<> | 144:ef7eb2e8f9f7 | 75 | #define __HAL_I2SEXT_ENABLE(__HANDLE__) (I2SxEXT((__HANDLE__)->Instance)->I2SCFGR |= SPI_I2SCFGR_I2SE) |
<> | 144:ef7eb2e8f9f7 | 76 | #define __HAL_I2SEXT_DISABLE(__HANDLE__) (I2SxEXT((__HANDLE__)->Instance)->I2SCFGR &= ~SPI_I2SCFGR_I2SE) |
<> | 144:ef7eb2e8f9f7 | 77 | |
<> | 144:ef7eb2e8f9f7 | 78 | /** @brief Enable or disable the specified I2SExt interrupts. |
<> | 144:ef7eb2e8f9f7 | 79 | * @param __HANDLE__: specifies the I2S Handle. |
<> | 144:ef7eb2e8f9f7 | 80 | * @param __INTERRUPT__: specifies the interrupt source to enable or disable. |
<> | 144:ef7eb2e8f9f7 | 81 | * This parameter can be one of the following values: |
<> | 144:ef7eb2e8f9f7 | 82 | * @arg I2S_IT_TXE: Tx buffer empty interrupt enable |
<> | 144:ef7eb2e8f9f7 | 83 | * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable |
<> | 144:ef7eb2e8f9f7 | 84 | * @arg I2S_IT_ERR: Error interrupt enable |
<> | 144:ef7eb2e8f9f7 | 85 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 86 | */ |
<> | 144:ef7eb2e8f9f7 | 87 | #define __HAL_I2SEXT_ENABLE_IT(__HANDLE__, __INTERRUPT__) (I2SxEXT((__HANDLE__)->Instance)->CR2 |= (__INTERRUPT__)) |
<> | 144:ef7eb2e8f9f7 | 88 | #define __HAL_I2SEXT_DISABLE_IT(__HANDLE__, __INTERRUPT__) (I2SxEXT((__HANDLE__)->Instance)->CR2 &= ~(__INTERRUPT__)) |
<> | 144:ef7eb2e8f9f7 | 89 | |
<> | 144:ef7eb2e8f9f7 | 90 | /** @brief Checks if the specified I2SExt interrupt source is enabled or disabled. |
<> | 144:ef7eb2e8f9f7 | 91 | * @param __HANDLE__: specifies the I2S Handle. |
<> | 144:ef7eb2e8f9f7 | 92 | * This parameter can be I2S where x: 1, 2, or 3 to select the I2S peripheral. |
<> | 144:ef7eb2e8f9f7 | 93 | * @param __INTERRUPT__: specifies the I2S interrupt source to check. |
<> | 144:ef7eb2e8f9f7 | 94 | * This parameter can be one of the following values: |
<> | 144:ef7eb2e8f9f7 | 95 | * @arg I2S_IT_TXE: Tx buffer empty interrupt enable |
<> | 144:ef7eb2e8f9f7 | 96 | * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable |
<> | 144:ef7eb2e8f9f7 | 97 | * @arg I2S_IT_ERR: Error interrupt enable |
<> | 144:ef7eb2e8f9f7 | 98 | * @retval The new state of __IT__ (TRUE or FALSE). |
<> | 144:ef7eb2e8f9f7 | 99 | */ |
<> | 144:ef7eb2e8f9f7 | 100 | #define __HAL_I2SEXT_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((I2SxEXT((__HANDLE__)->Instance)->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
<> | 144:ef7eb2e8f9f7 | 101 | |
<> | 144:ef7eb2e8f9f7 | 102 | /** @brief Checks whether the specified I2SExt flag is set or not. |
<> | 144:ef7eb2e8f9f7 | 103 | * @param __HANDLE__: specifies the I2S Handle. |
<> | 144:ef7eb2e8f9f7 | 104 | * @param __FLAG__: specifies the flag to check. |
<> | 144:ef7eb2e8f9f7 | 105 | * This parameter can be one of the following values: |
<> | 144:ef7eb2e8f9f7 | 106 | * @arg I2S_FLAG_RXNE: Receive buffer not empty flag |
<> | 144:ef7eb2e8f9f7 | 107 | * @arg I2S_FLAG_TXE: Transmit buffer empty flag |
<> | 144:ef7eb2e8f9f7 | 108 | * @arg I2S_FLAG_UDR: Underrun flag |
<> | 144:ef7eb2e8f9f7 | 109 | * @arg I2S_FLAG_OVR: Overrun flag |
<> | 144:ef7eb2e8f9f7 | 110 | * @arg I2S_FLAG_FRE: Frame error flag |
<> | 144:ef7eb2e8f9f7 | 111 | * @arg I2S_FLAG_CHSIDE: Channel Side flag |
<> | 144:ef7eb2e8f9f7 | 112 | * @arg I2S_FLAG_BSY: Busy flag |
<> | 144:ef7eb2e8f9f7 | 113 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
<> | 144:ef7eb2e8f9f7 | 114 | */ |
<> | 144:ef7eb2e8f9f7 | 115 | #define __HAL_I2SEXT_GET_FLAG(__HANDLE__, __FLAG__) (((I2SxEXT((__HANDLE__)->Instance)->SR) & (__FLAG__)) == (__FLAG__)) |
<> | 144:ef7eb2e8f9f7 | 116 | |
<> | 144:ef7eb2e8f9f7 | 117 | /** @brief Clears the I2SExt OVR pending flag. |
<> | 144:ef7eb2e8f9f7 | 118 | * @param __HANDLE__: specifies the I2S Handle. |
<> | 144:ef7eb2e8f9f7 | 119 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 120 | */ |
<> | 144:ef7eb2e8f9f7 | 121 | #define __HAL_I2SEXT_CLEAR_OVRFLAG(__HANDLE__) do{(I2SxEXT((__HANDLE__)->Instance)->DR;\ |
<> | 144:ef7eb2e8f9f7 | 122 | (I2SxEXT((__HANDLE__)->Instance)->SR;}while(0) |
<> | 144:ef7eb2e8f9f7 | 123 | /** @brief Clears the I2SExt UDR pending flag. |
<> | 144:ef7eb2e8f9f7 | 124 | * @param __HANDLE__: specifies the I2S Handle. |
<> | 144:ef7eb2e8f9f7 | 125 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 126 | */ |
<> | 144:ef7eb2e8f9f7 | 127 | #define __HAL_I2SEXT_CLEAR_UDRFLAG(__HANDLE__)(I2SxEXT((__HANDLE__)->Instance)->SR) |
<> | 144:ef7eb2e8f9f7 | 128 | #endif /* SPI_I2S_FULLDUPLEX_SUPPORT */ |
<> | 144:ef7eb2e8f9f7 | 129 | /** |
<> | 144:ef7eb2e8f9f7 | 130 | * @} |
<> | 144:ef7eb2e8f9f7 | 131 | */ |
<> | 144:ef7eb2e8f9f7 | 132 | |
<> | 144:ef7eb2e8f9f7 | 133 | |
<> | 144:ef7eb2e8f9f7 | 134 | /* Exported functions --------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 135 | /* Initialization/de-initialization functions ********************************/ |
<> | 144:ef7eb2e8f9f7 | 136 | /** @addtogroup I2SEx_Exported_Functions I2S Extended Exported Functions |
<> | 144:ef7eb2e8f9f7 | 137 | * @{ |
<> | 144:ef7eb2e8f9f7 | 138 | */ |
<> | 144:ef7eb2e8f9f7 | 139 | |
<> | 144:ef7eb2e8f9f7 | 140 | #if defined(SPI_I2S_FULLDUPLEX_SUPPORT) |
<> | 144:ef7eb2e8f9f7 | 141 | /** @addtogroup I2SEx_Exported_Functions_Group1 I2S Extended Features Functions |
<> | 144:ef7eb2e8f9f7 | 142 | * @{ |
<> | 144:ef7eb2e8f9f7 | 143 | */ |
<> | 144:ef7eb2e8f9f7 | 144 | |
<> | 144:ef7eb2e8f9f7 | 145 | /* Extended features functions ************************************************/ |
<> | 144:ef7eb2e8f9f7 | 146 | /* Blocking mode: Polling */ |
<> | 144:ef7eb2e8f9f7 | 147 | HAL_StatusTypeDef HAL_I2SEx_TransmitReceive(I2S_HandleTypeDef *hi2s, uint16_t *pTxData, uint16_t *pRxData, uint16_t Size, uint32_t Timeout); |
<> | 144:ef7eb2e8f9f7 | 148 | /* Non-Blocking mode: Interrupt */ |
<> | 144:ef7eb2e8f9f7 | 149 | HAL_StatusTypeDef HAL_I2SEx_TransmitReceive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pTxData, uint16_t *pRxData, uint16_t Size); |
<> | 144:ef7eb2e8f9f7 | 150 | /* Non-Blocking mode: DMA */ |
<> | 144:ef7eb2e8f9f7 | 151 | HAL_StatusTypeDef HAL_I2SEx_TransmitReceive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pTxData, uint16_t *pRxData, uint16_t Size); |
<> | 144:ef7eb2e8f9f7 | 152 | /** |
<> | 144:ef7eb2e8f9f7 | 153 | * @} |
<> | 144:ef7eb2e8f9f7 | 154 | */ |
<> | 144:ef7eb2e8f9f7 | 155 | #endif /* SPI_I2S_FULLDUPLEX_SUPPORT */ |
<> | 144:ef7eb2e8f9f7 | 156 | |
<> | 144:ef7eb2e8f9f7 | 157 | /** |
<> | 144:ef7eb2e8f9f7 | 158 | * @} |
<> | 144:ef7eb2e8f9f7 | 159 | */ |
<> | 144:ef7eb2e8f9f7 | 160 | |
<> | 144:ef7eb2e8f9f7 | 161 | /** |
<> | 144:ef7eb2e8f9f7 | 162 | * @} |
<> | 144:ef7eb2e8f9f7 | 163 | */ |
<> | 144:ef7eb2e8f9f7 | 164 | |
<> | 144:ef7eb2e8f9f7 | 165 | /** @addtogroup I2S I2S |
<> | 144:ef7eb2e8f9f7 | 166 | * @{ |
<> | 144:ef7eb2e8f9f7 | 167 | */ |
<> | 144:ef7eb2e8f9f7 | 168 | |
<> | 144:ef7eb2e8f9f7 | 169 | /** @addtogroup I2S_Exported_Functions I2S Exported Functions |
<> | 144:ef7eb2e8f9f7 | 170 | * @{ |
<> | 144:ef7eb2e8f9f7 | 171 | */ |
<> | 144:ef7eb2e8f9f7 | 172 | #if defined(SPI_I2S_FULLDUPLEX_SUPPORT) |
<> | 144:ef7eb2e8f9f7 | 173 | /** @addtogroup I2S_Exported_Functions_Group2 IO operation functions |
<> | 144:ef7eb2e8f9f7 | 174 | * @{ |
<> | 144:ef7eb2e8f9f7 | 175 | */ |
<> | 144:ef7eb2e8f9f7 | 176 | /* I2S IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */ |
<> | 144:ef7eb2e8f9f7 | 177 | void HAL_I2S_FullDuplex_IRQHandler(I2S_HandleTypeDef *hi2s); |
<> | 144:ef7eb2e8f9f7 | 178 | void HAL_I2S_TxRxCpltCallback(I2S_HandleTypeDef *hi2s); |
<> | 144:ef7eb2e8f9f7 | 179 | /** |
<> | 144:ef7eb2e8f9f7 | 180 | * @} |
<> | 144:ef7eb2e8f9f7 | 181 | */ |
<> | 144:ef7eb2e8f9f7 | 182 | #endif /* SPI_I2S_FULLDUPLEX_SUPPORT */ |
<> | 144:ef7eb2e8f9f7 | 183 | |
<> | 144:ef7eb2e8f9f7 | 184 | /** @addtogroup I2S_Exported_Functions_Group3 Peripheral State and Errors functions |
<> | 144:ef7eb2e8f9f7 | 185 | * @{ |
<> | 144:ef7eb2e8f9f7 | 186 | */ |
<> | 144:ef7eb2e8f9f7 | 187 | /* Peripheral Control and State functions ************************************/ |
<> | 144:ef7eb2e8f9f7 | 188 | HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s); |
<> | 144:ef7eb2e8f9f7 | 189 | HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s); |
<> | 144:ef7eb2e8f9f7 | 190 | HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s); |
<> | 144:ef7eb2e8f9f7 | 191 | |
<> | 144:ef7eb2e8f9f7 | 192 | /** |
<> | 144:ef7eb2e8f9f7 | 193 | * @} |
<> | 144:ef7eb2e8f9f7 | 194 | */ |
<> | 144:ef7eb2e8f9f7 | 195 | |
<> | 144:ef7eb2e8f9f7 | 196 | /** |
<> | 144:ef7eb2e8f9f7 | 197 | * @} |
<> | 144:ef7eb2e8f9f7 | 198 | */ |
<> | 144:ef7eb2e8f9f7 | 199 | |
<> | 144:ef7eb2e8f9f7 | 200 | /** |
<> | 144:ef7eb2e8f9f7 | 201 | * @} |
<> | 144:ef7eb2e8f9f7 | 202 | */ |
<> | 144:ef7eb2e8f9f7 | 203 | |
<> | 144:ef7eb2e8f9f7 | 204 | /** |
<> | 144:ef7eb2e8f9f7 | 205 | * @} |
<> | 144:ef7eb2e8f9f7 | 206 | */ |
<> | 144:ef7eb2e8f9f7 | 207 | #endif /* STM32F302xE || STM32F303xE || STM32F398xx || */ |
<> | 144:ef7eb2e8f9f7 | 208 | /* STM32F302xC || STM32F303xC || STM32F358xx || */ |
<> | 144:ef7eb2e8f9f7 | 209 | /* STM32F301x8 || STM32F302x8 || STM32F318xx || */ |
<> | 144:ef7eb2e8f9f7 | 210 | /* STM32F373xC || STM32F378xx */ |
<> | 144:ef7eb2e8f9f7 | 211 | |
<> | 144:ef7eb2e8f9f7 | 212 | #ifdef __cplusplus |
<> | 144:ef7eb2e8f9f7 | 213 | } |
<> | 144:ef7eb2e8f9f7 | 214 | #endif |
<> | 144:ef7eb2e8f9f7 | 215 | |
<> | 144:ef7eb2e8f9f7 | 216 | |
<> | 144:ef7eb2e8f9f7 | 217 | #endif /* __STM32F3xx_HAL_I2S_EX_H */ |
<> | 144:ef7eb2e8f9f7 | 218 | |
<> | 144:ef7eb2e8f9f7 | 219 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |