MBED-DEV only fro Nucleo STM32F303K8T6
Fork of mbed-dev by
targets/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_pcd.h@151:acf04f8e7d03, 2016-11-19 (annotated)
- Committer:
- pravinautosys
- Date:
- Sat Nov 19 10:38:54 2016 +0000
- Revision:
- 151:acf04f8e7d03
- Parent:
- 149:156823d33999
MyMBED-DEVWithSTM32F303K8T6;
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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<> | 144:ef7eb2e8f9f7 | 1 | /** |
<> | 144:ef7eb2e8f9f7 | 2 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 3 | * @file stm32f3xx_hal_pcd.h |
<> | 144:ef7eb2e8f9f7 | 4 | * @author MCD Application Team |
<> | 144:ef7eb2e8f9f7 | 5 | * @version V1.3.0 |
<> | 144:ef7eb2e8f9f7 | 6 | * @date 01-July-2016 |
<> | 144:ef7eb2e8f9f7 | 7 | * @brief Header file of PCD HAL module. |
<> | 144:ef7eb2e8f9f7 | 8 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 9 | * @attention |
<> | 144:ef7eb2e8f9f7 | 10 | * |
<> | 144:ef7eb2e8f9f7 | 11 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
<> | 144:ef7eb2e8f9f7 | 12 | * |
<> | 144:ef7eb2e8f9f7 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
<> | 144:ef7eb2e8f9f7 | 14 | * are permitted provided that the following conditions are met: |
<> | 144:ef7eb2e8f9f7 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
<> | 144:ef7eb2e8f9f7 | 16 | * this list of conditions and the following disclaimer. |
<> | 144:ef7eb2e8f9f7 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
<> | 144:ef7eb2e8f9f7 | 18 | * this list of conditions and the following disclaimer in the documentation |
<> | 144:ef7eb2e8f9f7 | 19 | * and/or other materials provided with the distribution. |
<> | 144:ef7eb2e8f9f7 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
<> | 144:ef7eb2e8f9f7 | 21 | * may be used to endorse or promote products derived from this software |
<> | 144:ef7eb2e8f9f7 | 22 | * without specific prior written permission. |
<> | 144:ef7eb2e8f9f7 | 23 | * |
<> | 144:ef7eb2e8f9f7 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
<> | 144:ef7eb2e8f9f7 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
<> | 144:ef7eb2e8f9f7 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
<> | 144:ef7eb2e8f9f7 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
<> | 144:ef7eb2e8f9f7 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
<> | 144:ef7eb2e8f9f7 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
<> | 144:ef7eb2e8f9f7 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
<> | 144:ef7eb2e8f9f7 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
<> | 144:ef7eb2e8f9f7 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
<> | 144:ef7eb2e8f9f7 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
<> | 144:ef7eb2e8f9f7 | 34 | * |
<> | 144:ef7eb2e8f9f7 | 35 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 36 | */ |
<> | 144:ef7eb2e8f9f7 | 37 | |
<> | 144:ef7eb2e8f9f7 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 39 | #ifndef __STM32F3xx_HAL_PCD_H |
<> | 144:ef7eb2e8f9f7 | 40 | #define __STM32F3xx_HAL_PCD_H |
<> | 144:ef7eb2e8f9f7 | 41 | |
<> | 144:ef7eb2e8f9f7 | 42 | #ifdef __cplusplus |
<> | 144:ef7eb2e8f9f7 | 43 | extern "C" { |
<> | 144:ef7eb2e8f9f7 | 44 | #endif |
<> | 144:ef7eb2e8f9f7 | 45 | |
<> | 144:ef7eb2e8f9f7 | 46 | #if defined(STM32F302xE) || defined(STM32F303xE) || \ |
<> | 144:ef7eb2e8f9f7 | 47 | defined(STM32F302xC) || defined(STM32F303xC) || \ |
<> | 144:ef7eb2e8f9f7 | 48 | defined(STM32F302x8) || \ |
<> | 144:ef7eb2e8f9f7 | 49 | defined(STM32F373xC) |
<> | 144:ef7eb2e8f9f7 | 50 | |
<> | 144:ef7eb2e8f9f7 | 51 | /* Includes ------------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 52 | #include "stm32f3xx_hal_def.h" |
<> | 144:ef7eb2e8f9f7 | 53 | |
<> | 144:ef7eb2e8f9f7 | 54 | /** @addtogroup STM32F3xx_HAL_Driver |
<> | 144:ef7eb2e8f9f7 | 55 | * @{ |
<> | 144:ef7eb2e8f9f7 | 56 | */ |
<> | 144:ef7eb2e8f9f7 | 57 | |
<> | 144:ef7eb2e8f9f7 | 58 | /** @addtogroup PCD |
<> | 144:ef7eb2e8f9f7 | 59 | * @{ |
<> | 144:ef7eb2e8f9f7 | 60 | */ |
<> | 144:ef7eb2e8f9f7 | 61 | |
<> | 144:ef7eb2e8f9f7 | 62 | /* Exported types ------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 63 | /** @defgroup PCD_Exported_Types PCD Exported Types |
<> | 144:ef7eb2e8f9f7 | 64 | * @{ |
<> | 144:ef7eb2e8f9f7 | 65 | */ |
<> | 144:ef7eb2e8f9f7 | 66 | |
<> | 144:ef7eb2e8f9f7 | 67 | /** |
<> | 144:ef7eb2e8f9f7 | 68 | * @brief PCD State structure definition |
<> | 144:ef7eb2e8f9f7 | 69 | */ |
<> | 144:ef7eb2e8f9f7 | 70 | typedef enum |
<> | 144:ef7eb2e8f9f7 | 71 | { |
<> | 144:ef7eb2e8f9f7 | 72 | HAL_PCD_STATE_RESET = 0x00, |
<> | 144:ef7eb2e8f9f7 | 73 | HAL_PCD_STATE_READY = 0x01, |
<> | 144:ef7eb2e8f9f7 | 74 | HAL_PCD_STATE_ERROR = 0x02, |
<> | 144:ef7eb2e8f9f7 | 75 | HAL_PCD_STATE_BUSY = 0x03, |
<> | 144:ef7eb2e8f9f7 | 76 | HAL_PCD_STATE_TIMEOUT = 0x04 |
<> | 144:ef7eb2e8f9f7 | 77 | } PCD_StateTypeDef; |
<> | 144:ef7eb2e8f9f7 | 78 | |
<> | 144:ef7eb2e8f9f7 | 79 | /** |
<> | 144:ef7eb2e8f9f7 | 80 | * @brief PCD double buffered endpoint direction |
<> | 144:ef7eb2e8f9f7 | 81 | */ |
<> | 144:ef7eb2e8f9f7 | 82 | typedef enum |
<> | 144:ef7eb2e8f9f7 | 83 | { |
<> | 144:ef7eb2e8f9f7 | 84 | PCD_EP_DBUF_OUT, |
<> | 144:ef7eb2e8f9f7 | 85 | PCD_EP_DBUF_IN, |
<> | 144:ef7eb2e8f9f7 | 86 | PCD_EP_DBUF_ERR, |
<> | 144:ef7eb2e8f9f7 | 87 | }PCD_EP_DBUF_DIR; |
<> | 144:ef7eb2e8f9f7 | 88 | |
<> | 144:ef7eb2e8f9f7 | 89 | /** |
<> | 144:ef7eb2e8f9f7 | 90 | * @brief PCD endpoint buffer number |
<> | 144:ef7eb2e8f9f7 | 91 | */ |
<> | 144:ef7eb2e8f9f7 | 92 | typedef enum |
<> | 144:ef7eb2e8f9f7 | 93 | { |
<> | 144:ef7eb2e8f9f7 | 94 | PCD_EP_NOBUF, |
<> | 144:ef7eb2e8f9f7 | 95 | PCD_EP_BUF0, |
<> | 144:ef7eb2e8f9f7 | 96 | PCD_EP_BUF1 |
<> | 144:ef7eb2e8f9f7 | 97 | }PCD_EP_BUF_NUM; |
<> | 144:ef7eb2e8f9f7 | 98 | |
<> | 144:ef7eb2e8f9f7 | 99 | /** |
<> | 144:ef7eb2e8f9f7 | 100 | * @brief PCD Initialization Structure definition |
<> | 144:ef7eb2e8f9f7 | 101 | */ |
<> | 144:ef7eb2e8f9f7 | 102 | typedef struct |
<> | 144:ef7eb2e8f9f7 | 103 | { |
<> | 144:ef7eb2e8f9f7 | 104 | uint32_t dev_endpoints; /*!< Device Endpoints number. |
<> | 144:ef7eb2e8f9f7 | 105 | This parameter depends on the used USB core. |
<> | 144:ef7eb2e8f9f7 | 106 | This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ |
<> | 144:ef7eb2e8f9f7 | 107 | |
<> | 144:ef7eb2e8f9f7 | 108 | uint32_t speed; /*!< USB Core speed. |
<> | 144:ef7eb2e8f9f7 | 109 | This parameter can be any value of @ref PCD_Core_Speed */ |
<> | 144:ef7eb2e8f9f7 | 110 | |
<> | 144:ef7eb2e8f9f7 | 111 | uint32_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size. |
<> | 144:ef7eb2e8f9f7 | 112 | This parameter can be any value of @ref PCD_EP0_MPS */ |
<> | 144:ef7eb2e8f9f7 | 113 | |
<> | 144:ef7eb2e8f9f7 | 114 | uint32_t phy_itface; /*!< Select the used PHY interface. |
<> | 144:ef7eb2e8f9f7 | 115 | This parameter can be any value of @ref PCD_Core_PHY */ |
<> | 144:ef7eb2e8f9f7 | 116 | |
<> | 144:ef7eb2e8f9f7 | 117 | uint32_t Sof_enable; /*!< Enable or disable the output of the SOF signal. |
<> | 144:ef7eb2e8f9f7 | 118 | This parameter can be set to ENABLE or DISABLE */ |
<> | 144:ef7eb2e8f9f7 | 119 | |
<> | 144:ef7eb2e8f9f7 | 120 | uint32_t low_power_enable; /*!< Enable or disable Low Power mode |
<> | 144:ef7eb2e8f9f7 | 121 | This parameter can be set to ENABLE or DISABLE */ |
<> | 144:ef7eb2e8f9f7 | 122 | |
<> | 144:ef7eb2e8f9f7 | 123 | uint32_t lpm_enable; /*!< Enable or disable the Link Power Management . |
<> | 144:ef7eb2e8f9f7 | 124 | This parameter can be set to ENABLE or DISABLE */ |
<> | 144:ef7eb2e8f9f7 | 125 | |
<> | 144:ef7eb2e8f9f7 | 126 | uint32_t battery_charging_enable; /*!< Enable or disable Battery charging. |
<> | 144:ef7eb2e8f9f7 | 127 | This parameter can be set to ENABLE or DISABLE */ |
<> | 144:ef7eb2e8f9f7 | 128 | |
<> | 144:ef7eb2e8f9f7 | 129 | }PCD_InitTypeDef; |
<> | 144:ef7eb2e8f9f7 | 130 | |
<> | 144:ef7eb2e8f9f7 | 131 | typedef struct |
<> | 144:ef7eb2e8f9f7 | 132 | { |
<> | 144:ef7eb2e8f9f7 | 133 | uint8_t num; /*!< Endpoint number |
<> | 144:ef7eb2e8f9f7 | 134 | This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ |
<> | 144:ef7eb2e8f9f7 | 135 | |
<> | 144:ef7eb2e8f9f7 | 136 | uint8_t is_in; /*!< Endpoint direction |
<> | 144:ef7eb2e8f9f7 | 137 | This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ |
<> | 144:ef7eb2e8f9f7 | 138 | |
<> | 144:ef7eb2e8f9f7 | 139 | uint8_t is_stall; /*!< Endpoint stall condition |
<> | 144:ef7eb2e8f9f7 | 140 | This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ |
<> | 144:ef7eb2e8f9f7 | 141 | |
<> | 144:ef7eb2e8f9f7 | 142 | uint8_t type; /*!< Endpoint type |
<> | 144:ef7eb2e8f9f7 | 143 | This parameter can be any value of @ref PCD_EP_Type */ |
<> | 144:ef7eb2e8f9f7 | 144 | |
<> | 144:ef7eb2e8f9f7 | 145 | uint16_t pmaadress; /*!< PMA Address |
<> | 144:ef7eb2e8f9f7 | 146 | This parameter can be any value between Min_addr = 0 and Max_addr = 1K */ |
<> | 144:ef7eb2e8f9f7 | 147 | |
<> | 144:ef7eb2e8f9f7 | 148 | |
<> | 144:ef7eb2e8f9f7 | 149 | uint16_t pmaaddr0; /*!< PMA Address0 |
<> | 144:ef7eb2e8f9f7 | 150 | This parameter can be any value between Min_addr = 0 and Max_addr = 1K */ |
<> | 144:ef7eb2e8f9f7 | 151 | |
<> | 144:ef7eb2e8f9f7 | 152 | |
<> | 144:ef7eb2e8f9f7 | 153 | uint16_t pmaaddr1; /*!< PMA Address1 |
<> | 144:ef7eb2e8f9f7 | 154 | This parameter can be any value between Min_addr = 0 and Max_addr = 1K */ |
<> | 144:ef7eb2e8f9f7 | 155 | |
<> | 144:ef7eb2e8f9f7 | 156 | |
<> | 144:ef7eb2e8f9f7 | 157 | uint8_t doublebuffer; /*!< Double buffer enable |
<> | 144:ef7eb2e8f9f7 | 158 | This parameter can be 0 or 1 */ |
<> | 144:ef7eb2e8f9f7 | 159 | |
<> | 144:ef7eb2e8f9f7 | 160 | uint32_t maxpacket; /*!< Endpoint Max packet size |
<> | 144:ef7eb2e8f9f7 | 161 | This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */ |
<> | 144:ef7eb2e8f9f7 | 162 | |
<> | 144:ef7eb2e8f9f7 | 163 | uint8_t *xfer_buff; /*!< Pointer to transfer buffer */ |
<> | 144:ef7eb2e8f9f7 | 164 | |
<> | 144:ef7eb2e8f9f7 | 165 | |
<> | 144:ef7eb2e8f9f7 | 166 | uint32_t xfer_len; /*!< Current transfer length */ |
<> | 144:ef7eb2e8f9f7 | 167 | |
<> | 144:ef7eb2e8f9f7 | 168 | uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer */ |
<> | 144:ef7eb2e8f9f7 | 169 | |
<> | 144:ef7eb2e8f9f7 | 170 | }PCD_EPTypeDef; |
<> | 144:ef7eb2e8f9f7 | 171 | |
<> | 144:ef7eb2e8f9f7 | 172 | typedef USB_TypeDef PCD_TypeDef; |
<> | 144:ef7eb2e8f9f7 | 173 | |
<> | 144:ef7eb2e8f9f7 | 174 | /** |
<> | 144:ef7eb2e8f9f7 | 175 | * @brief PCD Handle Structure definition |
<> | 144:ef7eb2e8f9f7 | 176 | */ |
<> | 144:ef7eb2e8f9f7 | 177 | typedef struct |
<> | 144:ef7eb2e8f9f7 | 178 | { |
<> | 144:ef7eb2e8f9f7 | 179 | PCD_TypeDef *Instance; /*!< Register base address */ |
<> | 144:ef7eb2e8f9f7 | 180 | PCD_InitTypeDef Init; /*!< PCD required parameters */ |
<> | 144:ef7eb2e8f9f7 | 181 | __IO uint8_t USB_Address; /*!< USB Address */ |
<> | 144:ef7eb2e8f9f7 | 182 | PCD_EPTypeDef IN_ep[15]; /*!< IN endpoint parameters */ |
<> | 144:ef7eb2e8f9f7 | 183 | PCD_EPTypeDef OUT_ep[15]; /*!< OUT endpoint parameters */ |
<> | 144:ef7eb2e8f9f7 | 184 | HAL_LockTypeDef Lock; /*!< PCD peripheral status */ |
<> | 144:ef7eb2e8f9f7 | 185 | __IO PCD_StateTypeDef State; /*!< PCD communication state */ |
<> | 144:ef7eb2e8f9f7 | 186 | uint32_t Setup[12]; /*!< Setup packet buffer */ |
<> | 144:ef7eb2e8f9f7 | 187 | void *pData; /*!< Pointer to upper stack Handler */ |
<> | 144:ef7eb2e8f9f7 | 188 | |
<> | 144:ef7eb2e8f9f7 | 189 | } PCD_HandleTypeDef; |
<> | 144:ef7eb2e8f9f7 | 190 | |
<> | 144:ef7eb2e8f9f7 | 191 | /** |
<> | 144:ef7eb2e8f9f7 | 192 | * @} |
<> | 144:ef7eb2e8f9f7 | 193 | */ |
<> | 144:ef7eb2e8f9f7 | 194 | |
<> | 144:ef7eb2e8f9f7 | 195 | /* Include PCD HAL Extension module */ |
<> | 144:ef7eb2e8f9f7 | 196 | #include "stm32f3xx_hal_pcd_ex.h" |
<> | 144:ef7eb2e8f9f7 | 197 | |
<> | 144:ef7eb2e8f9f7 | 198 | /* Exported constants --------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 199 | /** @defgroup PCD_Exported_Constants PCD Exported Constants |
<> | 144:ef7eb2e8f9f7 | 200 | * @{ |
<> | 144:ef7eb2e8f9f7 | 201 | */ |
<> | 144:ef7eb2e8f9f7 | 202 | |
<> | 144:ef7eb2e8f9f7 | 203 | /** @defgroup PCD_Core_Speed PCD Core Speed |
<> | 144:ef7eb2e8f9f7 | 204 | * @{ |
<> | 144:ef7eb2e8f9f7 | 205 | */ |
<> | 144:ef7eb2e8f9f7 | 206 | #define PCD_SPEED_HIGH 0 /* Not Supported */ |
<> | 144:ef7eb2e8f9f7 | 207 | #define PCD_SPEED_FULL 2 |
<> | 144:ef7eb2e8f9f7 | 208 | /** |
<> | 144:ef7eb2e8f9f7 | 209 | * @} |
<> | 144:ef7eb2e8f9f7 | 210 | */ |
<> | 144:ef7eb2e8f9f7 | 211 | |
<> | 144:ef7eb2e8f9f7 | 212 | /** @defgroup PCD_Core_PHY PCD Core PHY |
<> | 144:ef7eb2e8f9f7 | 213 | * @{ |
<> | 144:ef7eb2e8f9f7 | 214 | */ |
<> | 144:ef7eb2e8f9f7 | 215 | #define PCD_PHY_EMBEDDED 2 |
<> | 144:ef7eb2e8f9f7 | 216 | /** |
<> | 144:ef7eb2e8f9f7 | 217 | * @} |
<> | 144:ef7eb2e8f9f7 | 218 | */ |
<> | 144:ef7eb2e8f9f7 | 219 | /** |
<> | 144:ef7eb2e8f9f7 | 220 | * @} |
<> | 144:ef7eb2e8f9f7 | 221 | */ |
<> | 144:ef7eb2e8f9f7 | 222 | |
<> | 144:ef7eb2e8f9f7 | 223 | /* Exported macros -----------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 224 | /** @defgroup PCD_Exported_Macros PCD Exported Macros |
<> | 144:ef7eb2e8f9f7 | 225 | * @brief macros to handle interrupts and specific clock configurations |
<> | 144:ef7eb2e8f9f7 | 226 | * @{ |
<> | 144:ef7eb2e8f9f7 | 227 | */ |
<> | 144:ef7eb2e8f9f7 | 228 | #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISTR) & (__INTERRUPT__)) == (__INTERRUPT__)) |
<> | 144:ef7eb2e8f9f7 | 229 | #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR) &= ~(__INTERRUPT__)) |
<> | 144:ef7eb2e8f9f7 | 230 | |
<> | 144:ef7eb2e8f9f7 | 231 | #define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_WAKEUP_EXTI_LINE |
<> | 144:ef7eb2e8f9f7 | 232 | #define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE) |
<> | 144:ef7eb2e8f9f7 | 233 | #define __HAL_USB_EXTI_GENERATE_SWIT(__EXTILINE__) (EXTI->SWIER |= (__EXTILINE__)) |
<> | 144:ef7eb2e8f9f7 | 234 | |
<> | 144:ef7eb2e8f9f7 | 235 | #define __HAL_USB_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_WAKEUP_EXTI_LINE) |
<> | 144:ef7eb2e8f9f7 | 236 | #define __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = USB_WAKEUP_EXTI_LINE |
<> | 144:ef7eb2e8f9f7 | 237 | |
<> | 144:ef7eb2e8f9f7 | 238 | #define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE() do {\ |
<> | 144:ef7eb2e8f9f7 | 239 | EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE);\ |
<> | 144:ef7eb2e8f9f7 | 240 | EXTI->RTSR |= USB_WAKEUP_EXTI_LINE;\ |
<> | 144:ef7eb2e8f9f7 | 241 | } while(0) |
<> | 144:ef7eb2e8f9f7 | 242 | |
<> | 144:ef7eb2e8f9f7 | 243 | #define __HAL_USB_WAKEUP_EXTI_ENABLE_FALLING_EDGE() do {\ |
<> | 144:ef7eb2e8f9f7 | 244 | EXTI->FTSR |= (USB_WAKEUP_EXTI_LINE);\ |
<> | 144:ef7eb2e8f9f7 | 245 | EXTI->RTSR &= ~(USB_WAKEUP_EXTI_LINE);\ |
<> | 144:ef7eb2e8f9f7 | 246 | } while(0) |
<> | 144:ef7eb2e8f9f7 | 247 | |
<> | 144:ef7eb2e8f9f7 | 248 | #define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE() do {\ |
<> | 144:ef7eb2e8f9f7 | 249 | EXTI->RTSR &= ~(USB_WAKEUP_EXTI_LINE);\ |
<> | 144:ef7eb2e8f9f7 | 250 | EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE);\ |
<> | 144:ef7eb2e8f9f7 | 251 | EXTI->RTSR |= USB_WAKEUP_EXTI_LINE;\ |
<> | 144:ef7eb2e8f9f7 | 252 | EXTI->FTSR |= USB_WAKEUP_EXTI_LINE;\ |
<> | 144:ef7eb2e8f9f7 | 253 | } while(0) |
<> | 144:ef7eb2e8f9f7 | 254 | /** |
<> | 144:ef7eb2e8f9f7 | 255 | * @} |
<> | 144:ef7eb2e8f9f7 | 256 | */ |
<> | 144:ef7eb2e8f9f7 | 257 | |
<> | 144:ef7eb2e8f9f7 | 258 | /* Exported functions --------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 259 | /** @addtogroup PCD_Exported_Functions PCD Exported Functions |
<> | 144:ef7eb2e8f9f7 | 260 | * @{ |
<> | 144:ef7eb2e8f9f7 | 261 | */ |
<> | 144:ef7eb2e8f9f7 | 262 | |
<> | 144:ef7eb2e8f9f7 | 263 | /* Initialization/de-initialization functions ********************************/ |
<> | 144:ef7eb2e8f9f7 | 264 | /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions |
<> | 144:ef7eb2e8f9f7 | 265 | * @{ |
<> | 144:ef7eb2e8f9f7 | 266 | */ |
<> | 144:ef7eb2e8f9f7 | 267 | HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd); |
<> | 144:ef7eb2e8f9f7 | 268 | HAL_StatusTypeDef HAL_PCD_DeInit (PCD_HandleTypeDef *hpcd); |
<> | 144:ef7eb2e8f9f7 | 269 | void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd); |
<> | 144:ef7eb2e8f9f7 | 270 | void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd); |
<> | 144:ef7eb2e8f9f7 | 271 | /** |
<> | 144:ef7eb2e8f9f7 | 272 | * @} |
<> | 144:ef7eb2e8f9f7 | 273 | */ |
<> | 144:ef7eb2e8f9f7 | 274 | |
<> | 144:ef7eb2e8f9f7 | 275 | /* I/O operation functions ***************************************************/ |
<> | 144:ef7eb2e8f9f7 | 276 | /* Non-Blocking mode: Interrupt */ |
<> | 144:ef7eb2e8f9f7 | 277 | /** @addtogroup PCD_Exported_Functions_Group2 IO operation functions |
<> | 144:ef7eb2e8f9f7 | 278 | * @{ |
<> | 144:ef7eb2e8f9f7 | 279 | */ |
<> | 144:ef7eb2e8f9f7 | 280 | HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd); |
<> | 144:ef7eb2e8f9f7 | 281 | HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd); |
<> | 144:ef7eb2e8f9f7 | 282 | void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd); |
<> | 144:ef7eb2e8f9f7 | 283 | |
<> | 144:ef7eb2e8f9f7 | 284 | void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); |
<> | 144:ef7eb2e8f9f7 | 285 | void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); |
<> | 144:ef7eb2e8f9f7 | 286 | void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd); |
<> | 144:ef7eb2e8f9f7 | 287 | void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd); |
<> | 144:ef7eb2e8f9f7 | 288 | void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd); |
<> | 144:ef7eb2e8f9f7 | 289 | void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd); |
<> | 144:ef7eb2e8f9f7 | 290 | void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd); |
<> | 144:ef7eb2e8f9f7 | 291 | void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); |
<> | 144:ef7eb2e8f9f7 | 292 | void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); |
<> | 144:ef7eb2e8f9f7 | 293 | void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd); |
<> | 144:ef7eb2e8f9f7 | 294 | void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd); |
<> | 144:ef7eb2e8f9f7 | 295 | /** |
<> | 144:ef7eb2e8f9f7 | 296 | * @} |
<> | 144:ef7eb2e8f9f7 | 297 | */ |
<> | 144:ef7eb2e8f9f7 | 298 | |
<> | 144:ef7eb2e8f9f7 | 299 | /* Peripheral Control functions **********************************************/ |
<> | 144:ef7eb2e8f9f7 | 300 | /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions |
<> | 144:ef7eb2e8f9f7 | 301 | * @{ |
<> | 144:ef7eb2e8f9f7 | 302 | */ |
<> | 144:ef7eb2e8f9f7 | 303 | HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd); |
<> | 144:ef7eb2e8f9f7 | 304 | HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd); |
<> | 144:ef7eb2e8f9f7 | 305 | HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address); |
<> | 144:ef7eb2e8f9f7 | 306 | HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type); |
<> | 144:ef7eb2e8f9f7 | 307 | HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
<> | 144:ef7eb2e8f9f7 | 308 | HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); |
<> | 144:ef7eb2e8f9f7 | 309 | HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); |
<> | 144:ef7eb2e8f9f7 | 310 | uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
<> | 144:ef7eb2e8f9f7 | 311 | HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
<> | 144:ef7eb2e8f9f7 | 312 | HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
<> | 144:ef7eb2e8f9f7 | 313 | HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
<> | 144:ef7eb2e8f9f7 | 314 | HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); |
<> | 144:ef7eb2e8f9f7 | 315 | HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); |
<> | 144:ef7eb2e8f9f7 | 316 | /** |
<> | 144:ef7eb2e8f9f7 | 317 | * @} |
<> | 144:ef7eb2e8f9f7 | 318 | */ |
<> | 144:ef7eb2e8f9f7 | 319 | |
<> | 144:ef7eb2e8f9f7 | 320 | /* Peripheral State functions ************************************************/ |
<> | 144:ef7eb2e8f9f7 | 321 | /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions |
<> | 144:ef7eb2e8f9f7 | 322 | * @{ |
<> | 144:ef7eb2e8f9f7 | 323 | */ |
<> | 144:ef7eb2e8f9f7 | 324 | PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd); |
<> | 144:ef7eb2e8f9f7 | 325 | /** |
<> | 144:ef7eb2e8f9f7 | 326 | * @} |
<> | 144:ef7eb2e8f9f7 | 327 | */ |
<> | 144:ef7eb2e8f9f7 | 328 | |
<> | 144:ef7eb2e8f9f7 | 329 | /** |
<> | 144:ef7eb2e8f9f7 | 330 | * @} |
<> | 144:ef7eb2e8f9f7 | 331 | */ |
<> | 144:ef7eb2e8f9f7 | 332 | |
<> | 144:ef7eb2e8f9f7 | 333 | /* Private constants ---------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 334 | /** @defgroup PCD_Private_Constants PCD Private Constants |
<> | 144:ef7eb2e8f9f7 | 335 | * @{ |
<> | 144:ef7eb2e8f9f7 | 336 | */ |
<> | 144:ef7eb2e8f9f7 | 337 | /** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt |
<> | 144:ef7eb2e8f9f7 | 338 | * @{ |
<> | 144:ef7eb2e8f9f7 | 339 | */ |
<> | 144:ef7eb2e8f9f7 | 340 | #define USB_WAKEUP_EXTI_LINE ((uint32_t)EXTI_IMR_MR18) /*!< External interrupt line 18 Connected to the USB FS EXTI Line */ |
<> | 144:ef7eb2e8f9f7 | 341 | /** |
<> | 144:ef7eb2e8f9f7 | 342 | * @} |
<> | 144:ef7eb2e8f9f7 | 343 | */ |
<> | 144:ef7eb2e8f9f7 | 344 | |
<> | 144:ef7eb2e8f9f7 | 345 | /** @defgroup PCD_EP0_MPS PCD EP0 MPS |
<> | 144:ef7eb2e8f9f7 | 346 | * @{ |
<> | 144:ef7eb2e8f9f7 | 347 | */ |
<> | 144:ef7eb2e8f9f7 | 348 | #define DEP0CTL_MPS_64 0 |
<> | 144:ef7eb2e8f9f7 | 349 | #define DEP0CTL_MPS_32 1 |
<> | 144:ef7eb2e8f9f7 | 350 | #define DEP0CTL_MPS_16 2 |
<> | 144:ef7eb2e8f9f7 | 351 | #define DEP0CTL_MPS_8 3 |
<> | 144:ef7eb2e8f9f7 | 352 | |
<> | 144:ef7eb2e8f9f7 | 353 | #define PCD_EP0MPS_64 DEP0CTL_MPS_64 |
<> | 144:ef7eb2e8f9f7 | 354 | #define PCD_EP0MPS_32 DEP0CTL_MPS_32 |
<> | 144:ef7eb2e8f9f7 | 355 | #define PCD_EP0MPS_16 DEP0CTL_MPS_16 |
<> | 144:ef7eb2e8f9f7 | 356 | #define PCD_EP0MPS_08 DEP0CTL_MPS_8 |
<> | 144:ef7eb2e8f9f7 | 357 | /** |
<> | 144:ef7eb2e8f9f7 | 358 | * @} |
<> | 144:ef7eb2e8f9f7 | 359 | */ |
<> | 144:ef7eb2e8f9f7 | 360 | |
<> | 144:ef7eb2e8f9f7 | 361 | /** @defgroup PCD_EP_Type PCD EP Type |
<> | 144:ef7eb2e8f9f7 | 362 | * @{ |
<> | 144:ef7eb2e8f9f7 | 363 | */ |
<> | 144:ef7eb2e8f9f7 | 364 | #define PCD_EP_TYPE_CTRL 0 |
<> | 144:ef7eb2e8f9f7 | 365 | #define PCD_EP_TYPE_ISOC 1 |
<> | 144:ef7eb2e8f9f7 | 366 | #define PCD_EP_TYPE_BULK 2 |
<> | 144:ef7eb2e8f9f7 | 367 | #define PCD_EP_TYPE_INTR 3 |
<> | 144:ef7eb2e8f9f7 | 368 | /** |
<> | 144:ef7eb2e8f9f7 | 369 | * @} |
<> | 144:ef7eb2e8f9f7 | 370 | */ |
<> | 144:ef7eb2e8f9f7 | 371 | |
<> | 144:ef7eb2e8f9f7 | 372 | /** @defgroup PCD_ENDP PCD ENDP |
<> | 144:ef7eb2e8f9f7 | 373 | * @{ |
<> | 144:ef7eb2e8f9f7 | 374 | */ |
<> | 144:ef7eb2e8f9f7 | 375 | #define PCD_ENDP0 ((uint8_t)0) |
<> | 144:ef7eb2e8f9f7 | 376 | #define PCD_ENDP1 ((uint8_t)1) |
<> | 144:ef7eb2e8f9f7 | 377 | #define PCD_ENDP2 ((uint8_t)2) |
<> | 144:ef7eb2e8f9f7 | 378 | #define PCD_ENDP3 ((uint8_t)3) |
<> | 144:ef7eb2e8f9f7 | 379 | #define PCD_ENDP4 ((uint8_t)4) |
<> | 144:ef7eb2e8f9f7 | 380 | #define PCD_ENDP5 ((uint8_t)5) |
<> | 144:ef7eb2e8f9f7 | 381 | #define PCD_ENDP6 ((uint8_t)6) |
<> | 144:ef7eb2e8f9f7 | 382 | #define PCD_ENDP7 ((uint8_t)7) |
<> | 144:ef7eb2e8f9f7 | 383 | /** |
<> | 144:ef7eb2e8f9f7 | 384 | * @} |
<> | 144:ef7eb2e8f9f7 | 385 | */ |
<> | 144:ef7eb2e8f9f7 | 386 | |
<> | 144:ef7eb2e8f9f7 | 387 | /** @defgroup PCD_ENDP_Kind PCD Endpoint Kind |
<> | 144:ef7eb2e8f9f7 | 388 | * @{ |
<> | 144:ef7eb2e8f9f7 | 389 | */ |
<> | 144:ef7eb2e8f9f7 | 390 | #define PCD_SNG_BUF 0 |
<> | 144:ef7eb2e8f9f7 | 391 | #define PCD_DBL_BUF 1 |
<> | 144:ef7eb2e8f9f7 | 392 | /** |
<> | 144:ef7eb2e8f9f7 | 393 | * @} |
<> | 144:ef7eb2e8f9f7 | 394 | */ |
<> | 144:ef7eb2e8f9f7 | 395 | |
<> | 144:ef7eb2e8f9f7 | 396 | /** |
<> | 144:ef7eb2e8f9f7 | 397 | * @} |
<> | 144:ef7eb2e8f9f7 | 398 | */ |
<> | 144:ef7eb2e8f9f7 | 399 | /* Internal macros -----------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 400 | |
<> | 144:ef7eb2e8f9f7 | 401 | /* Private macros ------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 402 | /** @addtogroup PCD_Private_Macros PCD Private Macros |
<> | 144:ef7eb2e8f9f7 | 403 | * @{ |
<> | 144:ef7eb2e8f9f7 | 404 | */ |
<> | 144:ef7eb2e8f9f7 | 405 | |
<> | 144:ef7eb2e8f9f7 | 406 | /* SetENDPOINT */ |
<> | 144:ef7eb2e8f9f7 | 407 | #define PCD_SET_ENDPOINT(USBx, bEpNum,wRegValue) (*(&(USBx)->EP0R + (bEpNum) * 2)= (uint16_t)(wRegValue)) |
<> | 144:ef7eb2e8f9f7 | 408 | |
<> | 144:ef7eb2e8f9f7 | 409 | /* GetENDPOINT */ |
<> | 144:ef7eb2e8f9f7 | 410 | #define PCD_GET_ENDPOINT(USBx, bEpNum) (*(&(USBx)->EP0R + (bEpNum) * 2)) |
<> | 144:ef7eb2e8f9f7 | 411 | |
<> | 144:ef7eb2e8f9f7 | 412 | |
<> | 144:ef7eb2e8f9f7 | 413 | |
<> | 144:ef7eb2e8f9f7 | 414 | /** |
<> | 144:ef7eb2e8f9f7 | 415 | * @brief sets the type in the endpoint register(bits EP_TYPE[1:0]) |
<> | 144:ef7eb2e8f9f7 | 416 | * @param USBx: USB peripheral instance register address. |
<> | 144:ef7eb2e8f9f7 | 417 | * @param bEpNum: Endpoint Number. |
<> | 144:ef7eb2e8f9f7 | 418 | * @param wType: Endpoint Type. |
<> | 144:ef7eb2e8f9f7 | 419 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 420 | */ |
<> | 144:ef7eb2e8f9f7 | 421 | #define PCD_SET_EPTYPE(USBx, bEpNum,wType) (PCD_SET_ENDPOINT((USBx), (bEpNum),\ |
<> | 144:ef7eb2e8f9f7 | 422 | ((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) ))) |
<> | 144:ef7eb2e8f9f7 | 423 | |
<> | 144:ef7eb2e8f9f7 | 424 | /** |
<> | 144:ef7eb2e8f9f7 | 425 | * @brief gets the type in the endpoint register(bits EP_TYPE[1:0]) |
<> | 144:ef7eb2e8f9f7 | 426 | * @param USBx: USB peripheral instance register address. |
<> | 144:ef7eb2e8f9f7 | 427 | * @param bEpNum: Endpoint Number. |
<> | 144:ef7eb2e8f9f7 | 428 | * @retval Endpoint Type |
<> | 144:ef7eb2e8f9f7 | 429 | */ |
<> | 144:ef7eb2e8f9f7 | 430 | #define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD) |
<> | 144:ef7eb2e8f9f7 | 431 | |
<> | 144:ef7eb2e8f9f7 | 432 | |
<> | 144:ef7eb2e8f9f7 | 433 | /** |
<> | 144:ef7eb2e8f9f7 | 434 | * @brief free buffer used from the application realizing it to the line |
<> | 144:ef7eb2e8f9f7 | 435 | toggles bit SW_BUF in the double buffered endpoint register |
<> | 144:ef7eb2e8f9f7 | 436 | * @param USBx: USB peripheral instance register address. |
<> | 144:ef7eb2e8f9f7 | 437 | * @param bEpNum: Endpoint Number. |
<> | 144:ef7eb2e8f9f7 | 438 | * @param bDir: Direction |
<> | 144:ef7eb2e8f9f7 | 439 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 440 | */ |
<> | 144:ef7eb2e8f9f7 | 441 | #define PCD_FreeUserBuffer(USBx, bEpNum, bDir)\ |
<> | 144:ef7eb2e8f9f7 | 442 | {\ |
<> | 144:ef7eb2e8f9f7 | 443 | if ((bDir) == PCD_EP_DBUF_OUT)\ |
<> | 144:ef7eb2e8f9f7 | 444 | { /* OUT double buffered endpoint */\ |
<> | 144:ef7eb2e8f9f7 | 445 | PCD_TX_DTOG((USBx), (bEpNum));\ |
<> | 144:ef7eb2e8f9f7 | 446 | }\ |
<> | 144:ef7eb2e8f9f7 | 447 | else if ((bDir) == PCD_EP_DBUF_IN)\ |
<> | 144:ef7eb2e8f9f7 | 448 | { /* IN double buffered endpoint */\ |
<> | 144:ef7eb2e8f9f7 | 449 | PCD_RX_DTOG((USBx), (bEpNum));\ |
<> | 144:ef7eb2e8f9f7 | 450 | }\ |
<> | 144:ef7eb2e8f9f7 | 451 | } |
<> | 144:ef7eb2e8f9f7 | 452 | |
<> | 144:ef7eb2e8f9f7 | 453 | /** |
<> | 144:ef7eb2e8f9f7 | 454 | * @brief gets direction of the double buffered endpoint |
<> | 144:ef7eb2e8f9f7 | 455 | * @param USBx: USB peripheral instance register address. |
<> | 144:ef7eb2e8f9f7 | 456 | * @param bEpNum: Endpoint Number. |
<> | 144:ef7eb2e8f9f7 | 457 | * @retval EP_DBUF_OUT, EP_DBUF_IN, |
<> | 144:ef7eb2e8f9f7 | 458 | * EP_DBUF_ERR if the endpoint counter not yet programmed. |
<> | 144:ef7eb2e8f9f7 | 459 | */ |
<> | 144:ef7eb2e8f9f7 | 460 | #define PCD_GET_DB_DIR(USBx, bEpNum)\ |
<> | 144:ef7eb2e8f9f7 | 461 | {\ |
<> | 144:ef7eb2e8f9f7 | 462 | if ((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum)) & 0xFC00) != 0)\ |
<> | 144:ef7eb2e8f9f7 | 463 | return(PCD_EP_DBUF_OUT);\ |
<> | 144:ef7eb2e8f9f7 | 464 | else if (((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x03FF) != 0)\ |
<> | 144:ef7eb2e8f9f7 | 465 | return(PCD_EP_DBUF_IN);\ |
<> | 144:ef7eb2e8f9f7 | 466 | else\ |
<> | 144:ef7eb2e8f9f7 | 467 | return(PCD_EP_DBUF_ERR);\ |
<> | 144:ef7eb2e8f9f7 | 468 | } |
<> | 144:ef7eb2e8f9f7 | 469 | |
<> | 144:ef7eb2e8f9f7 | 470 | /** |
<> | 144:ef7eb2e8f9f7 | 471 | * @brief sets the status for tx transfer (bits STAT_TX[1:0]). |
<> | 144:ef7eb2e8f9f7 | 472 | * @param USBx: USB peripheral instance register address. |
<> | 144:ef7eb2e8f9f7 | 473 | * @param bEpNum: Endpoint Number. |
<> | 144:ef7eb2e8f9f7 | 474 | * @param wState: new state |
<> | 144:ef7eb2e8f9f7 | 475 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 476 | */ |
<> | 144:ef7eb2e8f9f7 | 477 | #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) {\ |
<> | 144:ef7eb2e8f9f7 | 478 | register uint16_t _wRegVal; \ |
<> | 144:ef7eb2e8f9f7 | 479 | \ |
<> | 144:ef7eb2e8f9f7 | 480 | _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK;\ |
<> | 144:ef7eb2e8f9f7 | 481 | /* toggle first bit ? */ \ |
<> | 144:ef7eb2e8f9f7 | 482 | if((USB_EPTX_DTOG1 & (wState))!= 0) \ |
<> | 144:ef7eb2e8f9f7 | 483 | _wRegVal ^= USB_EPTX_DTOG1; \ |
<> | 144:ef7eb2e8f9f7 | 484 | /* toggle second bit ? */ \ |
<> | 144:ef7eb2e8f9f7 | 485 | if((USB_EPTX_DTOG2 & (wState))!= 0) \ |
<> | 144:ef7eb2e8f9f7 | 486 | _wRegVal ^= USB_EPTX_DTOG2; \ |
<> | 144:ef7eb2e8f9f7 | 487 | PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX)); \ |
<> | 144:ef7eb2e8f9f7 | 488 | } /* PCD_SET_EP_TX_STATUS */ |
<> | 144:ef7eb2e8f9f7 | 489 | |
<> | 144:ef7eb2e8f9f7 | 490 | /** |
<> | 144:ef7eb2e8f9f7 | 491 | * @brief sets the status for rx transfer (bits STAT_TX[1:0]) |
<> | 144:ef7eb2e8f9f7 | 492 | * @param USBx: USB peripheral instance register address. |
<> | 144:ef7eb2e8f9f7 | 493 | * @param bEpNum: Endpoint Number. |
<> | 144:ef7eb2e8f9f7 | 494 | * @param wState: new state |
<> | 144:ef7eb2e8f9f7 | 495 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 496 | */ |
<> | 144:ef7eb2e8f9f7 | 497 | #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) {\ |
<> | 144:ef7eb2e8f9f7 | 498 | register uint16_t _wRegVal; \ |
<> | 144:ef7eb2e8f9f7 | 499 | \ |
<> | 144:ef7eb2e8f9f7 | 500 | _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK;\ |
<> | 144:ef7eb2e8f9f7 | 501 | /* toggle first bit ? */ \ |
<> | 144:ef7eb2e8f9f7 | 502 | if((USB_EPRX_DTOG1 & (wState))!= 0) \ |
<> | 144:ef7eb2e8f9f7 | 503 | _wRegVal ^= USB_EPRX_DTOG1; \ |
<> | 144:ef7eb2e8f9f7 | 504 | /* toggle second bit ? */ \ |
<> | 144:ef7eb2e8f9f7 | 505 | if((USB_EPRX_DTOG2 & (wState))!= 0) \ |
<> | 144:ef7eb2e8f9f7 | 506 | _wRegVal ^= USB_EPRX_DTOG2; \ |
<> | 144:ef7eb2e8f9f7 | 507 | PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX)); \ |
<> | 144:ef7eb2e8f9f7 | 508 | } /* PCD_SET_EP_RX_STATUS */ |
<> | 144:ef7eb2e8f9f7 | 509 | |
<> | 144:ef7eb2e8f9f7 | 510 | /** |
<> | 144:ef7eb2e8f9f7 | 511 | * @brief sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0]) |
<> | 144:ef7eb2e8f9f7 | 512 | * @param USBx: USB peripheral instance register address. |
<> | 144:ef7eb2e8f9f7 | 513 | * @param bEpNum: Endpoint Number. |
<> | 144:ef7eb2e8f9f7 | 514 | * @param wStaterx: new state. |
<> | 144:ef7eb2e8f9f7 | 515 | * @param wStatetx: new state. |
<> | 144:ef7eb2e8f9f7 | 516 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 517 | */ |
<> | 144:ef7eb2e8f9f7 | 518 | #define PCD_SET_EP_TXRX_STATUS(USBx,bEpNum,wStaterx,wStatetx) {\ |
<> | 144:ef7eb2e8f9f7 | 519 | register uint32_t _wRegVal; \ |
<> | 144:ef7eb2e8f9f7 | 520 | \ |
<> | 144:ef7eb2e8f9f7 | 521 | _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK |USB_EPTX_STAT) ;\ |
<> | 144:ef7eb2e8f9f7 | 522 | /* toggle first bit ? */ \ |
<> | 144:ef7eb2e8f9f7 | 523 | if((USB_EPRX_DTOG1 & ((wStaterx)))!= 0) \ |
<> | 144:ef7eb2e8f9f7 | 524 | _wRegVal ^= USB_EPRX_DTOG1; \ |
<> | 144:ef7eb2e8f9f7 | 525 | /* toggle second bit ? */ \ |
<> | 144:ef7eb2e8f9f7 | 526 | if((USB_EPRX_DTOG2 & (wStaterx))!= 0) \ |
<> | 144:ef7eb2e8f9f7 | 527 | _wRegVal ^= USB_EPRX_DTOG2; \ |
<> | 144:ef7eb2e8f9f7 | 528 | /* toggle first bit ? */ \ |
<> | 144:ef7eb2e8f9f7 | 529 | if((USB_EPTX_DTOG1 & (wStatetx))!= 0) \ |
<> | 144:ef7eb2e8f9f7 | 530 | _wRegVal ^= USB_EPTX_DTOG1; \ |
<> | 144:ef7eb2e8f9f7 | 531 | /* toggle second bit ? */ \ |
<> | 144:ef7eb2e8f9f7 | 532 | if((USB_EPTX_DTOG2 & (wStatetx))!= 0) \ |
<> | 144:ef7eb2e8f9f7 | 533 | _wRegVal ^= USB_EPTX_DTOG2; \ |
<> | 144:ef7eb2e8f9f7 | 534 | PCD_SET_ENDPOINT((USBx), (bEpNum), _wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX); \ |
<> | 144:ef7eb2e8f9f7 | 535 | } /* PCD_SET_EP_TXRX_STATUS */ |
<> | 144:ef7eb2e8f9f7 | 536 | |
<> | 144:ef7eb2e8f9f7 | 537 | /** |
<> | 144:ef7eb2e8f9f7 | 538 | * @brief gets the status for tx/rx transfer (bits STAT_TX[1:0] |
<> | 144:ef7eb2e8f9f7 | 539 | * /STAT_RX[1:0]) |
<> | 144:ef7eb2e8f9f7 | 540 | * @param USBx: USB peripheral instance register address. |
<> | 144:ef7eb2e8f9f7 | 541 | * @param bEpNum: Endpoint Number. |
<> | 144:ef7eb2e8f9f7 | 542 | * @retval status |
<> | 144:ef7eb2e8f9f7 | 543 | */ |
<> | 144:ef7eb2e8f9f7 | 544 | #define PCD_GET_EP_TX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT) |
<> | 144:ef7eb2e8f9f7 | 545 | |
<> | 144:ef7eb2e8f9f7 | 546 | #define PCD_GET_EP_RX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT) |
<> | 144:ef7eb2e8f9f7 | 547 | |
<> | 144:ef7eb2e8f9f7 | 548 | /** |
<> | 144:ef7eb2e8f9f7 | 549 | * @brief sets directly the VALID tx/rx-status into the endpoint register |
<> | 144:ef7eb2e8f9f7 | 550 | * @param USBx: USB peripheral instance register address. |
<> | 144:ef7eb2e8f9f7 | 551 | * @param bEpNum: Endpoint Number. |
<> | 144:ef7eb2e8f9f7 | 552 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 553 | */ |
<> | 144:ef7eb2e8f9f7 | 554 | #define PCD_SET_EP_TX_VALID(USBx, bEpNum) (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID)) |
<> | 144:ef7eb2e8f9f7 | 555 | |
<> | 144:ef7eb2e8f9f7 | 556 | #define PCD_SET_EP_RX_VALID(USBx, bEpNum) (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID)) |
<> | 144:ef7eb2e8f9f7 | 557 | |
<> | 144:ef7eb2e8f9f7 | 558 | /** |
<> | 144:ef7eb2e8f9f7 | 559 | * @brief checks stall condition in an endpoint. |
<> | 144:ef7eb2e8f9f7 | 560 | * @param USBx: USB peripheral instance register address. |
<> | 144:ef7eb2e8f9f7 | 561 | * @param bEpNum: Endpoint Number. |
<> | 144:ef7eb2e8f9f7 | 562 | * @retval TRUE = endpoint in stall condition. |
<> | 144:ef7eb2e8f9f7 | 563 | */ |
<> | 144:ef7eb2e8f9f7 | 564 | #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) \ |
<> | 144:ef7eb2e8f9f7 | 565 | == USB_EP_TX_STALL) |
<> | 144:ef7eb2e8f9f7 | 566 | #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) \ |
<> | 144:ef7eb2e8f9f7 | 567 | == USB_EP_RX_STALL) |
<> | 144:ef7eb2e8f9f7 | 568 | |
<> | 144:ef7eb2e8f9f7 | 569 | /** |
<> | 144:ef7eb2e8f9f7 | 570 | * @brief set & clear EP_KIND bit. |
<> | 144:ef7eb2e8f9f7 | 571 | * @param USBx: USB peripheral instance register address. |
<> | 144:ef7eb2e8f9f7 | 572 | * @param bEpNum: Endpoint Number. |
<> | 144:ef7eb2e8f9f7 | 573 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 574 | */ |
<> | 144:ef7eb2e8f9f7 | 575 | #define PCD_SET_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \ |
<> | 144:ef7eb2e8f9f7 | 576 | (USB_EP_CTR_RX|USB_EP_CTR_TX|((PCD_GET_ENDPOINT((USBx), (bEpNum)) | USB_EP_KIND) & USB_EPREG_MASK)))) |
<> | 144:ef7eb2e8f9f7 | 577 | #define PCD_CLEAR_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \ |
<> | 144:ef7eb2e8f9f7 | 578 | (USB_EP_CTR_RX|USB_EP_CTR_TX|(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK)))) |
<> | 144:ef7eb2e8f9f7 | 579 | |
<> | 144:ef7eb2e8f9f7 | 580 | /** |
<> | 144:ef7eb2e8f9f7 | 581 | * @brief Sets/clears directly STATUS_OUT bit in the endpoint register. |
<> | 144:ef7eb2e8f9f7 | 582 | * @param USBx: USB peripheral instance register address. |
<> | 144:ef7eb2e8f9f7 | 583 | * @param bEpNum: Endpoint Number. |
<> | 144:ef7eb2e8f9f7 | 584 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 585 | */ |
<> | 144:ef7eb2e8f9f7 | 586 | #define PCD_SET_OUT_STATUS(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum)) |
<> | 144:ef7eb2e8f9f7 | 587 | #define PCD_CLEAR_OUT_STATUS(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum)) |
<> | 144:ef7eb2e8f9f7 | 588 | |
<> | 144:ef7eb2e8f9f7 | 589 | /** |
<> | 144:ef7eb2e8f9f7 | 590 | * @brief Sets/clears directly EP_KIND bit in the endpoint register. |
<> | 144:ef7eb2e8f9f7 | 591 | * @param USBx: USB peripheral instance register address. |
<> | 144:ef7eb2e8f9f7 | 592 | * @param bEpNum: Endpoint Number. |
<> | 144:ef7eb2e8f9f7 | 593 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 594 | */ |
<> | 144:ef7eb2e8f9f7 | 595 | #define PCD_SET_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum)) |
<> | 144:ef7eb2e8f9f7 | 596 | #define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum)) |
<> | 144:ef7eb2e8f9f7 | 597 | |
<> | 144:ef7eb2e8f9f7 | 598 | /** |
<> | 144:ef7eb2e8f9f7 | 599 | * @brief Clears bit CTR_RX / CTR_TX in the endpoint register. |
<> | 144:ef7eb2e8f9f7 | 600 | * @param USBx: USB peripheral instance register address. |
<> | 144:ef7eb2e8f9f7 | 601 | * @param bEpNum: Endpoint Number. |
<> | 144:ef7eb2e8f9f7 | 602 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 603 | */ |
<> | 144:ef7eb2e8f9f7 | 604 | #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\ |
<> | 144:ef7eb2e8f9f7 | 605 | PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0x7FFF & USB_EPREG_MASK)) |
<> | 144:ef7eb2e8f9f7 | 606 | #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\ |
<> | 144:ef7eb2e8f9f7 | 607 | PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0xFF7F & USB_EPREG_MASK)) |
<> | 144:ef7eb2e8f9f7 | 608 | |
<> | 144:ef7eb2e8f9f7 | 609 | /** |
<> | 144:ef7eb2e8f9f7 | 610 | * @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register. |
<> | 144:ef7eb2e8f9f7 | 611 | * @param USBx: USB peripheral instance register address. |
<> | 144:ef7eb2e8f9f7 | 612 | * @param bEpNum: Endpoint Number. |
<> | 144:ef7eb2e8f9f7 | 613 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 614 | */ |
<> | 144:ef7eb2e8f9f7 | 615 | #define PCD_RX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \ |
<> | 144:ef7eb2e8f9f7 | 616 | USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_RX | (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK))) |
<> | 144:ef7eb2e8f9f7 | 617 | #define PCD_TX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \ |
<> | 144:ef7eb2e8f9f7 | 618 | USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_TX | (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK))) |
<> | 144:ef7eb2e8f9f7 | 619 | |
<> | 144:ef7eb2e8f9f7 | 620 | /** |
<> | 144:ef7eb2e8f9f7 | 621 | * @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register. |
<> | 144:ef7eb2e8f9f7 | 622 | * @param USBx: USB peripheral instance register address. |
<> | 144:ef7eb2e8f9f7 | 623 | * @param bEpNum: Endpoint Number. |
<> | 144:ef7eb2e8f9f7 | 624 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 625 | */ |
<> | 144:ef7eb2e8f9f7 | 626 | #define PCD_CLEAR_RX_DTOG(USBx, bEpNum) if((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_DTOG_RX) != 0)\ |
<> | 144:ef7eb2e8f9f7 | 627 | PCD_RX_DTOG((USBx), (bEpNum)) |
<> | 144:ef7eb2e8f9f7 | 628 | #define PCD_CLEAR_TX_DTOG(USBx, bEpNum) if((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_DTOG_TX) != 0)\ |
<> | 144:ef7eb2e8f9f7 | 629 | PCD_TX_DTOG((USBx), (bEpNum)) |
<> | 144:ef7eb2e8f9f7 | 630 | |
<> | 144:ef7eb2e8f9f7 | 631 | /** |
<> | 144:ef7eb2e8f9f7 | 632 | * @brief Sets address in an endpoint register. |
<> | 144:ef7eb2e8f9f7 | 633 | * @param USBx: USB peripheral instance register address. |
<> | 144:ef7eb2e8f9f7 | 634 | * @param bEpNum: Endpoint Number. |
<> | 144:ef7eb2e8f9f7 | 635 | * @param bAddr: Address. |
<> | 144:ef7eb2e8f9f7 | 636 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 637 | */ |
<> | 144:ef7eb2e8f9f7 | 638 | #define PCD_SET_EP_ADDRESS(USBx, bEpNum,bAddr) PCD_SET_ENDPOINT((USBx), (bEpNum),\ |
<> | 144:ef7eb2e8f9f7 | 639 | USB_EP_CTR_RX|USB_EP_CTR_TX|(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr)) |
<> | 144:ef7eb2e8f9f7 | 640 | |
<> | 144:ef7eb2e8f9f7 | 641 | /** |
<> | 144:ef7eb2e8f9f7 | 642 | * @brief Gets address in an endpoint register. |
<> | 144:ef7eb2e8f9f7 | 643 | * @param USBx: USB peripheral instance register address. |
<> | 144:ef7eb2e8f9f7 | 644 | * @param bEpNum: Endpoint Number. |
<> | 144:ef7eb2e8f9f7 | 645 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 646 | */ |
<> | 144:ef7eb2e8f9f7 | 647 | #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD)) |
<> | 144:ef7eb2e8f9f7 | 648 | |
<> | 144:ef7eb2e8f9f7 | 649 | /** |
<> | 144:ef7eb2e8f9f7 | 650 | * @brief sets address of the tx/rx buffer. |
<> | 144:ef7eb2e8f9f7 | 651 | * @param USBx: USB peripheral instance register address. |
<> | 144:ef7eb2e8f9f7 | 652 | * @param bEpNum: Endpoint Number. |
<> | 144:ef7eb2e8f9f7 | 653 | * @param wAddr: address to be set (must be word aligned). |
<> | 144:ef7eb2e8f9f7 | 654 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 655 | */ |
<> | 144:ef7eb2e8f9f7 | 656 | #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_TX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1) << 1)) |
<> | 144:ef7eb2e8f9f7 | 657 | #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_RX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1) << 1)) |
<> | 144:ef7eb2e8f9f7 | 658 | |
<> | 144:ef7eb2e8f9f7 | 659 | /** |
<> | 144:ef7eb2e8f9f7 | 660 | * @brief Gets address of the tx/rx buffer. |
<> | 144:ef7eb2e8f9f7 | 661 | * @param USBx: USB peripheral instance register address. |
<> | 144:ef7eb2e8f9f7 | 662 | * @param bEpNum: Endpoint Number. |
<> | 144:ef7eb2e8f9f7 | 663 | * @retval address of the buffer. |
<> | 144:ef7eb2e8f9f7 | 664 | */ |
<> | 144:ef7eb2e8f9f7 | 665 | #define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum))) |
<> | 144:ef7eb2e8f9f7 | 666 | #define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum))) |
<> | 144:ef7eb2e8f9f7 | 667 | |
<> | 144:ef7eb2e8f9f7 | 668 | /** |
<> | 144:ef7eb2e8f9f7 | 669 | * @brief Sets counter of rx buffer with no. of blocks. |
<> | 144:ef7eb2e8f9f7 | 670 | * @param dwReg: Register |
<> | 144:ef7eb2e8f9f7 | 671 | * @param wCount: Counter. |
<> | 144:ef7eb2e8f9f7 | 672 | * @param wNBlocks: no. of Blocks. |
<> | 144:ef7eb2e8f9f7 | 673 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 674 | */ |
<> | 144:ef7eb2e8f9f7 | 675 | #define PCD_CALC_BLK32(dwReg,wCount,wNBlocks) {\ |
<> | 144:ef7eb2e8f9f7 | 676 | (wNBlocks) = (wCount) >> 5;\ |
<> | 144:ef7eb2e8f9f7 | 677 | if(((wCount) & 0x1f) == 0)\ |
<> | 144:ef7eb2e8f9f7 | 678 | (wNBlocks)--;\ |
<> | 144:ef7eb2e8f9f7 | 679 | *pdwReg = (uint16_t)(((wNBlocks) << 10) | 0x8000);\ |
<> | 144:ef7eb2e8f9f7 | 680 | }/* PCD_CALC_BLK32 */ |
<> | 144:ef7eb2e8f9f7 | 681 | |
<> | 144:ef7eb2e8f9f7 | 682 | #define PCD_CALC_BLK2(dwReg,wCount,wNBlocks) {\ |
<> | 144:ef7eb2e8f9f7 | 683 | (wNBlocks) = (wCount) >> 1;\ |
<> | 144:ef7eb2e8f9f7 | 684 | if(((wCount) & 0x1) != 0)\ |
<> | 144:ef7eb2e8f9f7 | 685 | (wNBlocks)++;\ |
<> | 144:ef7eb2e8f9f7 | 686 | *pdwReg = (uint16_t)((wNBlocks) << 10);\ |
<> | 144:ef7eb2e8f9f7 | 687 | }/* PCD_CALC_BLK2 */ |
<> | 144:ef7eb2e8f9f7 | 688 | |
<> | 144:ef7eb2e8f9f7 | 689 | #define PCD_SET_EP_CNT_RX_REG(dwReg,wCount) {\ |
<> | 144:ef7eb2e8f9f7 | 690 | uint16_t wNBlocks;\ |
<> | 144:ef7eb2e8f9f7 | 691 | if((wCount) > 62){PCD_CALC_BLK32((dwReg),(wCount),wNBlocks);}\ |
<> | 144:ef7eb2e8f9f7 | 692 | else {PCD_CALC_BLK2((dwReg),(wCount),wNBlocks);}\ |
<> | 144:ef7eb2e8f9f7 | 693 | }/* PCD_SET_EP_CNT_RX_REG */ |
<> | 144:ef7eb2e8f9f7 | 694 | |
<> | 144:ef7eb2e8f9f7 | 695 | #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum,wCount) {\ |
<> | 144:ef7eb2e8f9f7 | 696 | uint32_t *pdwReg = PCD_EP_TX_CNT(USBx, bEpNum); \ |
<> | 144:ef7eb2e8f9f7 | 697 | PCD_SET_EP_CNT_RX_REG(pdwReg, wCount);\ |
<> | 144:ef7eb2e8f9f7 | 698 | } |
<> | 144:ef7eb2e8f9f7 | 699 | /** |
<> | 144:ef7eb2e8f9f7 | 700 | * @brief sets counter for the tx/rx buffer. |
<> | 144:ef7eb2e8f9f7 | 701 | * @param USBx: USB peripheral instance register address. |
<> | 144:ef7eb2e8f9f7 | 702 | * @param bEpNum: Endpoint Number. |
<> | 144:ef7eb2e8f9f7 | 703 | * @param wCount: Counter value. |
<> | 144:ef7eb2e8f9f7 | 704 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 705 | */ |
<> | 144:ef7eb2e8f9f7 | 706 | #define PCD_SET_EP_TX_CNT(USBx, bEpNum,wCount) (*PCD_EP_TX_CNT((USBx), (bEpNum)) = (wCount)) |
<> | 144:ef7eb2e8f9f7 | 707 | |
<> | 144:ef7eb2e8f9f7 | 708 | /** |
<> | 144:ef7eb2e8f9f7 | 709 | * @brief gets counter of the tx buffer. |
<> | 144:ef7eb2e8f9f7 | 710 | * @param USBx: USB peripheral instance register address. |
<> | 144:ef7eb2e8f9f7 | 711 | * @param bEpNum: Endpoint Number. |
<> | 144:ef7eb2e8f9f7 | 712 | * @retval Counter value |
<> | 144:ef7eb2e8f9f7 | 713 | */ |
<> | 144:ef7eb2e8f9f7 | 714 | #define PCD_GET_EP_TX_CNT(USBx, bEpNum)((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ff) |
<> | 144:ef7eb2e8f9f7 | 715 | #define PCD_GET_EP_RX_CNT(USBx, bEpNum)((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ff) |
<> | 144:ef7eb2e8f9f7 | 716 | |
<> | 144:ef7eb2e8f9f7 | 717 | /** |
<> | 144:ef7eb2e8f9f7 | 718 | * @brief Sets buffer 0/1 address in a double buffer endpoint. |
<> | 144:ef7eb2e8f9f7 | 719 | * @param USBx: USB peripheral instance register address. |
<> | 144:ef7eb2e8f9f7 | 720 | * @param bEpNum: Endpoint Number. |
<> | 144:ef7eb2e8f9f7 | 721 | * @param wBuf0Addr: buffer 0 address. |
<> | 144:ef7eb2e8f9f7 | 722 | * @retval Counter value |
<> | 144:ef7eb2e8f9f7 | 723 | */ |
<> | 144:ef7eb2e8f9f7 | 724 | #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum,wBuf0Addr) {PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr));} |
<> | 144:ef7eb2e8f9f7 | 725 | #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum,wBuf1Addr) {PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr));} |
<> | 144:ef7eb2e8f9f7 | 726 | |
<> | 144:ef7eb2e8f9f7 | 727 | /** |
<> | 144:ef7eb2e8f9f7 | 728 | * @brief Sets addresses in a double buffer endpoint. |
<> | 144:ef7eb2e8f9f7 | 729 | * @param USBx: USB peripheral instance register address. |
<> | 144:ef7eb2e8f9f7 | 730 | * @param bEpNum: Endpoint Number. |
<> | 144:ef7eb2e8f9f7 | 731 | * @param wBuf0Addr: buffer 0 address. |
<> | 144:ef7eb2e8f9f7 | 732 | * @param wBuf1Addr = buffer 1 address. |
<> | 144:ef7eb2e8f9f7 | 733 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 734 | */ |
<> | 144:ef7eb2e8f9f7 | 735 | #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum,wBuf0Addr,wBuf1Addr) { \ |
<> | 144:ef7eb2e8f9f7 | 736 | PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr));\ |
<> | 144:ef7eb2e8f9f7 | 737 | PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr));\ |
<> | 144:ef7eb2e8f9f7 | 738 | } /* PCD_SET_EP_DBUF_ADDR */ |
<> | 144:ef7eb2e8f9f7 | 739 | |
<> | 144:ef7eb2e8f9f7 | 740 | /** |
<> | 144:ef7eb2e8f9f7 | 741 | * @brief Gets buffer 0/1 address of a double buffer endpoint. |
<> | 144:ef7eb2e8f9f7 | 742 | * @param USBx: USB peripheral instance register address. |
<> | 144:ef7eb2e8f9f7 | 743 | * @param bEpNum: Endpoint Number. |
<> | 144:ef7eb2e8f9f7 | 744 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 745 | */ |
<> | 144:ef7eb2e8f9f7 | 746 | #define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum))) |
<> | 144:ef7eb2e8f9f7 | 747 | #define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum))) |
<> | 144:ef7eb2e8f9f7 | 748 | |
<> | 144:ef7eb2e8f9f7 | 749 | /** |
<> | 144:ef7eb2e8f9f7 | 750 | * @brief Gets buffer 0/1 address of a double buffer endpoint. |
<> | 144:ef7eb2e8f9f7 | 751 | * @param USBx: USB peripheral instance register address. |
<> | 144:ef7eb2e8f9f7 | 752 | * @param bEpNum: Endpoint Number. |
<> | 144:ef7eb2e8f9f7 | 753 | * @param bDir: endpoint dir EP_DBUF_OUT = OUT |
<> | 144:ef7eb2e8f9f7 | 754 | * EP_DBUF_IN = IN |
<> | 144:ef7eb2e8f9f7 | 755 | * @param wCount: Counter value |
<> | 144:ef7eb2e8f9f7 | 756 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 757 | */ |
<> | 144:ef7eb2e8f9f7 | 758 | #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) { \ |
<> | 144:ef7eb2e8f9f7 | 759 | if((bDir) == PCD_EP_DBUF_OUT)\ |
<> | 144:ef7eb2e8f9f7 | 760 | /* OUT endpoint */ \ |
<> | 144:ef7eb2e8f9f7 | 761 | {PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum),(wCount));} \ |
<> | 144:ef7eb2e8f9f7 | 762 | else if((bDir) == PCD_EP_DBUF_IN)\ |
<> | 144:ef7eb2e8f9f7 | 763 | /* IN endpoint */ \ |
<> | 144:ef7eb2e8f9f7 | 764 | *PCD_EP_TX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \ |
<> | 144:ef7eb2e8f9f7 | 765 | } /* SetEPDblBuf0Count*/ |
<> | 144:ef7eb2e8f9f7 | 766 | |
<> | 144:ef7eb2e8f9f7 | 767 | #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) { \ |
<> | 144:ef7eb2e8f9f7 | 768 | if((bDir) == PCD_EP_DBUF_OUT)\ |
<> | 144:ef7eb2e8f9f7 | 769 | /* OUT endpoint */ \ |
<> | 144:ef7eb2e8f9f7 | 770 | {PCD_SET_EP_RX_CNT((USBx), (bEpNum),(wCount));}\ |
<> | 144:ef7eb2e8f9f7 | 771 | else if((bDir) == PCD_EP_DBUF_IN)\ |
<> | 144:ef7eb2e8f9f7 | 772 | /* IN endpoint */\ |
<> | 144:ef7eb2e8f9f7 | 773 | *PCD_EP_RX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \ |
<> | 144:ef7eb2e8f9f7 | 774 | } /* SetEPDblBuf1Count */ |
<> | 144:ef7eb2e8f9f7 | 775 | |
<> | 144:ef7eb2e8f9f7 | 776 | #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) {\ |
<> | 144:ef7eb2e8f9f7 | 777 | PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \ |
<> | 144:ef7eb2e8f9f7 | 778 | PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \ |
<> | 144:ef7eb2e8f9f7 | 779 | } /* PCD_SET_EP_DBUF_CNT */ |
<> | 144:ef7eb2e8f9f7 | 780 | |
<> | 144:ef7eb2e8f9f7 | 781 | /** |
<> | 144:ef7eb2e8f9f7 | 782 | * @brief Gets buffer 0/1 rx/tx counter for double buffering. |
<> | 144:ef7eb2e8f9f7 | 783 | * @param USBx: USB peripheral instance register address. |
<> | 144:ef7eb2e8f9f7 | 784 | * @param bEpNum: Endpoint Number. |
<> | 144:ef7eb2e8f9f7 | 785 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 786 | */ |
<> | 144:ef7eb2e8f9f7 | 787 | #define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT((USBx), (bEpNum))) |
<> | 144:ef7eb2e8f9f7 | 788 | #define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT((USBx), (bEpNum))) |
<> | 144:ef7eb2e8f9f7 | 789 | /** |
<> | 144:ef7eb2e8f9f7 | 790 | * @} |
<> | 144:ef7eb2e8f9f7 | 791 | */ |
<> | 144:ef7eb2e8f9f7 | 792 | |
<> | 144:ef7eb2e8f9f7 | 793 | /** @defgroup PCD_Instance_definition PCD Instance definition |
<> | 144:ef7eb2e8f9f7 | 794 | * @{ |
<> | 144:ef7eb2e8f9f7 | 795 | */ |
<> | 144:ef7eb2e8f9f7 | 796 | #define IS_PCD_ALL_INSTANCE IS_USB_ALL_INSTANCE |
<> | 144:ef7eb2e8f9f7 | 797 | /** |
<> | 144:ef7eb2e8f9f7 | 798 | * @} |
<> | 144:ef7eb2e8f9f7 | 799 | */ |
<> | 144:ef7eb2e8f9f7 | 800 | |
<> | 144:ef7eb2e8f9f7 | 801 | /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions |
<> | 144:ef7eb2e8f9f7 | 802 | * @{ |
<> | 144:ef7eb2e8f9f7 | 803 | */ |
<> | 144:ef7eb2e8f9f7 | 804 | /* Peripheral Control functions ************************************************/ |
<> | 144:ef7eb2e8f9f7 | 805 | HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd); |
<> | 144:ef7eb2e8f9f7 | 806 | HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd); |
<> | 144:ef7eb2e8f9f7 | 807 | HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address); |
<> | 144:ef7eb2e8f9f7 | 808 | HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type); |
<> | 144:ef7eb2e8f9f7 | 809 | HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
<> | 144:ef7eb2e8f9f7 | 810 | HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); |
<> | 144:ef7eb2e8f9f7 | 811 | HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); |
<> | 144:ef7eb2e8f9f7 | 812 | uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
<> | 144:ef7eb2e8f9f7 | 813 | HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
<> | 144:ef7eb2e8f9f7 | 814 | HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
<> | 144:ef7eb2e8f9f7 | 815 | HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
<> | 144:ef7eb2e8f9f7 | 816 | HAL_StatusTypeDef HAL_PCD_ActiveRemoteWakeup(PCD_HandleTypeDef *hpcd); |
<> | 144:ef7eb2e8f9f7 | 817 | HAL_StatusTypeDef HAL_PCD_DeActiveRemoteWakeup(PCD_HandleTypeDef *hpcd); |
<> | 144:ef7eb2e8f9f7 | 818 | /** |
<> | 144:ef7eb2e8f9f7 | 819 | * @} |
<> | 144:ef7eb2e8f9f7 | 820 | */ |
<> | 144:ef7eb2e8f9f7 | 821 | |
<> | 144:ef7eb2e8f9f7 | 822 | /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions |
<> | 144:ef7eb2e8f9f7 | 823 | * @{ |
<> | 144:ef7eb2e8f9f7 | 824 | */ |
<> | 144:ef7eb2e8f9f7 | 825 | /* Peripheral State functions **************************************************/ |
<> | 144:ef7eb2e8f9f7 | 826 | PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd); |
<> | 144:ef7eb2e8f9f7 | 827 | /** |
<> | 144:ef7eb2e8f9f7 | 828 | * @} |
<> | 144:ef7eb2e8f9f7 | 829 | */ |
<> | 144:ef7eb2e8f9f7 | 830 | |
<> | 144:ef7eb2e8f9f7 | 831 | /** @addtogroup PCDEx_Private_Functions PCD Extended Private Functions |
<> | 144:ef7eb2e8f9f7 | 832 | * @{ |
<> | 144:ef7eb2e8f9f7 | 833 | */ |
<> | 144:ef7eb2e8f9f7 | 834 | void PCD_WritePMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes); |
<> | 144:ef7eb2e8f9f7 | 835 | void PCD_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes); |
<> | 144:ef7eb2e8f9f7 | 836 | /** |
<> | 144:ef7eb2e8f9f7 | 837 | * @} |
<> | 144:ef7eb2e8f9f7 | 838 | */ |
<> | 144:ef7eb2e8f9f7 | 839 | |
<> | 144:ef7eb2e8f9f7 | 840 | /** |
<> | 144:ef7eb2e8f9f7 | 841 | * @} |
<> | 144:ef7eb2e8f9f7 | 842 | */ |
<> | 144:ef7eb2e8f9f7 | 843 | |
<> | 144:ef7eb2e8f9f7 | 844 | /** |
<> | 144:ef7eb2e8f9f7 | 845 | * @} |
<> | 144:ef7eb2e8f9f7 | 846 | */ |
<> | 144:ef7eb2e8f9f7 | 847 | |
<> | 144:ef7eb2e8f9f7 | 848 | #endif /* STM32F302xE || STM32F303xE || */ |
<> | 144:ef7eb2e8f9f7 | 849 | /* STM32F302xC || STM32F303xC || */ |
<> | 144:ef7eb2e8f9f7 | 850 | /* STM32F302x8 || */ |
<> | 144:ef7eb2e8f9f7 | 851 | /* STM32F373xC */ |
<> | 144:ef7eb2e8f9f7 | 852 | |
<> | 144:ef7eb2e8f9f7 | 853 | #ifdef __cplusplus |
<> | 144:ef7eb2e8f9f7 | 854 | } |
<> | 144:ef7eb2e8f9f7 | 855 | #endif |
<> | 144:ef7eb2e8f9f7 | 856 | |
<> | 144:ef7eb2e8f9f7 | 857 | |
<> | 144:ef7eb2e8f9f7 | 858 | #endif /* __STM32F3xx_HAL_PCD_H */ |
<> | 144:ef7eb2e8f9f7 | 859 | |
<> | 144:ef7eb2e8f9f7 | 860 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |