pravin sarode / Mymbed-dev

MBED-DEV only fro Nucleo STM32F303K8T6

Fork of mbed-dev by mbed official

targets/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_dac_ex.h@151:acf04f8e7d03, 2016-11-19 (annotated)

Committer:
pravinautosys
Date:
Sat Nov 19 10:38:54 2016 +0000
Revision:
151:acf04f8e7d03
Parent:
149:156823d33999 
MyMBED-DEVWithSTM32F303K8T6;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f3xx_hal_dac_ex.h
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 144:ef7eb2e8f9f7 5 * @version V1.3.0
<> 144:ef7eb2e8f9f7 6 * @date 01-July-2016
<> 144:ef7eb2e8f9f7 7 * @brief Header file of DAC HAL Extended module.
<> 144:ef7eb2e8f9f7 8 ******************************************************************************
<> 144:ef7eb2e8f9f7 9 * @attention
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 12 *
<> 144:ef7eb2e8f9f7 13 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 14 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 16 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 18 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 19 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 21 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 22 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 23 *
<> 144:ef7eb2e8f9f7 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 34 *
<> 144:ef7eb2e8f9f7 35 ******************************************************************************
<> 144:ef7eb2e8f9f7 36 */
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 /* Define to prevent recursive inclusion -------------------------------------*/
<> 144:ef7eb2e8f9f7 39 #ifndef __STM32F3xx_HAL_DAC_EX_H
<> 144:ef7eb2e8f9f7 40 #define __STM32F3xx_HAL_DAC_EX_H
<> 144:ef7eb2e8f9f7 41
<> 144:ef7eb2e8f9f7 42 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 43 extern "C" {
<> 144:ef7eb2e8f9f7 44 #endif
<> 144:ef7eb2e8f9f7 45
<> 144:ef7eb2e8f9f7 46 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 47 #include "stm32f3xx_hal_def.h"
<> 144:ef7eb2e8f9f7 48
<> 144:ef7eb2e8f9f7 49 /** @addtogroup STM32F3xx_HAL_Driver
<> 144:ef7eb2e8f9f7 50 * @{
<> 144:ef7eb2e8f9f7 51 */
<> 144:ef7eb2e8f9f7 52
<> 144:ef7eb2e8f9f7 53 /** @addtogroup DACEx
<> 144:ef7eb2e8f9f7 54 * @{
<> 144:ef7eb2e8f9f7 55 */
<> 144:ef7eb2e8f9f7 56
<> 144:ef7eb2e8f9f7 57 /* Exported types ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 58 /* Exported constants --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 59 /** @defgroup DACEx_Exported_Constants DACEx Exported Constants
<> 144:ef7eb2e8f9f7 60 * @{
<> 144:ef7eb2e8f9f7 61 */
<> 144:ef7eb2e8f9f7 62
<> 144:ef7eb2e8f9f7 63 /** @defgroup DACEx_trigger_selection DACEx trigger selection
<> 144:ef7eb2e8f9f7 64 * @{
<> 144:ef7eb2e8f9f7 65 */
<> 144:ef7eb2e8f9f7 66
<> 144:ef7eb2e8f9f7 67 #if defined(STM32F301x8) || defined(STM32F318xx)
<> 144:ef7eb2e8f9f7 68 #define DAC_TRIGGER_NONE ((uint32_t)0x00000000) /*!< Conversion is automatic once the DAC1_DHRxxxx register
<> 144:ef7eb2e8f9f7 69 has been loaded, and not by external trigger */
<> 144:ef7eb2e8f9f7 70 #define DAC_TRIGGER_T6_TRGO ((uint32_t)DAC_CR_TEN1) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */
<> 144:ef7eb2e8f9f7 71 #define DAC_TRIGGER_T2_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TEN1)) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */
<> 144:ef7eb2e8f9f7 72 #define DAC_TRIGGER_T15_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM5 TRGO selected as external conversion trigger for DAC channel */
<> 144:ef7eb2e8f9f7 73 #define DAC_TRIGGER_EXT_IT9 ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */
<> 144:ef7eb2e8f9f7 74 #define DAC_TRIGGER_SOFTWARE ((uint32_t)(DAC_CR_TSEL1 | DAC_CR_TEN1)) /*!< Conversion started by software trigger for DAC channel */
<> 144:ef7eb2e8f9f7 75
<> 144:ef7eb2e8f9f7 76 #define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_TRIGGER_NONE) || \
<> 144:ef7eb2e8f9f7 77 ((TRIGGER) == DAC_TRIGGER_T2_TRGO) || \
<> 144:ef7eb2e8f9f7 78 ((TRIGGER) == DAC_TRIGGER_T6_TRGO) || \
<> 144:ef7eb2e8f9f7 79 ((TRIGGER) == DAC_TRIGGER_T15_TRGO) || \
<> 144:ef7eb2e8f9f7 80 ((TRIGGER) == DAC_TRIGGER_EXT_IT9) || \
<> 144:ef7eb2e8f9f7 81 ((TRIGGER) == DAC_TRIGGER_SOFTWARE))
<> 144:ef7eb2e8f9f7 82 #endif /* STM32F301x8 || STM32F318xx */
<> 144:ef7eb2e8f9f7 83
<> 144:ef7eb2e8f9f7 84 #if defined(STM32F302xE) || \
<> 144:ef7eb2e8f9f7 85 defined(STM32F302xC) || \
<> 144:ef7eb2e8f9f7 86 defined(STM32F302x8)
<> 144:ef7eb2e8f9f7 87
<> 144:ef7eb2e8f9f7 88 #define DAC_TRIGGER_NONE ((uint32_t)0x00000000) /*!< Conversion is automatic once the DAC1_DHRxxxx register
<> 144:ef7eb2e8f9f7 89 has been loaded, and not by external trigger */
<> 144:ef7eb2e8f9f7 90 #define DAC_TRIGGER_T6_TRGO ((uint32_t)DAC_CR_TEN1) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */
<> 144:ef7eb2e8f9f7 91 #define DAC_TRIGGER_T3_TRGO ((uint32_t)(DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM3 TRGO selected as external conversion trigger for DAC channel */
<> 144:ef7eb2e8f9f7 92 #define DAC_TRIGGER_T15_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM5 TRGO selected as external conversion trigger for DAC channel */
<> 144:ef7eb2e8f9f7 93 #define DAC_TRIGGER_T2_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TEN1)) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */
<> 144:ef7eb2e8f9f7 94 #define DAC_TRIGGER_T4_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM4 TRGO selected as external conversion trigger for DAC channel */
<> 144:ef7eb2e8f9f7 95 #define DAC_TRIGGER_EXT_IT9 ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */
<> 144:ef7eb2e8f9f7 96 #define DAC_TRIGGER_SOFTWARE ((uint32_t)(DAC_CR_TSEL1 | DAC_CR_TEN1)) /*!< Conversion started by software trigger for DAC channel */
<> 144:ef7eb2e8f9f7 97
<> 144:ef7eb2e8f9f7 98 #define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_TRIGGER_NONE) || \
<> 144:ef7eb2e8f9f7 99 ((TRIGGER) == DAC_TRIGGER_T2_TRGO) || \
<> 144:ef7eb2e8f9f7 100 ((TRIGGER) == DAC_TRIGGER_T3_TRGO) || \
<> 144:ef7eb2e8f9f7 101 ((TRIGGER) == DAC_TRIGGER_T4_TRGO) || \
<> 144:ef7eb2e8f9f7 102 ((TRIGGER) == DAC_TRIGGER_T15_TRGO) || \
<> 144:ef7eb2e8f9f7 103 ((TRIGGER) == DAC_TRIGGER_T6_TRGO) || \
<> 144:ef7eb2e8f9f7 104 ((TRIGGER) == DAC_TRIGGER_EXT_IT9) || \
<> 144:ef7eb2e8f9f7 105 ((TRIGGER) == DAC_TRIGGER_SOFTWARE))
<> 144:ef7eb2e8f9f7 106
<> 144:ef7eb2e8f9f7 107 #endif /* STM32F302xE || */
<> 144:ef7eb2e8f9f7 108 /* STM32F302xC || */
<> 144:ef7eb2e8f9f7 109 /* STM32F302x8 */
<> 144:ef7eb2e8f9f7 110
<> 144:ef7eb2e8f9f7 111 #if defined(STM32F303xE) || defined(STM32F398xx) || \
<> 144:ef7eb2e8f9f7 112 defined(STM32F303xC) || defined(STM32F358xx)
<> 144:ef7eb2e8f9f7 113
<> 144:ef7eb2e8f9f7 114 #define DAC_TRIGGER_NONE ((uint32_t)0x00000000) /*!< Conversion is automatic once the DAC1_DHRxxxx register
<> 144:ef7eb2e8f9f7 115 has been loaded, and not by external trigger */
<> 144:ef7eb2e8f9f7 116 #define DAC_TRIGGER_T2_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TEN1)) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */
<> 144:ef7eb2e8f9f7 117 #define DAC_TRIGGER_T4_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM4 TRGO selected as external conversion trigger for DAC channel */
<> 144:ef7eb2e8f9f7 118 #define DAC_TRIGGER_T15_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM5 TRGO selected as external conversion trigger for DAC channel */
<> 144:ef7eb2e8f9f7 119 #define DAC_TRIGGER_T6_TRGO ((uint32_t)DAC_CR_TEN1) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */
<> 144:ef7eb2e8f9f7 120 #define DAC_TRIGGER_T7_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */
<> 144:ef7eb2e8f9f7 121 #define DAC_TRIGGER_T3_TRGO ((uint32_t)(DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM3 TRGO selected as external conversion trigger for DAC channel
<> 144:ef7eb2e8f9f7 122 Use __HAL_REMAPTRIGGER_ENABLE(HAL_REMAPTRIGGER_DAC1_TRIG) for TIM3 selection */
<> 144:ef7eb2e8f9f7 123 #define DAC_TRIGGER_T8_TRGO DAC_TRIGGER_T3_TRGO /*!< TIM8 TRGO selected as external conversion trigger for DAC channel
<> 144:ef7eb2e8f9f7 124 Use __HAL_REMAPTRIGGER_DISABLE(HAL_REMAPTRIGGER_DAC1_TRIG) for TIM8 selection */
<> 144:ef7eb2e8f9f7 125
<> 144:ef7eb2e8f9f7 126 #define DAC_TRIGGER_EXT_IT9 ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */
<> 144:ef7eb2e8f9f7 127 #define DAC_TRIGGER_SOFTWARE ((uint32_t)(DAC_CR_TSEL1 | DAC_CR_TEN1)) /*!< Conversion started by software trigger for DAC channel */
<> 144:ef7eb2e8f9f7 128
<> 144:ef7eb2e8f9f7 129 #define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_TRIGGER_NONE) || \
<> 144:ef7eb2e8f9f7 130 ((TRIGGER) == DAC_TRIGGER_T2_TRGO) || \
<> 144:ef7eb2e8f9f7 131 ((TRIGGER) == DAC_TRIGGER_T3_TRGO) || \
<> 144:ef7eb2e8f9f7 132 ((TRIGGER) == DAC_TRIGGER_T4_TRGO) || \
<> 144:ef7eb2e8f9f7 133 ((TRIGGER) == DAC_TRIGGER_T15_TRGO) || \
<> 144:ef7eb2e8f9f7 134 ((TRIGGER) == DAC_TRIGGER_T6_TRGO) || \
<> 144:ef7eb2e8f9f7 135 ((TRIGGER) == DAC_TRIGGER_T7_TRGO) || \
<> 144:ef7eb2e8f9f7 136 ((TRIGGER) == DAC_TRIGGER_EXT_IT9) || \
<> 144:ef7eb2e8f9f7 137 ((TRIGGER) == DAC_TRIGGER_SOFTWARE))
<> 144:ef7eb2e8f9f7 138 #endif /* STM32F303xE || STM32F398xx || */
<> 144:ef7eb2e8f9f7 139 /* STM32F303xC || STM32F358xx */
<> 144:ef7eb2e8f9f7 140
<> 144:ef7eb2e8f9f7 141
<> 144:ef7eb2e8f9f7 142 #if defined(STM32F303x8) || defined(STM32F328xx)
<> 144:ef7eb2e8f9f7 143
<> 144:ef7eb2e8f9f7 144 #define DAC_TRIGGER_NONE ((uint32_t)0x00000000) /*!< Conversion is automatic once the DAC1_DHRxxxx register
<> 144:ef7eb2e8f9f7 145 has been loaded, and not by external trigger */
<> 144:ef7eb2e8f9f7 146 #define DAC_TRIGGER_T2_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TEN1)) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */
<> 144:ef7eb2e8f9f7 147 #define DAC_TRIGGER_T15_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM5 TRGO selected as external conversion trigger for DAC channel */
<> 144:ef7eb2e8f9f7 148 #define DAC_TRIGGER_T6_TRGO ((uint32_t)DAC_CR_TEN1) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */
<> 144:ef7eb2e8f9f7 149 #define DAC_TRIGGER_T7_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */
<> 144:ef7eb2e8f9f7 150 #define DAC_TRIGGER_T3_TRGO ((uint32_t)(DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM3 TRGO selected as external conversion trigger for DAC channel */
<> 144:ef7eb2e8f9f7 151
<> 144:ef7eb2e8f9f7 152 #define DAC_TRIGGER_EXT_IT9 ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */
<> 144:ef7eb2e8f9f7 153 #define DAC_TRIGGER_SOFTWARE ((uint32_t)(DAC_CR_TSEL1 | DAC_CR_TEN1)) /*!< Conversion started by software trigger for DAC channel */
<> 144:ef7eb2e8f9f7 154
<> 144:ef7eb2e8f9f7 155 #define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_TRIGGER_NONE) || \
<> 144:ef7eb2e8f9f7 156 ((TRIGGER) == DAC_TRIGGER_T2_TRGO) || \
<> 144:ef7eb2e8f9f7 157 ((TRIGGER) == DAC_TRIGGER_T3_TRGO) || \
<> 144:ef7eb2e8f9f7 158 ((TRIGGER) == DAC_TRIGGER_T15_TRGO) || \
<> 144:ef7eb2e8f9f7 159 ((TRIGGER) == DAC_TRIGGER_T6_TRGO) || \
<> 144:ef7eb2e8f9f7 160 ((TRIGGER) == DAC_TRIGGER_T7_TRGO) || \
<> 144:ef7eb2e8f9f7 161 ((TRIGGER) == DAC_TRIGGER_EXT_IT9) || \
<> 144:ef7eb2e8f9f7 162 ((TRIGGER) == DAC_TRIGGER_SOFTWARE))
<> 144:ef7eb2e8f9f7 163
<> 144:ef7eb2e8f9f7 164 #endif /* STM32F303x8 || STM32F328xx */
<> 144:ef7eb2e8f9f7 165
<> 144:ef7eb2e8f9f7 166
<> 144:ef7eb2e8f9f7 167 #if defined(STM32F373xC) || defined(STM32F378xx)
<> 144:ef7eb2e8f9f7 168
<> 144:ef7eb2e8f9f7 169 #define DAC_TRIGGER_NONE ((uint32_t)0x00000000) /*!< Conversion is automatic once the DAC1_DHRxxxx register
<> 144:ef7eb2e8f9f7 170 has been loaded, and not by external trigger */
<> 144:ef7eb2e8f9f7 171
<> 144:ef7eb2e8f9f7 172 #define DAC_TRIGGER_T2_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TEN1)) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */
<> 144:ef7eb2e8f9f7 173 #define DAC_TRIGGER_T4_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM4 TRGO selected as external conversion trigger for DAC channel */
<> 144:ef7eb2e8f9f7 174 #define DAC_TRIGGER_T5_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM5 TRGO selected as external conversion trigger for DAC channel (DAC1) */
<> 144:ef7eb2e8f9f7 175 #define DAC_TRIGGER_T18_TRGO DAC_TRIGGER_T5_TRGO /*!< TIM18 TRGO selected as external conversion trigger for DAC channel (DAC2) */
<> 144:ef7eb2e8f9f7 176 #define DAC_TRIGGER_T6_TRGO ((uint32_t)DAC_CR_TEN1) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */
<> 144:ef7eb2e8f9f7 177 #define DAC_TRIGGER_T7_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */
<> 144:ef7eb2e8f9f7 178 #define DAC_TRIGGER_T3_TRGO ((uint32_t)(DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM3 TRGO selected as external conversion trigger for DAC channel */
<> 144:ef7eb2e8f9f7 179
<> 144:ef7eb2e8f9f7 180 #define DAC_TRIGGER_EXT_IT9 ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */
<> 144:ef7eb2e8f9f7 181 #define DAC_TRIGGER_SOFTWARE ((uint32_t)(DAC_CR_TSEL1 | DAC_CR_TEN1)) /*!< Conversion started by software trigger for DAC channel */
<> 144:ef7eb2e8f9f7 182
<> 144:ef7eb2e8f9f7 183
<> 144:ef7eb2e8f9f7 184 #define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_TRIGGER_NONE) || \
<> 144:ef7eb2e8f9f7 185 ((TRIGGER) == DAC_TRIGGER_T2_TRGO) || \
<> 144:ef7eb2e8f9f7 186 ((TRIGGER) == DAC_TRIGGER_T3_TRGO) || \
<> 144:ef7eb2e8f9f7 187 ((TRIGGER) == DAC_TRIGGER_T4_TRGO) || \
<> 144:ef7eb2e8f9f7 188 ((TRIGGER) == DAC_TRIGGER_T5_TRGO) || \
<> 144:ef7eb2e8f9f7 189 ((TRIGGER) == DAC_TRIGGER_T6_TRGO) || \
<> 144:ef7eb2e8f9f7 190 ((TRIGGER) == DAC_TRIGGER_T7_TRGO) || \
<> 144:ef7eb2e8f9f7 191 ((TRIGGER) == DAC_TRIGGER_EXT_IT9) || \
<> 144:ef7eb2e8f9f7 192 ((TRIGGER) == DAC_TRIGGER_SOFTWARE))
<> 144:ef7eb2e8f9f7 193 #endif /* STM32F373xC || STM32F378xx */
<> 144:ef7eb2e8f9f7 194
<> 144:ef7eb2e8f9f7 195 #if defined(STM32F334x8)
<> 144:ef7eb2e8f9f7 196
<> 144:ef7eb2e8f9f7 197 #define DAC_TRIGGER_NONE ((uint32_t)0x00000000) /*!< Conversion is automatic once the DAC1_DHRxxxx register
<> 144:ef7eb2e8f9f7 198 has been loaded, and not by external trigger */
<> 144:ef7eb2e8f9f7 199 #define DAC_TRIGGER_T6_TRGO ((uint32_t)DAC_CR_TEN1) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */
<> 144:ef7eb2e8f9f7 200 #define DAC_TRIGGER_T3_TRGO ((uint32_t)(DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM3 TRGO selected as external conversion trigger for DAC channel
<> 144:ef7eb2e8f9f7 201 Use __HAL_REMAPTRIGGER_ENABLE(HAL_REMAPTRIGGER_DAC1_TRIG) for TIM3 remap */
<> 144:ef7eb2e8f9f7 202
<> 144:ef7eb2e8f9f7 203 #define DAC_TRIGGER_T7_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */
<> 144:ef7eb2e8f9f7 204 #define DAC_TRIGGER_T2_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TEN1)) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */
<> 144:ef7eb2e8f9f7 205 #define DAC_TRIGGER_T15_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM15 TRGO selected as external conversion trigger for DAC channel
<> 144:ef7eb2e8f9f7 206 Use __HAL_REMAPTRIGGER_DISABLE(HAL_REMAPTRIGGER_DAC1_TRIG3) for TIM15 selection */
<> 144:ef7eb2e8f9f7 207 #define DAC_TRIGGER_HRTIM1_DACTRG1 DAC_TRIGGER_T15_TRGO /*!< HRTIM1 DACTRG1 selected as external conversion trigger for DAC
<> 144:ef7eb2e8f9f7 208 Use __HAL_REMAPTRIGGER_ENABLE(HAL_REMAPTRIGGER_DAC1_TRIG3) for HRTIM1 DACTRG1 selection */
<> 144:ef7eb2e8f9f7 209
<> 144:ef7eb2e8f9f7 210 #define DAC_TRIGGER_HRTIM1_DACTRG2 ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< HRTIM1 DACTRG2 selected as external conversion trigger for DAC channel (DAC1)
<> 144:ef7eb2e8f9f7 211 Use __HAL_REMAPTRIGGER_ENABLE(HAL_REMAPTRIGGER_DAC1_TRIG5) for HRTIM1 DACTRG2 remap */
<> 144:ef7eb2e8f9f7 212 #define DAC_TRIGGER_HRTIM1_DACTRG3 DAC_TRIGGER_HRTIM1_DACTRG2 /*!< HRTIM1 DACTRG3 selected as external conversion trigger for DAC channel (DAC2)*/
<> 144:ef7eb2e8f9f7 213
<> 144:ef7eb2e8f9f7 214 #define DAC_TRIGGER_EXT_IT9 ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */
<> 144:ef7eb2e8f9f7 215 #define DAC_TRIGGER_SOFTWARE ((uint32_t)(DAC_CR_TSEL1 | DAC_CR_TEN1)) /*!< Conversion started by software trigger for DAC channel */
<> 144:ef7eb2e8f9f7 216
<> 144:ef7eb2e8f9f7 217 #define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_TRIGGER_NONE) || \
<> 144:ef7eb2e8f9f7 218 ((TRIGGER) == DAC_TRIGGER_T6_TRGO) || \
<> 144:ef7eb2e8f9f7 219 ((TRIGGER) == DAC_TRIGGER_T3_TRGO) || \
<> 144:ef7eb2e8f9f7 220 ((TRIGGER) == DAC_TRIGGER_T7_TRGO) || \
<> 144:ef7eb2e8f9f7 221 ((TRIGGER) == DAC_TRIGGER_T15_TRGO) || \
<> 144:ef7eb2e8f9f7 222 ((TRIGGER) == DAC_TRIGGER_T2_TRGO) || \
<> 144:ef7eb2e8f9f7 223 ((TRIGGER) == DAC_TRIGGER_HRTIM1_DACTRG2) || \
<> 144:ef7eb2e8f9f7 224 ((TRIGGER) == DAC_TRIGGER_EXT_IT9) || \
<> 144:ef7eb2e8f9f7 225 ((TRIGGER) == DAC_TRIGGER_SOFTWARE))
<> 144:ef7eb2e8f9f7 226
<> 144:ef7eb2e8f9f7 227 #endif /* STM32F334x8 */
<> 144:ef7eb2e8f9f7 228
<> 144:ef7eb2e8f9f7 229 /**
<> 144:ef7eb2e8f9f7 230 * @}
<> 144:ef7eb2e8f9f7 231 */
<> 144:ef7eb2e8f9f7 232
<> 144:ef7eb2e8f9f7 233 /** @defgroup DACEx_Channel_selection DACEx Channel selection
<> 144:ef7eb2e8f9f7 234 * @{
<> 144:ef7eb2e8f9f7 235 */
<> 144:ef7eb2e8f9f7 236
<> 144:ef7eb2e8f9f7 237 #if defined(STM32F302xE) || \
<> 144:ef7eb2e8f9f7 238 defined(STM32F302xC) || \
<> 144:ef7eb2e8f9f7 239 defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
<> 144:ef7eb2e8f9f7 240 #define DAC_CHANNEL_1 ((uint32_t)0x00000000) /*!< DAC Channel 1 */
<> 144:ef7eb2e8f9f7 241
<> 144:ef7eb2e8f9f7 242 #endif /* STM32F302xE || */
<> 144:ef7eb2e8f9f7 243 /* STM32F302xC || */
<> 144:ef7eb2e8f9f7 244 /* STM32F301x8 || STM32F302x8 || STM32F318xx */
<> 144:ef7eb2e8f9f7 245
<> 144:ef7eb2e8f9f7 246
<> 144:ef7eb2e8f9f7 247 #if defined(STM32F303xE) || defined(STM32F398xx) || \
<> 144:ef7eb2e8f9f7 248 defined(STM32F303xC) || defined(STM32F358xx)
<> 144:ef7eb2e8f9f7 249 #define DAC_CHANNEL_1 ((uint32_t)0x00000000) /*!< DAC Channel 1 */
<> 144:ef7eb2e8f9f7 250 #define DAC_CHANNEL_2 ((uint32_t)0x00000010) /*!< DAC Channel 2 */
<> 144:ef7eb2e8f9f7 251
<> 144:ef7eb2e8f9f7 252 #endif /* STM32F303xE || STM32F398xx || */
<> 144:ef7eb2e8f9f7 253 /* STM32F303xC || STM32F358xx */
<> 144:ef7eb2e8f9f7 254
<> 144:ef7eb2e8f9f7 255 #if defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \
<> 144:ef7eb2e8f9f7 256 defined(STM32F373xC) || defined(STM32F378xx)
<> 144:ef7eb2e8f9f7 257
<> 144:ef7eb2e8f9f7 258 #define DAC_CHANNEL_1 ((uint32_t)0x00000000) /*!< DAC Channel 1 */
<> 144:ef7eb2e8f9f7 259 #define DAC_CHANNEL_2 ((uint32_t)0x00000010) /*!< DAC Channel 2 */
<> 144:ef7eb2e8f9f7 260
<> 144:ef7eb2e8f9f7 261 #endif /* STM32F303x8 || STM32F334x8 || STM32F328xx || */
<> 144:ef7eb2e8f9f7 262 /* STM32F373xC || STM32F378xx */
<> 144:ef7eb2e8f9f7 263
<> 144:ef7eb2e8f9f7 264 /**
<> 144:ef7eb2e8f9f7 265 * @}
<> 144:ef7eb2e8f9f7 266 */
<> 144:ef7eb2e8f9f7 267
<> 144:ef7eb2e8f9f7 268 /**
<> 144:ef7eb2e8f9f7 269 * @}
<> 144:ef7eb2e8f9f7 270 */
<> 144:ef7eb2e8f9f7 271
<> 144:ef7eb2e8f9f7 272 /* Private macro -------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 273
<> 144:ef7eb2e8f9f7 274 /** @defgroup DACEx_Private_Macros DACEx Private Macros
<> 144:ef7eb2e8f9f7 275 * @{
<> 144:ef7eb2e8f9f7 276 */
<> 144:ef7eb2e8f9f7 277
<> 144:ef7eb2e8f9f7 278 #if defined(STM32F302xE) || \
<> 144:ef7eb2e8f9f7 279 defined(STM32F302xC) || \
<> 144:ef7eb2e8f9f7 280 defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx)
<> 144:ef7eb2e8f9f7 281
<> 144:ef7eb2e8f9f7 282 #define IS_DAC_CHANNEL(CHANNEL) ((CHANNEL) == DAC_CHANNEL_1)
<> 144:ef7eb2e8f9f7 283 #endif /* STM32F302xE || */
<> 144:ef7eb2e8f9f7 284 /* STM32F302xC || */
<> 144:ef7eb2e8f9f7 285 /* STM32F301x8 || STM32F302x8 || STM32F318xx */
<> 144:ef7eb2e8f9f7 286
<> 144:ef7eb2e8f9f7 287
<> 144:ef7eb2e8f9f7 288 #if defined(STM32F303xE) || defined(STM32F398xx) || \
<> 144:ef7eb2e8f9f7 289 defined(STM32F303xC) || defined(STM32F358xx)
<> 144:ef7eb2e8f9f7 290
<> 144:ef7eb2e8f9f7 291 #define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_CHANNEL_1) || \
<> 144:ef7eb2e8f9f7 292 ((CHANNEL) == DAC_CHANNEL_2))
<> 144:ef7eb2e8f9f7 293 #endif /* STM32F303xE || STM32F398xx || */
<> 144:ef7eb2e8f9f7 294 /* STM32F303xC || STM32F358xx */
<> 144:ef7eb2e8f9f7 295
<> 144:ef7eb2e8f9f7 296 #if defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \
<> 144:ef7eb2e8f9f7 297 defined(STM32F373xC) || defined(STM32F378xx)
<> 144:ef7eb2e8f9f7 298
<> 144:ef7eb2e8f9f7 299 #define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_CHANNEL_1) || \
<> 144:ef7eb2e8f9f7 300 ((CHANNEL) == DAC_CHANNEL_2))
<> 144:ef7eb2e8f9f7 301 #endif /* STM32F303x8 || STM32F334x8 || STM32F328xx || */
<> 144:ef7eb2e8f9f7 302 /* STM32F373xC || STM32F378xx */
<> 144:ef7eb2e8f9f7 303
<> 144:ef7eb2e8f9f7 304
<> 144:ef7eb2e8f9f7 305
<> 144:ef7eb2e8f9f7 306 /**
<> 144:ef7eb2e8f9f7 307 * @}
<> 144:ef7eb2e8f9f7 308 */
<> 144:ef7eb2e8f9f7 309
<> 144:ef7eb2e8f9f7 310 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 311
<> 144:ef7eb2e8f9f7 312 /** @addtogroup DACEx_Exported_Functions
<> 144:ef7eb2e8f9f7 313 * @{
<> 144:ef7eb2e8f9f7 314 */
<> 144:ef7eb2e8f9f7 315
<> 144:ef7eb2e8f9f7 316 /** @addtogroup DACEx_Exported_Functions_Group2
<> 144:ef7eb2e8f9f7 317 * @{
<> 144:ef7eb2e8f9f7 318 */
<> 144:ef7eb2e8f9f7 319 /* IO operation functions *****************************************************/
<> 144:ef7eb2e8f9f7 320
<> 144:ef7eb2e8f9f7 321 uint32_t HAL_DACEx_DualGetValue(DAC_HandleTypeDef* hdac);
<> 144:ef7eb2e8f9f7 322 HAL_StatusTypeDef HAL_DACEx_DualSetValue(DAC_HandleTypeDef* hdac, uint32_t Alignment, uint32_t Data1, uint32_t Data2);
<> 144:ef7eb2e8f9f7 323 HAL_StatusTypeDef HAL_DACEx_TriangleWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Amplitude);
<> 144:ef7eb2e8f9f7 324 HAL_StatusTypeDef HAL_DACEx_NoiseWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Amplitude);
<> 144:ef7eb2e8f9f7 325
<> 144:ef7eb2e8f9f7 326 #if defined(STM32F303xE) || defined(STM32F398xx) || \
<> 144:ef7eb2e8f9f7 327 defined(STM32F303xC) || defined(STM32F358xx) || \
<> 144:ef7eb2e8f9f7 328 defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) || \
<> 144:ef7eb2e8f9f7 329 defined(STM32F373xC) || defined(STM32F378xx)
<> 144:ef7eb2e8f9f7 330 void HAL_DACEx_ConvCpltCallbackCh2(DAC_HandleTypeDef* hdac);
<> 144:ef7eb2e8f9f7 331 void HAL_DACEx_ConvHalfCpltCallbackCh2(DAC_HandleTypeDef* hdac);
<> 144:ef7eb2e8f9f7 332 void HAL_DACEx_ErrorCallbackCh2(DAC_HandleTypeDef *hdac);
<> 144:ef7eb2e8f9f7 333 void HAL_DACEx_DMAUnderrunCallbackCh2(DAC_HandleTypeDef *hdac);
<> 144:ef7eb2e8f9f7 334 #endif /* STM32F303xE || STM32F398xx || */
<> 144:ef7eb2e8f9f7 335 /* STM32F303xC || STM32F358xx || */
<> 144:ef7eb2e8f9f7 336 /* STM32F303x8 || STM32F334x8 || STM32F328xx || */
<> 144:ef7eb2e8f9f7 337 /* STM32F373xC || STM32F378xx */
<> 144:ef7eb2e8f9f7 338
<> 144:ef7eb2e8f9f7 339 /**
<> 144:ef7eb2e8f9f7 340 * @}
<> 144:ef7eb2e8f9f7 341 */
<> 144:ef7eb2e8f9f7 342
<> 144:ef7eb2e8f9f7 343 /**
<> 144:ef7eb2e8f9f7 344 * @}
<> 144:ef7eb2e8f9f7 345 */
<> 144:ef7eb2e8f9f7 346
<> 144:ef7eb2e8f9f7 347 /**
<> 144:ef7eb2e8f9f7 348 * @}
<> 144:ef7eb2e8f9f7 349 */
<> 144:ef7eb2e8f9f7 350
<> 144:ef7eb2e8f9f7 351 /**
<> 144:ef7eb2e8f9f7 352 * @}
<> 144:ef7eb2e8f9f7 353 */
<> 144:ef7eb2e8f9f7 354
<> 144:ef7eb2e8f9f7 355 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 356 }
<> 144:ef7eb2e8f9f7 357 #endif
<> 144:ef7eb2e8f9f7 358
<> 144:ef7eb2e8f9f7 359 #endif /* __STM32F3xx_HAL_HAL_EX_H */
<> 144:ef7eb2e8f9f7 360
<> 144:ef7eb2e8f9f7 361 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/