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targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_pcd.h@167:e84263d55307, 2017-06-21 (annotated)

Committer:
AnnaBridge
Date:
Wed Jun 21 17:46:44 2017 +0100
Revision:
167:e84263d55307
Parent:
153:fa9ff456f731
Child:
182:a56a73fd2a6f
This updates the lib to the mbed lib v 145

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f4xx_hal_pcd.h
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
AnnaBridge 167:e84263d55307 5 * @version V1.7.1
AnnaBridge 167:e84263d55307 6 * @date 14-April-2017
<> 144:ef7eb2e8f9f7 7 * @brief Header file of PCD HAL module.
<> 144:ef7eb2e8f9f7 8 ******************************************************************************
<> 144:ef7eb2e8f9f7 9 * @attention
<> 144:ef7eb2e8f9f7 10 *
AnnaBridge 167:e84263d55307 11 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 12 *
<> 144:ef7eb2e8f9f7 13 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 14 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 16 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 18 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 19 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 21 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 22 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 23 *
<> 144:ef7eb2e8f9f7 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 34 *
<> 144:ef7eb2e8f9f7 35 ******************************************************************************
<> 144:ef7eb2e8f9f7 36 */
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 /* Define to prevent recursive inclusion -------------------------------------*/
<> 144:ef7eb2e8f9f7 39 #ifndef __STM32F4xx_HAL_PCD_H
<> 144:ef7eb2e8f9f7 40 #define __STM32F4xx_HAL_PCD_H
<> 144:ef7eb2e8f9f7 41
<> 144:ef7eb2e8f9f7 42 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 43 extern "C" {
<> 144:ef7eb2e8f9f7 44 #endif
<> 144:ef7eb2e8f9f7 45 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
<> 144:ef7eb2e8f9f7 46 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
<> 144:ef7eb2e8f9f7 47 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) || \
<> 144:ef7eb2e8f9f7 48 defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \
AnnaBridge 167:e84263d55307 49 defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
<> 144:ef7eb2e8f9f7 50 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 51 #include "stm32f4xx_ll_usb.h"
<> 144:ef7eb2e8f9f7 52
<> 144:ef7eb2e8f9f7 53 /** @addtogroup STM32F4xx_HAL_Driver
<> 144:ef7eb2e8f9f7 54 * @{
<> 144:ef7eb2e8f9f7 55 */
<> 144:ef7eb2e8f9f7 56
<> 144:ef7eb2e8f9f7 57 /** @addtogroup PCD
<> 144:ef7eb2e8f9f7 58 * @{
<> 144:ef7eb2e8f9f7 59 */
<> 144:ef7eb2e8f9f7 60
<> 144:ef7eb2e8f9f7 61 /* Exported types ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 62 /** @defgroup PCD_Exported_Types PCD Exported Types
<> 144:ef7eb2e8f9f7 63 * @{
<> 144:ef7eb2e8f9f7 64 */
<> 144:ef7eb2e8f9f7 65
<> 144:ef7eb2e8f9f7 66 /**
<> 144:ef7eb2e8f9f7 67 * @brief PCD State structure definition
<> 144:ef7eb2e8f9f7 68 */
<> 144:ef7eb2e8f9f7 69 typedef enum
<> 144:ef7eb2e8f9f7 70 {
<> 144:ef7eb2e8f9f7 71 HAL_PCD_STATE_RESET = 0x00U,
<> 144:ef7eb2e8f9f7 72 HAL_PCD_STATE_READY = 0x01U,
<> 144:ef7eb2e8f9f7 73 HAL_PCD_STATE_ERROR = 0x02U,
<> 144:ef7eb2e8f9f7 74 HAL_PCD_STATE_BUSY = 0x03U,
<> 144:ef7eb2e8f9f7 75 HAL_PCD_STATE_TIMEOUT = 0x04U
<> 144:ef7eb2e8f9f7 76 } PCD_StateTypeDef;
<> 144:ef7eb2e8f9f7 77
<> 144:ef7eb2e8f9f7 78 #ifdef USB_OTG_GLPMCFG_LPMEN
<> 144:ef7eb2e8f9f7 79 /* Device LPM suspend state */
<> 144:ef7eb2e8f9f7 80 typedef enum
<> 144:ef7eb2e8f9f7 81 {
<> 144:ef7eb2e8f9f7 82 LPM_L0 = 0x00U, /* on */
<> 144:ef7eb2e8f9f7 83 LPM_L1 = 0x01U, /* LPM L1 sleep */
<> 144:ef7eb2e8f9f7 84 LPM_L2 = 0x02U, /* suspend */
AnnaBridge 167:e84263d55307 85 LPM_L3 = 0x03U /* off */
<> 144:ef7eb2e8f9f7 86 }PCD_LPM_StateTypeDef;
<> 144:ef7eb2e8f9f7 87 #endif /* USB_OTG_GLPMCFG_LPMEN */
<> 144:ef7eb2e8f9f7 88
<> 144:ef7eb2e8f9f7 89 typedef USB_OTG_GlobalTypeDef PCD_TypeDef;
<> 144:ef7eb2e8f9f7 90 typedef USB_OTG_CfgTypeDef PCD_InitTypeDef;
<> 144:ef7eb2e8f9f7 91 typedef USB_OTG_EPTypeDef PCD_EPTypeDef ;
<> 144:ef7eb2e8f9f7 92
<> 144:ef7eb2e8f9f7 93 /**
<> 144:ef7eb2e8f9f7 94 * @brief PCD Handle Structure definition
<> 153:fa9ff456f731 95 */
<> 153:fa9ff456f731 96
<> 153:fa9ff456f731 97 typedef struct
<> 153:fa9ff456f731 98 {
<> 153:fa9ff456f731 99 HAL_LockTypeDef Lock;
<> 153:fa9ff456f731 100 } PCD_EPLockDef;
<> 153:fa9ff456f731 101
<> 144:ef7eb2e8f9f7 102 typedef struct
<> 144:ef7eb2e8f9f7 103 {
<> 144:ef7eb2e8f9f7 104 PCD_TypeDef *Instance; /*!< Register base address */
<> 144:ef7eb2e8f9f7 105 PCD_InitTypeDef Init; /*!< PCD required parameters */
AnnaBridge 167:e84263d55307 106 PCD_EPTypeDef IN_ep[16U]; /*!< IN endpoint parameters */
AnnaBridge 167:e84263d55307 107 PCD_EPTypeDef OUT_ep[16U]; /*!< OUT endpoint parameters */
<> 153:fa9ff456f731 108 HAL_LockTypeDef Lock; /*!< PCD peripheral status */
<> 153:fa9ff456f731 109 PCD_EPLockDef EPLock[15]; /*!< PCD endpoint peripheral status */
<> 144:ef7eb2e8f9f7 110 __IO PCD_StateTypeDef State; /*!< PCD communication state */
AnnaBridge 167:e84263d55307 111 uint32_t Setup[12U]; /*!< Setup packet buffer */
<> 144:ef7eb2e8f9f7 112 #ifdef USB_OTG_GLPMCFG_LPMEN
<> 144:ef7eb2e8f9f7 113 PCD_LPM_StateTypeDef LPM_State; /*!< LPM State */
<> 144:ef7eb2e8f9f7 114 uint32_t BESL;
<> 144:ef7eb2e8f9f7 115 uint32_t lpm_active; /*!< Enable or disable the Link Power Management .
<> 144:ef7eb2e8f9f7 116 This parameter can be set to ENABLE or DISABLE */
<> 144:ef7eb2e8f9f7 117 #endif /* USB_OTG_GLPMCFG_LPMEN */
<> 144:ef7eb2e8f9f7 118 #ifdef USB_OTG_GCCFG_BCDEN
<> 144:ef7eb2e8f9f7 119 uint32_t battery_charging_active; /*!< Enable or disable Battery charging.
<> 144:ef7eb2e8f9f7 120 This parameter can be set to ENABLE or DISABLE */
<> 144:ef7eb2e8f9f7 121 #endif /* USB_OTG_GCCFG_BCDEN */
<> 144:ef7eb2e8f9f7 122 void *pData; /*!< Pointer to upper stack Handler */
<> 144:ef7eb2e8f9f7 123 } PCD_HandleTypeDef;
<> 144:ef7eb2e8f9f7 124
<> 144:ef7eb2e8f9f7 125 /**
<> 144:ef7eb2e8f9f7 126 * @}
<> 144:ef7eb2e8f9f7 127 */
<> 144:ef7eb2e8f9f7 128
<> 144:ef7eb2e8f9f7 129 /* Include PCD HAL Extension module */
<> 144:ef7eb2e8f9f7 130 #include "stm32f4xx_hal_pcd_ex.h"
<> 144:ef7eb2e8f9f7 131
<> 144:ef7eb2e8f9f7 132 /* Exported constants --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 133 /** @defgroup PCD_Exported_Constants PCD Exported Constants
<> 144:ef7eb2e8f9f7 134 * @{
<> 144:ef7eb2e8f9f7 135 */
<> 144:ef7eb2e8f9f7 136
<> 144:ef7eb2e8f9f7 137 /** @defgroup PCD_Speed PCD Speed
<> 144:ef7eb2e8f9f7 138 * @{
<> 144:ef7eb2e8f9f7 139 */
<> 144:ef7eb2e8f9f7 140 #define PCD_SPEED_HIGH 0U
<> 144:ef7eb2e8f9f7 141 #define PCD_SPEED_HIGH_IN_FULL 1U
<> 144:ef7eb2e8f9f7 142 #define PCD_SPEED_FULL 2U
<> 144:ef7eb2e8f9f7 143 /**
<> 144:ef7eb2e8f9f7 144 * @}
<> 144:ef7eb2e8f9f7 145 */
<> 144:ef7eb2e8f9f7 146
<> 144:ef7eb2e8f9f7 147 /** @defgroup PCD_PHY_Module PCD PHY Module
<> 144:ef7eb2e8f9f7 148 * @{
<> 144:ef7eb2e8f9f7 149 */
<> 144:ef7eb2e8f9f7 150 #define PCD_PHY_ULPI 1U
<> 144:ef7eb2e8f9f7 151 #define PCD_PHY_EMBEDDED 2U
<> 144:ef7eb2e8f9f7 152 /**
<> 144:ef7eb2e8f9f7 153 * @}
<> 144:ef7eb2e8f9f7 154 */
<> 144:ef7eb2e8f9f7 155
<> 144:ef7eb2e8f9f7 156 /** @defgroup PCD_Turnaround_Timeout Turnaround Timeout Value
<> 144:ef7eb2e8f9f7 157 * @{
<> 144:ef7eb2e8f9f7 158 */
<> 144:ef7eb2e8f9f7 159 #ifndef USBD_HS_TRDT_VALUE
<> 144:ef7eb2e8f9f7 160 #define USBD_HS_TRDT_VALUE 9U
<> 144:ef7eb2e8f9f7 161 #endif /* USBD_HS_TRDT_VALUE */
<> 144:ef7eb2e8f9f7 162 #ifndef USBD_FS_TRDT_VALUE
<> 144:ef7eb2e8f9f7 163 #define USBD_FS_TRDT_VALUE 5U
<> 144:ef7eb2e8f9f7 164 #endif /* USBD_FS_TRDT_VALUE */
<> 144:ef7eb2e8f9f7 165 /**
<> 144:ef7eb2e8f9f7 166 * @}
<> 144:ef7eb2e8f9f7 167 */
<> 144:ef7eb2e8f9f7 168
<> 144:ef7eb2e8f9f7 169 /**
<> 144:ef7eb2e8f9f7 170 * @}
<> 144:ef7eb2e8f9f7 171 */
<> 144:ef7eb2e8f9f7 172
<> 144:ef7eb2e8f9f7 173 /* Exported macros -----------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 174 /** @defgroup PCD_Exported_Macros PCD Exported Macros
<> 144:ef7eb2e8f9f7 175 * @brief macros to handle interrupts and specific clock configurations
<> 144:ef7eb2e8f9f7 176 * @{
<> 144:ef7eb2e8f9f7 177 */
<> 144:ef7eb2e8f9f7 178 #define __HAL_PCD_ENABLE(__HANDLE__) USB_EnableGlobalInt ((__HANDLE__)->Instance)
<> 144:ef7eb2e8f9f7 179 #define __HAL_PCD_DISABLE(__HANDLE__) USB_DisableGlobalInt ((__HANDLE__)->Instance)
<> 144:ef7eb2e8f9f7 180
<> 144:ef7eb2e8f9f7 181 #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
<> 144:ef7eb2e8f9f7 182 #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->GINTSTS) &= (__INTERRUPT__))
<> 144:ef7eb2e8f9f7 183 #define __HAL_PCD_IS_INVALID_INTERRUPT(__HANDLE__) (USB_ReadInterrupts((__HANDLE__)->Instance) == 0U)
<> 144:ef7eb2e8f9f7 184
<> 144:ef7eb2e8f9f7 185 #define __HAL_PCD_UNGATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) &= \
<> 144:ef7eb2e8f9f7 186 ~(USB_OTG_PCGCCTL_STOPCLK)
<> 144:ef7eb2e8f9f7 187
<> 144:ef7eb2e8f9f7 188 #define __HAL_PCD_GATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) |= USB_OTG_PCGCCTL_STOPCLK
<> 144:ef7eb2e8f9f7 189
<> 144:ef7eb2e8f9f7 190 #define __HAL_PCD_IS_PHY_SUSPENDED(__HANDLE__) ((*(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE))&0x10U)
<> 144:ef7eb2e8f9f7 191
AnnaBridge 167:e84263d55307 192 #define USB_OTG_FS_WAKEUP_EXTI_RISING_EDGE 0x08U
AnnaBridge 167:e84263d55307 193 #define USB_OTG_FS_WAKEUP_EXTI_FALLING_EDGE 0x0CU
AnnaBridge 167:e84263d55307 194 #define USB_OTG_FS_WAKEUP_EXTI_RISING_FALLING_EDGE 0x10U
<> 144:ef7eb2e8f9f7 195
AnnaBridge 167:e84263d55307 196 #define USB_OTG_HS_WAKEUP_EXTI_RISING_EDGE 0x08U
AnnaBridge 167:e84263d55307 197 #define USB_OTG_HS_WAKEUP_EXTI_FALLING_EDGE 0x0CU
AnnaBridge 167:e84263d55307 198 #define USB_OTG_HS_WAKEUP_EXTI_RISING_FALLING_EDGE 0x10U
<> 144:ef7eb2e8f9f7 199
AnnaBridge 167:e84263d55307 200 #define USB_OTG_HS_WAKEUP_EXTI_LINE 0x00100000U /*!< External interrupt line 20 Connected to the USB HS EXTI Line */
AnnaBridge 167:e84263d55307 201 #define USB_OTG_FS_WAKEUP_EXTI_LINE 0x00040000U /*!< External interrupt line 18 Connected to the USB FS EXTI Line */
<> 144:ef7eb2e8f9f7 202
<> 144:ef7eb2e8f9f7 203 #define __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= (USB_OTG_HS_WAKEUP_EXTI_LINE)
<> 144:ef7eb2e8f9f7 204 #define __HAL_USB_OTG_HS_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_OTG_HS_WAKEUP_EXTI_LINE)
<> 144:ef7eb2e8f9f7 205 #define __HAL_USB_OTG_HS_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_OTG_HS_WAKEUP_EXTI_LINE)
<> 144:ef7eb2e8f9f7 206 #define __HAL_USB_OTG_HS_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = (USB_OTG_HS_WAKEUP_EXTI_LINE)
<> 144:ef7eb2e8f9f7 207
<> 144:ef7eb2e8f9f7 208 #define __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_RISING_EDGE() do{EXTI->FTSR &= ~(USB_OTG_HS_WAKEUP_EXTI_LINE);\
<> 144:ef7eb2e8f9f7 209 EXTI->RTSR |= USB_OTG_HS_WAKEUP_EXTI_LINE;\
AnnaBridge 167:e84263d55307 210 }while(0U)
<> 144:ef7eb2e8f9f7 211
<> 144:ef7eb2e8f9f7 212 #define __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_FALLING_EDGE() do{EXTI->FTSR |= (USB_OTG_HS_WAKEUP_EXTI_LINE);\
<> 144:ef7eb2e8f9f7 213 EXTI->RTSR &= ~(USB_OTG_HS_WAKEUP_EXTI_LINE);\
AnnaBridge 167:e84263d55307 214 }while(0U)
<> 144:ef7eb2e8f9f7 215
<> 144:ef7eb2e8f9f7 216 #define __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE() do{EXTI->RTSR &= ~(USB_OTG_HS_WAKEUP_EXTI_LINE);\
<> 144:ef7eb2e8f9f7 217 EXTI->FTSR &= ~(USB_OTG_HS_WAKEUP_EXTI_LINE);\
<> 144:ef7eb2e8f9f7 218 EXTI->RTSR |= USB_OTG_HS_WAKEUP_EXTI_LINE;\
<> 144:ef7eb2e8f9f7 219 EXTI->FTSR |= USB_OTG_HS_WAKEUP_EXTI_LINE;\
AnnaBridge 167:e84263d55307 220 }while(0U)
<> 144:ef7eb2e8f9f7 221
<> 144:ef7eb2e8f9f7 222 #define __HAL_USB_OTG_HS_WAKEUP_EXTI_GENERATE_SWIT() (EXTI->SWIER |= USB_OTG_FS_WAKEUP_EXTI_LINE)
<> 144:ef7eb2e8f9f7 223
<> 144:ef7eb2e8f9f7 224 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_OTG_FS_WAKEUP_EXTI_LINE
<> 144:ef7eb2e8f9f7 225 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE)
<> 144:ef7eb2e8f9f7 226 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_OTG_FS_WAKEUP_EXTI_LINE)
<> 144:ef7eb2e8f9f7 227 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = USB_OTG_FS_WAKEUP_EXTI_LINE
<> 144:ef7eb2e8f9f7 228
<> 144:ef7eb2e8f9f7 229 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE() do{EXTI->FTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\
<> 144:ef7eb2e8f9f7 230 EXTI->RTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE;\
AnnaBridge 167:e84263d55307 231 }while(0U)
<> 144:ef7eb2e8f9f7 232
<> 144:ef7eb2e8f9f7 233 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_FALLING_EDGE() do{EXTI->FTSR |= (USB_OTG_FS_WAKEUP_EXTI_LINE);\
<> 144:ef7eb2e8f9f7 234 EXTI->RTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\
AnnaBridge 167:e84263d55307 235 }while(0U)
<> 144:ef7eb2e8f9f7 236
<> 144:ef7eb2e8f9f7 237 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE() do{EXTI->RTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\
<> 144:ef7eb2e8f9f7 238 EXTI->FTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\
<> 144:ef7eb2e8f9f7 239 EXTI->RTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE;\
<> 144:ef7eb2e8f9f7 240 EXTI->FTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE;\
AnnaBridge 167:e84263d55307 241 }while(0U)
<> 144:ef7eb2e8f9f7 242
<> 144:ef7eb2e8f9f7 243 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_GENERATE_SWIT() (EXTI->SWIER |= USB_OTG_FS_WAKEUP_EXTI_LINE)
<> 144:ef7eb2e8f9f7 244 /**
<> 144:ef7eb2e8f9f7 245 * @}
<> 144:ef7eb2e8f9f7 246 */
<> 144:ef7eb2e8f9f7 247
<> 144:ef7eb2e8f9f7 248 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 249 /** @addtogroup PCD_Exported_Functions PCD Exported Functions
<> 144:ef7eb2e8f9f7 250 * @{
<> 144:ef7eb2e8f9f7 251 */
<> 144:ef7eb2e8f9f7 252
<> 144:ef7eb2e8f9f7 253 /* Initialization/de-initialization functions ********************************/
<> 144:ef7eb2e8f9f7 254 /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
<> 144:ef7eb2e8f9f7 255 * @{
<> 144:ef7eb2e8f9f7 256 */
<> 144:ef7eb2e8f9f7 257 HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 258 HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 259 void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 260 void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 261 /**
<> 144:ef7eb2e8f9f7 262 * @}
<> 144:ef7eb2e8f9f7 263 */
<> 144:ef7eb2e8f9f7 264
<> 144:ef7eb2e8f9f7 265 /* I/O operation functions ***************************************************/
<> 144:ef7eb2e8f9f7 266 /* Non-Blocking mode: Interrupt */
<> 144:ef7eb2e8f9f7 267 /** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions
<> 144:ef7eb2e8f9f7 268 * @{
<> 144:ef7eb2e8f9f7 269 */
<> 144:ef7eb2e8f9f7 270 /* Non-Blocking mode: Interrupt */
<> 144:ef7eb2e8f9f7 271 HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 272 HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 273 void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 274
<> 144:ef7eb2e8f9f7 275 void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
<> 144:ef7eb2e8f9f7 276 void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
<> 144:ef7eb2e8f9f7 277 void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 278 void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 279 void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 280 void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 281 void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 282 void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
<> 144:ef7eb2e8f9f7 283 void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
<> 144:ef7eb2e8f9f7 284 void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 285 void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 286 /**
<> 144:ef7eb2e8f9f7 287 * @}
<> 144:ef7eb2e8f9f7 288 */
<> 144:ef7eb2e8f9f7 289
<> 144:ef7eb2e8f9f7 290 /* Peripheral Control functions **********************************************/
<> 144:ef7eb2e8f9f7 291 /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
<> 144:ef7eb2e8f9f7 292 * @{
<> 144:ef7eb2e8f9f7 293 */
<> 144:ef7eb2e8f9f7 294 HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 295 HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 296 HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
<> 144:ef7eb2e8f9f7 297 HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
<> 144:ef7eb2e8f9f7 298 HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
<> 144:ef7eb2e8f9f7 299 HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
<> 144:ef7eb2e8f9f7 300 HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
<> 144:ef7eb2e8f9f7 301 uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
<> 144:ef7eb2e8f9f7 302 HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
<> 144:ef7eb2e8f9f7 303 HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
<> 144:ef7eb2e8f9f7 304 HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
<> 144:ef7eb2e8f9f7 305 HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 306 HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 307 /**
<> 144:ef7eb2e8f9f7 308 * @}
<> 144:ef7eb2e8f9f7 309 */
<> 144:ef7eb2e8f9f7 310
<> 144:ef7eb2e8f9f7 311 /* Peripheral State functions ************************************************/
<> 144:ef7eb2e8f9f7 312 /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
<> 144:ef7eb2e8f9f7 313 * @{
<> 144:ef7eb2e8f9f7 314 */
<> 144:ef7eb2e8f9f7 315 PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
<> 144:ef7eb2e8f9f7 316 /**
<> 144:ef7eb2e8f9f7 317 * @}
<> 144:ef7eb2e8f9f7 318 */
<> 144:ef7eb2e8f9f7 319
<> 144:ef7eb2e8f9f7 320 /**
<> 144:ef7eb2e8f9f7 321 * @}
<> 144:ef7eb2e8f9f7 322 */
<> 144:ef7eb2e8f9f7 323
<> 144:ef7eb2e8f9f7 324 /* Private macros ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 325 /** @defgroup PCD_Private_Macros PCD Private Macros
<> 144:ef7eb2e8f9f7 326 * @{
<> 144:ef7eb2e8f9f7 327 */
<> 144:ef7eb2e8f9f7 328
<> 144:ef7eb2e8f9f7 329 /**
<> 144:ef7eb2e8f9f7 330 * @}
<> 144:ef7eb2e8f9f7 331 */
<> 144:ef7eb2e8f9f7 332
<> 144:ef7eb2e8f9f7 333 /**
<> 144:ef7eb2e8f9f7 334 * @}
<> 144:ef7eb2e8f9f7 335 */
<> 144:ef7eb2e8f9f7 336
<> 144:ef7eb2e8f9f7 337 /**
<> 144:ef7eb2e8f9f7 338 * @}
<> 144:ef7eb2e8f9f7 339 */
<> 144:ef7eb2e8f9f7 340 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||
<> 144:ef7eb2e8f9f7 341 STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Rx ||
AnnaBridge 167:e84263d55307 342 STM32F412Vx || STM32F412Cx || STM32F413xx || STM32F423xx */
<> 144:ef7eb2e8f9f7 343 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 344 }
<> 144:ef7eb2e8f9f7 345 #endif
<> 144:ef7eb2e8f9f7 346
<> 144:ef7eb2e8f9f7 347
<> 144:ef7eb2e8f9f7 348 #endif /* __STM32F4xx_HAL_PCD_H */
<> 144:ef7eb2e8f9f7 349
<> 144:ef7eb2e8f9f7 350 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/