Pratyush Mallick / Mbed OS testing

this is testing

app/noos_mbed/drivers/adc/ad7124/ad7124.c@0:3afcd581558d, 2021-01-14 (annotated)

Committer:
pmallick
Date:
Thu Jan 14 18:54:16 2021 +0530
Revision:
0:3afcd581558d
this is testing

Who changed what in which revision?

UserRevisionLine numberNew contents of line
pmallick 0:3afcd581558d 1 /***************************************************************************//**
pmallick 0:3afcd581558d 2 * @file ad7124.c
pmallick 0:3afcd581558d 3 * @brief AD7124 implementation file.
pmallick 0:3afcd581558d 4 * @devices AD7124-4, AD7124-8
pmallick 0:3afcd581558d 5 *
pmallick 0:3afcd581558d 6 ********************************************************************************
pmallick 0:3afcd581558d 7 * Copyright 2015-2019(c) Analog Devices, Inc.
pmallick 0:3afcd581558d 8 *
pmallick 0:3afcd581558d 9 * All rights reserved.
pmallick 0:3afcd581558d 10 *
pmallick 0:3afcd581558d 11 * Redistribution and use in source and binary forms, with or without modification,
pmallick 0:3afcd581558d 12 * are permitted provided that the following conditions are met:
pmallick 0:3afcd581558d 13 * - Redistributions of source code must retain the above copyright
pmallick 0:3afcd581558d 14 * notice, this list of conditions and the following disclaimer.
pmallick 0:3afcd581558d 15 * - Redistributions in binary form must reproduce the above copyright
pmallick 0:3afcd581558d 16 * notice, this list of conditions and the following disclaimer in
pmallick 0:3afcd581558d 17 * the documentation and/or other materials provided with the
pmallick 0:3afcd581558d 18 * distribution.
pmallick 0:3afcd581558d 19 * - Neither the name of Analog Devices, Inc. nor the names of its
pmallick 0:3afcd581558d 20 * contributors may be used to endorse or promote products derived
pmallick 0:3afcd581558d 21 * from this software without specific prior written permission.
pmallick 0:3afcd581558d 22 * - The use of this software may or may not infringe the patent rights
pmallick 0:3afcd581558d 23 * of one or more patent holders. This license does not release you
pmallick 0:3afcd581558d 24 * from the requirement that you obtain separate licenses from these
pmallick 0:3afcd581558d 25 * patent holders to use this software.
pmallick 0:3afcd581558d 26 * - Use of the software either in source or binary form, must be run
pmallick 0:3afcd581558d 27 * on or directly connected to an Analog Devices Inc. component.
pmallick 0:3afcd581558d 28 *
pmallick 0:3afcd581558d 29 * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR IMPLIED
pmallick 0:3afcd581558d 30 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, MERCHANTABILITY
pmallick 0:3afcd581558d 31 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
pmallick 0:3afcd581558d 32 * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
pmallick 0:3afcd581558d 33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
pmallick 0:3afcd581558d 34 * INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
pmallick 0:3afcd581558d 35 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
pmallick 0:3afcd581558d 36 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
pmallick 0:3afcd581558d 37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
pmallick 0:3afcd581558d 38 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
pmallick 0:3afcd581558d 39 *******************************************************************************/
pmallick 0:3afcd581558d 40
pmallick 0:3afcd581558d 41 /******************************************************************************/
pmallick 0:3afcd581558d 42 /***************************** Include Files **********************************/
pmallick 0:3afcd581558d 43 /******************************************************************************/
pmallick 0:3afcd581558d 44 #include <stdlib.h>
pmallick 0:3afcd581558d 45 #include <stdbool.h>
pmallick 0:3afcd581558d 46 #include "ad7124.h"
pmallick 0:3afcd581558d 47
pmallick 0:3afcd581558d 48 /* Error codes */
pmallick 0:3afcd581558d 49 #define INVALID_VAL -1 /* Invalid argument */
pmallick 0:3afcd581558d 50 #define COMM_ERR -2 /* Communication error on receive */
pmallick 0:3afcd581558d 51 #define TIMEOUT -3 /* A timeout has occured */
pmallick 0:3afcd581558d 52
pmallick 0:3afcd581558d 53 /*
pmallick 0:3afcd581558d 54 * Post reset delay required to ensure all internal config done
pmallick 0:3afcd581558d 55 * A time of 2ms should be enough based on the data sheet, but 4ms
pmallick 0:3afcd581558d 56 * chosen to provide enough margin, in case mdelay is not accurate.
pmallick 0:3afcd581558d 57 */
pmallick 0:3afcd581558d 58 #define AD7124_POST_RESET_DELAY 4
pmallick 0:3afcd581558d 59
pmallick 0:3afcd581558d 60
pmallick 0:3afcd581558d 61 /***************************************************************************//**
pmallick 0:3afcd581558d 62 * @brief Reads the value of the specified register without checking if the
pmallick 0:3afcd581558d 63 * device is ready to accept user requests.
pmallick 0:3afcd581558d 64 *
pmallick 0:3afcd581558d 65 * @param dev - The handler of the instance of the driver.
pmallick 0:3afcd581558d 66 * @param p_reg - Pointer to the register structure holding info about the
pmallick 0:3afcd581558d 67 * register to be read. The read value is stored inside the
pmallick 0:3afcd581558d 68 * register structure.
pmallick 0:3afcd581558d 69 *
pmallick 0:3afcd581558d 70 * @return Returns 0 for success or negative error code.
pmallick 0:3afcd581558d 71 *******************************************************************************/
pmallick 0:3afcd581558d 72 int32_t ad7124_no_check_read_register(struct ad7124_dev *dev,
pmallick 0:3afcd581558d 73 struct ad7124_st_reg* p_reg)
pmallick 0:3afcd581558d 74 {
pmallick 0:3afcd581558d 75 int32_t ret = 0;
pmallick 0:3afcd581558d 76 uint8_t buffer[8] = {0, 0, 0, 0, 0, 0, 0, 0};
pmallick 0:3afcd581558d 77 uint8_t i = 0;
pmallick 0:3afcd581558d 78 uint8_t check8 = 0, add_status_length = 0;
pmallick 0:3afcd581558d 79 uint8_t msg_buf[8] = {0, 0, 0, 0, 0, 0, 0, 0};
pmallick 0:3afcd581558d 80
pmallick 0:3afcd581558d 81 if(!dev || !p_reg)
pmallick 0:3afcd581558d 82 return INVALID_VAL;
pmallick 0:3afcd581558d 83
pmallick 0:3afcd581558d 84 /* Build the Command word */
pmallick 0:3afcd581558d 85 buffer[0] = AD7124_COMM_REG_WEN | AD7124_COMM_REG_RD |
pmallick 0:3afcd581558d 86 AD7124_COMM_REG_RA(p_reg->addr);
pmallick 0:3afcd581558d 87
pmallick 0:3afcd581558d 88 /*
pmallick 0:3afcd581558d 89 * If this is an AD7124_DATA register read, and the DATA_STATUS bit is set
pmallick 0:3afcd581558d 90 * in ADC_CONTROL, need to read 4, not 3 bytes for DATA with STATUS
pmallick 0:3afcd581558d 91 */
pmallick 0:3afcd581558d 92 if ((p_reg->addr == AD7124_DATA_REG) &&
pmallick 0:3afcd581558d 93 (dev->regs[AD7124_ADC_Control].value & AD7124_ADC_CTRL_REG_DATA_STATUS)) {
pmallick 0:3afcd581558d 94 add_status_length = 1;
pmallick 0:3afcd581558d 95 }
pmallick 0:3afcd581558d 96
pmallick 0:3afcd581558d 97 /* Read data from the device */
pmallick 0:3afcd581558d 98 ret = spi_write_and_read(dev->spi_desc,
pmallick 0:3afcd581558d 99 buffer,
pmallick 0:3afcd581558d 100 ((dev->use_crc != AD7124_DISABLE_CRC) ? p_reg->size + 1
pmallick 0:3afcd581558d 101 : p_reg->size) + 1 + add_status_length);
pmallick 0:3afcd581558d 102 if(ret < 0)
pmallick 0:3afcd581558d 103 return ret;
pmallick 0:3afcd581558d 104
pmallick 0:3afcd581558d 105 /* Check the CRC */
pmallick 0:3afcd581558d 106 if(dev->use_crc == AD7124_USE_CRC) {
pmallick 0:3afcd581558d 107 msg_buf[0] = AD7124_COMM_REG_WEN | AD7124_COMM_REG_RD |
pmallick 0:3afcd581558d 108 AD7124_COMM_REG_RA(p_reg->addr);
pmallick 0:3afcd581558d 109 for(i = 1; i < p_reg->size + 2 + add_status_length; ++i) {
pmallick 0:3afcd581558d 110 msg_buf[i] = buffer[i];
pmallick 0:3afcd581558d 111 }
pmallick 0:3afcd581558d 112 check8 = ad7124_compute_crc8(msg_buf, p_reg->size + 2 + add_status_length);
pmallick 0:3afcd581558d 113 }
pmallick 0:3afcd581558d 114
pmallick 0:3afcd581558d 115 if(check8 != 0) {
pmallick 0:3afcd581558d 116 /* ReadRegister checksum failed. */
pmallick 0:3afcd581558d 117 return COMM_ERR;
pmallick 0:3afcd581558d 118 }
pmallick 0:3afcd581558d 119
pmallick 0:3afcd581558d 120 /*
pmallick 0:3afcd581558d 121 * if reading Data with 4 bytes, need to copy the status byte to the STATUS
pmallick 0:3afcd581558d 122 * register struct value member
pmallick 0:3afcd581558d 123 */
pmallick 0:3afcd581558d 124 if (add_status_length) {
pmallick 0:3afcd581558d 125 dev->regs[AD7124_Status].value = buffer[p_reg->size + 1];
pmallick 0:3afcd581558d 126 }
pmallick 0:3afcd581558d 127
pmallick 0:3afcd581558d 128 /* Build the result */
pmallick 0:3afcd581558d 129 p_reg->value = 0;
pmallick 0:3afcd581558d 130 for(i = 1; i < p_reg->size + 1; i++) {
pmallick 0:3afcd581558d 131 p_reg->value <<= 8;
pmallick 0:3afcd581558d 132 p_reg->value += buffer[i];
pmallick 0:3afcd581558d 133 }
pmallick 0:3afcd581558d 134
pmallick 0:3afcd581558d 135 return ret;
pmallick 0:3afcd581558d 136 }
pmallick 0:3afcd581558d 137
pmallick 0:3afcd581558d 138 /***************************************************************************//**
pmallick 0:3afcd581558d 139 * @brief Writes the value of the specified register without checking if the
pmallick 0:3afcd581558d 140 * device is ready to accept user requests.
pmallick 0:3afcd581558d 141 *
pmallick 0:3afcd581558d 142 * @param dev - The handler of the instance of the driver.
pmallick 0:3afcd581558d 143 * @param reg - Register structure holding info about the register to be written
pmallick 0:3afcd581558d 144 *
pmallick 0:3afcd581558d 145 * @return Returns 0 for success or negative error code.
pmallick 0:3afcd581558d 146 *******************************************************************************/
pmallick 0:3afcd581558d 147 int32_t ad7124_no_check_write_register(struct ad7124_dev *dev,
pmallick 0:3afcd581558d 148 struct ad7124_st_reg reg)
pmallick 0:3afcd581558d 149 {
pmallick 0:3afcd581558d 150 int32_t ret = 0;
pmallick 0:3afcd581558d 151 int32_t reg_value = 0;
pmallick 0:3afcd581558d 152 uint8_t wr_buf[8] = {0, 0, 0, 0, 0, 0, 0, 0};
pmallick 0:3afcd581558d 153 uint8_t i = 0;
pmallick 0:3afcd581558d 154 uint8_t crc8 = 0;
pmallick 0:3afcd581558d 155
pmallick 0:3afcd581558d 156 if(!dev)
pmallick 0:3afcd581558d 157 return INVALID_VAL;
pmallick 0:3afcd581558d 158
pmallick 0:3afcd581558d 159 /* Build the Command word */
pmallick 0:3afcd581558d 160 wr_buf[0] = AD7124_COMM_REG_WEN | AD7124_COMM_REG_WR |
pmallick 0:3afcd581558d 161 AD7124_COMM_REG_RA(reg.addr);
pmallick 0:3afcd581558d 162
pmallick 0:3afcd581558d 163 /* Fill the write buffer */
pmallick 0:3afcd581558d 164 reg_value = reg.value;
pmallick 0:3afcd581558d 165 for(i = 0; i < reg.size; i++) {
pmallick 0:3afcd581558d 166 wr_buf[reg.size - i] = reg_value & 0xFF;
pmallick 0:3afcd581558d 167 reg_value >>= 8;
pmallick 0:3afcd581558d 168 }
pmallick 0:3afcd581558d 169
pmallick 0:3afcd581558d 170 /* Compute the CRC */
pmallick 0:3afcd581558d 171 if(dev->use_crc != AD7124_DISABLE_CRC) {
pmallick 0:3afcd581558d 172 crc8 = ad7124_compute_crc8(wr_buf, reg.size + 1);
pmallick 0:3afcd581558d 173 wr_buf[reg.size + 1] = crc8;
pmallick 0:3afcd581558d 174 }
pmallick 0:3afcd581558d 175
pmallick 0:3afcd581558d 176 /* Write data to the device */
pmallick 0:3afcd581558d 177 ret = spi_write_and_read(dev->spi_desc,
pmallick 0:3afcd581558d 178 wr_buf,
pmallick 0:3afcd581558d 179 (dev->use_crc != AD7124_DISABLE_CRC) ? reg.size + 2
pmallick 0:3afcd581558d 180 : reg.size + 1);
pmallick 0:3afcd581558d 181
pmallick 0:3afcd581558d 182 return ret;
pmallick 0:3afcd581558d 183 }
pmallick 0:3afcd581558d 184
pmallick 0:3afcd581558d 185 /***************************************************************************//**
pmallick 0:3afcd581558d 186 * @brief Reads the value of the specified register only when the device is ready
pmallick 0:3afcd581558d 187 * to accept user requests. If the device ready flag is deactivated the
pmallick 0:3afcd581558d 188 * read operation will be executed without checking the device state.
pmallick 0:3afcd581558d 189 *
pmallick 0:3afcd581558d 190 * @param dev - The handler of the instance of the driver.
pmallick 0:3afcd581558d 191 * @param p_reg - Pointer to the register structure holding info about the
pmallick 0:3afcd581558d 192 * register to be read. The read value is stored inside the
pmallick 0:3afcd581558d 193 * register structure.
pmallick 0:3afcd581558d 194 *
pmallick 0:3afcd581558d 195 * @return Returns 0 for success or negative error code.
pmallick 0:3afcd581558d 196 *******************************************************************************/
pmallick 0:3afcd581558d 197 int32_t ad7124_read_register(struct ad7124_dev *dev,
pmallick 0:3afcd581558d 198 struct ad7124_st_reg* p_reg)
pmallick 0:3afcd581558d 199 {
pmallick 0:3afcd581558d 200 int32_t ret;
pmallick 0:3afcd581558d 201
pmallick 0:3afcd581558d 202 if (p_reg->addr != AD7124_ERR_REG && dev->check_ready) {
pmallick 0:3afcd581558d 203 ret = ad7124_wait_for_spi_ready(dev,
pmallick 0:3afcd581558d 204 dev->spi_rdy_poll_cnt);
pmallick 0:3afcd581558d 205 if (ret < 0)
pmallick 0:3afcd581558d 206 return ret;
pmallick 0:3afcd581558d 207 }
pmallick 0:3afcd581558d 208 ret = ad7124_no_check_read_register(dev,
pmallick 0:3afcd581558d 209 p_reg);
pmallick 0:3afcd581558d 210
pmallick 0:3afcd581558d 211 return ret;
pmallick 0:3afcd581558d 212 }
pmallick 0:3afcd581558d 213
pmallick 0:3afcd581558d 214 /***************************************************************************//**
pmallick 0:3afcd581558d 215 * @brief Writes the value of the specified register only when the device is
pmallick 0:3afcd581558d 216 * ready to accept user requests. If the device ready flag is deactivated
pmallick 0:3afcd581558d 217 * the write operation will be executed without checking the device state.
pmallick 0:3afcd581558d 218 *
pmallick 0:3afcd581558d 219 * @param dev - The handler of the instance of the driver.
pmallick 0:3afcd581558d 220 * @param reg - Register structure holding info about the register to be written
pmallick 0:3afcd581558d 221 *
pmallick 0:3afcd581558d 222 * @return Returns 0 for success or negative error code.
pmallick 0:3afcd581558d 223 *******************************************************************************/
pmallick 0:3afcd581558d 224 int32_t ad7124_write_register(struct ad7124_dev *dev,
pmallick 0:3afcd581558d 225 struct ad7124_st_reg p_reg)
pmallick 0:3afcd581558d 226 {
pmallick 0:3afcd581558d 227 int32_t ret;
pmallick 0:3afcd581558d 228
pmallick 0:3afcd581558d 229 if (dev->check_ready) {
pmallick 0:3afcd581558d 230 ret = ad7124_wait_for_spi_ready(dev,
pmallick 0:3afcd581558d 231 dev->spi_rdy_poll_cnt);
pmallick 0:3afcd581558d 232 if (ret < 0)
pmallick 0:3afcd581558d 233 return ret;
pmallick 0:3afcd581558d 234 }
pmallick 0:3afcd581558d 235 ret = ad7124_no_check_write_register(dev,
pmallick 0:3afcd581558d 236 p_reg);
pmallick 0:3afcd581558d 237
pmallick 0:3afcd581558d 238 return ret;
pmallick 0:3afcd581558d 239 }
pmallick 0:3afcd581558d 240
pmallick 0:3afcd581558d 241 /***************************************************************************//**
pmallick 0:3afcd581558d 242 * @brief Resets the device.
pmallick 0:3afcd581558d 243 *
pmallick 0:3afcd581558d 244 * @param dev - The handler of the instance of the driver.
pmallick 0:3afcd581558d 245 *
pmallick 0:3afcd581558d 246 * @return Returns 0 for success or negative error code.
pmallick 0:3afcd581558d 247 *******************************************************************************/
pmallick 0:3afcd581558d 248 int32_t ad7124_reset(struct ad7124_dev *dev)
pmallick 0:3afcd581558d 249 {
pmallick 0:3afcd581558d 250 int32_t ret = 0;
pmallick 0:3afcd581558d 251 uint8_t wr_buf[8] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF};
pmallick 0:3afcd581558d 252
pmallick 0:3afcd581558d 253 if(!dev)
pmallick 0:3afcd581558d 254 return INVALID_VAL;
pmallick 0:3afcd581558d 255
pmallick 0:3afcd581558d 256 ret = spi_write_and_read(dev->spi_desc,
pmallick 0:3afcd581558d 257 wr_buf,
pmallick 0:3afcd581558d 258 8);
pmallick 0:3afcd581558d 259
pmallick 0:3afcd581558d 260 /* CRC is disabled after reset */
pmallick 0:3afcd581558d 261 dev->use_crc = AD7124_DISABLE_CRC;
pmallick 0:3afcd581558d 262
pmallick 0:3afcd581558d 263 /* Read POR bit to clear */
pmallick 0:3afcd581558d 264 ret = ad7124_wait_to_power_on(dev,
pmallick 0:3afcd581558d 265 dev->spi_rdy_poll_cnt);
pmallick 0:3afcd581558d 266
pmallick 0:3afcd581558d 267 mdelay(AD7124_POST_RESET_DELAY);
pmallick 0:3afcd581558d 268
pmallick 0:3afcd581558d 269 return ret;
pmallick 0:3afcd581558d 270 }
pmallick 0:3afcd581558d 271
pmallick 0:3afcd581558d 272 /***************************************************************************//**
pmallick 0:3afcd581558d 273 * @brief Waits until the device can accept read and write user actions.
pmallick 0:3afcd581558d 274 *
pmallick 0:3afcd581558d 275 * @param dev - The handler of the instance of the driver.
pmallick 0:3afcd581558d 276 * @param timeout - Count representing the number of polls to be done until the
pmallick 0:3afcd581558d 277 * function returns.
pmallick 0:3afcd581558d 278 *
pmallick 0:3afcd581558d 279 * @return Returns 0 for success or negative error code.
pmallick 0:3afcd581558d 280 *******************************************************************************/
pmallick 0:3afcd581558d 281 int32_t ad7124_wait_for_spi_ready(struct ad7124_dev *dev,
pmallick 0:3afcd581558d 282 uint32_t timeout)
pmallick 0:3afcd581558d 283 {
pmallick 0:3afcd581558d 284 struct ad7124_st_reg *regs;
pmallick 0:3afcd581558d 285 int32_t ret;
pmallick 0:3afcd581558d 286 int8_t ready = 0;
pmallick 0:3afcd581558d 287
pmallick 0:3afcd581558d 288 if(!dev)
pmallick 0:3afcd581558d 289 return INVALID_VAL;
pmallick 0:3afcd581558d 290
pmallick 0:3afcd581558d 291 regs = dev->regs;
pmallick 0:3afcd581558d 292
pmallick 0:3afcd581558d 293 while(!ready && --timeout) {
pmallick 0:3afcd581558d 294 /* Read the value of the Error Register */
pmallick 0:3afcd581558d 295 ret = ad7124_read_register(dev, &regs[AD7124_Error]);
pmallick 0:3afcd581558d 296 if(ret < 0)
pmallick 0:3afcd581558d 297 return ret;
pmallick 0:3afcd581558d 298
pmallick 0:3afcd581558d 299 /* Check the SPI IGNORE Error bit in the Error Register */
pmallick 0:3afcd581558d 300 ready = (regs[AD7124_Error].value &
pmallick 0:3afcd581558d 301 AD7124_ERR_REG_SPI_IGNORE_ERR) == 0;
pmallick 0:3afcd581558d 302 }
pmallick 0:3afcd581558d 303
pmallick 0:3afcd581558d 304 return timeout ? 0 : TIMEOUT;
pmallick 0:3afcd581558d 305 }
pmallick 0:3afcd581558d 306
pmallick 0:3afcd581558d 307 /***************************************************************************//**
pmallick 0:3afcd581558d 308 * @brief Waits until the device finishes the power-on reset operation.
pmallick 0:3afcd581558d 309 *
pmallick 0:3afcd581558d 310 * @param dev - The handler of the instance of the driver.
pmallick 0:3afcd581558d 311 * @param timeout - Count representing the number of polls to be done until the
pmallick 0:3afcd581558d 312 * function returns.
pmallick 0:3afcd581558d 313 *
pmallick 0:3afcd581558d 314 * @return Returns 0 for success or negative error code.
pmallick 0:3afcd581558d 315 *******************************************************************************/
pmallick 0:3afcd581558d 316 int32_t ad7124_wait_to_power_on(struct ad7124_dev *dev,
pmallick 0:3afcd581558d 317 uint32_t timeout)
pmallick 0:3afcd581558d 318 {
pmallick 0:3afcd581558d 319 struct ad7124_st_reg *regs;
pmallick 0:3afcd581558d 320 int32_t ret;
pmallick 0:3afcd581558d 321 int8_t powered_on = 0;
pmallick 0:3afcd581558d 322
pmallick 0:3afcd581558d 323 if(!dev)
pmallick 0:3afcd581558d 324 return INVALID_VAL;
pmallick 0:3afcd581558d 325
pmallick 0:3afcd581558d 326 regs = dev->regs;
pmallick 0:3afcd581558d 327
pmallick 0:3afcd581558d 328 while(!powered_on && timeout--) {
pmallick 0:3afcd581558d 329 ret = ad7124_read_register(dev,
pmallick 0:3afcd581558d 330 &regs[AD7124_Status]);
pmallick 0:3afcd581558d 331 if(ret < 0)
pmallick 0:3afcd581558d 332 return ret;
pmallick 0:3afcd581558d 333
pmallick 0:3afcd581558d 334 /* Check the POR_FLAG bit in the Status Register */
pmallick 0:3afcd581558d 335 powered_on = (regs[AD7124_Status].value &
pmallick 0:3afcd581558d 336 AD7124_STATUS_REG_POR_FLAG) == 0;
pmallick 0:3afcd581558d 337 }
pmallick 0:3afcd581558d 338
pmallick 0:3afcd581558d 339 return (timeout || powered_on) ? 0 : TIMEOUT;
pmallick 0:3afcd581558d 340 }
pmallick 0:3afcd581558d 341
pmallick 0:3afcd581558d 342 /***************************************************************************//**
pmallick 0:3afcd581558d 343 * @brief Waits until a new conversion result is available.
pmallick 0:3afcd581558d 344 *
pmallick 0:3afcd581558d 345 * @param dev - The handler of the instance of the driver.
pmallick 0:3afcd581558d 346 * @param timeout - Count representing the number of polls to be done until the
pmallick 0:3afcd581558d 347 * function returns if no new data is available.
pmallick 0:3afcd581558d 348 *
pmallick 0:3afcd581558d 349 * @return Returns 0 for success or negative error code.
pmallick 0:3afcd581558d 350 *******************************************************************************/
pmallick 0:3afcd581558d 351 int32_t ad7124_wait_for_conv_ready(struct ad7124_dev *dev,
pmallick 0:3afcd581558d 352 uint32_t timeout)
pmallick 0:3afcd581558d 353 {
pmallick 0:3afcd581558d 354 struct ad7124_st_reg *regs;
pmallick 0:3afcd581558d 355 int32_t ret;
pmallick 0:3afcd581558d 356 int8_t ready = 0;
pmallick 0:3afcd581558d 357
pmallick 0:3afcd581558d 358 if(!dev)
pmallick 0:3afcd581558d 359 return INVALID_VAL;
pmallick 0:3afcd581558d 360
pmallick 0:3afcd581558d 361 regs = dev->regs;
pmallick 0:3afcd581558d 362
pmallick 0:3afcd581558d 363 while(!ready && --timeout) {
pmallick 0:3afcd581558d 364 /* Read the value of the Status Register */
pmallick 0:3afcd581558d 365 ret = ad7124_read_register(dev, &regs[AD7124_Status]);
pmallick 0:3afcd581558d 366 if(ret < 0)
pmallick 0:3afcd581558d 367 return ret;
pmallick 0:3afcd581558d 368
pmallick 0:3afcd581558d 369 /* Check the RDY bit in the Status Register */
pmallick 0:3afcd581558d 370 ready = (regs[AD7124_Status].value &
pmallick 0:3afcd581558d 371 AD7124_STATUS_REG_RDY) == 0;
pmallick 0:3afcd581558d 372 }
pmallick 0:3afcd581558d 373
pmallick 0:3afcd581558d 374 return timeout ? 0 : TIMEOUT;
pmallick 0:3afcd581558d 375 }
pmallick 0:3afcd581558d 376
pmallick 0:3afcd581558d 377 /***************************************************************************//**
pmallick 0:3afcd581558d 378 * @brief Reads the conversion result from the device.
pmallick 0:3afcd581558d 379 *
pmallick 0:3afcd581558d 380 * @param dev - The handler of the instance of the driver.
pmallick 0:3afcd581558d 381 * @param p_data - Pointer to store the read data.
pmallick 0:3afcd581558d 382 *
pmallick 0:3afcd581558d 383 * @return Returns 0 for success or negative error code.
pmallick 0:3afcd581558d 384 *******************************************************************************/
pmallick 0:3afcd581558d 385 int32_t ad7124_read_data(struct ad7124_dev *dev,
pmallick 0:3afcd581558d 386 int32_t* p_data)
pmallick 0:3afcd581558d 387 {
pmallick 0:3afcd581558d 388 struct ad7124_st_reg *regs;
pmallick 0:3afcd581558d 389 int32_t ret;
pmallick 0:3afcd581558d 390
pmallick 0:3afcd581558d 391 if(!dev)
pmallick 0:3afcd581558d 392 return INVALID_VAL;
pmallick 0:3afcd581558d 393
pmallick 0:3afcd581558d 394 regs = dev->regs;
pmallick 0:3afcd581558d 395
pmallick 0:3afcd581558d 396 /* Read the value of the Status Register */
pmallick 0:3afcd581558d 397 ret = ad7124_read_register(dev, &regs[AD7124_Data]);
pmallick 0:3afcd581558d 398
pmallick 0:3afcd581558d 399 /* Get the read result */
pmallick 0:3afcd581558d 400 *p_data = regs[AD7124_Data].value;
pmallick 0:3afcd581558d 401
pmallick 0:3afcd581558d 402 return ret;
pmallick 0:3afcd581558d 403 }
pmallick 0:3afcd581558d 404
pmallick 0:3afcd581558d 405 /***************************************************************************//**
pmallick 0:3afcd581558d 406 * @brief Computes the CRC checksum for a data buffer.
pmallick 0:3afcd581558d 407 *
pmallick 0:3afcd581558d 408 * @param p_buf - Data buffer
pmallick 0:3afcd581558d 409 * @param buf_size - Data buffer size in bytes
pmallick 0:3afcd581558d 410 *
pmallick 0:3afcd581558d 411 * @return Returns the computed CRC checksum.
pmallick 0:3afcd581558d 412 *******************************************************************************/
pmallick 0:3afcd581558d 413 uint8_t ad7124_compute_crc8(uint8_t * p_buf, uint8_t buf_size)
pmallick 0:3afcd581558d 414 {
pmallick 0:3afcd581558d 415 uint8_t i = 0;
pmallick 0:3afcd581558d 416 uint8_t crc = 0;
pmallick 0:3afcd581558d 417
pmallick 0:3afcd581558d 418 while(buf_size) {
pmallick 0:3afcd581558d 419 for(i = 0x80; i != 0; i >>= 1) {
pmallick 0:3afcd581558d 420 bool cmp1 = (crc & 0x80) != 0;
pmallick 0:3afcd581558d 421 bool cmp2 = (*p_buf & i) != 0;
pmallick 0:3afcd581558d 422 if(cmp1 != cmp2) { /* MSB of CRC register XOR input Bit from Data */
pmallick 0:3afcd581558d 423 crc <<= 1;
pmallick 0:3afcd581558d 424 crc ^= AD7124_CRC8_POLYNOMIAL_REPRESENTATION;
pmallick 0:3afcd581558d 425 } else {
pmallick 0:3afcd581558d 426 crc <<= 1;
pmallick 0:3afcd581558d 427 }
pmallick 0:3afcd581558d 428 }
pmallick 0:3afcd581558d 429 p_buf++;
pmallick 0:3afcd581558d 430 buf_size--;
pmallick 0:3afcd581558d 431 }
pmallick 0:3afcd581558d 432 return crc;
pmallick 0:3afcd581558d 433 }
pmallick 0:3afcd581558d 434
pmallick 0:3afcd581558d 435 /***************************************************************************//**
pmallick 0:3afcd581558d 436 * @brief Updates the CRC settings.
pmallick 0:3afcd581558d 437 *
pmallick 0:3afcd581558d 438 * @param dev - The handler of the instance of the driver.
pmallick 0:3afcd581558d 439 *
pmallick 0:3afcd581558d 440 * @return None.
pmallick 0:3afcd581558d 441 *******************************************************************************/
pmallick 0:3afcd581558d 442 void ad7124_update_crcsetting(struct ad7124_dev *dev)
pmallick 0:3afcd581558d 443 {
pmallick 0:3afcd581558d 444 struct ad7124_st_reg *regs;
pmallick 0:3afcd581558d 445
pmallick 0:3afcd581558d 446 if(!dev)
pmallick 0:3afcd581558d 447 return;
pmallick 0:3afcd581558d 448
pmallick 0:3afcd581558d 449 regs = dev->regs;
pmallick 0:3afcd581558d 450
pmallick 0:3afcd581558d 451 /* Get CRC State. */
pmallick 0:3afcd581558d 452 if (regs[AD7124_Error_En].value & AD7124_ERREN_REG_SPI_CRC_ERR_EN) {
pmallick 0:3afcd581558d 453 dev->use_crc = AD7124_USE_CRC;
pmallick 0:3afcd581558d 454 } else {
pmallick 0:3afcd581558d 455 dev->use_crc = AD7124_DISABLE_CRC;
pmallick 0:3afcd581558d 456 }
pmallick 0:3afcd581558d 457 }
pmallick 0:3afcd581558d 458
pmallick 0:3afcd581558d 459 /***************************************************************************//**
pmallick 0:3afcd581558d 460 * @brief Updates the device SPI interface settings.
pmallick 0:3afcd581558d 461 *
pmallick 0:3afcd581558d 462 * @param dev - The handler of the instance of the driver.
pmallick 0:3afcd581558d 463 *
pmallick 0:3afcd581558d 464 * @return None.
pmallick 0:3afcd581558d 465 *******************************************************************************/
pmallick 0:3afcd581558d 466 void ad7124_update_dev_spi_settings(struct ad7124_dev *dev)
pmallick 0:3afcd581558d 467 {
pmallick 0:3afcd581558d 468 struct ad7124_st_reg *regs;
pmallick 0:3afcd581558d 469
pmallick 0:3afcd581558d 470 if(!dev)
pmallick 0:3afcd581558d 471 return;
pmallick 0:3afcd581558d 472
pmallick 0:3afcd581558d 473 regs = dev->regs;
pmallick 0:3afcd581558d 474
pmallick 0:3afcd581558d 475 if (regs[AD7124_Error_En].value & AD7124_ERREN_REG_SPI_IGNORE_ERR_EN) {
pmallick 0:3afcd581558d 476 dev->check_ready = 1;
pmallick 0:3afcd581558d 477 } else {
pmallick 0:3afcd581558d 478 dev->check_ready = 0;
pmallick 0:3afcd581558d 479 }
pmallick 0:3afcd581558d 480 }
pmallick 0:3afcd581558d 481
pmallick 0:3afcd581558d 482 /***************************************************************************//**
pmallick 0:3afcd581558d 483 * @brief Initializes the AD7124.
pmallick 0:3afcd581558d 484 *
pmallick 0:3afcd581558d 485 * @param device - The device structure.
pmallick 0:3afcd581558d 486 * @param init_param - The structure that contains the device initial
pmallick 0:3afcd581558d 487 * parameters.
pmallick 0:3afcd581558d 488 *
pmallick 0:3afcd581558d 489 * @return Returns 0 for success or negative error code.
pmallick 0:3afcd581558d 490 *******************************************************************************/
pmallick 0:3afcd581558d 491 int32_t ad7124_setup(struct ad7124_dev **device,
pmallick 0:3afcd581558d 492 struct ad7124_init_param init_param)
pmallick 0:3afcd581558d 493 {
pmallick 0:3afcd581558d 494 int32_t ret;
pmallick 0:3afcd581558d 495 enum ad7124_registers reg_nr;
pmallick 0:3afcd581558d 496 struct ad7124_dev *dev;
pmallick 0:3afcd581558d 497
pmallick 0:3afcd581558d 498 dev = (struct ad7124_dev *)malloc(sizeof(*dev));
pmallick 0:3afcd581558d 499 if (!dev)
pmallick 0:3afcd581558d 500 return INVALID_VAL;
pmallick 0:3afcd581558d 501
pmallick 0:3afcd581558d 502 dev->regs = init_param.regs;
pmallick 0:3afcd581558d 503 dev->spi_rdy_poll_cnt = init_param.spi_rdy_poll_cnt;
pmallick 0:3afcd581558d 504
pmallick 0:3afcd581558d 505 /* Initialize the SPI communication. */
pmallick 0:3afcd581558d 506 ret = spi_init(&dev->spi_desc, &init_param.spi_init);
pmallick 0:3afcd581558d 507 if (ret < 0)
pmallick 0:3afcd581558d 508 return ret;
pmallick 0:3afcd581558d 509
pmallick 0:3afcd581558d 510 /* Reset the device interface.*/
pmallick 0:3afcd581558d 511 ret = ad7124_reset(dev);
pmallick 0:3afcd581558d 512 if (ret < 0)
pmallick 0:3afcd581558d 513 return ret;
pmallick 0:3afcd581558d 514
pmallick 0:3afcd581558d 515 /* Update the device structure with power-on/reset settings */
pmallick 0:3afcd581558d 516 dev->check_ready = 1;
pmallick 0:3afcd581558d 517
pmallick 0:3afcd581558d 518 /* Initialize registers AD7124_ADC_Control through AD7124_Filter_7. */
pmallick 0:3afcd581558d 519 for(reg_nr = AD7124_Status; (reg_nr < AD7124_Offset_0) && !(ret < 0);
pmallick 0:3afcd581558d 520 reg_nr++) {
pmallick 0:3afcd581558d 521 if (dev->regs[reg_nr].rw == AD7124_RW) {
pmallick 0:3afcd581558d 522 ret = ad7124_write_register(dev, dev->regs[reg_nr]);
pmallick 0:3afcd581558d 523 if (ret < 0)
pmallick 0:3afcd581558d 524 break;
pmallick 0:3afcd581558d 525 }
pmallick 0:3afcd581558d 526
pmallick 0:3afcd581558d 527 /* Get CRC State and device SPI interface settings */
pmallick 0:3afcd581558d 528 if (reg_nr == AD7124_Error_En) {
pmallick 0:3afcd581558d 529 ad7124_update_crcsetting(dev);
pmallick 0:3afcd581558d 530 ad7124_update_dev_spi_settings(dev);
pmallick 0:3afcd581558d 531 }
pmallick 0:3afcd581558d 532 }
pmallick 0:3afcd581558d 533
pmallick 0:3afcd581558d 534 *device = dev;
pmallick 0:3afcd581558d 535
pmallick 0:3afcd581558d 536 return ret;
pmallick 0:3afcd581558d 537 }
pmallick 0:3afcd581558d 538
pmallick 0:3afcd581558d 539 /***************************************************************************//**
pmallick 0:3afcd581558d 540 * @brief Free the resources allocated by AD7124_Setup().
pmallick 0:3afcd581558d 541 *
pmallick 0:3afcd581558d 542 * @param dev - The device structure.
pmallick 0:3afcd581558d 543 *
pmallick 0:3afcd581558d 544 * @return SUCCESS in case of success, negative error code otherwise.
pmallick 0:3afcd581558d 545 *******************************************************************************/
pmallick 0:3afcd581558d 546 int32_t ad7124_remove(struct ad7124_dev *dev)
pmallick 0:3afcd581558d 547 {
pmallick 0:3afcd581558d 548 int32_t ret;
pmallick 0:3afcd581558d 549
pmallick 0:3afcd581558d 550 ret = spi_remove(dev->spi_desc);
pmallick 0:3afcd581558d 551
pmallick 0:3afcd581558d 552 free(dev);
pmallick 0:3afcd581558d 553
pmallick 0:3afcd581558d 554 return ret;
pmallick 0:3afcd581558d 555 }