Pratyush Mallick / Mbed OS testing

this is testing

app/noos_mbed/drivers/dac/ad5686/ad5686.h@0:3afcd581558d, 2021-01-14 (annotated)

Committer:
pmallick
Date:
Thu Jan 14 18:54:16 2021 +0530
Revision:
0:3afcd581558d
this is testing

Who changed what in which revision?

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pmallick 0:3afcd581558d 1 /***************************************************************************//**
pmallick 0:3afcd581558d 2 * @file ad5686.h
pmallick 0:3afcd581558d 3 * @brief Header file of AD5686 Driver. This driver supporting the following
pmallick 0:3afcd581558d 4 * devices: AD5684R, AD5685R, AD5686R, AD5694R, AD5695R, AD5696R,
pmallick 0:3afcd581558d 5 *
pmallick 0:3afcd581558d 6 * @author Istvan Csomortani (istvan.csomortani@analog.com)
pmallick 0:3afcd581558d 7 ********************************************************************************
pmallick 0:3afcd581558d 8 * Copyright 2013, 2020(c) Analog Devices, Inc.
pmallick 0:3afcd581558d 9 *
pmallick 0:3afcd581558d 10 * All rights reserved.
pmallick 0:3afcd581558d 11 *
pmallick 0:3afcd581558d 12 * Redistribution and use in source and binary forms, with or without
pmallick 0:3afcd581558d 13 * modification,
pmallick 0:3afcd581558d 14 * are permitted provided that the following conditions are met:
pmallick 0:3afcd581558d 15 * - Redistributions of source code must retain the above copyright
pmallick 0:3afcd581558d 16 * notice, this list of conditions and the following disclaimer.
pmallick 0:3afcd581558d 17 * - Redistributions in binary form must reproduce the above copyright
pmallick 0:3afcd581558d 18 * notice, this list of conditions and the following disclaimer in
pmallick 0:3afcd581558d 19 * the documentation and/or other materials provided with the
pmallick 0:3afcd581558d 20 * distribution.
pmallick 0:3afcd581558d 21 * - Neither the name of Analog Devices, Inc. nor the names of its
pmallick 0:3afcd581558d 22 * contributors may be used to endorse or promote products derived
pmallick 0:3afcd581558d 23 * from this software without specific prior written permission.
pmallick 0:3afcd581558d 24 * - The use of this software may or may not infringe the patent rights
pmallick 0:3afcd581558d 25 * of one or more patent holders. This license does not release you
pmallick 0:3afcd581558d 26 * from the requirement that you obtain separate licenses from these
pmallick 0:3afcd581558d 27 * patent holders to use this software.
pmallick 0:3afcd581558d 28 * - Use of the software either in source or binary form, must be run
pmallick 0:3afcd581558d 29 * on or directly connected to an Analog Devices Inc. component.
pmallick 0:3afcd581558d 30 *
pmallick 0:3afcd581558d 31 * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR
pmallick 0:3afcd581558d 32 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
pmallick 0:3afcd581558d 33 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
pmallick 0:3afcd581558d 34 * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
pmallick 0:3afcd581558d 35 * INCIDENTAL,SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
pmallick 0:3afcd581558d 36 * * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS
pmallick 0:3afcd581558d 37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
pmallick 0:3afcd581558d 38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
pmallick 0:3afcd581558d 39 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
pmallick 0:3afcd581558d 40 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
pmallick 0:3afcd581558d 41 * DAMAGE.
pmallick 0:3afcd581558d 42 *
pmallick 0:3afcd581558d 43 *******************************************************************************/
pmallick 0:3afcd581558d 44
pmallick 0:3afcd581558d 45 /*****************************************************************************/
pmallick 0:3afcd581558d 46 /***************************** Include Files *********************************/
pmallick 0:3afcd581558d 47 /*****************************************************************************/
pmallick 0:3afcd581558d 48 #include <stdint.h>
pmallick 0:3afcd581558d 49 #include "platform_drivers.h"
pmallick 0:3afcd581558d 50
pmallick 0:3afcd581558d 51 /* Control Bits */
pmallick 0:3afcd581558d 52 #define AD5686_CTRL_NOP 0
pmallick 0:3afcd581558d 53 #define AD5686_CTRL_WRITE 1
pmallick 0:3afcd581558d 54 #define AD5686_CTRL_UPDATE 2
pmallick 0:3afcd581558d 55 #define AD5686_CTRL_WRITEUPDATE 3
pmallick 0:3afcd581558d 56 #define AD5686_CTRL_PWR 4
pmallick 0:3afcd581558d 57 #define AD5686_CTRL_LDAC_MASK 5
pmallick 0:3afcd581558d 58 #define AD5686_CTRL_SWRESET 6
pmallick 0:3afcd581558d 59 #define AD5686_CTRL_IREF_REG 7
pmallick 0:3afcd581558d 60 #define AD5686_CTRL_DCEN 8
pmallick 0:3afcd581558d 61 #define AD5686_CTRL_RB_REG 9
pmallick 0:3afcd581558d 62
pmallick 0:3afcd581558d 63 #define AD5683_CMD_WR_CTRL_REG 4
pmallick 0:3afcd581558d 64 #define AD5683_CTRL_RB_REG 5
pmallick 0:3afcd581558d 65
pmallick 0:3afcd581558d 66 /* Power-down operation modes masks */
pmallick 0:3afcd581558d 67 #define AD5686_PWRM_NORMAL 0
pmallick 0:3afcd581558d 68 #define AD5686_PWRM_1K 1
pmallick 0:3afcd581558d 69 #define AD5686_PWRM_100K 2
pmallick 0:3afcd581558d 70 #define AD5686_PWRM_THREESTATE 3
pmallick 0:3afcd581558d 71
pmallick 0:3afcd581558d 72 #define AD5686_PWRM_MASK 3
pmallick 0:3afcd581558d 73
pmallick 0:3afcd581558d 74 /* Enable/disable defines */
pmallick 0:3afcd581558d 75 #define AD5686_INTREF_EN 1
pmallick 0:3afcd581558d 76 #define AD5686_INTREF_DIS 0
pmallick 0:3afcd581558d 77 #define AD5686_DC_EN 1
pmallick 0:3afcd581558d 78 #define AD5686_DC_DIS 0
pmallick 0:3afcd581558d 79 #define AD5686_RB_EN 1
pmallick 0:3afcd581558d 80 #define AD5686_RB_DIS 0
pmallick 0:3afcd581558d 81
pmallick 0:3afcd581558d 82 #define MAX_RESOLUTION 16 // Maximum resolution of the supported devices
pmallick 0:3afcd581558d 83
pmallick 0:3afcd581558d 84 #define PKT_LENGTH 3 // SPI packet length in byte
pmallick 0:3afcd581558d 85
pmallick 0:3afcd581558d 86 #define ADDR_MASK 0xFF // Mask for Address bits
pmallick 0:3afcd581558d 87 #define CMD_OFFSET 4 // Offset for Command
pmallick 0:3afcd581558d 88
pmallick 0:3afcd581558d 89 #define AD5686_CMD_MASK 0xFF
pmallick 0:3afcd581558d 90 #define AD5686_MSB_MASK 0xFF00 // Most significant byte of the data word
pmallick 0:3afcd581558d 91 #define AD5686_MSB_OFFSET 8
pmallick 0:3afcd581558d 92 #define AD5686_LSB_MASK 0x00FF // Least significant byte of the data word
pmallick 0:3afcd581558d 93 #define AD5686_LSB_OFFSET 0
pmallick 0:3afcd581558d 94
pmallick 0:3afcd581558d 95 #define AD5683_MIDB_OFFSET 4 // Offset for middle bits
pmallick 0:3afcd581558d 96 #define AD5683_MIDB_MASK 0xFF
pmallick 0:3afcd581558d 97 #define AD5683_MSB_OFFSET 12
pmallick 0:3afcd581558d 98 #define AD5683_MSB_MASK 0xF
pmallick 0:3afcd581558d 99 #define AD5683_CMD_MASK 0xF
pmallick 0:3afcd581558d 100 #define AD5683_LSB_MASK 0xF
pmallick 0:3afcd581558d 101 #define AD5683_LSB_OFFSET 4
pmallick 0:3afcd581558d 102
pmallick 0:3afcd581558d 103 #define AD5683_REG_MAP 0
pmallick 0:3afcd581558d 104 #define AD5686_REG_MAP 1
pmallick 0:3afcd581558d 105
pmallick 0:3afcd581558d 106 /********************** AD5683 Write Control Register Bits ********************/
pmallick 0:3afcd581558d 107
pmallick 0:3afcd581558d 108 #define AD5683_CTRL_DCEN(x) (((((x) & 0x1) << 0) << 10) & 0xFC00)
pmallick 0:3afcd581558d 109 #define AD5683_CTRL_GM(x) (((((x) & 0x1) << 1) << 10) & 0xFC00)
pmallick 0:3afcd581558d 110 #define AD5683_CTRL_INT_REF(x) (((((x) & 0x1) << 2) << 10) & 0xFC00)
pmallick 0:3afcd581558d 111 #define AD5683_CTRL_PWRM(x) (((((x) & 0x3) << 3) << 10) & 0xFC00)
pmallick 0:3afcd581558d 112 #define AD5683_SW_RESET ((((0x1) << 5) << 10) & 0xFC00)
pmallick 0:3afcd581558d 113
pmallick 0:3afcd581558d 114 /******************************************************************************/
pmallick 0:3afcd581558d 115 /*************************** Types Declarations *******************************/
pmallick 0:3afcd581558d 116 /******************************************************************************/
pmallick 0:3afcd581558d 117
pmallick 0:3afcd581558d 118 /* Supported devices */
pmallick 0:3afcd581558d 119 enum ad5686_type {
pmallick 0:3afcd581558d 120 ID_AD5671R,
pmallick 0:3afcd581558d 121 ID_AD5672R,
pmallick 0:3afcd581558d 122 ID_AD5673R,
pmallick 0:3afcd581558d 123 ID_AD5674,
pmallick 0:3afcd581558d 124 ID_AD5674R,
pmallick 0:3afcd581558d 125 ID_AD5675R,
pmallick 0:3afcd581558d 126 ID_AD5676,
pmallick 0:3afcd581558d 127 ID_AD5676R,
pmallick 0:3afcd581558d 128 ID_AD5677R,
pmallick 0:3afcd581558d 129 ID_AD5679,
pmallick 0:3afcd581558d 130 ID_AD5679R,
pmallick 0:3afcd581558d 131 ID_AD5686,
pmallick 0:3afcd581558d 132 ID_AD5684R,
pmallick 0:3afcd581558d 133 ID_AD5685R,
pmallick 0:3afcd581558d 134 ID_AD5686R,
pmallick 0:3afcd581558d 135 ID_AD5687,
pmallick 0:3afcd581558d 136 ID_AD5687R,
pmallick 0:3afcd581558d 137 ID_AD5689,
pmallick 0:3afcd581558d 138 ID_AD5689R,
pmallick 0:3afcd581558d 139 ID_AD5697R,
pmallick 0:3afcd581558d 140 ID_AD5694,
pmallick 0:3afcd581558d 141 ID_AD5694R,
pmallick 0:3afcd581558d 142 ID_AD5695R,
pmallick 0:3afcd581558d 143 ID_AD5696,
pmallick 0:3afcd581558d 144 ID_AD5696R,
pmallick 0:3afcd581558d 145 ID_AD5681R,
pmallick 0:3afcd581558d 146 ID_AD5682R,
pmallick 0:3afcd581558d 147 ID_AD5683R,
pmallick 0:3afcd581558d 148 ID_AD5683,
pmallick 0:3afcd581558d 149 ID_AD5691R,
pmallick 0:3afcd581558d 150 ID_AD5692R,
pmallick 0:3afcd581558d 151 ID_AD5693R,
pmallick 0:3afcd581558d 152 ID_AD5693
pmallick 0:3afcd581558d 153 };
pmallick 0:3afcd581558d 154
pmallick 0:3afcd581558d 155 enum comm_type {
pmallick 0:3afcd581558d 156 SPI,
pmallick 0:3afcd581558d 157 I2C,
pmallick 0:3afcd581558d 158 };
pmallick 0:3afcd581558d 159
pmallick 0:3afcd581558d 160 enum ad5686_dac_channels {
pmallick 0:3afcd581558d 161 AD5686_CH_0 = 0,
pmallick 0:3afcd581558d 162 AD5686_CH_1,
pmallick 0:3afcd581558d 163 AD5686_CH_2,
pmallick 0:3afcd581558d 164 AD5686_CH_3,
pmallick 0:3afcd581558d 165 AD5686_CH_4,
pmallick 0:3afcd581558d 166 AD5686_CH_5,
pmallick 0:3afcd581558d 167 AD5686_CH_6,
pmallick 0:3afcd581558d 168 AD5686_CH_7,
pmallick 0:3afcd581558d 169 AD5686_CH_8,
pmallick 0:3afcd581558d 170 AD5686_CH_9,
pmallick 0:3afcd581558d 171 AD5686_CH_10,
pmallick 0:3afcd581558d 172 AD5686_CH_11,
pmallick 0:3afcd581558d 173 AD5686_CH_12,
pmallick 0:3afcd581558d 174 AD5686_CH_13,
pmallick 0:3afcd581558d 175 AD5686_CH_14,
pmallick 0:3afcd581558d 176 AD5686_CH_15,
pmallick 0:3afcd581558d 177 };
pmallick 0:3afcd581558d 178
pmallick 0:3afcd581558d 179 struct ad5686_chip_info {
pmallick 0:3afcd581558d 180 uint8_t resolution;
pmallick 0:3afcd581558d 181 uint8_t register_map;
pmallick 0:3afcd581558d 182 enum comm_type communication;
pmallick 0:3afcd581558d 183 const uint32_t *channel_addr;
pmallick 0:3afcd581558d 184 };
pmallick 0:3afcd581558d 185
pmallick 0:3afcd581558d 186 struct ad5686_dev {
pmallick 0:3afcd581558d 187 /* I2C */
pmallick 0:3afcd581558d 188 i2c_desc *i2c_desc;
pmallick 0:3afcd581558d 189 /* SPI */
pmallick 0:3afcd581558d 190 spi_desc *spi_desc;
pmallick 0:3afcd581558d 191 /* GPIO */
pmallick 0:3afcd581558d 192 struct gpio_desc *gpio_reset;
pmallick 0:3afcd581558d 193 struct gpio_desc *gpio_ldac;
pmallick 0:3afcd581558d 194 struct gpio_desc *gpio_gain;
pmallick 0:3afcd581558d 195 /* Device Settings */
pmallick 0:3afcd581558d 196 enum ad5686_type act_device;
pmallick 0:3afcd581558d 197 uint32_t power_down_mask;
pmallick 0:3afcd581558d 198 uint32_t ldac_mask;
pmallick 0:3afcd581558d 199 };
pmallick 0:3afcd581558d 200
pmallick 0:3afcd581558d 201 struct ad5686_init_param {
pmallick 0:3afcd581558d 202 /* I2C */
pmallick 0:3afcd581558d 203 i2c_init_param i2c_init;
pmallick 0:3afcd581558d 204 /* SPI */
pmallick 0:3afcd581558d 205 spi_init_param spi_init;
pmallick 0:3afcd581558d 206 /* GPIO */
pmallick 0:3afcd581558d 207 struct gpio_init_param gpio_reset;
pmallick 0:3afcd581558d 208 struct gpio_init_param gpio_ldac;
pmallick 0:3afcd581558d 209 struct gpio_init_param gpio_gain;
pmallick 0:3afcd581558d 210 /* Device Settings */
pmallick 0:3afcd581558d 211 enum ad5686_type act_device;
pmallick 0:3afcd581558d 212 };
pmallick 0:3afcd581558d 213
pmallick 0:3afcd581558d 214 /******************************************************************************/
pmallick 0:3afcd581558d 215 /************************ Functions Declarations ******************************/
pmallick 0:3afcd581558d 216 /******************************************************************************/
pmallick 0:3afcd581558d 217 /* Initialize SPI and Initial Values for AD5686 Board. */
pmallick 0:3afcd581558d 218 int32_t ad5686_init(struct ad5686_dev **device,
pmallick 0:3afcd581558d 219 struct ad5686_init_param init_param);
pmallick 0:3afcd581558d 220
pmallick 0:3afcd581558d 221 /* Free the resources allocated by ad5686_init(). */
pmallick 0:3afcd581558d 222 int32_t ad5686_remove(struct ad5686_dev *dev);
pmallick 0:3afcd581558d 223
pmallick 0:3afcd581558d 224 /* Write to input register */
pmallick 0:3afcd581558d 225 uint16_t ad5686_set_shift_reg(struct ad5686_dev *dev,
pmallick 0:3afcd581558d 226 uint8_t command,
pmallick 0:3afcd581558d 227 uint8_t address,
pmallick 0:3afcd581558d 228 uint16_t data);
pmallick 0:3afcd581558d 229
pmallick 0:3afcd581558d 230 /* Write to Input Register n (dependent on LDAC) */
pmallick 0:3afcd581558d 231 void ad5686_write_register(struct ad5686_dev *dev,
pmallick 0:3afcd581558d 232 enum ad5686_dac_channels channel,
pmallick 0:3afcd581558d 233 uint16_t data);
pmallick 0:3afcd581558d 234
pmallick 0:3afcd581558d 235 /* Update DAC Register n with contents of Input Register n */
pmallick 0:3afcd581558d 236 void ad5686_update_register(struct ad5686_dev *dev,
pmallick 0:3afcd581558d 237 enum ad5686_dac_channels channel);
pmallick 0:3afcd581558d 238
pmallick 0:3afcd581558d 239 /* Write to and update DAC channel n */
pmallick 0:3afcd581558d 240 void ad5686_write_update_register(struct ad5686_dev *dev,
pmallick 0:3afcd581558d 241 enum ad5686_dac_channels channel,
pmallick 0:3afcd581558d 242 uint16_t data);
pmallick 0:3afcd581558d 243
pmallick 0:3afcd581558d 244 /* Read back Input Register n */
pmallick 0:3afcd581558d 245 uint16_t ad5686_read_back_register(struct ad5686_dev *dev,
pmallick 0:3afcd581558d 246 enum ad5686_dac_channels channel);
pmallick 0:3afcd581558d 247
pmallick 0:3afcd581558d 248 /* Power down / power up DAC */
pmallick 0:3afcd581558d 249 void ad5686_power_mode(struct ad5686_dev *dev,
pmallick 0:3afcd581558d 250 enum ad5686_dac_channels channel,
pmallick 0:3afcd581558d 251 uint8_t mode);
pmallick 0:3afcd581558d 252
pmallick 0:3afcd581558d 253 /* Set up LDAC mask register */
pmallick 0:3afcd581558d 254 void ad5686_ldac_mask(struct ad5686_dev *dev,
pmallick 0:3afcd581558d 255 enum ad5686_dac_channels channel,
pmallick 0:3afcd581558d 256 uint8_t enable);
pmallick 0:3afcd581558d 257
pmallick 0:3afcd581558d 258 /* Software reset (power-on reset) */
pmallick 0:3afcd581558d 259 void ad5686_software_reset(struct ad5686_dev *dev);
pmallick 0:3afcd581558d 260
pmallick 0:3afcd581558d 261 /* Write to Internal reference setup register */
pmallick 0:3afcd581558d 262 void ad5686_internal_reference(struct ad5686_dev *dev,
pmallick 0:3afcd581558d 263 uint8_t value);
pmallick 0:3afcd581558d 264
pmallick 0:3afcd581558d 265 /* Set up DCEN register (daisy-chain enable) */
pmallick 0:3afcd581558d 266 void ad5686_daisy_chain_en(struct ad5686_dev *dev,
pmallick 0:3afcd581558d 267 uint8_t value);
pmallick 0:3afcd581558d 268
pmallick 0:3afcd581558d 269 /* Set up readback register (readback enable) */
pmallick 0:3afcd581558d 270 void ad5686_read_back_en(struct ad5686_dev *dev,
pmallick 0:3afcd581558d 271 uint8_t value);
pmallick 0:3afcd581558d 272
pmallick 0:3afcd581558d 273 /* Set Gain mode */
pmallick 0:3afcd581558d 274 int32_t ad5686_gain_mode(struct ad5686_dev *dev, uint8_t value);