Pratyush Mallick / Mbed OS testing

this is testing

app/noos_mbed/drivers/adc/ad717x/ad717x.h@0:3afcd581558d, 2021-01-14 (annotated)

Committer:
pmallick
Date:
Thu Jan 14 18:54:16 2021 +0530
Revision:
0:3afcd581558d
this is testing

Who changed what in which revision?

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pmallick 0:3afcd581558d 1 /**************************************************************************//**
pmallick 0:3afcd581558d 2 * @file AD717X.h
pmallick 0:3afcd581558d 3 * @brief AD717X header file.
pmallick 0:3afcd581558d 4 * Devices: AD7172-2, AD7172-4, AD7173-8, AD7175-2, AD7175-8, AD7176-2,
pmallick 0:3afcd581558d 5 * AD7177-2, AD4111, AD4112, AD4114, AD4115
pmallick 0:3afcd581558d 6 * @author acozma (andrei.cozma@analog.com)
pmallick 0:3afcd581558d 7 * dnechita (dan.nechita@analog.com)
pmallick 0:3afcd581558d 8 *******************************************************************************
pmallick 0:3afcd581558d 9 * Copyright 2015, 2020(c) Analog Devices, Inc.
pmallick 0:3afcd581558d 10 *
pmallick 0:3afcd581558d 11 * All rights reserved.
pmallick 0:3afcd581558d 12 *
pmallick 0:3afcd581558d 13 * Redistribution and use in source and binary forms, with or without modification,
pmallick 0:3afcd581558d 14 * are permitted provided that the following conditions are met:
pmallick 0:3afcd581558d 15 * - Redistributions of source code must retain the above copyright
pmallick 0:3afcd581558d 16 * notice, this list of conditions and the following disclaimer.
pmallick 0:3afcd581558d 17 * - Redistributions in binary form must reproduce the above copyright
pmallick 0:3afcd581558d 18 * notice, this list of conditions and the following disclaimer in
pmallick 0:3afcd581558d 19 * the documentation and/or other materials provided with the
pmallick 0:3afcd581558d 20 * distribution.
pmallick 0:3afcd581558d 21 * - Neither the name of Analog Devices, Inc. nor the names of its
pmallick 0:3afcd581558d 22 * contributors may be used to endorse or promote products derived
pmallick 0:3afcd581558d 23 * from this software without specific prior written permission.
pmallick 0:3afcd581558d 24 * - The use of this software may or may not infringe the patent rights
pmallick 0:3afcd581558d 25 * of one or more patent holders. This license does not release you
pmallick 0:3afcd581558d 26 * from the requirement that you obtain separate licenses from these
pmallick 0:3afcd581558d 27 * patent holders to use this software.
pmallick 0:3afcd581558d 28 * - Use of the software either in source or binary form, must be run
pmallick 0:3afcd581558d 29 * on or directly connected to an Analog Devices Inc. component.
pmallick 0:3afcd581558d 30 *
pmallick 0:3afcd581558d 31 * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR IMPLIED
pmallick 0:3afcd581558d 32 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, MERCHANTABILITY
pmallick 0:3afcd581558d 33 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
pmallick 0:3afcd581558d 34 * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
pmallick 0:3afcd581558d 35 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
pmallick 0:3afcd581558d 36 * INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
pmallick 0:3afcd581558d 37 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
pmallick 0:3afcd581558d 38 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
pmallick 0:3afcd581558d 39 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
pmallick 0:3afcd581558d 40 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
pmallick 0:3afcd581558d 41 ******************************************************************************/
pmallick 0:3afcd581558d 42
pmallick 0:3afcd581558d 43 #ifndef __AD717X_H__
pmallick 0:3afcd581558d 44 #define __AD717X_H__
pmallick 0:3afcd581558d 45
pmallick 0:3afcd581558d 46 /******************************************************************************/
pmallick 0:3afcd581558d 47 /***************************** Include Files **********************************/
pmallick 0:3afcd581558d 48 /******************************************************************************/
pmallick 0:3afcd581558d 49 #include <stdint.h>
pmallick 0:3afcd581558d 50 #include "platform_drivers.h"
pmallick 0:3afcd581558d 51
pmallick 0:3afcd581558d 52 /******************************************************************************/
pmallick 0:3afcd581558d 53 /*************************** Types Declarations *******************************/
pmallick 0:3afcd581558d 54 /******************************************************************************/
pmallick 0:3afcd581558d 55
pmallick 0:3afcd581558d 56 typedef enum {
pmallick 0:3afcd581558d 57 AD717X_DISABLE,
pmallick 0:3afcd581558d 58 AD717X_USE_CRC,
pmallick 0:3afcd581558d 59 AD717X_USE_XOR,
pmallick 0:3afcd581558d 60 } ad717x_crc_mode;
pmallick 0:3afcd581558d 61
pmallick 0:3afcd581558d 62 /*! AD717X register info */
pmallick 0:3afcd581558d 63 typedef struct {
pmallick 0:3afcd581558d 64 int32_t addr;
pmallick 0:3afcd581558d 65 int32_t value;
pmallick 0:3afcd581558d 66 int32_t size;
pmallick 0:3afcd581558d 67 } ad717x_st_reg;
pmallick 0:3afcd581558d 68
pmallick 0:3afcd581558d 69 /*
pmallick 0:3afcd581558d 70 * The structure describes the device and is used with the ad717x driver.
pmallick 0:3afcd581558d 71 * @slave_select_id: The ID of the Slave Select to be passed to the SPI calls.
pmallick 0:3afcd581558d 72 * @regs: A reference to the register list of the device that the user must
pmallick 0:3afcd581558d 73 * provide when calling the Setup() function.
pmallick 0:3afcd581558d 74 * @num_regs: The length of the register list.
pmallick 0:3afcd581558d 75 * @userCRC: Error check type to use on SPI transfers.
pmallick 0:3afcd581558d 76 */
pmallick 0:3afcd581558d 77 typedef struct {
pmallick 0:3afcd581558d 78 /* SPI */
pmallick 0:3afcd581558d 79 spi_desc *spi_desc;
pmallick 0:3afcd581558d 80 /* Device Settings */
pmallick 0:3afcd581558d 81 ad717x_st_reg *regs;
pmallick 0:3afcd581558d 82 uint8_t num_regs;
pmallick 0:3afcd581558d 83 ad717x_crc_mode useCRC;
pmallick 0:3afcd581558d 84 } ad717x_dev;
pmallick 0:3afcd581558d 85
pmallick 0:3afcd581558d 86 typedef struct {
pmallick 0:3afcd581558d 87 /* SPI */
pmallick 0:3afcd581558d 88 spi_init_param spi_init;
pmallick 0:3afcd581558d 89 /* Device Settings */
pmallick 0:3afcd581558d 90 ad717x_st_reg *regs;
pmallick 0:3afcd581558d 91 uint8_t num_regs;
pmallick 0:3afcd581558d 92 } ad717x_init_param;
pmallick 0:3afcd581558d 93
pmallick 0:3afcd581558d 94 /*****************************************************************************/
pmallick 0:3afcd581558d 95 /***************** AD717X Register Definitions *******************************/
pmallick 0:3afcd581558d 96 /*****************************************************************************/
pmallick 0:3afcd581558d 97
pmallick 0:3afcd581558d 98 /* AD717X Register Map */
pmallick 0:3afcd581558d 99 #define AD717X_COMM_REG 0x00
pmallick 0:3afcd581558d 100 #define AD717X_STATUS_REG 0x00
pmallick 0:3afcd581558d 101 #define AD717X_ADCMODE_REG 0x01
pmallick 0:3afcd581558d 102 #define AD717X_IFMODE_REG 0x02
pmallick 0:3afcd581558d 103 #define AD717X_REGCHECK_REG 0x03
pmallick 0:3afcd581558d 104 #define AD717X_DATA_REG 0x04
pmallick 0:3afcd581558d 105 #define AD717X_GPIOCON_REG 0x06
pmallick 0:3afcd581558d 106 #define AD717X_ID_REG 0x07
pmallick 0:3afcd581558d 107 #define AD717X_CHMAP0_REG 0x10
pmallick 0:3afcd581558d 108 #define AD717X_CHMAP1_REG 0x11
pmallick 0:3afcd581558d 109 #define AD717X_CHMAP2_REG 0x12
pmallick 0:3afcd581558d 110 #define AD717X_CHMAP3_REG 0x13
pmallick 0:3afcd581558d 111 #define AD717X_CHMAP4_REG 0x14
pmallick 0:3afcd581558d 112 #define AD717X_CHMAP5_REG 0x15
pmallick 0:3afcd581558d 113 #define AD717X_CHMAP6_REG 0x16
pmallick 0:3afcd581558d 114 #define AD717X_CHMAP7_REG 0x17
pmallick 0:3afcd581558d 115 #define AD717X_CHMAP8_REG 0x18
pmallick 0:3afcd581558d 116 #define AD717X_CHMAP9_REG 0x19
pmallick 0:3afcd581558d 117 #define AD717X_CHMAP10_REG 0x1A
pmallick 0:3afcd581558d 118 #define AD717X_CHMAP11_REG 0x1B
pmallick 0:3afcd581558d 119 #define AD717X_CHMAP12_REG 0x1C
pmallick 0:3afcd581558d 120 #define AD717X_CHMAP13_REG 0x1D
pmallick 0:3afcd581558d 121 #define AD717X_CHMAP14_REG 0x1E
pmallick 0:3afcd581558d 122 #define AD717X_CHMAP15_REG 0x1F
pmallick 0:3afcd581558d 123 #define AD717X_SETUPCON0_REG 0x20
pmallick 0:3afcd581558d 124 #define AD717X_SETUPCON1_REG 0x21
pmallick 0:3afcd581558d 125 #define AD717X_SETUPCON2_REG 0x22
pmallick 0:3afcd581558d 126 #define AD717X_SETUPCON3_REG 0x23
pmallick 0:3afcd581558d 127 #define AD717X_SETUPCON4_REG 0x24
pmallick 0:3afcd581558d 128 #define AD717X_SETUPCON5_REG 0x25
pmallick 0:3afcd581558d 129 #define AD717X_SETUPCON6_REG 0x26
pmallick 0:3afcd581558d 130 #define AD717X_SETUPCON7_REG 0x27
pmallick 0:3afcd581558d 131 #define AD717X_FILTCON0_REG 0x28
pmallick 0:3afcd581558d 132 #define AD717X_FILTCON1_REG 0x29
pmallick 0:3afcd581558d 133 #define AD717X_FILTCON2_REG 0x2A
pmallick 0:3afcd581558d 134 #define AD717X_FILTCON3_REG 0x2B
pmallick 0:3afcd581558d 135 #define AD717X_FILTCON4_REG 0x2C
pmallick 0:3afcd581558d 136 #define AD717X_FILTCON5_REG 0x2D
pmallick 0:3afcd581558d 137 #define AD717X_FILTCON6_REG 0x2E
pmallick 0:3afcd581558d 138 #define AD717X_FILTCON7_REG 0x2F
pmallick 0:3afcd581558d 139 #define AD717X_OFFSET0_REG 0x30
pmallick 0:3afcd581558d 140 #define AD717X_OFFSET1_REG 0x31
pmallick 0:3afcd581558d 141 #define AD717X_OFFSET2_REG 0x32
pmallick 0:3afcd581558d 142 #define AD717X_OFFSET3_REG 0x33
pmallick 0:3afcd581558d 143 #define AD717X_OFFSET4_REG 0x34
pmallick 0:3afcd581558d 144 #define AD717X_OFFSET5_REG 0x35
pmallick 0:3afcd581558d 145 #define AD717X_OFFSET6_REG 0x36
pmallick 0:3afcd581558d 146 #define AD717X_OFFSET7_REG 0x37
pmallick 0:3afcd581558d 147 #define AD717X_GAIN0_REG 0x38
pmallick 0:3afcd581558d 148 #define AD717X_GAIN1_REG 0x39
pmallick 0:3afcd581558d 149 #define AD717X_GAIN2_REG 0x3A
pmallick 0:3afcd581558d 150 #define AD717X_GAIN3_REG 0x3B
pmallick 0:3afcd581558d 151 #define AD717X_GAIN4_REG 0x3C
pmallick 0:3afcd581558d 152 #define AD717X_GAIN5_REG 0x3D
pmallick 0:3afcd581558d 153 #define AD717X_GAIN6_REG 0x3E
pmallick 0:3afcd581558d 154 #define AD717X_GAIN7_REG 0x3F
pmallick 0:3afcd581558d 155
pmallick 0:3afcd581558d 156 /* Communication Register bits */
pmallick 0:3afcd581558d 157 #define AD717X_COMM_REG_WEN (0 << 7)
pmallick 0:3afcd581558d 158 #define AD717X_COMM_REG_WR (0 << 6)
pmallick 0:3afcd581558d 159 #define AD717X_COMM_REG_RD (1 << 6)
pmallick 0:3afcd581558d 160 #define AD717X_COMM_REG_RA(x) ((x) & 0x3F)
pmallick 0:3afcd581558d 161
pmallick 0:3afcd581558d 162 /* Status Register bits */
pmallick 0:3afcd581558d 163 #define AD717X_STATUS_REG_RDY (1 << 7)
pmallick 0:3afcd581558d 164 #define AD717X_STATUS_REG_ADC_ERR (1 << 6)
pmallick 0:3afcd581558d 165 #define AD717X_STATUS_REG_CRC_ERR (1 << 5)
pmallick 0:3afcd581558d 166 #define AD717X_STATUS_REG_REG_ERR (1 << 4)
pmallick 0:3afcd581558d 167 #define AD717X_STATUS_REG_CH(x) ((x) & 0x0F)
pmallick 0:3afcd581558d 168
pmallick 0:3afcd581558d 169 /* ADC Mode Register bits */
pmallick 0:3afcd581558d 170 #define AD717X_ADCMODE_REG_REF_EN (1 << 15)
pmallick 0:3afcd581558d 171 #define AD717X_ADCMODE_SING_CYC (1 << 13)
pmallick 0:3afcd581558d 172 #define AD717X_ADCMODE_REG_DELAY(x) (((x) & 0x7) << 8)
pmallick 0:3afcd581558d 173 #define AD717X_ADCMODE_REG_MODE(x) (((x) & 0x7) << 4)
pmallick 0:3afcd581558d 174 #define AD717X_ADCMODE_REG_CLKSEL(x) (((x) & 0x3) << 2)
pmallick 0:3afcd581558d 175
pmallick 0:3afcd581558d 176 /* ADC Mode Register additional bits for AD7172-2, AD7172-4, AD4111 and AD4112 */
pmallick 0:3afcd581558d 177 #define AD717X_ADCMODE_REG_HIDE_DELAY (1 << 14)
pmallick 0:3afcd581558d 178
pmallick 0:3afcd581558d 179 /* Interface Mode Register bits */
pmallick 0:3afcd581558d 180 #define AD717X_IFMODE_REG_ALT_SYNC (1 << 12)
pmallick 0:3afcd581558d 181 #define AD717X_IFMODE_REG_IOSTRENGTH (1 << 11)
pmallick 0:3afcd581558d 182 #define AD717X_IFMODE_REG_HIDE_DELAY (1 << 10)
pmallick 0:3afcd581558d 183 #define AD717X_IFMODE_REG_DOUT_RESET (1 << 8)
pmallick 0:3afcd581558d 184 #define AD717X_IFMODE_REG_CONT_READ (1 << 7)
pmallick 0:3afcd581558d 185 #define AD717X_IFMODE_REG_DATA_STAT (1 << 6)
pmallick 0:3afcd581558d 186 #define AD717X_IFMODE_REG_REG_CHECK (1 << 5)
pmallick 0:3afcd581558d 187 #define AD717X_IFMODE_REG_XOR_EN (0x01 << 2)
pmallick 0:3afcd581558d 188 #define AD717X_IFMODE_REG_CRC_EN (0x02 << 2)
pmallick 0:3afcd581558d 189 #define AD717X_IFMODE_REG_XOR_STAT(x) (((x) & AD717X_IFMODE_REG_XOR_EN) == AD717X_IFMODE_REG_XOR_EN)
pmallick 0:3afcd581558d 190 #define AD717X_IFMODE_REG_CRC_STAT(x) (((x) & AD717X_IFMODE_REG_CRC_EN) == AD717X_IFMODE_REG_CRC_EN)
pmallick 0:3afcd581558d 191 #define AD717X_IFMODE_REG_DATA_WL16 (1 << 0)
pmallick 0:3afcd581558d 192
pmallick 0:3afcd581558d 193 /* GPIO Configuration Register bits */
pmallick 0:3afcd581558d 194 #define AD717X_GPIOCON_REG_MUX_IO (1 << 12)
pmallick 0:3afcd581558d 195 #define AD717X_GPIOCON_REG_SYNC_EN (1 << 11)
pmallick 0:3afcd581558d 196 #define AD717X_GPIOCON_REG_ERR_EN(x) (((x) & 0x3) << 9)
pmallick 0:3afcd581558d 197 #define AD717X_GPIOCON_REG_ERR_DAT (1 << 8)
pmallick 0:3afcd581558d 198 #define AD717X_GPIOCON_REG_IP_EN1 (1 << 5)
pmallick 0:3afcd581558d 199 #define AD717X_GPIOCON_REG_IP_EN0 (1 << 4)
pmallick 0:3afcd581558d 200 #define AD717X_GPIOCON_REG_OP_EN1 (1 << 3)
pmallick 0:3afcd581558d 201 #define AD717X_GPIOCON_REG_OP_EN0 (1 << 2)
pmallick 0:3afcd581558d 202 #define AD717X_GPIOCON_REG_DATA1 (1 << 1)
pmallick 0:3afcd581558d 203 #define AD717X_GPIOCON_REG_DATA0 (1 << 0)
pmallick 0:3afcd581558d 204
pmallick 0:3afcd581558d 205 /* GPIO Configuration Register additional bits for AD7172-4, AD7173-8 */
pmallick 0:3afcd581558d 206 #define AD717X_GPIOCON_REG_GP_DATA3 (1 << 7)
pmallick 0:3afcd581558d 207 #define AD717X_GPIOCON_REG_GP_DATA2 (1 << 6)
pmallick 0:3afcd581558d 208 #define AD717X_GPIOCON_REG_GP_DATA1 (1 << 1)
pmallick 0:3afcd581558d 209 #define AD717X_GPIOCON_REG_GP_DATA0 (1 << 0)
pmallick 0:3afcd581558d 210
pmallick 0:3afcd581558d 211 /* GPIO Configuration Register additional bits for AD7173-8 */
pmallick 0:3afcd581558d 212 #define AD717X_GPIOCON_REG_PDSW (1 << 14)
pmallick 0:3afcd581558d 213 #define AD717X_GPIOCON_REG_OP_EN2_3 (1 << 13)
pmallick 0:3afcd581558d 214
pmallick 0:3afcd581558d 215 /* GPIO Configuration Register additional bits for AD4111, AD4112, AD4114, AD4115 */
pmallick 0:3afcd581558d 216 #define AD4111_GPIOCON_REG_OP_EN0_1 (1 << 13)
pmallick 0:3afcd581558d 217 #define AD4111_GPIOCON_REG_DATA1 (1 << 7)
pmallick 0:3afcd581558d 218 #define AD4111_GPIOCON_REG_DATA0 (1 << 6)
pmallick 0:3afcd581558d 219
pmallick 0:3afcd581558d 220 /* GPIO Configuration Register additional bits for AD4111 */
pmallick 0:3afcd581558d 221 #define AD4111_GPIOCON_REG_OW_EN (1 << 12)
pmallick 0:3afcd581558d 222
pmallick 0:3afcd581558d 223 /* Channel Map Register 0-3 bits */
pmallick 0:3afcd581558d 224 #define AD717X_CHMAP_REG_CH_EN (1 << 15)
pmallick 0:3afcd581558d 225 #define AD717X_CHMAP_REG_SETUP_SEL(x) (((x) & 0x7) << 12)
pmallick 0:3afcd581558d 226 #define AD717X_CHMAP_REG_AINPOS(x) (((x) & 0x1F) << 5)
pmallick 0:3afcd581558d 227 #define AD717X_CHMAP_REG_AINNEG(x) (((x) & 0x1F) << 0)
pmallick 0:3afcd581558d 228
pmallick 0:3afcd581558d 229 /* Channel Map Register additional bits for AD4111, AD4112 */
pmallick 0:3afcd581558d 230 #define AD4111_CHMAP_REG_INPUT(x) (((x) & 0x3FF) << 0)
pmallick 0:3afcd581558d 231
pmallick 0:3afcd581558d 232 /* Setup Configuration Register 0-3 bits */
pmallick 0:3afcd581558d 233 #define AD717X_SETUP_CONF_REG_BI_UNIPOLAR (1 << 12)
pmallick 0:3afcd581558d 234 #define AD717X_SETUP_CONF_REG_REF_SEL(x) (((x) & 0x3) << 4)
pmallick 0:3afcd581558d 235
pmallick 0:3afcd581558d 236 /* Setup Configuration Register additional bits for AD7173-8 */
pmallick 0:3afcd581558d 237 #define AD717X_SETUP_CONF_REG_REF_BUF(x) (((x) & 0x3) << 10)
pmallick 0:3afcd581558d 238 #define AD717X_SETUP_CONF_REG_AIN_BUF(x) (((x) & 0x3) << 8)
pmallick 0:3afcd581558d 239 #define AD717X_SETUP_CONF_REG_BURNOUT_EN (1 << 7)
pmallick 0:3afcd581558d 240 #define AD717X_SETUP_CONF_REG_BUFCHOPMAX (1 << 6)
pmallick 0:3afcd581558d 241
pmallick 0:3afcd581558d 242 /* Setup Configuration Register additional bits for AD7172-2, AD7172-4, AD7175-2 */
pmallick 0:3afcd581558d 243 #define AD717X_SETUP_CONF_REG_REFBUF_P (1 << 11)
pmallick 0:3afcd581558d 244 #define AD717X_SETUP_CONF_REG_REFBUF_N (1 << 10)
pmallick 0:3afcd581558d 245 #define AD717X_SETUP_CONF_REG_AINBUF_P (1 << 9)
pmallick 0:3afcd581558d 246 #define AD717X_SETUP_CONF_REG_AINBUF_N (1 << 8)
pmallick 0:3afcd581558d 247
pmallick 0:3afcd581558d 248 /* Setup Configuration Register additional bits for AD4111, AD4112 */
pmallick 0:3afcd581558d 249 #define AD4111_SETUP_CONF_REG_REFPOS_BUF (1 << 11)
pmallick 0:3afcd581558d 250 #define AD4111_SETUP_CONF_REG_REFNEG_BUF (1 << 10)
pmallick 0:3afcd581558d 251 #define AD4111_SETUP_CONF_REG_AIN_BUF(x) (((x) & 0x3) << 8)
pmallick 0:3afcd581558d 252 #define AD4111_SETUP_CONF_REG_BUFCHOPMAX (1 << 6)
pmallick 0:3afcd581558d 253
pmallick 0:3afcd581558d 254 /* Filter Configuration Register 0-3 bits */
pmallick 0:3afcd581558d 255 #define AD717X_FILT_CONF_REG_SINC3_MAP (1 << 15)
pmallick 0:3afcd581558d 256 #define AD717X_FILT_CONF_REG_ENHFILTEN (1 << 11)
pmallick 0:3afcd581558d 257 #define AD717X_FILT_CONF_REG_ENHFILT(x) (((x) & 0x7) << 8)
pmallick 0:3afcd581558d 258 #define AD717X_FILT_CONF_REG_ORDER(x) (((x) & 0x3) << 5)
pmallick 0:3afcd581558d 259 #define AD717X_FILT_CONF_REG_ODR(x) (((x) & 0x1F) << 0)
pmallick 0:3afcd581558d 260
pmallick 0:3afcd581558d 261 /* ID register mask for relevant bits */
pmallick 0:3afcd581558d 262 #define AD717X_ID_REG_MASK 0xFFF0
pmallick 0:3afcd581558d 263 /* AD7172-2 ID */
pmallick 0:3afcd581558d 264 #define AD7172_2_ID_REG_VALUE 0x00D0
pmallick 0:3afcd581558d 265 /* AD7172-4 ID */
pmallick 0:3afcd581558d 266 #define AD7172_4_ID_REG_VALUE 0x2050
pmallick 0:3afcd581558d 267 /* AD7173-8 ID */
pmallick 0:3afcd581558d 268 #define AD7173_8_ID_REG_VALUE 0x30D0
pmallick 0:3afcd581558d 269 /* AD7175-2 ID */
pmallick 0:3afcd581558d 270 #define AD7175_2_ID_REG_VALUE 0x0CD0
pmallick 0:3afcd581558d 271 /* AD7175-8 ID */
pmallick 0:3afcd581558d 272 #define AD7175_8_ID_REG_VALUE 0x3CD0
pmallick 0:3afcd581558d 273 /* AD7176-2 ID */
pmallick 0:3afcd581558d 274 #define AD7176_2_ID_REG_VALUE 0x0C90
pmallick 0:3afcd581558d 275 /* AD7177-2 ID */
pmallick 0:3afcd581558d 276 #define AD7177_2_ID_REG_VALUE 0x4FD0
pmallick 0:3afcd581558d 277 /* AD411x ID */
pmallick 0:3afcd581558d 278 #define AD411X_ID_REG_VALUE 0x30D0
pmallick 0:3afcd581558d 279
pmallick 0:3afcd581558d 280 /*****************************************************************************/
pmallick 0:3afcd581558d 281 /******************* AD717X Constants ****************************************/
pmallick 0:3afcd581558d 282 /*****************************************************************************/
pmallick 0:3afcd581558d 283 #define AD717X_CRC8_POLYNOMIAL_REPRESENTATION 0x07 /* x8 + x2 + x + 1 */
pmallick 0:3afcd581558d 284
pmallick 0:3afcd581558d 285 /*****************************************************************************/
pmallick 0:3afcd581558d 286 /************************ Functions Declarations *****************************/
pmallick 0:3afcd581558d 287 /*****************************************************************************/
pmallick 0:3afcd581558d 288
pmallick 0:3afcd581558d 289 /*! Retrieves a pointer to the register that matches the given address */
pmallick 0:3afcd581558d 290 ad717x_st_reg *AD717X_GetReg(ad717x_dev *device,
pmallick 0:3afcd581558d 291 uint8_t reg_address);
pmallick 0:3afcd581558d 292
pmallick 0:3afcd581558d 293 /*! Reads the value of the specified register. */
pmallick 0:3afcd581558d 294 int32_t AD717X_ReadRegister(ad717x_dev *device,
pmallick 0:3afcd581558d 295 uint8_t addr);
pmallick 0:3afcd581558d 296
pmallick 0:3afcd581558d 297 /*! Writes the value of the specified register. */
pmallick 0:3afcd581558d 298 int32_t AD717X_WriteRegister(ad717x_dev *device,
pmallick 0:3afcd581558d 299 uint8_t);
pmallick 0:3afcd581558d 300
pmallick 0:3afcd581558d 301 /*! Resets the device. */
pmallick 0:3afcd581558d 302 int32_t AD717X_Reset(ad717x_dev *device);
pmallick 0:3afcd581558d 303
pmallick 0:3afcd581558d 304 /*! Waits until a new conversion result is available. */
pmallick 0:3afcd581558d 305 int32_t AD717X_WaitForReady(ad717x_dev *device,
pmallick 0:3afcd581558d 306 uint32_t timeout);
pmallick 0:3afcd581558d 307
pmallick 0:3afcd581558d 308 /*! Reads the conversion result from the device. */
pmallick 0:3afcd581558d 309 int32_t AD717X_ReadData(ad717x_dev *device,
pmallick 0:3afcd581558d 310 int32_t* pData);
pmallick 0:3afcd581558d 311
pmallick 0:3afcd581558d 312 /*! Computes data register read size to account for bit number and status
pmallick 0:3afcd581558d 313 * read. */
pmallick 0:3afcd581558d 314 int32_t AD717X_ComputeDataregSize(ad717x_dev *device);
pmallick 0:3afcd581558d 315
pmallick 0:3afcd581558d 316 /*! Computes the CRC checksum for a data buffer. */
pmallick 0:3afcd581558d 317 uint8_t AD717X_ComputeCRC8(uint8_t* pBuf,
pmallick 0:3afcd581558d 318 uint8_t bufSize);
pmallick 0:3afcd581558d 319
pmallick 0:3afcd581558d 320 /*! Computes the XOR checksum for a data buffer. */
pmallick 0:3afcd581558d 321 uint8_t AD717X_ComputeXOR8(uint8_t * pBuf,
pmallick 0:3afcd581558d 322 uint8_t bufSize);
pmallick 0:3afcd581558d 323
pmallick 0:3afcd581558d 324 /*! Updates the CRC settings. */
pmallick 0:3afcd581558d 325 int32_t AD717X_UpdateCRCSetting(ad717x_dev *device);
pmallick 0:3afcd581558d 326
pmallick 0:3afcd581558d 327 /*! Initializes the AD717X. */
pmallick 0:3afcd581558d 328 int32_t AD717X_Init(ad717x_dev **device,
pmallick 0:3afcd581558d 329 ad717x_init_param init_param);
pmallick 0:3afcd581558d 330
pmallick 0:3afcd581558d 331 /*! Free the resources allocated by AD717X_Init(). */
pmallick 0:3afcd581558d 332 int32_t AD717X_remove(ad717x_dev *dev);
pmallick 0:3afcd581558d 333
pmallick 0:3afcd581558d 334 #endif /* __AD717X_H__ */