Pratyush Mallick / Mbed OS testing

this is testing

app/noos_mbed/drivers/adc-dac/ad5592r/ad5592r-base.c@0:3afcd581558d, 2021-01-14 (annotated)

Committer:
pmallick
Date:
Thu Jan 14 18:54:16 2021 +0530
Revision:
0:3afcd581558d
this is testing

Who changed what in which revision?

UserRevisionLine numberNew contents of line
pmallick 0:3afcd581558d 1 /***************************************************************************//**
pmallick 0:3afcd581558d 2 * @file ad5592r-base.c
pmallick 0:3afcd581558d 3 * @brief Implementation of AD5592R Base Driver.
pmallick 0:3afcd581558d 4 * @author Mircea Caprioru (mircea.caprioru@analog.com)
pmallick 0:3afcd581558d 5 ********************************************************************************
pmallick 0:3afcd581558d 6 * Copyright 2018, 2020(c) Analog Devices, Inc.
pmallick 0:3afcd581558d 7 *
pmallick 0:3afcd581558d 8 * All rights reserved.
pmallick 0:3afcd581558d 9 *
pmallick 0:3afcd581558d 10 * Redistribution and use in source and binary forms, with or without
pmallick 0:3afcd581558d 11 * modification, are permitted provided that the following conditions are met:
pmallick 0:3afcd581558d 12 * - Redistributions of source code must retain the above copyright
pmallick 0:3afcd581558d 13 * notice, this list of conditions and the following disclaimer.
pmallick 0:3afcd581558d 14 * - Redistributions in binary form must reproduce the above copyright
pmallick 0:3afcd581558d 15 * notice, this list of conditions and the following disclaimer in
pmallick 0:3afcd581558d 16 * the documentation and/or other materials provided with the
pmallick 0:3afcd581558d 17 * distribution.
pmallick 0:3afcd581558d 18 * - Neither the name of Analog Devices, Inc. nor the names of its
pmallick 0:3afcd581558d 19 * contributors may be used to endorse or promote products derived
pmallick 0:3afcd581558d 20 * from this software without specific prior written permission.
pmallick 0:3afcd581558d 21 * - The use of this software may or may not infringe the patent rights
pmallick 0:3afcd581558d 22 * of one or more patent holders. This license does not release you
pmallick 0:3afcd581558d 23 * from the requirement that you obtain separate licenses from these
pmallick 0:3afcd581558d 24 * patent holders to use this software.
pmallick 0:3afcd581558d 25 * - Use of the software either in source or binary form, must be run
pmallick 0:3afcd581558d 26 * on or directly connected to an Analog Devices Inc. component.
pmallick 0:3afcd581558d 27 *
pmallick 0:3afcd581558d 28 * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR
pmallick 0:3afcd581558d 29 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
pmallick 0:3afcd581558d 30 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
pmallick 0:3afcd581558d 31 * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
pmallick 0:3afcd581558d 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
pmallick 0:3afcd581558d 33 * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR
pmallick 0:3afcd581558d 34 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
pmallick 0:3afcd581558d 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
pmallick 0:3afcd581558d 36 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
pmallick 0:3afcd581558d 37 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
pmallick 0:3afcd581558d 38 *******************************************************************************/
pmallick 0:3afcd581558d 39 #include "error.h"
pmallick 0:3afcd581558d 40 #include "ad5592r-base.h"
pmallick 0:3afcd581558d 41
pmallick 0:3afcd581558d 42 /**
pmallick 0:3afcd581558d 43 * Write register.
pmallick 0:3afcd581558d 44 *
pmallick 0:3afcd581558d 45 * @param dev - The device structure.
pmallick 0:3afcd581558d 46 * @param reg - The register address.
pmallick 0:3afcd581558d 47 * @param value - register value
pmallick 0:3afcd581558d 48 * @return 0 in case of success, negative error code otherwise
pmallick 0:3afcd581558d 49 */
pmallick 0:3afcd581558d 50 int32_t ad5592r_base_reg_write(struct ad5592r_dev *dev, uint8_t reg,
pmallick 0:3afcd581558d 51 uint16_t value)
pmallick 0:3afcd581558d 52 {
pmallick 0:3afcd581558d 53 return dev->ops->reg_write(dev, reg, value);
pmallick 0:3afcd581558d 54 }
pmallick 0:3afcd581558d 55
pmallick 0:3afcd581558d 56 /**
pmallick 0:3afcd581558d 57 * Read register.
pmallick 0:3afcd581558d 58 *
pmallick 0:3afcd581558d 59 * @param dev - The device structure.
pmallick 0:3afcd581558d 60 * @param reg - The register address.
pmallick 0:3afcd581558d 61 * @param value - register value
pmallick 0:3afcd581558d 62 * @return 0 in case of success, negative error code otherwise
pmallick 0:3afcd581558d 63 */
pmallick 0:3afcd581558d 64 int32_t ad5592r_base_reg_read(struct ad5592r_dev *dev, uint8_t reg,
pmallick 0:3afcd581558d 65 uint16_t *value)
pmallick 0:3afcd581558d 66 {
pmallick 0:3afcd581558d 67 return dev->ops->reg_read(dev, reg, value);
pmallick 0:3afcd581558d 68 }
pmallick 0:3afcd581558d 69
pmallick 0:3afcd581558d 70 /**
pmallick 0:3afcd581558d 71 * Get GPIO value
pmallick 0:3afcd581558d 72 *
pmallick 0:3afcd581558d 73 * @param dev - The device structure.
pmallick 0:3afcd581558d 74 * @param offset - The channel number.
pmallick 0:3afcd581558d 75 * @return 0 or 1 depending on the GPIO value.
pmallick 0:3afcd581558d 76 */
pmallick 0:3afcd581558d 77 int32_t ad5592r_gpio_get(struct ad5592r_dev *dev, uint8_t offset)
pmallick 0:3afcd581558d 78 {
pmallick 0:3afcd581558d 79 int32_t ret = 0;
pmallick 0:3afcd581558d 80 uint8_t val;
pmallick 0:3afcd581558d 81
pmallick 0:3afcd581558d 82 if (!dev)
pmallick 0:3afcd581558d 83 return FAILURE;
pmallick 0:3afcd581558d 84
pmallick 0:3afcd581558d 85 if (dev->gpio_out & BIT(offset))
pmallick 0:3afcd581558d 86 val = dev->gpio_val;
pmallick 0:3afcd581558d 87 else
pmallick 0:3afcd581558d 88 ret = dev->ops->gpio_read(dev, &val);
pmallick 0:3afcd581558d 89
pmallick 0:3afcd581558d 90 if (ret < 0)
pmallick 0:3afcd581558d 91 return ret;
pmallick 0:3afcd581558d 92
pmallick 0:3afcd581558d 93 return !!(val & BIT(offset));
pmallick 0:3afcd581558d 94 }
pmallick 0:3afcd581558d 95
pmallick 0:3afcd581558d 96 /**
pmallick 0:3afcd581558d 97 * Set GPIO value
pmallick 0:3afcd581558d 98 *
pmallick 0:3afcd581558d 99 * @param dev - The device structure.
pmallick 0:3afcd581558d 100 * @param offset - The channel number.
pmallick 0:3afcd581558d 101 * @param value - the GPIO value (0 or 1)
pmallick 0:3afcd581558d 102 */
pmallick 0:3afcd581558d 103 int32_t ad5592r_gpio_set(struct ad5592r_dev *dev, uint8_t offset, int32_t value)
pmallick 0:3afcd581558d 104 {
pmallick 0:3afcd581558d 105 if (!dev)
pmallick 0:3afcd581558d 106 return FAILURE;
pmallick 0:3afcd581558d 107
pmallick 0:3afcd581558d 108 if (value)
pmallick 0:3afcd581558d 109 dev->gpio_val |= BIT(offset);
pmallick 0:3afcd581558d 110 else
pmallick 0:3afcd581558d 111 dev->gpio_val &= ~BIT(offset);
pmallick 0:3afcd581558d 112
pmallick 0:3afcd581558d 113 return ad5592r_base_reg_write(dev, AD5592R_REG_GPIO_SET,
pmallick 0:3afcd581558d 114 dev->gpio_val);
pmallick 0:3afcd581558d 115 }
pmallick 0:3afcd581558d 116
pmallick 0:3afcd581558d 117 /**
pmallick 0:3afcd581558d 118 * Set GPIO as input
pmallick 0:3afcd581558d 119 *
pmallick 0:3afcd581558d 120 * @param dev - The device structure.
pmallick 0:3afcd581558d 121 * @param offset - The channel number.
pmallick 0:3afcd581558d 122 * @return 0 in case of success, negative error code otherwise
pmallick 0:3afcd581558d 123 */
pmallick 0:3afcd581558d 124 int32_t ad5592r_gpio_direction_input(struct ad5592r_dev *dev, uint8_t offset)
pmallick 0:3afcd581558d 125 {
pmallick 0:3afcd581558d 126 int32_t ret;
pmallick 0:3afcd581558d 127
pmallick 0:3afcd581558d 128 if (!dev)
pmallick 0:3afcd581558d 129 return FAILURE;
pmallick 0:3afcd581558d 130
pmallick 0:3afcd581558d 131 dev->gpio_out &= ~BIT(offset);
pmallick 0:3afcd581558d 132 dev->gpio_in |= BIT(offset);
pmallick 0:3afcd581558d 133
pmallick 0:3afcd581558d 134 ret = ad5592r_base_reg_write(dev, AD5592R_REG_GPIO_OUT_EN,
pmallick 0:3afcd581558d 135 dev->gpio_out);
pmallick 0:3afcd581558d 136 if (ret < 0)
pmallick 0:3afcd581558d 137 return ret;
pmallick 0:3afcd581558d 138
pmallick 0:3afcd581558d 139 return ad5592r_base_reg_write(dev, AD5592R_REG_GPIO_IN_EN,
pmallick 0:3afcd581558d 140 dev->gpio_in);
pmallick 0:3afcd581558d 141 }
pmallick 0:3afcd581558d 142
pmallick 0:3afcd581558d 143 /**
pmallick 0:3afcd581558d 144 * Set GPIO as output
pmallick 0:3afcd581558d 145 *
pmallick 0:3afcd581558d 146 * @param dev - The device structure.
pmallick 0:3afcd581558d 147 * @param offset - The channel number.
pmallick 0:3afcd581558d 148 * @param value - GPIO value to set.
pmallick 0:3afcd581558d 149 * @return 0 in case of success, negative error code otherwise
pmallick 0:3afcd581558d 150 */
pmallick 0:3afcd581558d 151 int32_t ad5592r_gpio_direction_output(struct ad5592r_dev *dev,
pmallick 0:3afcd581558d 152 uint8_t offset, int32_t value)
pmallick 0:3afcd581558d 153 {
pmallick 0:3afcd581558d 154 int32_t ret;
pmallick 0:3afcd581558d 155
pmallick 0:3afcd581558d 156 if (!dev)
pmallick 0:3afcd581558d 157 return FAILURE;
pmallick 0:3afcd581558d 158
pmallick 0:3afcd581558d 159 if (value)
pmallick 0:3afcd581558d 160 dev->gpio_val |= BIT(offset);
pmallick 0:3afcd581558d 161 else
pmallick 0:3afcd581558d 162 dev->gpio_val &= ~BIT(offset);
pmallick 0:3afcd581558d 163
pmallick 0:3afcd581558d 164 dev->gpio_in &= ~BIT(offset);
pmallick 0:3afcd581558d 165 dev->gpio_out |= BIT(offset);
pmallick 0:3afcd581558d 166
pmallick 0:3afcd581558d 167 ret = ad5592r_base_reg_write(dev, AD5592R_REG_GPIO_SET, dev->gpio_val);
pmallick 0:3afcd581558d 168 if (ret < 0)
pmallick 0:3afcd581558d 169 return ret;
pmallick 0:3afcd581558d 170
pmallick 0:3afcd581558d 171 ret = ad5592r_base_reg_write(dev, AD5592R_REG_GPIO_OUT_EN,
pmallick 0:3afcd581558d 172 dev->gpio_out);
pmallick 0:3afcd581558d 173 if (ret < 0)
pmallick 0:3afcd581558d 174 return ret;
pmallick 0:3afcd581558d 175
pmallick 0:3afcd581558d 176 ret = ad5592r_base_reg_write(dev, AD5592R_REG_GPIO_IN_EN,
pmallick 0:3afcd581558d 177 dev->gpio_in);
pmallick 0:3afcd581558d 178
pmallick 0:3afcd581558d 179 return ret;
pmallick 0:3afcd581558d 180 }
pmallick 0:3afcd581558d 181
pmallick 0:3afcd581558d 182 /**
pmallick 0:3afcd581558d 183 * Software reset device.
pmallick 0:3afcd581558d 184 *
pmallick 0:3afcd581558d 185 * @param dev - The device structure.
pmallick 0:3afcd581558d 186 * @return 0 in case of success, negative error code otherwise
pmallick 0:3afcd581558d 187 */
pmallick 0:3afcd581558d 188 int32_t ad5592r_software_reset(struct ad5592r_dev *dev)
pmallick 0:3afcd581558d 189 {
pmallick 0:3afcd581558d 190 int32_t ret;
pmallick 0:3afcd581558d 191
pmallick 0:3afcd581558d 192 if (!dev)
pmallick 0:3afcd581558d 193 return FAILURE;
pmallick 0:3afcd581558d 194
pmallick 0:3afcd581558d 195 /* Writing this magic value resets the device */
pmallick 0:3afcd581558d 196 ret = ad5592r_base_reg_write(dev, AD5592R_REG_RESET, 0xdac);
pmallick 0:3afcd581558d 197
pmallick 0:3afcd581558d 198 mdelay(10);
pmallick 0:3afcd581558d 199
pmallick 0:3afcd581558d 200 return ret;
pmallick 0:3afcd581558d 201 }
pmallick 0:3afcd581558d 202
pmallick 0:3afcd581558d 203 /**
pmallick 0:3afcd581558d 204 * Set channels modes.
pmallick 0:3afcd581558d 205 *
pmallick 0:3afcd581558d 206 * @param dev - The device structure.
pmallick 0:3afcd581558d 207 * @return 0 in case of success, negative error code otherwise
pmallick 0:3afcd581558d 208 */
pmallick 0:3afcd581558d 209 int32_t ad5592r_set_channel_modes(struct ad5592r_dev *dev)
pmallick 0:3afcd581558d 210 {
pmallick 0:3afcd581558d 211 int32_t ret;
pmallick 0:3afcd581558d 212 uint8_t i;
pmallick 0:3afcd581558d 213 uint8_t pulldown = 0, tristate = 0, dac = 0, adc = 0;
pmallick 0:3afcd581558d 214 uint16_t read_back;
pmallick 0:3afcd581558d 215
pmallick 0:3afcd581558d 216 if (!dev)
pmallick 0:3afcd581558d 217 return FAILURE;
pmallick 0:3afcd581558d 218
pmallick 0:3afcd581558d 219 dev->gpio_in = 0;
pmallick 0:3afcd581558d 220 dev->gpio_out = 0;
pmallick 0:3afcd581558d 221
pmallick 0:3afcd581558d 222 for (i = 0; i < dev->num_channels; i++) {
pmallick 0:3afcd581558d 223 switch (dev->channel_modes[i]) {
pmallick 0:3afcd581558d 224 case CH_MODE_DAC:
pmallick 0:3afcd581558d 225 dac |= BIT(i);
pmallick 0:3afcd581558d 226 break;
pmallick 0:3afcd581558d 227
pmallick 0:3afcd581558d 228 case CH_MODE_ADC:
pmallick 0:3afcd581558d 229 adc |= BIT(i);
pmallick 0:3afcd581558d 230 break;
pmallick 0:3afcd581558d 231
pmallick 0:3afcd581558d 232 case CH_MODE_DAC_AND_ADC:
pmallick 0:3afcd581558d 233 dac |= BIT(i);
pmallick 0:3afcd581558d 234 adc |= BIT(i);
pmallick 0:3afcd581558d 235 break;
pmallick 0:3afcd581558d 236
pmallick 0:3afcd581558d 237 case CH_MODE_GPI:
pmallick 0:3afcd581558d 238 dev->gpio_in |= BIT(i);
pmallick 0:3afcd581558d 239 break;
pmallick 0:3afcd581558d 240
pmallick 0:3afcd581558d 241 case CH_MODE_GPO:
pmallick 0:3afcd581558d 242 dev->gpio_out |= BIT(i);
pmallick 0:3afcd581558d 243 break;
pmallick 0:3afcd581558d 244
pmallick 0:3afcd581558d 245 case CH_MODE_UNUSED:
pmallick 0:3afcd581558d 246 /* fall-through */
pmallick 0:3afcd581558d 247 default:
pmallick 0:3afcd581558d 248 switch (dev->channel_offstate[i]) {
pmallick 0:3afcd581558d 249 case CH_OFFSTATE_OUT_TRISTATE:
pmallick 0:3afcd581558d 250 tristate |= BIT(i);
pmallick 0:3afcd581558d 251 break;
pmallick 0:3afcd581558d 252
pmallick 0:3afcd581558d 253 case CH_OFFSTATE_OUT_LOW:
pmallick 0:3afcd581558d 254 dev->gpio_out |= BIT(i);
pmallick 0:3afcd581558d 255 break;
pmallick 0:3afcd581558d 256
pmallick 0:3afcd581558d 257 case CH_OFFSTATE_OUT_HIGH:
pmallick 0:3afcd581558d 258 dev->gpio_out |= BIT(i);
pmallick 0:3afcd581558d 259 dev->gpio_val |= BIT(i);
pmallick 0:3afcd581558d 260 break;
pmallick 0:3afcd581558d 261
pmallick 0:3afcd581558d 262 case CH_OFFSTATE_PULLDOWN:
pmallick 0:3afcd581558d 263 /* fall-through */
pmallick 0:3afcd581558d 264 default:
pmallick 0:3afcd581558d 265 pulldown |= BIT(i);
pmallick 0:3afcd581558d 266 break;
pmallick 0:3afcd581558d 267 }
pmallick 0:3afcd581558d 268 }
pmallick 0:3afcd581558d 269 }
pmallick 0:3afcd581558d 270
pmallick 0:3afcd581558d 271 /* Pull down unused pins to GND */
pmallick 0:3afcd581558d 272 ret = ad5592r_base_reg_write(dev, AD5592R_REG_PULLDOWN, pulldown);
pmallick 0:3afcd581558d 273 if (ret < 0)
pmallick 0:3afcd581558d 274 return ret;
pmallick 0:3afcd581558d 275
pmallick 0:3afcd581558d 276 ret = ad5592r_base_reg_write(dev, AD5592R_REG_TRISTATE, tristate);
pmallick 0:3afcd581558d 277 if (ret < 0)
pmallick 0:3afcd581558d 278 return ret;
pmallick 0:3afcd581558d 279
pmallick 0:3afcd581558d 280 /* Configure pins that we use */
pmallick 0:3afcd581558d 281 ret = ad5592r_base_reg_write(dev, AD5592R_REG_DAC_EN, dac);
pmallick 0:3afcd581558d 282 if (ret < 0)
pmallick 0:3afcd581558d 283 return ret;
pmallick 0:3afcd581558d 284
pmallick 0:3afcd581558d 285 ret = ad5592r_base_reg_write(dev, AD5592R_REG_ADC_EN, adc);
pmallick 0:3afcd581558d 286 if (ret < 0)
pmallick 0:3afcd581558d 287 return ret;
pmallick 0:3afcd581558d 288
pmallick 0:3afcd581558d 289 ret = ad5592r_base_reg_write(dev, AD5592R_REG_GPIO_SET, dev->gpio_val);
pmallick 0:3afcd581558d 290 if (ret < 0)
pmallick 0:3afcd581558d 291 return ret;
pmallick 0:3afcd581558d 292
pmallick 0:3afcd581558d 293 ret = ad5592r_base_reg_write(dev, AD5592R_REG_GPIO_OUT_EN,
pmallick 0:3afcd581558d 294 dev->gpio_out);
pmallick 0:3afcd581558d 295 if (ret < 0)
pmallick 0:3afcd581558d 296 return ret;
pmallick 0:3afcd581558d 297
pmallick 0:3afcd581558d 298 ret = ad5592r_base_reg_write(dev, AD5592R_REG_GPIO_IN_EN,
pmallick 0:3afcd581558d 299 dev->gpio_in);
pmallick 0:3afcd581558d 300 if (ret < 0)
pmallick 0:3afcd581558d 301 return ret;
pmallick 0:3afcd581558d 302
pmallick 0:3afcd581558d 303 /* Verify that we can read back at least one register */
pmallick 0:3afcd581558d 304 ret = ad5592r_base_reg_read(dev, AD5592R_REG_ADC_EN, &read_back);
pmallick 0:3afcd581558d 305 if (!ret && (read_back & 0xff) != adc)
pmallick 0:3afcd581558d 306 return FAILURE;
pmallick 0:3afcd581558d 307
pmallick 0:3afcd581558d 308 return ret;
pmallick 0:3afcd581558d 309 }
pmallick 0:3afcd581558d 310
pmallick 0:3afcd581558d 311 /**
pmallick 0:3afcd581558d 312 * Reset channels and set GPIO to unused.
pmallick 0:3afcd581558d 313 *
pmallick 0:3afcd581558d 314 * @param dev - The device structure.
pmallick 0:3afcd581558d 315 * @return 0 in case of success, negative error code otherwise
pmallick 0:3afcd581558d 316 */
pmallick 0:3afcd581558d 317 int32_t ad5592r_reset_channel_modes(struct ad5592r_dev *dev)
pmallick 0:3afcd581558d 318 {
pmallick 0:3afcd581558d 319 uint32_t i;
pmallick 0:3afcd581558d 320
pmallick 0:3afcd581558d 321 if (!dev)
pmallick 0:3afcd581558d 322 return FAILURE;
pmallick 0:3afcd581558d 323
pmallick 0:3afcd581558d 324 for (i = 0; i < sizeof(dev->channel_modes); i++)
pmallick 0:3afcd581558d 325 dev->channel_modes[i] = CH_MODE_UNUSED;
pmallick 0:3afcd581558d 326
pmallick 0:3afcd581558d 327 return ad5592r_set_channel_modes(dev);
pmallick 0:3afcd581558d 328 }