Pratyush Mallick / Mbed OS nano_dac

this is testing

noos_mbed/drivers/adc/ad713x/ad713x.c@0:e8a1ba50c46b, 2021-01-14 (annotated)

Committer:
pmallick
Date:
Thu Jan 14 19:12:57 2021 +0530
Revision:
0:e8a1ba50c46b
this is testing

Who changed what in which revision?

UserRevisionLine numberNew contents of line
pmallick 0:e8a1ba50c46b 1 /***************************************************************************//**
pmallick 0:e8a1ba50c46b 2 * @file ad713x.c
pmallick 0:e8a1ba50c46b 3 * @brief Implementation of ad713x Driver.
pmallick 0:e8a1ba50c46b 4 * @author SPopa (stefan.popa@analog.com)
pmallick 0:e8a1ba50c46b 5 * @author Andrei Drimbarean (andrei.drimbarean@analog.com)
pmallick 0:e8a1ba50c46b 6 ********************************************************************************
pmallick 0:e8a1ba50c46b 7 * Copyright 2020(c) Analog Devices, Inc.
pmallick 0:e8a1ba50c46b 8 *
pmallick 0:e8a1ba50c46b 9 * All rights reserved.
pmallick 0:e8a1ba50c46b 10 *
pmallick 0:e8a1ba50c46b 11 * Redistribution and use in source and binary forms, with or without
pmallick 0:e8a1ba50c46b 12 * modification, are permitted provided that the following conditions are met:
pmallick 0:e8a1ba50c46b 13 * - Redistributions of source code must retain the above copyright
pmallick 0:e8a1ba50c46b 14 * notice, this list of conditions and the following disclaimer.
pmallick 0:e8a1ba50c46b 15 * - Redistributions in binary form must reproduce the above copyright
pmallick 0:e8a1ba50c46b 16 * notice, this list of conditions and the following disclaimer in
pmallick 0:e8a1ba50c46b 17 * the documentation and/or other materials provided with the
pmallick 0:e8a1ba50c46b 18 * distribution.
pmallick 0:e8a1ba50c46b 19 * - Neither the name of Analog Devices, Inc. nor the names of its
pmallick 0:e8a1ba50c46b 20 * contributors may be used to endorse or promote products derived
pmallick 0:e8a1ba50c46b 21 * from this software without specific prior written permission.
pmallick 0:e8a1ba50c46b 22 * - The use of this software may or may not infringe the patent rights
pmallick 0:e8a1ba50c46b 23 * of one or more patent holders. This license does not release you
pmallick 0:e8a1ba50c46b 24 * from the requirement that you obtain separate licenses from these
pmallick 0:e8a1ba50c46b 25 * patent holders to use this software.
pmallick 0:e8a1ba50c46b 26 * - Use of the software either in source or binary form, must be run
pmallick 0:e8a1ba50c46b 27 * on or directly connected to an Analog Devices Inc. component.
pmallick 0:e8a1ba50c46b 28 *
pmallick 0:e8a1ba50c46b 29 * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR
pmallick 0:e8a1ba50c46b 30 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
pmallick 0:e8a1ba50c46b 31 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
pmallick 0:e8a1ba50c46b 32 * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
pmallick 0:e8a1ba50c46b 33 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
pmallick 0:e8a1ba50c46b 34 * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR
pmallick 0:e8a1ba50c46b 35 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
pmallick 0:e8a1ba50c46b 36 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
pmallick 0:e8a1ba50c46b 37 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
pmallick 0:e8a1ba50c46b 38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
pmallick 0:e8a1ba50c46b 39 *******************************************************************************/
pmallick 0:e8a1ba50c46b 40
pmallick 0:e8a1ba50c46b 41 /******************************************************************************/
pmallick 0:e8a1ba50c46b 42 /***************************** Include Files **********************************/
pmallick 0:e8a1ba50c46b 43 /******************************************************************************/
pmallick 0:e8a1ba50c46b 44
pmallick 0:e8a1ba50c46b 45 #include <stdlib.h>
pmallick 0:e8a1ba50c46b 46 #include "ad713x.h"
pmallick 0:e8a1ba50c46b 47
pmallick 0:e8a1ba50c46b 48 /******************************************************************************/
pmallick 0:e8a1ba50c46b 49 /***************************** Variable definition ****************************/
pmallick 0:e8a1ba50c46b 50 /******************************************************************************/
pmallick 0:e8a1ba50c46b 51
pmallick 0:e8a1ba50c46b 52 static const int ad713x_output_data_frame[3][9][2] = {
pmallick 0:e8a1ba50c46b 53 {
pmallick 0:e8a1ba50c46b 54 {ADC_16_BIT_DATA, CRC_6},
pmallick 0:e8a1ba50c46b 55 {ADC_24_BIT_DATA, CRC_6},
pmallick 0:e8a1ba50c46b 56 {ADC_32_BIT_DATA, NO_CRC},
pmallick 0:e8a1ba50c46b 57 {ADC_32_BIT_DATA, CRC_6},
pmallick 0:e8a1ba50c46b 58 {ADC_16_BIT_DATA, NO_CRC},
pmallick 0:e8a1ba50c46b 59 {ADC_24_BIT_DATA, NO_CRC},
pmallick 0:e8a1ba50c46b 60 {ADC_24_BIT_DATA, CRC_8},
pmallick 0:e8a1ba50c46b 61 {ADC_32_BIT_DATA, CRC_8},
pmallick 0:e8a1ba50c46b 62 {INVALID}
pmallick 0:e8a1ba50c46b 63 },
pmallick 0:e8a1ba50c46b 64 {
pmallick 0:e8a1ba50c46b 65 {ADC_16_BIT_DATA, NO_CRC},
pmallick 0:e8a1ba50c46b 66 {ADC_16_BIT_DATA, CRC_6},
pmallick 0:e8a1ba50c46b 67 {ADC_24_BIT_DATA, NO_CRC},
pmallick 0:e8a1ba50c46b 68 {ADC_24_BIT_DATA, CRC_6},
pmallick 0:e8a1ba50c46b 69 {ADC_16_BIT_DATA, CRC_8},
pmallick 0:e8a1ba50c46b 70 {ADC_24_BIT_DATA, CRC_8},
pmallick 0:e8a1ba50c46b 71 {INVALID}
pmallick 0:e8a1ba50c46b 72 },
pmallick 0:e8a1ba50c46b 73 {
pmallick 0:e8a1ba50c46b 74 {ADC_16_BIT_DATA, NO_CRC},
pmallick 0:e8a1ba50c46b 75 {ADC_16_BIT_DATA, CRC_6},
pmallick 0:e8a1ba50c46b 76 {ADC_16_BIT_DATA, CRC_8},
pmallick 0:e8a1ba50c46b 77 {INVALID}
pmallick 0:e8a1ba50c46b 78 },
pmallick 0:e8a1ba50c46b 79 };
pmallick 0:e8a1ba50c46b 80
pmallick 0:e8a1ba50c46b 81 /******************************************************************************/
pmallick 0:e8a1ba50c46b 82 /************************** Functions Implementation **************************/
pmallick 0:e8a1ba50c46b 83 /******************************************************************************/
pmallick 0:e8a1ba50c46b 84
pmallick 0:e8a1ba50c46b 85 /**
pmallick 0:e8a1ba50c46b 86 * @brief Read from device.
pmallick 0:e8a1ba50c46b 87 * @param dev - The device structure.
pmallick 0:e8a1ba50c46b 88 * @param reg_addr - The register address.
pmallick 0:e8a1ba50c46b 89 * @param reg_data - The register data.
pmallick 0:e8a1ba50c46b 90 * @return \ref SUCCESS in case of success, \ref FAILURE otherwise.
pmallick 0:e8a1ba50c46b 91 */
pmallick 0:e8a1ba50c46b 92 int32_t ad713x_spi_reg_read(struct ad713x_dev *dev,
pmallick 0:e8a1ba50c46b 93 uint8_t reg_addr,
pmallick 0:e8a1ba50c46b 94 uint8_t *reg_data)
pmallick 0:e8a1ba50c46b 95 {
pmallick 0:e8a1ba50c46b 96 int32_t ret;
pmallick 0:e8a1ba50c46b 97 uint8_t buf[2];
pmallick 0:e8a1ba50c46b 98
pmallick 0:e8a1ba50c46b 99 buf[0] = AD713X_REG_READ(reg_addr);
pmallick 0:e8a1ba50c46b 100 buf[1] = 0x00;
pmallick 0:e8a1ba50c46b 101
pmallick 0:e8a1ba50c46b 102 ret = spi_write_and_read(dev->spi_desc, buf, 2);
pmallick 0:e8a1ba50c46b 103 if(IS_ERR_VALUE(ret))
pmallick 0:e8a1ba50c46b 104 return FAILURE;
pmallick 0:e8a1ba50c46b 105 *reg_data = buf[1];
pmallick 0:e8a1ba50c46b 106
pmallick 0:e8a1ba50c46b 107 return SUCCESS;
pmallick 0:e8a1ba50c46b 108 }
pmallick 0:e8a1ba50c46b 109
pmallick 0:e8a1ba50c46b 110 /**
pmallick 0:e8a1ba50c46b 111 * @brief Write to device.
pmallick 0:e8a1ba50c46b 112 * @param dev - The device structure.
pmallick 0:e8a1ba50c46b 113 * @param reg_addr - The register address.
pmallick 0:e8a1ba50c46b 114 * @param reg_data - The register data.
pmallick 0:e8a1ba50c46b 115 * @return \ref SUCCESS in case of success, \ref FAILURE otherwise.
pmallick 0:e8a1ba50c46b 116 */
pmallick 0:e8a1ba50c46b 117 int32_t ad713x_spi_reg_write(struct ad713x_dev *dev,
pmallick 0:e8a1ba50c46b 118 uint8_t reg_addr,
pmallick 0:e8a1ba50c46b 119 uint8_t reg_data)
pmallick 0:e8a1ba50c46b 120 {
pmallick 0:e8a1ba50c46b 121 uint8_t buf[2];
pmallick 0:e8a1ba50c46b 122
pmallick 0:e8a1ba50c46b 123 buf[0] = reg_addr;
pmallick 0:e8a1ba50c46b 124 buf[1] = reg_data;
pmallick 0:e8a1ba50c46b 125
pmallick 0:e8a1ba50c46b 126 return spi_write_and_read(dev->spi_desc, buf, 2);
pmallick 0:e8a1ba50c46b 127 }
pmallick 0:e8a1ba50c46b 128
pmallick 0:e8a1ba50c46b 129 /**
pmallick 0:e8a1ba50c46b 130 * @brief SPI write to device using a mask.
pmallick 0:e8a1ba50c46b 131 * @param dev - The device structure.
pmallick 0:e8a1ba50c46b 132 * @param reg_addr - The register address.
pmallick 0:e8a1ba50c46b 133 * @param mask - The mask.
pmallick 0:e8a1ba50c46b 134 * @param data - The register data.
pmallick 0:e8a1ba50c46b 135 * @return \ref SUCCESS in case of success, \ref FAILURE otherwise.
pmallick 0:e8a1ba50c46b 136 */
pmallick 0:e8a1ba50c46b 137 int32_t ad713x_spi_write_mask(struct ad713x_dev *dev,
pmallick 0:e8a1ba50c46b 138 uint8_t reg_addr,
pmallick 0:e8a1ba50c46b 139 uint32_t mask,
pmallick 0:e8a1ba50c46b 140 uint8_t data)
pmallick 0:e8a1ba50c46b 141 {
pmallick 0:e8a1ba50c46b 142 uint8_t reg_data;
pmallick 0:e8a1ba50c46b 143 int32_t ret;
pmallick 0:e8a1ba50c46b 144
pmallick 0:e8a1ba50c46b 145 ret = ad713x_spi_reg_read(dev, reg_addr, &reg_data);
pmallick 0:e8a1ba50c46b 146 if(IS_ERR_VALUE(ret))
pmallick 0:e8a1ba50c46b 147 return FAILURE;
pmallick 0:e8a1ba50c46b 148 reg_data &= ~mask;
pmallick 0:e8a1ba50c46b 149 reg_data |= data;
pmallick 0:e8a1ba50c46b 150
pmallick 0:e8a1ba50c46b 151 return ad713x_spi_reg_write(dev, reg_addr, reg_data);
pmallick 0:e8a1ba50c46b 152 }
pmallick 0:e8a1ba50c46b 153
pmallick 0:e8a1ba50c46b 154 /**
pmallick 0:e8a1ba50c46b 155 * @brief Device power mode control.
pmallick 0:e8a1ba50c46b 156 * @param dev - The device structure.
pmallick 0:e8a1ba50c46b 157 * @param mode - Type of power mode
pmallick 0:e8a1ba50c46b 158 * Accepted values: LOW_POWER
pmallick 0:e8a1ba50c46b 159 * HIGH_POWER
pmallick 0:e8a1ba50c46b 160 * @return \ref SUCCESS in case of success, \ref FAILURE otherwise.
pmallick 0:e8a1ba50c46b 161 */
pmallick 0:e8a1ba50c46b 162 int32_t ad713x_set_power_mode(struct ad713x_dev *dev,
pmallick 0:e8a1ba50c46b 163 enum ad713x_power_mode mode)
pmallick 0:e8a1ba50c46b 164 {
pmallick 0:e8a1ba50c46b 165 if (mode == LOW_POWER)
pmallick 0:e8a1ba50c46b 166 return ad713x_spi_write_mask(dev, AD713X_REG_DEVICE_CONFIG,
pmallick 0:e8a1ba50c46b 167 AD713X_DEV_CONFIG_PWR_MODE_MSK, 0);
pmallick 0:e8a1ba50c46b 168 else if (mode == HIGH_POWER)
pmallick 0:e8a1ba50c46b 169 return ad713x_spi_write_mask(dev, AD713X_REG_DEVICE_CONFIG,
pmallick 0:e8a1ba50c46b 170 AD713X_DEV_CONFIG_PWR_MODE_MSK,
pmallick 0:e8a1ba50c46b 171 1);
pmallick 0:e8a1ba50c46b 172
pmallick 0:e8a1ba50c46b 173 return FAILURE;
pmallick 0:e8a1ba50c46b 174 }
pmallick 0:e8a1ba50c46b 175
pmallick 0:e8a1ba50c46b 176 /**
pmallick 0:e8a1ba50c46b 177 * @brief ADC conversion data output frame control.
pmallick 0:e8a1ba50c46b 178 * @param dev - The device structure.
pmallick 0:e8a1ba50c46b 179 * @param adc_data_len - Data conversion length
pmallick 0:e8a1ba50c46b 180 * Accepted values: ADC_16_BIT_DATA
pmallick 0:e8a1ba50c46b 181 * ADC_24_BIT_DATA
pmallick 0:e8a1ba50c46b 182 * ADC_32_BIT_DATA
pmallick 0:e8a1ba50c46b 183 * @param crc_header - CRC header
pmallick 0:e8a1ba50c46b 184 * Accepted values: NO_CRC
pmallick 0:e8a1ba50c46b 185 * CRC_6
pmallick 0:e8a1ba50c46b 186 * CRC_8
pmallick 0:e8a1ba50c46b 187 * @return \ref SUCCESS in case of success, \ref FAILURE otherwise.
pmallick 0:e8a1ba50c46b 188 */
pmallick 0:e8a1ba50c46b 189 int32_t ad713x_set_out_data_frame(struct ad713x_dev *dev,
pmallick 0:e8a1ba50c46b 190 enum ad713x_adc_data_len adc_data_len,
pmallick 0:e8a1ba50c46b 191 enum ad713x_crc_header crc_header)
pmallick 0:e8a1ba50c46b 192 {
pmallick 0:e8a1ba50c46b 193 uint8_t id;
pmallick 0:e8a1ba50c46b 194 uint8_t i = 0;
pmallick 0:e8a1ba50c46b 195
pmallick 0:e8a1ba50c46b 196 id = dev->dev_id;
pmallick 0:e8a1ba50c46b 197
pmallick 0:e8a1ba50c46b 198 while (ad713x_output_data_frame[id][i][0] != INVALID) {
pmallick 0:e8a1ba50c46b 199 if((adc_data_len == ad713x_output_data_frame[id][i][0]) &&
pmallick 0:e8a1ba50c46b 200 (crc_header == ad713x_output_data_frame[id][i][1])) {
pmallick 0:e8a1ba50c46b 201 return ad713x_spi_write_mask(dev,
pmallick 0:e8a1ba50c46b 202 AD713X_REG_DATA_PACKET_CONFIG,
pmallick 0:e8a1ba50c46b 203 AD713X_DATA_PACKET_CONFIG_FRAME_MSK,
pmallick 0:e8a1ba50c46b 204 AD713X_DATA_PACKET_CONFIG_FRAME_MODE(i));
pmallick 0:e8a1ba50c46b 205 }
pmallick 0:e8a1ba50c46b 206 i++;
pmallick 0:e8a1ba50c46b 207 }
pmallick 0:e8a1ba50c46b 208
pmallick 0:e8a1ba50c46b 209 return FAILURE;
pmallick 0:e8a1ba50c46b 210 }
pmallick 0:e8a1ba50c46b 211
pmallick 0:e8a1ba50c46b 212 /**
pmallick 0:e8a1ba50c46b 213 * @brief DOUTx output format configuration.
pmallick 0:e8a1ba50c46b 214 * @param dev - The device structure.
pmallick 0:e8a1ba50c46b 215 * @param format - Single channel daisy chain mode. Dual channel daisy chain mode.
pmallick 0:e8a1ba50c46b 216 * Quad channel parallel output mode. Channel data averaging mode.
pmallick 0:e8a1ba50c46b 217 * Accepted values: SINGLE_CH_DC
pmallick 0:e8a1ba50c46b 218 * DUAL_CH_DC
pmallick 0:e8a1ba50c46b 219 * QUAD_CH_PO
pmallick 0:e8a1ba50c46b 220 * CH_AVG_MODE
pmallick 0:e8a1ba50c46b 221 * @return \ref SUCCESS in case of success, \ref FAILURE otherwise.
pmallick 0:e8a1ba50c46b 222 */
pmallick 0:e8a1ba50c46b 223 int32_t ad713x_dout_format_config(struct ad713x_dev *dev,
pmallick 0:e8a1ba50c46b 224 enum ad713x_doutx_format format)
pmallick 0:e8a1ba50c46b 225 {
pmallick 0:e8a1ba50c46b 226 return ad713x_spi_write_mask(dev, AD713X_REG_DIGITAL_INTERFACE_CONFIG,
pmallick 0:e8a1ba50c46b 227 AD713X_DIG_INT_CONFIG_FORMAT_MSK,
pmallick 0:e8a1ba50c46b 228 AD713X_DIG_INT_CONFIG_FORMAT_MODE(format));
pmallick 0:e8a1ba50c46b 229 }
pmallick 0:e8a1ba50c46b 230
pmallick 0:e8a1ba50c46b 231 /**
pmallick 0:e8a1ba50c46b 232 * @brief Magnitude and phase matching calibration clock delay enable for all
pmallick 0:e8a1ba50c46b 233 * channels at 2 clock delay.
pmallick 0:e8a1ba50c46b 234 * This function is kept for backwards compatibility with the current
pmallick 0:e8a1ba50c46b 235 * application source, but it is deprecated. Use
pmallick 0:e8a1ba50c46b 236 * ad713x_mag_phase_clk_delay_chan().
pmallick 0:e8a1ba50c46b 237 * @param dev - The device structure.
pmallick 0:e8a1ba50c46b 238 * @param clk_delay_en - Enable or disable Mag/Phase clock delay.
pmallick 0:e8a1ba50c46b 239 * Accepted values: true
pmallick 0:e8a1ba50c46b 240 * false
pmallick 0:e8a1ba50c46b 241 * @return \ref SUCCESS in case of success, \ref FAILURE otherwise.
pmallick 0:e8a1ba50c46b 242 */
pmallick 0:e8a1ba50c46b 243 int32_t ad713x_mag_phase_clk_delay(struct ad713x_dev *dev,
pmallick 0:e8a1ba50c46b 244 bool clk_delay_en)
pmallick 0:e8a1ba50c46b 245 {
pmallick 0:e8a1ba50c46b 246 int32_t ret;
pmallick 0:e8a1ba50c46b 247 int8_t i;
pmallick 0:e8a1ba50c46b 248 int8_t temp_clk_delay;
pmallick 0:e8a1ba50c46b 249
pmallick 0:e8a1ba50c46b 250 if (clk_delay_en)
pmallick 0:e8a1ba50c46b 251 temp_clk_delay = DELAY_2_CLOCKS;
pmallick 0:e8a1ba50c46b 252 else
pmallick 0:e8a1ba50c46b 253 temp_clk_delay = DELAY_NONE;
pmallick 0:e8a1ba50c46b 254
pmallick 0:e8a1ba50c46b 255 for (i = CH3; i >= 0; i--) {
pmallick 0:e8a1ba50c46b 256 ret = ad713x_spi_write_mask(dev, AD713X_REG_MPC_CONFIG,
pmallick 0:e8a1ba50c46b 257 AD713X_MPC_CLKDEL_EN_CH_MSK(i),
pmallick 0:e8a1ba50c46b 258 AD713X_MPC_CLKDEL_EN_CH_MODE(temp_clk_delay, i));
pmallick 0:e8a1ba50c46b 259 if (IS_ERR_VALUE(ret))
pmallick 0:e8a1ba50c46b 260 return FAILURE;
pmallick 0:e8a1ba50c46b 261 }
pmallick 0:e8a1ba50c46b 262
pmallick 0:e8a1ba50c46b 263 return SUCCESS;
pmallick 0:e8a1ba50c46b 264 }
pmallick 0:e8a1ba50c46b 265
pmallick 0:e8a1ba50c46b 266 /**
pmallick 0:e8a1ba50c46b 267 * @brief Change magnitude and phase calibration clock delay mode for a specific
pmallick 0:e8a1ba50c46b 268 * channel.
pmallick 0:e8a1ba50c46b 269 * @param dev - The device structure.
pmallick 0:e8a1ba50c46b 270 * @param chan - ID of the channel to be changed.
pmallick 0:e8a1ba50c46b 271 * Accepted values: CH0, CH1, CH2, CH3
pmallick 0:e8a1ba50c46b 272 * @param mode - Delay in clock periods.
pmallick 0:e8a1ba50c46b 273 * Accepted values: DELAY_NONE,
pmallick 0:e8a1ba50c46b 274 * DELAY_1_CLOCKS,
pmallick 0:e8a1ba50c46b 275 * DELAY_2_CLOCKS
pmallick 0:e8a1ba50c46b 276 * @return \ref SUCCESS in case of success, \ref FAILURE otherwise.
pmallick 0:e8a1ba50c46b 277 */
pmallick 0:e8a1ba50c46b 278 int32_t ad713x_mag_phase_clk_delay_chan(struct ad713x_dev *dev,
pmallick 0:e8a1ba50c46b 279 enum ad713x_channels chan,
pmallick 0:e8a1ba50c46b 280 enum ad717x_mpc_clkdel mode)
pmallick 0:e8a1ba50c46b 281 {
pmallick 0:e8a1ba50c46b 282 return ad713x_spi_write_mask(dev, AD713X_REG_MPC_CONFIG,
pmallick 0:e8a1ba50c46b 283 AD713X_MPC_CLKDEL_EN_CH_MSK(chan),
pmallick 0:e8a1ba50c46b 284 AD713X_MPC_CLKDEL_EN_CH_MODE(mode, chan));
pmallick 0:e8a1ba50c46b 285 }
pmallick 0:e8a1ba50c46b 286
pmallick 0:e8a1ba50c46b 287 /**
pmallick 0:e8a1ba50c46b 288 * @brief Digital filter type selection for each channel
pmallick 0:e8a1ba50c46b 289 * @param dev - The device structure.
pmallick 0:e8a1ba50c46b 290 * @param filter - Type of filter: Wideband, Sinc6, Sinc3,
pmallick 0:e8a1ba50c46b 291 * Sinc3 filter with simultaneous 50Hz and 60Hz rejection.
pmallick 0:e8a1ba50c46b 292 * Accepted values: FIR
pmallick 0:e8a1ba50c46b 293 * SINC6
pmallick 0:e8a1ba50c46b 294 * SINC3
pmallick 0:e8a1ba50c46b 295 * SINC3_50_60_REJ
pmallick 0:e8a1ba50c46b 296 * @param ch - Channel to apply the filter to
pmallick 0:e8a1ba50c46b 297 * Accepted values: CH0
pmallick 0:e8a1ba50c46b 298 * CH1
pmallick 0:e8a1ba50c46b 299 * CH2
pmallick 0:e8a1ba50c46b 300 * CH3
pmallick 0:e8a1ba50c46b 301 * @return \ref SUCCESS in case of success, \ref FAILURE otherwise.
pmallick 0:e8a1ba50c46b 302 */
pmallick 0:e8a1ba50c46b 303 int32_t ad713x_dig_filter_sel_ch(struct ad713x_dev *dev,
pmallick 0:e8a1ba50c46b 304 enum ad713x_dig_filter_sel filter,
pmallick 0:e8a1ba50c46b 305 enum ad713x_channels ch)
pmallick 0:e8a1ba50c46b 306 {
pmallick 0:e8a1ba50c46b 307 return ad713x_spi_write_mask(dev, AD713X_REG_CHAN_DIG_FILTER_SEL,
pmallick 0:e8a1ba50c46b 308 AD713X_DIGFILTER_SEL_CH_MSK(ch),
pmallick 0:e8a1ba50c46b 309 AD713X_DIGFILTER_SEL_CH_MODE(filter, ch));
pmallick 0:e8a1ba50c46b 310 }
pmallick 0:e8a1ba50c46b 311
pmallick 0:e8a1ba50c46b 312 /**
pmallick 0:e8a1ba50c46b 313 * @brief Enable/Disable CLKOUT output.
pmallick 0:e8a1ba50c46b 314 * @param [in] dev - The device structure.
pmallick 0:e8a1ba50c46b 315 * @param [in] enable - true to enable the clkout output;
pmallick 0:e8a1ba50c46b 316 * false to disable the clkout output.
pmallick 0:e8a1ba50c46b 317 * @return \ref SUCCESS in case of success, \ref FAILURE otherwise.
pmallick 0:e8a1ba50c46b 318 */
pmallick 0:e8a1ba50c46b 319 int32_t ad713x_clkout_output_en(struct ad713x_dev *dev, bool enable)
pmallick 0:e8a1ba50c46b 320 {
pmallick 0:e8a1ba50c46b 321 return ad713x_spi_write_mask(dev, AD713X_REG_DEVICE_CONFIG1,
pmallick 0:e8a1ba50c46b 322 AD713X_DEV_CONFIG1_CLKOUT_EN_MSK,
pmallick 0:e8a1ba50c46b 323 enable ? AD713X_DEV_CONFIG1_CLKOUT_EN_MSK : 0);
pmallick 0:e8a1ba50c46b 324 }
pmallick 0:e8a1ba50c46b 325
pmallick 0:e8a1ba50c46b 326 /**
pmallick 0:e8a1ba50c46b 327 * @brief Enable/Disable reference gain correction.
pmallick 0:e8a1ba50c46b 328 * @param [in] dev - The device structure.
pmallick 0:e8a1ba50c46b 329 * @param [in] enable - true to enable the reference gain correction;
pmallick 0:e8a1ba50c46b 330 * false to disable the reference gain correction.
pmallick 0:e8a1ba50c46b 331 * @return \ref SUCCESS in case of success, \ref FAILURE otherwise.
pmallick 0:e8a1ba50c46b 332 */
pmallick 0:e8a1ba50c46b 333 int32_t ad713x_ref_gain_correction_en(struct ad713x_dev *dev, bool enable)
pmallick 0:e8a1ba50c46b 334 {
pmallick 0:e8a1ba50c46b 335 return ad713x_spi_write_mask(dev, AD713X_REG_DEVICE_CONFIG1,
pmallick 0:e8a1ba50c46b 336 AD713X_DEV_CONFIG1_REF_GAIN_CORR_EN_MSK,
pmallick 0:e8a1ba50c46b 337 enable ? AD713X_DEV_CONFIG1_REF_GAIN_CORR_EN_MSK : 0);
pmallick 0:e8a1ba50c46b 338 }
pmallick 0:e8a1ba50c46b 339
pmallick 0:e8a1ba50c46b 340 /**
pmallick 0:e8a1ba50c46b 341 * @brief Select the wideband filter bandwidth for a channel.
pmallick 0:e8a1ba50c46b 342 * The option is relative to ODR, so it's a fraction of it.
pmallick 0:e8a1ba50c46b 343 * @param [in] dev - The device structure.
pmallick 0:e8a1ba50c46b 344 * @param [in] ch - Number of the channel to which to set the wideband filter
pmallick 0:e8a1ba50c46b 345 * option.
pmallick 0:e8a1ba50c46b 346 * @param [in] wb_opt - Option to set the wideband filter:
pmallick 0:e8a1ba50c46b 347 * Values are:
pmallick 0:e8a1ba50c46b 348 * 0 - bandwidth of 0.443 * ODR;
pmallick 0:e8a1ba50c46b 349 * 1 - bandwidth of 0.10825 * ODR.
pmallick 0:e8a1ba50c46b 350 * @return \ref SUCCESS in case of success, \ref FAILURE otherwise.
pmallick 0:e8a1ba50c46b 351 */
pmallick 0:e8a1ba50c46b 352 int32_t ad713x_wideband_bw_sel(struct ad713x_dev *dev,
pmallick 0:e8a1ba50c46b 353 enum ad713x_channels ch, uint8_t wb_opt)
pmallick 0:e8a1ba50c46b 354 {
pmallick 0:e8a1ba50c46b 355 return ad713x_spi_write_mask(dev, AD713X_REG_FIR_BW_SEL,
pmallick 0:e8a1ba50c46b 356 AD713X_FIR_BW_SEL_CH_MSK(ch),
pmallick 0:e8a1ba50c46b 357 wb_opt ? AD713X_FIR_BW_SEL_CH_MSK(ch) : 0);
pmallick 0:e8a1ba50c46b 358 }
pmallick 0:e8a1ba50c46b 359
pmallick 0:e8a1ba50c46b 360 /**
pmallick 0:e8a1ba50c46b 361 * @brief Initialize GPIO driver handlers for the GPIOs in the system.
pmallick 0:e8a1ba50c46b 362 * ad713x_init() helper function.
pmallick 0:e8a1ba50c46b 363 * @param [out] dev - AD713X device handler.
pmallick 0:e8a1ba50c46b 364 * @param [in] init_param - Pointer to the initialization structure.
pmallick 0:e8a1ba50c46b 365 * @return \ref SUCCESS in case of success, \ref FAILURE otherwise.
pmallick 0:e8a1ba50c46b 366 */
pmallick 0:e8a1ba50c46b 367 static int32_t ad713x_init_gpio(struct ad713x_dev *dev,
pmallick 0:e8a1ba50c46b 368 struct ad713x_init_param *init_param)
pmallick 0:e8a1ba50c46b 369 {
pmallick 0:e8a1ba50c46b 370
pmallick 0:e8a1ba50c46b 371 int32_t ret;
pmallick 0:e8a1ba50c46b 372
pmallick 0:e8a1ba50c46b 373 ret = gpio_get_optional(&dev->gpio_mode, init_param->gpio_mode);
pmallick 0:e8a1ba50c46b 374 if (IS_ERR_VALUE(ret))
pmallick 0:e8a1ba50c46b 375 return FAILURE;
pmallick 0:e8a1ba50c46b 376
pmallick 0:e8a1ba50c46b 377 ret = gpio_get_optional(&dev->gpio_dclkmode, init_param->gpio_dclkmode);
pmallick 0:e8a1ba50c46b 378 if (IS_ERR_VALUE(ret))
pmallick 0:e8a1ba50c46b 379 return FAILURE;
pmallick 0:e8a1ba50c46b 380
pmallick 0:e8a1ba50c46b 381 ret = gpio_get_optional(&dev->gpio_dclkio, init_param->gpio_dclkio);
pmallick 0:e8a1ba50c46b 382 if (IS_ERR_VALUE(ret))
pmallick 0:e8a1ba50c46b 383 return FAILURE;
pmallick 0:e8a1ba50c46b 384
pmallick 0:e8a1ba50c46b 385 ret = gpio_get_optional(&dev->gpio_resetn, init_param->gpio_resetn);
pmallick 0:e8a1ba50c46b 386 if (IS_ERR_VALUE(ret))
pmallick 0:e8a1ba50c46b 387 return FAILURE;
pmallick 0:e8a1ba50c46b 388
pmallick 0:e8a1ba50c46b 389 ret = gpio_get_optional(&dev->gpio_pnd, init_param->gpio_pnd);
pmallick 0:e8a1ba50c46b 390 if (IS_ERR_VALUE(ret))
pmallick 0:e8a1ba50c46b 391 return FAILURE;
pmallick 0:e8a1ba50c46b 392
pmallick 0:e8a1ba50c46b 393 /** Tie this pin to IOVDD for master mode operation, tie this pin to
pmallick 0:e8a1ba50c46b 394 * IOGND for slave mode operation. */
pmallick 0:e8a1ba50c46b 395 if (init_param->gpio_mode) {
pmallick 0:e8a1ba50c46b 396 ret = gpio_direction_output(dev->gpio_mode,
pmallick 0:e8a1ba50c46b 397 init_param->mode_master_nslave);
pmallick 0:e8a1ba50c46b 398 if (IS_ERR_VALUE(ret))
pmallick 0:e8a1ba50c46b 399 return FAILURE;
pmallick 0:e8a1ba50c46b 400 }
pmallick 0:e8a1ba50c46b 401
pmallick 0:e8a1ba50c46b 402 /* Tie this pin low to ground to make DLCK operating in gated mode */
pmallick 0:e8a1ba50c46b 403 if (init_param->gpio_dclkmode) {
pmallick 0:e8a1ba50c46b 404 ret = gpio_direction_output(dev->gpio_dclkmode,
pmallick 0:e8a1ba50c46b 405 init_param->dclkmode_free_ngated);
pmallick 0:e8a1ba50c46b 406 if (IS_ERR_VALUE(ret))
pmallick 0:e8a1ba50c46b 407 return FAILURE;
pmallick 0:e8a1ba50c46b 408 }
pmallick 0:e8a1ba50c46b 409
pmallick 0:e8a1ba50c46b 410 /** Tie this pin high to make DCLK an output, tie this pin low to make
pmallick 0:e8a1ba50c46b 411 * DLCK an input. */
pmallick 0:e8a1ba50c46b 412 if (init_param->gpio_dclkio) {
pmallick 0:e8a1ba50c46b 413 ret = gpio_direction_output(dev->gpio_dclkio,
pmallick 0:e8a1ba50c46b 414 init_param->dclkio_out_nin);
pmallick 0:e8a1ba50c46b 415 if (IS_ERR_VALUE(ret))
pmallick 0:e8a1ba50c46b 416 return FAILURE;
pmallick 0:e8a1ba50c46b 417 }
pmallick 0:e8a1ba50c46b 418
pmallick 0:e8a1ba50c46b 419 /** Get the ADCs out of power down state */
pmallick 0:e8a1ba50c46b 420 if (init_param->gpio_pnd) {
pmallick 0:e8a1ba50c46b 421 ret = gpio_direction_output(dev->gpio_pnd, init_param->pnd);
pmallick 0:e8a1ba50c46b 422 if (IS_ERR_VALUE(ret))
pmallick 0:e8a1ba50c46b 423 return FAILURE;
pmallick 0:e8a1ba50c46b 424 }
pmallick 0:e8a1ba50c46b 425
pmallick 0:e8a1ba50c46b 426 /** Reset to configure pins */
pmallick 0:e8a1ba50c46b 427 if (init_param->gpio_resetn) {
pmallick 0:e8a1ba50c46b 428 ret = gpio_direction_output(dev->gpio_resetn, false);
pmallick 0:e8a1ba50c46b 429 if (IS_ERR_VALUE(ret))
pmallick 0:e8a1ba50c46b 430 return FAILURE;
pmallick 0:e8a1ba50c46b 431 mdelay(100);
pmallick 0:e8a1ba50c46b 432 ret = gpio_set_value(dev->gpio_resetn, true);
pmallick 0:e8a1ba50c46b 433 if (IS_ERR_VALUE(ret))
pmallick 0:e8a1ba50c46b 434 return FAILURE;
pmallick 0:e8a1ba50c46b 435 mdelay(100);
pmallick 0:e8a1ba50c46b 436 }
pmallick 0:e8a1ba50c46b 437
pmallick 0:e8a1ba50c46b 438 return SUCCESS;
pmallick 0:e8a1ba50c46b 439 }
pmallick 0:e8a1ba50c46b 440
pmallick 0:e8a1ba50c46b 441 /**
pmallick 0:e8a1ba50c46b 442 * @brief Free the resources allocated by ad713x_init_gpio().
pmallick 0:e8a1ba50c46b 443 * @param dev - The device structure.
pmallick 0:e8a1ba50c46b 444 * @return SUCCESS in case of success, negative error code otherwise.
pmallick 0:e8a1ba50c46b 445 */
pmallick 0:e8a1ba50c46b 446 static int32_t ad713x_remove_gpio(struct ad713x_dev *dev)
pmallick 0:e8a1ba50c46b 447 {
pmallick 0:e8a1ba50c46b 448 int32_t ret;
pmallick 0:e8a1ba50c46b 449
pmallick 0:e8a1ba50c46b 450 if (dev->gpio_dclkio) {
pmallick 0:e8a1ba50c46b 451 ret = gpio_remove(dev->gpio_dclkio);
pmallick 0:e8a1ba50c46b 452 if(IS_ERR_VALUE(ret))
pmallick 0:e8a1ba50c46b 453 return FAILURE;
pmallick 0:e8a1ba50c46b 454 }
pmallick 0:e8a1ba50c46b 455 if (dev->gpio_dclkio) {
pmallick 0:e8a1ba50c46b 456 ret = gpio_remove(dev->gpio_dclkmode);
pmallick 0:e8a1ba50c46b 457 if(IS_ERR_VALUE(ret))
pmallick 0:e8a1ba50c46b 458 return FAILURE;
pmallick 0:e8a1ba50c46b 459 }
pmallick 0:e8a1ba50c46b 460 if (dev->gpio_mode) {
pmallick 0:e8a1ba50c46b 461 ret = gpio_remove(dev->gpio_mode);
pmallick 0:e8a1ba50c46b 462 if(IS_ERR_VALUE(ret))
pmallick 0:e8a1ba50c46b 463 return FAILURE;
pmallick 0:e8a1ba50c46b 464 }
pmallick 0:e8a1ba50c46b 465 if (dev->gpio_pnd) {
pmallick 0:e8a1ba50c46b 466 ret = gpio_remove(dev->gpio_pnd);
pmallick 0:e8a1ba50c46b 467 if(IS_ERR_VALUE(ret))
pmallick 0:e8a1ba50c46b 468 return FAILURE;
pmallick 0:e8a1ba50c46b 469 }
pmallick 0:e8a1ba50c46b 470 if (dev->gpio_resetn) {
pmallick 0:e8a1ba50c46b 471 ret = gpio_remove(dev->gpio_resetn);
pmallick 0:e8a1ba50c46b 472 if(IS_ERR_VALUE(ret))
pmallick 0:e8a1ba50c46b 473 return FAILURE;
pmallick 0:e8a1ba50c46b 474 }
pmallick 0:e8a1ba50c46b 475
pmallick 0:e8a1ba50c46b 476 return SUCCESS;
pmallick 0:e8a1ba50c46b 477 }
pmallick 0:e8a1ba50c46b 478
pmallick 0:e8a1ba50c46b 479 /**
pmallick 0:e8a1ba50c46b 480 * @brief Initialize the wideband filter bandwidth for every channel.
pmallick 0:e8a1ba50c46b 481 * ad713x_init() helper function.
pmallick 0:e8a1ba50c46b 482 * @param [in] dev - AD713X device handler.
pmallick 0:e8a1ba50c46b 483 * @return \ref SUCCESS in case of success, \ref FAILURE otherwise.
pmallick 0:e8a1ba50c46b 484 */
pmallick 0:e8a1ba50c46b 485 static int32_t ad713x_init_chan_bw(struct ad713x_dev *dev)
pmallick 0:e8a1ba50c46b 486 {
pmallick 0:e8a1ba50c46b 487 int8_t i;
pmallick 0:e8a1ba50c46b 488 int32_t ret;
pmallick 0:e8a1ba50c46b 489
pmallick 0:e8a1ba50c46b 490 for (i = CH3; i >= 0; i--) {
pmallick 0:e8a1ba50c46b 491 ret = ad713x_wideband_bw_sel(dev, i, 0);
pmallick 0:e8a1ba50c46b 492 if (IS_ERR_VALUE(ret))
pmallick 0:e8a1ba50c46b 493 return FAILURE;
pmallick 0:e8a1ba50c46b 494 }
pmallick 0:e8a1ba50c46b 495
pmallick 0:e8a1ba50c46b 496 return SUCCESS;
pmallick 0:e8a1ba50c46b 497 }
pmallick 0:e8a1ba50c46b 498
pmallick 0:e8a1ba50c46b 499 /**
pmallick 0:e8a1ba50c46b 500 * @brief Initialize the device.
pmallick 0:e8a1ba50c46b 501 * @param device - The device structure.
pmallick 0:e8a1ba50c46b 502 * @param init_param - The structure that contains the device initial
pmallick 0:e8a1ba50c46b 503 * parameters.
pmallick 0:e8a1ba50c46b 504 * @return \ref SUCCESS in case of success, \ref FAILURE otherwise.
pmallick 0:e8a1ba50c46b 505 */
pmallick 0:e8a1ba50c46b 506 int32_t ad713x_init(struct ad713x_dev **device,
pmallick 0:e8a1ba50c46b 507 struct ad713x_init_param *init_param)
pmallick 0:e8a1ba50c46b 508 {
pmallick 0:e8a1ba50c46b 509 struct ad713x_dev *dev;
pmallick 0:e8a1ba50c46b 510 int32_t ret;
pmallick 0:e8a1ba50c46b 511 uint8_t data;
pmallick 0:e8a1ba50c46b 512
pmallick 0:e8a1ba50c46b 513 dev = (struct ad713x_dev *)calloc(1, sizeof(*dev));
pmallick 0:e8a1ba50c46b 514 if (!dev)
pmallick 0:e8a1ba50c46b 515 return FAILURE;
pmallick 0:e8a1ba50c46b 516
pmallick 0:e8a1ba50c46b 517 if (!init_param->spi_common_dev) {
pmallick 0:e8a1ba50c46b 518 ret = spi_init(&dev->spi_desc, &init_param->spi_init_prm);
pmallick 0:e8a1ba50c46b 519 if (IS_ERR_VALUE(ret))
pmallick 0:e8a1ba50c46b 520 goto error_dev;
pmallick 0:e8a1ba50c46b 521 } else {
pmallick 0:e8a1ba50c46b 522 dev->spi_desc = calloc(1, sizeof *dev->spi_desc);
pmallick 0:e8a1ba50c46b 523 dev->spi_desc->chip_select = init_param->spi_init_prm.chip_select;
pmallick 0:e8a1ba50c46b 524 dev->spi_desc->extra = init_param->spi_common_dev->extra;
pmallick 0:e8a1ba50c46b 525 dev->spi_desc->max_speed_hz = init_param->spi_init_prm.max_speed_hz;
pmallick 0:e8a1ba50c46b 526 dev->spi_desc->mode = init_param->spi_init_prm.mode;
pmallick 0:e8a1ba50c46b 527 }
pmallick 0:e8a1ba50c46b 528
pmallick 0:e8a1ba50c46b 529 ret = ad713x_init_gpio(dev, init_param);
pmallick 0:e8a1ba50c46b 530 if(IS_ERR_VALUE(ret))
pmallick 0:e8a1ba50c46b 531 goto error_gpio;
pmallick 0:e8a1ba50c46b 532
pmallick 0:e8a1ba50c46b 533 dev->dev_id = init_param->dev_id;
pmallick 0:e8a1ba50c46b 534
pmallick 0:e8a1ba50c46b 535 ret = ad713x_spi_reg_read(dev, AD713X_REG_DEVICE_CONFIG, &data);
pmallick 0:e8a1ba50c46b 536 if (IS_ERR_VALUE(ret))
pmallick 0:e8a1ba50c46b 537 goto error_gpio;
pmallick 0:e8a1ba50c46b 538 data |= AD713X_DEV_CONFIG_PWR_MODE_MSK;
pmallick 0:e8a1ba50c46b 539 ret = ad713x_spi_reg_write(dev, AD713X_REG_DEVICE_CONFIG, data);
pmallick 0:e8a1ba50c46b 540 if (IS_ERR_VALUE(ret))
pmallick 0:e8a1ba50c46b 541 goto error_gpio;
pmallick 0:e8a1ba50c46b 542
pmallick 0:e8a1ba50c46b 543 ret = ad713x_clkout_output_en(dev, true);
pmallick 0:e8a1ba50c46b 544 if (IS_ERR_VALUE(ret))
pmallick 0:e8a1ba50c46b 545 goto error_gpio;
pmallick 0:e8a1ba50c46b 546
pmallick 0:e8a1ba50c46b 547 ret = ad713x_ref_gain_correction_en(dev, true);
pmallick 0:e8a1ba50c46b 548 if (IS_ERR_VALUE(ret))
pmallick 0:e8a1ba50c46b 549 goto error_gpio;
pmallick 0:e8a1ba50c46b 550
pmallick 0:e8a1ba50c46b 551 ret = ad713x_set_out_data_frame(dev, init_param->adc_data_len,
pmallick 0:e8a1ba50c46b 552 init_param->crc_header);
pmallick 0:e8a1ba50c46b 553 if (IS_ERR_VALUE(ret))
pmallick 0:e8a1ba50c46b 554 goto error_gpio;
pmallick 0:e8a1ba50c46b 555
pmallick 0:e8a1ba50c46b 556 ret = ad713x_dout_format_config(dev, init_param->format);
pmallick 0:e8a1ba50c46b 557 if (IS_ERR_VALUE(ret))
pmallick 0:e8a1ba50c46b 558 goto error_gpio;
pmallick 0:e8a1ba50c46b 559
pmallick 0:e8a1ba50c46b 560 ret = ad713x_mag_phase_clk_delay(dev, init_param->clk_delay_en);
pmallick 0:e8a1ba50c46b 561 if (IS_ERR_VALUE(ret))
pmallick 0:e8a1ba50c46b 562 goto error_gpio;
pmallick 0:e8a1ba50c46b 563
pmallick 0:e8a1ba50c46b 564 ret = ad713x_init_chan_bw(dev);
pmallick 0:e8a1ba50c46b 565 if (IS_ERR_VALUE(ret))
pmallick 0:e8a1ba50c46b 566 goto error_gpio;
pmallick 0:e8a1ba50c46b 567
pmallick 0:e8a1ba50c46b 568 *device = dev;
pmallick 0:e8a1ba50c46b 569
pmallick 0:e8a1ba50c46b 570 return SUCCESS;
pmallick 0:e8a1ba50c46b 571
pmallick 0:e8a1ba50c46b 572 error_gpio:
pmallick 0:e8a1ba50c46b 573 ad713x_remove_gpio(dev);
pmallick 0:e8a1ba50c46b 574 error_dev:
pmallick 0:e8a1ba50c46b 575 ad713x_remove(dev);
pmallick 0:e8a1ba50c46b 576
pmallick 0:e8a1ba50c46b 577 return FAILURE;
pmallick 0:e8a1ba50c46b 578 }
pmallick 0:e8a1ba50c46b 579
pmallick 0:e8a1ba50c46b 580 /**
pmallick 0:e8a1ba50c46b 581 * @brief Free the resources allocated by ad713x_init().
pmallick 0:e8a1ba50c46b 582 * @param dev - The device structure.
pmallick 0:e8a1ba50c46b 583 * @return SUCCESS in case of success, negative error code otherwise.
pmallick 0:e8a1ba50c46b 584 */
pmallick 0:e8a1ba50c46b 585 int32_t ad713x_remove(struct ad713x_dev *dev)
pmallick 0:e8a1ba50c46b 586 {
pmallick 0:e8a1ba50c46b 587 int32_t ret;
pmallick 0:e8a1ba50c46b 588
pmallick 0:e8a1ba50c46b 589 if(!dev)
pmallick 0:e8a1ba50c46b 590 return FAILURE;
pmallick 0:e8a1ba50c46b 591
pmallick 0:e8a1ba50c46b 592 ret = spi_remove(dev->spi_desc);
pmallick 0:e8a1ba50c46b 593 if(IS_ERR_VALUE(ret))
pmallick 0:e8a1ba50c46b 594 return FAILURE;
pmallick 0:e8a1ba50c46b 595
pmallick 0:e8a1ba50c46b 596 ret = ad713x_remove_gpio(dev);
pmallick 0:e8a1ba50c46b 597 if(IS_ERR_VALUE(ret))
pmallick 0:e8a1ba50c46b 598 return FAILURE;
pmallick 0:e8a1ba50c46b 599
pmallick 0:e8a1ba50c46b 600 free(dev);
pmallick 0:e8a1ba50c46b 601
pmallick 0:e8a1ba50c46b 602 return SUCCESS;
pmallick 0:e8a1ba50c46b 603 }