Pratyush Mallick
Forked repository for pushing changes to EVAL-AD4696
Dependencies: platform_drivers
app/ad469x.c@1:8792acb5a039, 2021-09-30 (annotated)
- Committer:
- pmallick
- Date:
- Thu Sep 30 11:01:05 2021 +0530
- Revision:
- 1:8792acb5a039
AD4696 IIO Application- Initial Revision
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| pmallick | 1:8792acb5a039 | 1 | /***************************************************************************//** |
| pmallick | 1:8792acb5a039 | 2 | * @file ad469x.c |
| pmallick | 1:8792acb5a039 | 3 | * @brief Implementation of ad469x Driver. |
| pmallick | 1:8792acb5a039 | 4 | * @author Cristian Pop (cristian.pop@analog.com) |
| pmallick | 1:8792acb5a039 | 5 | ******************************************************************************** |
| pmallick | 1:8792acb5a039 | 6 | * Copyright 2021(c) Analog Devices, Inc. |
| pmallick | 1:8792acb5a039 | 7 | * |
| pmallick | 1:8792acb5a039 | 8 | * All rights reserved. |
| pmallick | 1:8792acb5a039 | 9 | * |
| pmallick | 1:8792acb5a039 | 10 | * Redistribution and use in source and binary forms, with or without |
| pmallick | 1:8792acb5a039 | 11 | * modification, are permitted provided that the following conditions are met: |
| pmallick | 1:8792acb5a039 | 12 | * - Redistributions of source code must retain the above copyright |
| pmallick | 1:8792acb5a039 | 13 | * notice, this list of conditions and the following disclaimer. |
| pmallick | 1:8792acb5a039 | 14 | * - Redistributions in binary form must reproduce the above copyright |
| pmallick | 1:8792acb5a039 | 15 | * notice, this list of conditions and the following disclaimer in |
| pmallick | 1:8792acb5a039 | 16 | * the documentation and/or other materials provided with the |
| pmallick | 1:8792acb5a039 | 17 | * distribution. |
| pmallick | 1:8792acb5a039 | 18 | * - Neither the name of Analog Devices, Inc. nor the names of its |
| pmallick | 1:8792acb5a039 | 19 | * contributors may be used to endorse or promote products derived |
| pmallick | 1:8792acb5a039 | 20 | * from this software without specific prior written permission. |
| pmallick | 1:8792acb5a039 | 21 | * - The use of this software may or may not infringe the patent rights |
| pmallick | 1:8792acb5a039 | 22 | * of one or more patent holders. This license does not release you |
| pmallick | 1:8792acb5a039 | 23 | * from the requirement that you obtain separate licenses from these |
| pmallick | 1:8792acb5a039 | 24 | * patent holders to use this software. |
| pmallick | 1:8792acb5a039 | 25 | * - Use of the software either in source or binary form, must be run |
| pmallick | 1:8792acb5a039 | 26 | * on or directly connected to an Analog Devices Inc. component. |
| pmallick | 1:8792acb5a039 | 27 | * |
| pmallick | 1:8792acb5a039 | 28 | * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR |
| pmallick | 1:8792acb5a039 | 29 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, |
| pmallick | 1:8792acb5a039 | 30 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| pmallick | 1:8792acb5a039 | 31 | * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, |
| pmallick | 1:8792acb5a039 | 32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
| pmallick | 1:8792acb5a039 | 33 | * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR |
| pmallick | 1:8792acb5a039 | 34 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| pmallick | 1:8792acb5a039 | 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| pmallick | 1:8792acb5a039 | 36 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| pmallick | 1:8792acb5a039 | 37 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| pmallick | 1:8792acb5a039 | 38 | *******************************************************************************/ |
| pmallick | 1:8792acb5a039 | 39 | |
| pmallick | 1:8792acb5a039 | 40 | /******************************************************************************/ |
| pmallick | 1:8792acb5a039 | 41 | /***************************** Include Files **********************************/ |
| pmallick | 1:8792acb5a039 | 42 | /******************************************************************************/ |
| pmallick | 1:8792acb5a039 | 43 | #include <string.h> |
| pmallick | 1:8792acb5a039 | 44 | #include <stdio.h> |
| pmallick | 1:8792acb5a039 | 45 | #include <stdlib.h> |
| pmallick | 1:8792acb5a039 | 46 | #include "ad469x.h" |
| pmallick | 1:8792acb5a039 | 47 | #include "delay.h" |
| pmallick | 1:8792acb5a039 | 48 | #include "error.h" |
| pmallick | 1:8792acb5a039 | 49 | #include "util.h" |
| pmallick | 1:8792acb5a039 | 50 | #include "gpio.h" |
| pmallick | 1:8792acb5a039 | 51 | |
| pmallick | 1:8792acb5a039 | 52 | #define AD469x_TEST_DATA 0xEA |
| pmallick | 1:8792acb5a039 | 53 | /******************************************************************************/ |
| pmallick | 1:8792acb5a039 | 54 | /********************** Macros and Constants Definitions **********************/ |
| pmallick | 1:8792acb5a039 | 55 | /******************************************************************************/ |
| pmallick | 1:8792acb5a039 | 56 | |
| pmallick | 1:8792acb5a039 | 57 | /** |
| pmallick | 1:8792acb5a039 | 58 | * @brief Device resolution |
| pmallick | 1:8792acb5a039 | 59 | */ |
| pmallick | 1:8792acb5a039 | 60 | const uint8_t ad469x_device_resol[] = { |
| pmallick | 1:8792acb5a039 | 61 | [AD469x_OSR_1] = 16, |
| pmallick | 1:8792acb5a039 | 62 | [AD469x_OSR_4] = 17, |
| pmallick | 1:8792acb5a039 | 63 | [AD469x_OSR_16] = 18, |
| pmallick | 1:8792acb5a039 | 64 | [AD469x_OSR_64] = 19 |
| pmallick | 1:8792acb5a039 | 65 | }; |
| pmallick | 1:8792acb5a039 | 66 | |
| pmallick | 1:8792acb5a039 | 67 | /******************************************************************************/ |
| pmallick | 1:8792acb5a039 | 68 | /************************** Functions Implementation **************************/ |
| pmallick | 1:8792acb5a039 | 69 | /******************************************************************************/ |
| pmallick | 1:8792acb5a039 | 70 | |
| pmallick | 1:8792acb5a039 | 71 | /** |
| pmallick | 1:8792acb5a039 | 72 | * Read from device. |
| pmallick | 1:8792acb5a039 | 73 | * @param dev - The device structure. |
| pmallick | 1:8792acb5a039 | 74 | * @param reg_addr - The register address. |
| pmallick | 1:8792acb5a039 | 75 | * @param reg_data - The register data. |
| pmallick | 1:8792acb5a039 | 76 | * @return SUCCESS in case of success, negative error code otherwise. |
| pmallick | 1:8792acb5a039 | 77 | */ |
| pmallick | 1:8792acb5a039 | 78 | int32_t ad469x_spi_reg_read(struct ad469x_dev *dev, |
| pmallick | 1:8792acb5a039 | 79 | uint16_t reg_addr, |
| pmallick | 1:8792acb5a039 | 80 | uint8_t *reg_data) |
| pmallick | 1:8792acb5a039 | 81 | { |
| pmallick | 1:8792acb5a039 | 82 | int32_t ret; |
| pmallick | 1:8792acb5a039 | 83 | uint8_t buf[3]; |
| pmallick | 1:8792acb5a039 | 84 | |
| pmallick | 1:8792acb5a039 | 85 | #if defined (ENABLE_SPI_ENGINE) |
| pmallick | 1:8792acb5a039 | 86 | ret = spi_engine_set_transfer_width(dev->spi_desc, dev->reg_data_width); |
| pmallick | 1:8792acb5a039 | 87 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 88 | return ret; |
| pmallick | 1:8792acb5a039 | 89 | |
| pmallick | 1:8792acb5a039 | 90 | spi_engine_set_speed(dev->spi_desc, dev->reg_access_speed); |
| pmallick | 1:8792acb5a039 | 91 | #endif |
| pmallick | 1:8792acb5a039 | 92 | |
| pmallick | 1:8792acb5a039 | 93 | buf[0] = (1 << 7) | ((reg_addr >> 8) & 0x7F); |
| pmallick | 1:8792acb5a039 | 94 | buf[1] = 0xFF & reg_addr; |
| pmallick | 1:8792acb5a039 | 95 | buf[2] = 0xFF; |
| pmallick | 1:8792acb5a039 | 96 | |
| pmallick | 1:8792acb5a039 | 97 | ret = spi_write_and_read(dev->spi_desc, buf, 3); |
| pmallick | 1:8792acb5a039 | 98 | *reg_data = buf[2]; |
| pmallick | 1:8792acb5a039 | 99 | |
| pmallick | 1:8792acb5a039 | 100 | #if defined (ENABLE_SPI_ENGINE) |
| pmallick | 1:8792acb5a039 | 101 | ret = spi_engine_set_transfer_width(dev->spi_desc, dev->capture_data_width); |
| pmallick | 1:8792acb5a039 | 102 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 103 | return ret; |
| pmallick | 1:8792acb5a039 | 104 | |
| pmallick | 1:8792acb5a039 | 105 | spi_engine_set_speed(dev->spi_desc, dev->spi_desc->max_speed_hz); |
| pmallick | 1:8792acb5a039 | 106 | #endif |
| pmallick | 1:8792acb5a039 | 107 | |
| pmallick | 1:8792acb5a039 | 108 | return ret; |
| pmallick | 1:8792acb5a039 | 109 | } |
| pmallick | 1:8792acb5a039 | 110 | |
| pmallick | 1:8792acb5a039 | 111 | /** |
| pmallick | 1:8792acb5a039 | 112 | * Write to device. |
| pmallick | 1:8792acb5a039 | 113 | * @param dev - The device structure. |
| pmallick | 1:8792acb5a039 | 114 | * @param reg_addr - The register address. |
| pmallick | 1:8792acb5a039 | 115 | * @param reg_data - The register data. |
| pmallick | 1:8792acb5a039 | 116 | * @@eturn SUCCESS in case of success, negative error code otherwise. |
| pmallick | 1:8792acb5a039 | 117 | */ |
| pmallick | 1:8792acb5a039 | 118 | int32_t ad469x_spi_reg_write(struct ad469x_dev *dev, |
| pmallick | 1:8792acb5a039 | 119 | uint16_t reg_addr, |
| pmallick | 1:8792acb5a039 | 120 | uint8_t reg_data) |
| pmallick | 1:8792acb5a039 | 121 | { |
| pmallick | 1:8792acb5a039 | 122 | int32_t ret; |
| pmallick | 1:8792acb5a039 | 123 | uint8_t buf[3]; |
| pmallick | 1:8792acb5a039 | 124 | |
| pmallick | 1:8792acb5a039 | 125 | #if defined (ENABLE_SPI_ENGINE) |
| pmallick | 1:8792acb5a039 | 126 | ret = spi_engine_set_transfer_width(dev->spi_desc, dev->reg_data_width); |
| pmallick | 1:8792acb5a039 | 127 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 128 | return ret; |
| pmallick | 1:8792acb5a039 | 129 | |
| pmallick | 1:8792acb5a039 | 130 | spi_engine_set_speed(dev->spi_desc, dev->reg_access_speed); |
| pmallick | 1:8792acb5a039 | 131 | #endif |
| pmallick | 1:8792acb5a039 | 132 | |
| pmallick | 1:8792acb5a039 | 133 | buf[0] = ((reg_addr >> 8) & 0x7F); |
| pmallick | 1:8792acb5a039 | 134 | buf[1] = 0xFF & reg_addr; |
| pmallick | 1:8792acb5a039 | 135 | buf[2] = reg_data; |
| pmallick | 1:8792acb5a039 | 136 | |
| pmallick | 1:8792acb5a039 | 137 | ret = spi_write_and_read(dev->spi_desc, buf, 3); |
| pmallick | 1:8792acb5a039 | 138 | |
| pmallick | 1:8792acb5a039 | 139 | #if defined (ENABLE_SPI_ENGINE) |
| pmallick | 1:8792acb5a039 | 140 | ret = spi_engine_set_transfer_width(dev->spi_desc, |
| pmallick | 1:8792acb5a039 | 141 | dev->capture_data_width); |
| pmallick | 1:8792acb5a039 | 142 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 143 | return ret; |
| pmallick | 1:8792acb5a039 | 144 | |
| pmallick | 1:8792acb5a039 | 145 | spi_engine_set_speed(dev->spi_desc, dev->spi_desc->max_speed_hz); |
| pmallick | 1:8792acb5a039 | 146 | #endif |
| pmallick | 1:8792acb5a039 | 147 | |
| pmallick | 1:8792acb5a039 | 148 | return ret; |
| pmallick | 1:8792acb5a039 | 149 | } |
| pmallick | 1:8792acb5a039 | 150 | |
| pmallick | 1:8792acb5a039 | 151 | /** |
| pmallick | 1:8792acb5a039 | 152 | * SPI read from device using a mask. |
| pmallick | 1:8792acb5a039 | 153 | * @param dev - The device structure. |
| pmallick | 1:8792acb5a039 | 154 | * @param reg_addr - The register address. |
| pmallick | 1:8792acb5a039 | 155 | * @param mask - The mask. |
| pmallick | 1:8792acb5a039 | 156 | * @param data - The register data. |
| pmallick | 1:8792acb5a039 | 157 | * @return SUCCESS in case of success, negative error code otherwise. |
| pmallick | 1:8792acb5a039 | 158 | */ |
| pmallick | 1:8792acb5a039 | 159 | int32_t ad469x_spi_read_mask(struct ad469x_dev *dev, |
| pmallick | 1:8792acb5a039 | 160 | uint16_t reg_addr, |
| pmallick | 1:8792acb5a039 | 161 | uint8_t mask, |
| pmallick | 1:8792acb5a039 | 162 | uint8_t *data) |
| pmallick | 1:8792acb5a039 | 163 | { |
| pmallick | 1:8792acb5a039 | 164 | uint8_t reg_data[3]; |
| pmallick | 1:8792acb5a039 | 165 | int32_t ret; |
| pmallick | 1:8792acb5a039 | 166 | |
| pmallick | 1:8792acb5a039 | 167 | ret = ad469x_spi_reg_read(dev, reg_addr, reg_data); |
| pmallick | 1:8792acb5a039 | 168 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 169 | return ret; |
| pmallick | 1:8792acb5a039 | 170 | |
| pmallick | 1:8792acb5a039 | 171 | *data = (reg_data[0] & mask); |
| pmallick | 1:8792acb5a039 | 172 | |
| pmallick | 1:8792acb5a039 | 173 | return ret; |
| pmallick | 1:8792acb5a039 | 174 | } |
| pmallick | 1:8792acb5a039 | 175 | |
| pmallick | 1:8792acb5a039 | 176 | /** |
| pmallick | 1:8792acb5a039 | 177 | * SPI write to device using a mask. |
| pmallick | 1:8792acb5a039 | 178 | * @param dev - The device structure. |
| pmallick | 1:8792acb5a039 | 179 | * @param reg_addr - The register address. |
| pmallick | 1:8792acb5a039 | 180 | * @param mask - The mask. |
| pmallick | 1:8792acb5a039 | 181 | * @param data - The register data. |
| pmallick | 1:8792acb5a039 | 182 | * @return SUCCESS in case of success, negative error code otherwise. |
| pmallick | 1:8792acb5a039 | 183 | */ |
| pmallick | 1:8792acb5a039 | 184 | int32_t ad469x_spi_write_mask(struct ad469x_dev *dev, |
| pmallick | 1:8792acb5a039 | 185 | uint16_t reg_addr, |
| pmallick | 1:8792acb5a039 | 186 | uint8_t mask, |
| pmallick | 1:8792acb5a039 | 187 | uint8_t data) |
| pmallick | 1:8792acb5a039 | 188 | { |
| pmallick | 1:8792acb5a039 | 189 | uint8_t reg_data; |
| pmallick | 1:8792acb5a039 | 190 | int32_t ret; |
| pmallick | 1:8792acb5a039 | 191 | |
| pmallick | 1:8792acb5a039 | 192 | ret = ad469x_spi_reg_read(dev, reg_addr, ®_data); |
| pmallick | 1:8792acb5a039 | 193 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 194 | return ret; |
| pmallick | 1:8792acb5a039 | 195 | |
| pmallick | 1:8792acb5a039 | 196 | reg_data &= ~mask; |
| pmallick | 1:8792acb5a039 | 197 | reg_data |= data; |
| pmallick | 1:8792acb5a039 | 198 | |
| pmallick | 1:8792acb5a039 | 199 | return ad469x_spi_reg_write(dev, reg_addr, reg_data); |
| pmallick | 1:8792acb5a039 | 200 | } |
| pmallick | 1:8792acb5a039 | 201 | |
| pmallick | 1:8792acb5a039 | 202 | /** |
| pmallick | 1:8792acb5a039 | 203 | * @brief Configure register access mode |
| pmallick | 1:8792acb5a039 | 204 | * @param [in] dev - ad469x_dev device handler. |
| pmallick | 1:8792acb5a039 | 205 | * @param [in] access - Access mode |
| pmallick | 1:8792acb5a039 | 206 | * @return \ref SUCCESS in case of success, \ref FAILURE otherwise. |
| pmallick | 1:8792acb5a039 | 207 | */ |
| pmallick | 1:8792acb5a039 | 208 | int32_t ad469x_set_reg_access_mode(struct ad469x_dev *dev, |
| pmallick | 1:8792acb5a039 | 209 | enum ad469x_reg_access access) |
| pmallick | 1:8792acb5a039 | 210 | { |
| pmallick | 1:8792acb5a039 | 211 | return ad469x_spi_write_mask(dev, |
| pmallick | 1:8792acb5a039 | 212 | AD469x_REG_IF_CONFIG_C, |
| pmallick | 1:8792acb5a039 | 213 | AD469x_REG_IF_CONFIG_C_MB_STRICT_MASK, |
| pmallick | 1:8792acb5a039 | 214 | AD469x_REG_IF_CONFIG_C_MB_STRICT(access)); |
| pmallick | 1:8792acb5a039 | 215 | } |
| pmallick | 1:8792acb5a039 | 216 | |
| pmallick | 1:8792acb5a039 | 217 | /** |
| pmallick | 1:8792acb5a039 | 218 | * @brief Initialize GPIO driver handlers for the GPIOs in the system. |
| pmallick | 1:8792acb5a039 | 219 | * ad469x_init() helper function. |
| pmallick | 1:8792acb5a039 | 220 | * @param [out] dev - ad469x_dev device handler. |
| pmallick | 1:8792acb5a039 | 221 | * @param [in] init_param - Pointer to the initialization structure. |
| pmallick | 1:8792acb5a039 | 222 | * @return \ref SUCCESS in case of success, \ref FAILURE otherwise. |
| pmallick | 1:8792acb5a039 | 223 | */ |
| pmallick | 1:8792acb5a039 | 224 | static int32_t ad469x_init_gpio(struct ad469x_dev *dev, |
| pmallick | 1:8792acb5a039 | 225 | struct ad469x_init_param *init_param) |
| pmallick | 1:8792acb5a039 | 226 | { |
| pmallick | 1:8792acb5a039 | 227 | int32_t ret; |
| pmallick | 1:8792acb5a039 | 228 | |
| pmallick | 1:8792acb5a039 | 229 | do |
| pmallick | 1:8792acb5a039 | 230 | { |
| pmallick | 1:8792acb5a039 | 231 | ret = gpio_get_optional(&dev->gpio_resetn, init_param->gpio_resetn); |
| pmallick | 1:8792acb5a039 | 232 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 233 | break; |
| pmallick | 1:8792acb5a039 | 234 | |
| pmallick | 1:8792acb5a039 | 235 | /** Reset to configure pins */ |
| pmallick | 1:8792acb5a039 | 236 | if (init_param->gpio_resetn) { |
| pmallick | 1:8792acb5a039 | 237 | ret = gpio_direction_output(dev->gpio_resetn, GPIO_LOW); |
| pmallick | 1:8792acb5a039 | 238 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 239 | break; |
| pmallick | 1:8792acb5a039 | 240 | |
| pmallick | 1:8792acb5a039 | 241 | mdelay(100); |
| pmallick | 1:8792acb5a039 | 242 | ret = gpio_set_value(dev->gpio_resetn, GPIO_HIGH); |
| pmallick | 1:8792acb5a039 | 243 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 244 | break; |
| pmallick | 1:8792acb5a039 | 245 | |
| pmallick | 1:8792acb5a039 | 246 | mdelay(100); |
| pmallick | 1:8792acb5a039 | 247 | } |
| pmallick | 1:8792acb5a039 | 248 | |
| pmallick | 1:8792acb5a039 | 249 | /** Initialize the BUSY GPIO descriptor **/ |
| pmallick | 1:8792acb5a039 | 250 | ret = gpio_get_optional(&dev->gpio_busy, init_param->gpio_busy); |
| pmallick | 1:8792acb5a039 | 251 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 252 | break; |
| pmallick | 1:8792acb5a039 | 253 | |
| pmallick | 1:8792acb5a039 | 254 | if (init_param->gpio_busy) { |
| pmallick | 1:8792acb5a039 | 255 | if (gpio_direction_input(dev->gpio_busy) != SUCCESS) |
| pmallick | 1:8792acb5a039 | 256 | break; |
| pmallick | 1:8792acb5a039 | 257 | } |
| pmallick | 1:8792acb5a039 | 258 | |
| pmallick | 1:8792acb5a039 | 259 | return SUCCESS; |
| pmallick | 1:8792acb5a039 | 260 | } while (0); |
| pmallick | 1:8792acb5a039 | 261 | |
| pmallick | 1:8792acb5a039 | 262 | return FAILURE; |
| pmallick | 1:8792acb5a039 | 263 | } |
| pmallick | 1:8792acb5a039 | 264 | |
| pmallick | 1:8792acb5a039 | 265 | /** |
| pmallick | 1:8792acb5a039 | 266 | * @brief Configure over sampling ratio in advanced sequencer mode |
| pmallick | 1:8792acb5a039 | 267 | * @param [in] dev - ad469x_dev device handler. |
| pmallick | 1:8792acb5a039 | 268 | * @param [in] ch - Channel to configure. |
| pmallick | 1:8792acb5a039 | 269 | * @param [in] ratio - OSR ratio. |
| pmallick | 1:8792acb5a039 | 270 | * @return \ref SUCCESS in case of success, \ref FAILURE otherwise. |
| pmallick | 1:8792acb5a039 | 271 | */ |
| pmallick | 1:8792acb5a039 | 272 | int32_t ad469x_adv_seq_osr(struct ad469x_dev *dev, |
| pmallick | 1:8792acb5a039 | 273 | uint16_t ch, |
| pmallick | 1:8792acb5a039 | 274 | enum ad469x_osr_ratios ratio) |
| pmallick | 1:8792acb5a039 | 275 | { |
| pmallick | 1:8792acb5a039 | 276 | int32_t ret; |
| pmallick | 1:8792acb5a039 | 277 | |
| pmallick | 1:8792acb5a039 | 278 | if (dev->ch_sequence == AD469x_single_cycle || |
| pmallick | 1:8792acb5a039 | 279 | dev->ch_sequence == AD469x_two_cycle) |
| pmallick | 1:8792acb5a039 | 280 | return FAILURE; |
| pmallick | 1:8792acb5a039 | 281 | |
| pmallick | 1:8792acb5a039 | 282 | if (ch >= AD469x_CHANNEL_NO) |
| pmallick | 1:8792acb5a039 | 283 | return FAILURE; |
| pmallick | 1:8792acb5a039 | 284 | |
| pmallick | 1:8792acb5a039 | 285 | ret = ad469x_spi_write_mask(dev, |
| pmallick | 1:8792acb5a039 | 286 | AD469x_REG_CONFIG_IN(ch), |
| pmallick | 1:8792acb5a039 | 287 | AD469x_REG_CONFIG_IN_OSR_MASK, |
| pmallick | 1:8792acb5a039 | 288 | AD469x_REG_CONFIG_IN_OSR(ratio)); |
| pmallick | 1:8792acb5a039 | 289 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 290 | return ret; |
| pmallick | 1:8792acb5a039 | 291 | |
| pmallick | 1:8792acb5a039 | 292 | dev->adv_seq_osr_resol[ch] = ad469x_device_resol[ratio]; |
| pmallick | 1:8792acb5a039 | 293 | /* Set storage to maximum data width */ |
| pmallick | 1:8792acb5a039 | 294 | dev->capture_data_width = ad469x_device_resol[AD469x_OSR_64]; |
| pmallick | 1:8792acb5a039 | 295 | |
| pmallick | 1:8792acb5a039 | 296 | return SUCCESS; |
| pmallick | 1:8792acb5a039 | 297 | } |
| pmallick | 1:8792acb5a039 | 298 | |
| pmallick | 1:8792acb5a039 | 299 | /** |
| pmallick | 1:8792acb5a039 | 300 | * @brief Configure over sampling ratio to 1 in single and two cycle modes. |
| pmallick | 1:8792acb5a039 | 301 | * @param [in] dev - ad469x_dev device handler. |
| pmallick | 1:8792acb5a039 | 302 | * @return \ref SUCCESS in case of success, \ref FAILURE otherwise. |
| pmallick | 1:8792acb5a039 | 303 | */ |
| pmallick | 1:8792acb5a039 | 304 | static int32_t ad469x_seq_osr_clear(struct ad469x_dev *dev) |
| pmallick | 1:8792acb5a039 | 305 | { |
| pmallick | 1:8792acb5a039 | 306 | int32_t ret; |
| pmallick | 1:8792acb5a039 | 307 | uint8_t i = 0; |
| pmallick | 1:8792acb5a039 | 308 | |
| pmallick | 1:8792acb5a039 | 309 | for (i = 0; i < AD469x_CHANNEL_NO; i++) { |
| pmallick | 1:8792acb5a039 | 310 | ret = ad469x_spi_write_mask(dev, |
| pmallick | 1:8792acb5a039 | 311 | AD469x_REG_CONFIG_IN(i), |
| pmallick | 1:8792acb5a039 | 312 | AD469x_REG_CONFIG_IN_OSR_MASK, |
| pmallick | 1:8792acb5a039 | 313 | AD469x_REG_CONFIG_IN_OSR(AD469x_OSR_1)); |
| pmallick | 1:8792acb5a039 | 314 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 315 | return ret; |
| pmallick | 1:8792acb5a039 | 316 | dev->adv_seq_osr_resol[i] = ad469x_device_resol[AD469x_OSR_1]; |
| pmallick | 1:8792acb5a039 | 317 | } |
| pmallick | 1:8792acb5a039 | 318 | /* Set storage to minimum data width */ |
| pmallick | 1:8792acb5a039 | 319 | dev->capture_data_width = ad469x_device_resol[AD469x_OSR_1]; |
| pmallick | 1:8792acb5a039 | 320 | |
| pmallick | 1:8792acb5a039 | 321 | return SUCCESS; |
| pmallick | 1:8792acb5a039 | 322 | } |
| pmallick | 1:8792acb5a039 | 323 | |
| pmallick | 1:8792acb5a039 | 324 | /** |
| pmallick | 1:8792acb5a039 | 325 | * @brief Configure over sampling ratio in standard sequencer mode |
| pmallick | 1:8792acb5a039 | 326 | * @param [in] dev - ad469x_dev device handler. |
| pmallick | 1:8792acb5a039 | 327 | * @param [in] ratio - OSR ratio. |
| pmallick | 1:8792acb5a039 | 328 | * @return \ref SUCCESS in case of success, \ref FAILURE otherwise. |
| pmallick | 1:8792acb5a039 | 329 | */ |
| pmallick | 1:8792acb5a039 | 330 | int32_t ad469x_std_seq_osr(struct ad469x_dev *dev, enum ad469x_osr_ratios ratio) |
| pmallick | 1:8792acb5a039 | 331 | { |
| pmallick | 1:8792acb5a039 | 332 | int ret; |
| pmallick | 1:8792acb5a039 | 333 | |
| pmallick | 1:8792acb5a039 | 334 | if (dev->ch_sequence == AD469x_single_cycle || |
| pmallick | 1:8792acb5a039 | 335 | dev->ch_sequence == AD469x_two_cycle) |
| pmallick | 1:8792acb5a039 | 336 | return FAILURE; |
| pmallick | 1:8792acb5a039 | 337 | |
| pmallick | 1:8792acb5a039 | 338 | ret = ad469x_spi_write_mask(dev, |
| pmallick | 1:8792acb5a039 | 339 | AD469x_REG_CONFIG_IN(0), |
| pmallick | 1:8792acb5a039 | 340 | AD469x_REG_CONFIG_IN_OSR_MASK, |
| pmallick | 1:8792acb5a039 | 341 | AD469x_REG_CONFIG_IN_OSR(ratio)); |
| pmallick | 1:8792acb5a039 | 342 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 343 | return ret; |
| pmallick | 1:8792acb5a039 | 344 | |
| pmallick | 1:8792acb5a039 | 345 | dev->capture_data_width = ad469x_device_resol[ratio]; |
| pmallick | 1:8792acb5a039 | 346 | |
| pmallick | 1:8792acb5a039 | 347 | return ret; |
| pmallick | 1:8792acb5a039 | 348 | } |
| pmallick | 1:8792acb5a039 | 349 | |
| pmallick | 1:8792acb5a039 | 350 | /** |
| pmallick | 1:8792acb5a039 | 351 | * @brief Set channel sequence. |
| pmallick | 1:8792acb5a039 | 352 | * @param [in] dev - ad469x_dev device handler. |
| pmallick | 1:8792acb5a039 | 353 | * @param [in] seq - Channel sequence. |
| pmallick | 1:8792acb5a039 | 354 | * @return \ref SUCCESS in case of success, \ref FAILURE otherwise. |
| pmallick | 1:8792acb5a039 | 355 | */ |
| pmallick | 1:8792acb5a039 | 356 | int32_t ad469x_set_channel_sequence(struct ad469x_dev *dev, |
| pmallick | 1:8792acb5a039 | 357 | enum ad469x_channel_sequencing seq) |
| pmallick | 1:8792acb5a039 | 358 | { |
| pmallick | 1:8792acb5a039 | 359 | int32_t ret; |
| pmallick | 1:8792acb5a039 | 360 | |
| pmallick | 1:8792acb5a039 | 361 | switch (seq) { |
| pmallick | 1:8792acb5a039 | 362 | case AD469x_single_cycle: |
| pmallick | 1:8792acb5a039 | 363 | ret = ad469x_spi_write_mask(dev, |
| pmallick | 1:8792acb5a039 | 364 | AD469x_REG_SEQ_CTRL, |
| pmallick | 1:8792acb5a039 | 365 | AD469x_SEQ_CTRL_STD_SEQ_EN_MASK, |
| pmallick | 1:8792acb5a039 | 366 | AD469x_SEQ_CTRL_STD_SEQ_EN(0)); |
| pmallick | 1:8792acb5a039 | 367 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 368 | return ret; |
| pmallick | 1:8792acb5a039 | 369 | |
| pmallick | 1:8792acb5a039 | 370 | ret = ad469x_spi_write_mask(dev, |
| pmallick | 1:8792acb5a039 | 371 | AD469x_REG_SEQ_CTRL, |
| pmallick | 1:8792acb5a039 | 372 | AD469x_SEQ_CTRL_NUM_SLOTS_AS_MASK, |
| pmallick | 1:8792acb5a039 | 373 | AD469x_SEQ_CTRL_NUM_SLOTS_AS(0)); |
| pmallick | 1:8792acb5a039 | 374 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 375 | return ret; |
| pmallick | 1:8792acb5a039 | 376 | |
| pmallick | 1:8792acb5a039 | 377 | ret = ad469x_spi_write_mask(dev, |
| pmallick | 1:8792acb5a039 | 378 | AD469x_REG_SETUP, |
| pmallick | 1:8792acb5a039 | 379 | AD469x_SETUP_CYC_CTRL_MASK, |
| pmallick | 1:8792acb5a039 | 380 | AD469x_SETUP_CYC_CTRL_SINGLE(0)); |
| pmallick | 1:8792acb5a039 | 381 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 382 | return ret; |
| pmallick | 1:8792acb5a039 | 383 | |
| pmallick | 1:8792acb5a039 | 384 | ret = ad469x_seq_osr_clear(dev); |
| pmallick | 1:8792acb5a039 | 385 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 386 | return ret; |
| pmallick | 1:8792acb5a039 | 387 | |
| pmallick | 1:8792acb5a039 | 388 | break; |
| pmallick | 1:8792acb5a039 | 389 | |
| pmallick | 1:8792acb5a039 | 390 | case AD469x_two_cycle: |
| pmallick | 1:8792acb5a039 | 391 | ret = ad469x_spi_write_mask(dev, |
| pmallick | 1:8792acb5a039 | 392 | AD469x_REG_SEQ_CTRL, |
| pmallick | 1:8792acb5a039 | 393 | AD469x_SEQ_CTRL_STD_SEQ_EN_MASK, |
| pmallick | 1:8792acb5a039 | 394 | AD469x_SEQ_CTRL_STD_SEQ_EN(0)); |
| pmallick | 1:8792acb5a039 | 395 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 396 | return ret; |
| pmallick | 1:8792acb5a039 | 397 | |
| pmallick | 1:8792acb5a039 | 398 | ret = ad469x_spi_write_mask(dev, |
| pmallick | 1:8792acb5a039 | 399 | AD469x_REG_SEQ_CTRL, |
| pmallick | 1:8792acb5a039 | 400 | AD469x_SEQ_CTRL_NUM_SLOTS_AS_MASK, |
| pmallick | 1:8792acb5a039 | 401 | AD469x_SEQ_CTRL_NUM_SLOTS_AS(0)); |
| pmallick | 1:8792acb5a039 | 402 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 403 | return ret; |
| pmallick | 1:8792acb5a039 | 404 | |
| pmallick | 1:8792acb5a039 | 405 | ret = ad469x_spi_write_mask(dev, |
| pmallick | 1:8792acb5a039 | 406 | AD469x_REG_SETUP, |
| pmallick | 1:8792acb5a039 | 407 | AD469x_SETUP_CYC_CTRL_MASK, |
| pmallick | 1:8792acb5a039 | 408 | AD469x_SETUP_CYC_CTRL_SINGLE(1)); |
| pmallick | 1:8792acb5a039 | 409 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 410 | return ret; |
| pmallick | 1:8792acb5a039 | 411 | |
| pmallick | 1:8792acb5a039 | 412 | ret = ad469x_seq_osr_clear(dev); |
| pmallick | 1:8792acb5a039 | 413 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 414 | return ret; |
| pmallick | 1:8792acb5a039 | 415 | |
| pmallick | 1:8792acb5a039 | 416 | break; |
| pmallick | 1:8792acb5a039 | 417 | |
| pmallick | 1:8792acb5a039 | 418 | case AD469x_standard_seq: |
| pmallick | 1:8792acb5a039 | 419 | ret = ad469x_spi_write_mask(dev, |
| pmallick | 1:8792acb5a039 | 420 | AD469x_REG_SEQ_CTRL, |
| pmallick | 1:8792acb5a039 | 421 | AD469x_SEQ_CTRL_STD_SEQ_EN_MASK, |
| pmallick | 1:8792acb5a039 | 422 | AD469x_SEQ_CTRL_STD_SEQ_EN(1)); |
| pmallick | 1:8792acb5a039 | 423 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 424 | return ret; |
| pmallick | 1:8792acb5a039 | 425 | |
| pmallick | 1:8792acb5a039 | 426 | break; |
| pmallick | 1:8792acb5a039 | 427 | |
| pmallick | 1:8792acb5a039 | 428 | case AD469x_advanced_seq: |
| pmallick | 1:8792acb5a039 | 429 | ret = ad469x_spi_write_mask(dev, |
| pmallick | 1:8792acb5a039 | 430 | AD469x_REG_SEQ_CTRL, |
| pmallick | 1:8792acb5a039 | 431 | AD469x_SEQ_CTRL_STD_SEQ_EN_MASK, |
| pmallick | 1:8792acb5a039 | 432 | AD469x_SEQ_CTRL_STD_SEQ_EN(0)); |
| pmallick | 1:8792acb5a039 | 433 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 434 | return ret; |
| pmallick | 1:8792acb5a039 | 435 | |
| pmallick | 1:8792acb5a039 | 436 | break; |
| pmallick | 1:8792acb5a039 | 437 | |
| pmallick | 1:8792acb5a039 | 438 | default: |
| pmallick | 1:8792acb5a039 | 439 | return FAILURE; |
| pmallick | 1:8792acb5a039 | 440 | break; |
| pmallick | 1:8792acb5a039 | 441 | } |
| pmallick | 1:8792acb5a039 | 442 | |
| pmallick | 1:8792acb5a039 | 443 | dev->ch_sequence = seq; |
| pmallick | 1:8792acb5a039 | 444 | |
| pmallick | 1:8792acb5a039 | 445 | return ret; |
| pmallick | 1:8792acb5a039 | 446 | } |
| pmallick | 1:8792acb5a039 | 447 | |
| pmallick | 1:8792acb5a039 | 448 | /** |
| pmallick | 1:8792acb5a039 | 449 | * @brief Configure advanced sequencer number of slots, temp channel not |
| pmallick | 1:8792acb5a039 | 450 | * included |
| pmallick | 1:8792acb5a039 | 451 | * @param [in] dev - ad469x_dev device handler. |
| pmallick | 1:8792acb5a039 | 452 | * @param [in] num_slots - Number of slots, max value = 0x7f |
| pmallick | 1:8792acb5a039 | 453 | * @return \ref SUCCESS in case of success, \ref FAILURE otherwise. |
| pmallick | 1:8792acb5a039 | 454 | */ |
| pmallick | 1:8792acb5a039 | 455 | int32_t ad469x_adv_sequence_set_num_slots(struct ad469x_dev *dev, |
| pmallick | 1:8792acb5a039 | 456 | uint8_t num_slots) |
| pmallick | 1:8792acb5a039 | 457 | { |
| pmallick | 1:8792acb5a039 | 458 | int32_t ret; |
| pmallick | 1:8792acb5a039 | 459 | uint8_t write_num_slots = 0; |
| pmallick | 1:8792acb5a039 | 460 | |
| pmallick | 1:8792acb5a039 | 461 | if (num_slots) |
| pmallick | 1:8792acb5a039 | 462 | write_num_slots = num_slots - 1; |
| pmallick | 1:8792acb5a039 | 463 | |
| pmallick | 1:8792acb5a039 | 464 | ret = ad469x_spi_write_mask(dev, |
| pmallick | 1:8792acb5a039 | 465 | AD469x_REG_SEQ_CTRL, |
| pmallick | 1:8792acb5a039 | 466 | AD469x_SEQ_CTRL_NUM_SLOTS_AS_MASK, |
| pmallick | 1:8792acb5a039 | 467 | AD469x_SEQ_CTRL_NUM_SLOTS_AS(write_num_slots)); |
| pmallick | 1:8792acb5a039 | 468 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 469 | return ret; |
| pmallick | 1:8792acb5a039 | 470 | |
| pmallick | 1:8792acb5a039 | 471 | dev->num_slots = num_slots; |
| pmallick | 1:8792acb5a039 | 472 | |
| pmallick | 1:8792acb5a039 | 473 | return SUCCESS; |
| pmallick | 1:8792acb5a039 | 474 | } |
| pmallick | 1:8792acb5a039 | 475 | |
| pmallick | 1:8792acb5a039 | 476 | /** |
| pmallick | 1:8792acb5a039 | 477 | * @brief Advanced sequencer, assign channel to a slot |
| pmallick | 1:8792acb5a039 | 478 | * @param [in] dev - ad469x_dev device handler. |
| pmallick | 1:8792acb5a039 | 479 | * @param [in] slot - Slot number [0x00, 0x7f] |
| pmallick | 1:8792acb5a039 | 480 | * @param [in] channel - Assigned channel [0x00, 0x0f]. |
| pmallick | 1:8792acb5a039 | 481 | * @return \ref SUCCESS in case of success, \ref FAILURE otherwise. |
| pmallick | 1:8792acb5a039 | 482 | */ |
| pmallick | 1:8792acb5a039 | 483 | int32_t ad469x_adv_sequence_set_slot(struct ad469x_dev *dev, |
| pmallick | 1:8792acb5a039 | 484 | uint8_t slot, |
| pmallick | 1:8792acb5a039 | 485 | uint8_t channel) |
| pmallick | 1:8792acb5a039 | 486 | { |
| pmallick | 1:8792acb5a039 | 487 | int32_t ret; |
| pmallick | 1:8792acb5a039 | 488 | ret = ad469x_spi_reg_write(dev, |
| pmallick | 1:8792acb5a039 | 489 | AD469x_REG_AS_SLOT(slot), |
| pmallick | 1:8792acb5a039 | 490 | AD469x_REG_AS_SLOT_INX(channel)); |
| pmallick | 1:8792acb5a039 | 491 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 492 | return ret; |
| pmallick | 1:8792acb5a039 | 493 | |
| pmallick | 1:8792acb5a039 | 494 | dev->ch_slots[slot] = channel; |
| pmallick | 1:8792acb5a039 | 495 | |
| pmallick | 1:8792acb5a039 | 496 | return SUCCESS; |
| pmallick | 1:8792acb5a039 | 497 | } |
| pmallick | 1:8792acb5a039 | 498 | |
| pmallick | 1:8792acb5a039 | 499 | /** |
| pmallick | 1:8792acb5a039 | 500 | * @brief Configure standard sequencer channels |
| pmallick | 1:8792acb5a039 | 501 | * @param [in] dev - ad469x_dev device handler. |
| pmallick | 1:8792acb5a039 | 502 | * @param [in] ch_mask - Extra channels to activate. |
| pmallick | 1:8792acb5a039 | 503 | * @return \ref SUCCESS in case of success, \ref FAILURE otherwise. |
| pmallick | 1:8792acb5a039 | 504 | */ |
| pmallick | 1:8792acb5a039 | 505 | int32_t ad469x_std_sequence_ch(struct ad469x_dev *dev, uint32_t ch_mask) |
| pmallick | 1:8792acb5a039 | 506 | { |
| pmallick | 1:8792acb5a039 | 507 | int32_t ret; |
| pmallick | 1:8792acb5a039 | 508 | |
| pmallick | 1:8792acb5a039 | 509 | ret = ad469x_spi_reg_write(dev, |
| pmallick | 1:8792acb5a039 | 510 | AD469x_REG_STD_SEQ_CONFIG, |
| pmallick | 1:8792acb5a039 | 511 | 0xff & ch_mask); |
| pmallick | 1:8792acb5a039 | 512 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 513 | return ret; |
| pmallick | 1:8792acb5a039 | 514 | |
| pmallick | 1:8792acb5a039 | 515 | ret = ad469x_spi_reg_write(dev, |
| pmallick | 1:8792acb5a039 | 516 | AD469x_REG_STD_SEQ_CONFIG + 1, |
| pmallick | 1:8792acb5a039 | 517 | ch_mask >> 8); |
| pmallick | 1:8792acb5a039 | 518 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 519 | return ret; |
| pmallick | 1:8792acb5a039 | 520 | |
| pmallick | 1:8792acb5a039 | 521 | dev->num_slots = hweight8(ch_mask); |
| pmallick | 1:8792acb5a039 | 522 | |
| pmallick | 1:8792acb5a039 | 523 | return ret; |
| pmallick | 1:8792acb5a039 | 524 | } |
| pmallick | 1:8792acb5a039 | 525 | |
| pmallick | 1:8792acb5a039 | 526 | /** |
| pmallick | 1:8792acb5a039 | 527 | * @brief Enable temperature read at the end of the sequence, for standard and |
| pmallick | 1:8792acb5a039 | 528 | * advanced sequencer |
| pmallick | 1:8792acb5a039 | 529 | * @param [in] dev - ad469x_dev device handler. |
| pmallick | 1:8792acb5a039 | 530 | * @return \ref SUCCESS in case of success, \ref FAILURE otherwise. |
| pmallick | 1:8792acb5a039 | 531 | */ |
| pmallick | 1:8792acb5a039 | 532 | int32_t ad469x_sequence_enable_temp(struct ad469x_dev *dev) |
| pmallick | 1:8792acb5a039 | 533 | { |
| pmallick | 1:8792acb5a039 | 534 | int32_t ret; |
| pmallick | 1:8792acb5a039 | 535 | |
| pmallick | 1:8792acb5a039 | 536 | ret = ad469x_spi_write_mask(dev, |
| pmallick | 1:8792acb5a039 | 537 | AD469x_REG_TEMP_CTRL, |
| pmallick | 1:8792acb5a039 | 538 | AD469x_REG_TEMP_CTRL_TEMP_EN_MASK, |
| pmallick | 1:8792acb5a039 | 539 | AD469x_REG_TEMP_CTRL_TEMP_EN(1)); |
| pmallick | 1:8792acb5a039 | 540 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 541 | return ret; |
| pmallick | 1:8792acb5a039 | 542 | |
| pmallick | 1:8792acb5a039 | 543 | dev->temp_enabled = true; |
| pmallick | 1:8792acb5a039 | 544 | |
| pmallick | 1:8792acb5a039 | 545 | return ret; |
| pmallick | 1:8792acb5a039 | 546 | } |
| pmallick | 1:8792acb5a039 | 547 | |
| pmallick | 1:8792acb5a039 | 548 | /** |
| pmallick | 1:8792acb5a039 | 549 | * @brief Disable temperature read at the end of the sequence, for standard and |
| pmallick | 1:8792acb5a039 | 550 | * advanced sequencer |
| pmallick | 1:8792acb5a039 | 551 | * @param [in] dev - ad469x_dev device handler. |
| pmallick | 1:8792acb5a039 | 552 | * @return \ref SUCCESS in case of success, \ref FAILURE otherwise. |
| pmallick | 1:8792acb5a039 | 553 | */ |
| pmallick | 1:8792acb5a039 | 554 | int32_t ad469x_sequence_disable_temp(struct ad469x_dev *dev) |
| pmallick | 1:8792acb5a039 | 555 | { |
| pmallick | 1:8792acb5a039 | 556 | int32_t ret; |
| pmallick | 1:8792acb5a039 | 557 | |
| pmallick | 1:8792acb5a039 | 558 | ret = ad469x_spi_write_mask(dev, |
| pmallick | 1:8792acb5a039 | 559 | AD469x_REG_TEMP_CTRL, |
| pmallick | 1:8792acb5a039 | 560 | AD469x_REG_TEMP_CTRL_TEMP_EN_MASK, |
| pmallick | 1:8792acb5a039 | 561 | AD469x_REG_TEMP_CTRL_TEMP_EN(0)); |
| pmallick | 1:8792acb5a039 | 562 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 563 | return ret; |
| pmallick | 1:8792acb5a039 | 564 | |
| pmallick | 1:8792acb5a039 | 565 | dev->temp_enabled = false; |
| pmallick | 1:8792acb5a039 | 566 | |
| pmallick | 1:8792acb5a039 | 567 | return ret; |
| pmallick | 1:8792acb5a039 | 568 | } |
| pmallick | 1:8792acb5a039 | 569 | |
| pmallick | 1:8792acb5a039 | 570 | /** |
| pmallick | 1:8792acb5a039 | 571 | * @brief Configure converter busy indicator to the output of the specified port |
| pmallick | 1:8792acb5a039 | 572 | * @param [in] dev - ad469x_dev device handler. |
| pmallick | 1:8792acb5a039 | 573 | * @param [in] gp_sel - Port. |
| pmallick | 1:8792acb5a039 | 574 | * @return \ref SUCCESS in case of success, \ref FAILURE otherwise. |
| pmallick | 1:8792acb5a039 | 575 | */ |
| pmallick | 1:8792acb5a039 | 576 | int32_t ad469x_set_busy(struct ad469x_dev *dev, |
| pmallick | 1:8792acb5a039 | 577 | enum ad469x_busy_gp_sel gp_sel) |
| pmallick | 1:8792acb5a039 | 578 | { |
| pmallick | 1:8792acb5a039 | 579 | int32_t ret; |
| pmallick | 1:8792acb5a039 | 580 | |
| pmallick | 1:8792acb5a039 | 581 | ret = ad469x_spi_write_mask(dev, |
| pmallick | 1:8792acb5a039 | 582 | AD469x_REG_GP_MODE, |
| pmallick | 1:8792acb5a039 | 583 | AD469x_GP_MODE_BUSY_GP_EN_MASK, |
| pmallick | 1:8792acb5a039 | 584 | AD469x_GP_MODE_BUSY_GP_EN(1)); |
| pmallick | 1:8792acb5a039 | 585 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 586 | return ret; |
| pmallick | 1:8792acb5a039 | 587 | |
| pmallick | 1:8792acb5a039 | 588 | |
| pmallick | 1:8792acb5a039 | 589 | ret = ad469x_spi_write_mask(dev, |
| pmallick | 1:8792acb5a039 | 590 | AD469x_REG_GP_MODE, |
| pmallick | 1:8792acb5a039 | 591 | AD469x_GP_MODE_BUSY_GP_SEL_MASK, |
| pmallick | 1:8792acb5a039 | 592 | AD469x_GP_MODE_BUSY_GP_SEL(gp_sel)); |
| pmallick | 1:8792acb5a039 | 593 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 594 | return ret; |
| pmallick | 1:8792acb5a039 | 595 | |
| pmallick | 1:8792acb5a039 | 596 | |
| pmallick | 1:8792acb5a039 | 597 | return ret; |
| pmallick | 1:8792acb5a039 | 598 | } |
| pmallick | 1:8792acb5a039 | 599 | |
| pmallick | 1:8792acb5a039 | 600 | /** |
| pmallick | 1:8792acb5a039 | 601 | * @brief Enter conversion mode. |
| pmallick | 1:8792acb5a039 | 602 | * To exit conversion mode send a 5 bit conversion mode command |
| pmallick | 1:8792acb5a039 | 603 | * AD469x_CMD_REG_CONFIG_MODE |
| pmallick | 1:8792acb5a039 | 604 | * @param [in] dev - ad469x_dev device handler. |
| pmallick | 1:8792acb5a039 | 605 | * @return \ref SUCCESS in case of success, \ref FAILURE otherwise. |
| pmallick | 1:8792acb5a039 | 606 | */ |
| pmallick | 1:8792acb5a039 | 607 | int32_t ad469x_enter_conversion_mode(struct ad469x_dev *dev) |
| pmallick | 1:8792acb5a039 | 608 | { |
| pmallick | 1:8792acb5a039 | 609 | return ad469x_spi_write_mask(dev, |
| pmallick | 1:8792acb5a039 | 610 | AD469x_REG_SETUP, |
| pmallick | 1:8792acb5a039 | 611 | AD469x_SETUP_IF_MODE_MASK, |
| pmallick | 1:8792acb5a039 | 612 | AD469x_SETUP_IF_MODE_CONV); |
| pmallick | 1:8792acb5a039 | 613 | } |
| pmallick | 1:8792acb5a039 | 614 | |
| pmallick | 1:8792acb5a039 | 615 | /** |
| pmallick | 1:8792acb5a039 | 616 | * @brief Exit conversion mode. |
| pmallick | 1:8792acb5a039 | 617 | * Enter register mode to read/write registers |
| pmallick | 1:8792acb5a039 | 618 | * @param [in] dev - ad469x_dev device handler. |
| pmallick | 1:8792acb5a039 | 619 | * @return \ref SUCCESS in case of success, \ref FAILURE otherwise. |
| pmallick | 1:8792acb5a039 | 620 | */ |
| pmallick | 1:8792acb5a039 | 621 | int32_t ad469x_exit_conversion_mode(struct ad469x_dev *dev) |
| pmallick | 1:8792acb5a039 | 622 | { |
| pmallick | 1:8792acb5a039 | 623 | int32_t ret ; |
| pmallick | 1:8792acb5a039 | 624 | |
| pmallick | 1:8792acb5a039 | 625 | #if defined(ENABLE_SPI_ENGINE) |
| pmallick | 1:8792acb5a039 | 626 | uint32_t commands_data[1], buf; |
| pmallick | 1:8792acb5a039 | 627 | struct spi_engine_offload_message msg; |
| pmallick | 1:8792acb5a039 | 628 | uint32_t spi_eng_msg_cmds[3] = { |
| pmallick | 1:8792acb5a039 | 629 | CS_LOW, |
| pmallick | 1:8792acb5a039 | 630 | WRITE_READ(1), |
| pmallick | 1:8792acb5a039 | 631 | CS_HIGH |
| pmallick | 1:8792acb5a039 | 632 | }; |
| pmallick | 1:8792acb5a039 | 633 | |
| pmallick | 1:8792acb5a039 | 634 | pwm_enable(dev->trigger_pwm_desc); |
| pmallick | 1:8792acb5a039 | 635 | |
| pmallick | 1:8792acb5a039 | 636 | commands_data[0] = AD469x_CMD_REG_CONFIG_MODE << 8; |
| pmallick | 1:8792acb5a039 | 637 | |
| pmallick | 1:8792acb5a039 | 638 | ret = spi_engine_offload_init(dev->spi_desc, dev->offload_init_param); |
| pmallick | 1:8792acb5a039 | 639 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 640 | return ret; |
| pmallick | 1:8792acb5a039 | 641 | |
| pmallick | 1:8792acb5a039 | 642 | msg.commands = spi_eng_msg_cmds; |
| pmallick | 1:8792acb5a039 | 643 | msg.no_commands = ARRAY_SIZE(spi_eng_msg_cmds); |
| pmallick | 1:8792acb5a039 | 644 | msg.rx_addr = (uint32_t)&buf; |
| pmallick | 1:8792acb5a039 | 645 | msg.commands_data = commands_data; |
| pmallick | 1:8792acb5a039 | 646 | |
| pmallick | 1:8792acb5a039 | 647 | ret = spi_engine_offload_transfer(dev->spi_desc, msg, 1); |
| pmallick | 1:8792acb5a039 | 648 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 649 | return ret; |
| pmallick | 1:8792acb5a039 | 650 | |
| pmallick | 1:8792acb5a039 | 651 | pwm_disable(dev->trigger_pwm_desc); |
| pmallick | 1:8792acb5a039 | 652 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 653 | return ret; |
| pmallick | 1:8792acb5a039 | 654 | #else |
| pmallick | 1:8792acb5a039 | 655 | uint8_t cmd = AD469x_CMD_REG_CONFIG_MODE; |
| pmallick | 1:8792acb5a039 | 656 | |
| pmallick | 1:8792acb5a039 | 657 | ret = spi_write_and_read(dev->spi_desc, &cmd, 1); |
| pmallick | 1:8792acb5a039 | 658 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 659 | return ret; |
| pmallick | 1:8792acb5a039 | 660 | #endif |
| pmallick | 1:8792acb5a039 | 661 | |
| pmallick | 1:8792acb5a039 | 662 | return SUCCESS; |
| pmallick | 1:8792acb5a039 | 663 | } |
| pmallick | 1:8792acb5a039 | 664 | |
| pmallick | 1:8792acb5a039 | 665 | /** |
| pmallick | 1:8792acb5a039 | 666 | * @brief Advanced sequencer, get util data bits in a sample |
| pmallick | 1:8792acb5a039 | 667 | * @param [in] dev - ad469x_dev device handler. |
| pmallick | 1:8792acb5a039 | 668 | * @param [in] cur_sample - Current sample number |
| pmallick | 1:8792acb5a039 | 669 | * @param [in] sample - Sample data |
| pmallick | 1:8792acb5a039 | 670 | * @return \ref SUCCESS in case of success, \ref FAILURE otherwise. |
| pmallick | 1:8792acb5a039 | 671 | */ |
| pmallick | 1:8792acb5a039 | 672 | static int32_t ad469x_adv_seq_osr_get_util_data(struct ad469x_dev *dev, |
| pmallick | 1:8792acb5a039 | 673 | uint16_t cur_sample, |
| pmallick | 1:8792acb5a039 | 674 | uint32_t *sample) |
| pmallick | 1:8792acb5a039 | 675 | { |
| pmallick | 1:8792acb5a039 | 676 | uint8_t cur_slot, cur_ch; |
| pmallick | 1:8792acb5a039 | 677 | |
| pmallick | 1:8792acb5a039 | 678 | cur_slot = cur_sample % (dev->num_slots + dev->temp_enabled); |
| pmallick | 1:8792acb5a039 | 679 | cur_ch = dev->ch_slots[cur_slot]; |
| pmallick | 1:8792acb5a039 | 680 | |
| pmallick | 1:8792acb5a039 | 681 | /* Temperature channel sample */ |
| pmallick | 1:8792acb5a039 | 682 | if (dev->temp_enabled && cur_slot == dev->num_slots) |
| pmallick | 1:8792acb5a039 | 683 | return SUCCESS; |
| pmallick | 1:8792acb5a039 | 684 | |
| pmallick | 1:8792acb5a039 | 685 | *sample = (*sample) >> (dev->capture_data_width - |
| pmallick | 1:8792acb5a039 | 686 | dev->adv_seq_osr_resol[cur_ch]); |
| pmallick | 1:8792acb5a039 | 687 | |
| pmallick | 1:8792acb5a039 | 688 | return SUCCESS; |
| pmallick | 1:8792acb5a039 | 689 | } |
| pmallick | 1:8792acb5a039 | 690 | |
| pmallick | 1:8792acb5a039 | 691 | /** |
| pmallick | 1:8792acb5a039 | 692 | * @brief Read from device when converter has the channel sequencer activated. |
| pmallick | 1:8792acb5a039 | 693 | * Enter register mode to read/write registers |
| pmallick | 1:8792acb5a039 | 694 | * @param [in] dev - ad469x_dev device handler. |
| pmallick | 1:8792acb5a039 | 695 | * @param [out] buf - data buffer. |
| pmallick | 1:8792acb5a039 | 696 | * @param [in] samples - Number of samples per channel. For example, if with |
| pmallick | 1:8792acb5a039 | 697 | * ad469x_std_sequence_ch 2 channel where activated, buf will be filled with |
| pmallick | 1:8792acb5a039 | 698 | * 10 samples for each of them. If temp is enable, the there will be an other 10 |
| pmallick | 1:8792acb5a039 | 699 | * samples for temperature |
| pmallick | 1:8792acb5a039 | 700 | * @return \ref SUCCESS in case of success, \ref FAILURE otherwise. |
| pmallick | 1:8792acb5a039 | 701 | */ |
| pmallick | 1:8792acb5a039 | 702 | int32_t ad469x_seq_read_data(struct ad469x_dev *dev, |
| pmallick | 1:8792acb5a039 | 703 | uint32_t *buf, |
| pmallick | 1:8792acb5a039 | 704 | uint16_t samples) |
| pmallick | 1:8792acb5a039 | 705 | { |
| pmallick | 1:8792acb5a039 | 706 | int32_t ret; |
| pmallick | 1:8792acb5a039 | 707 | uint16_t i; |
| pmallick | 1:8792acb5a039 | 708 | uint32_t total_samples; |
| pmallick | 1:8792acb5a039 | 709 | |
| pmallick | 1:8792acb5a039 | 710 | total_samples = samples * (dev->num_slots + dev->temp_enabled); |
| pmallick | 1:8792acb5a039 | 711 | ret = ad469x_read_data(dev, 0, buf, total_samples); |
| pmallick | 1:8792acb5a039 | 712 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 713 | return ret; |
| pmallick | 1:8792acb5a039 | 714 | |
| pmallick | 1:8792acb5a039 | 715 | if (dev->ch_sequence != AD469x_advanced_seq) |
| pmallick | 1:8792acb5a039 | 716 | return SUCCESS; |
| pmallick | 1:8792acb5a039 | 717 | |
| pmallick | 1:8792acb5a039 | 718 | for (i = 0; i < total_samples; i++) { |
| pmallick | 1:8792acb5a039 | 719 | ret = ad469x_adv_seq_osr_get_util_data(dev, i, &buf[i]); |
| pmallick | 1:8792acb5a039 | 720 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 721 | return ret; |
| pmallick | 1:8792acb5a039 | 722 | } |
| pmallick | 1:8792acb5a039 | 723 | |
| pmallick | 1:8792acb5a039 | 724 | return SUCCESS; |
| pmallick | 1:8792acb5a039 | 725 | } |
| pmallick | 1:8792acb5a039 | 726 | |
| pmallick | 1:8792acb5a039 | 727 | /** |
| pmallick | 1:8792acb5a039 | 728 | * @brief Read from device. |
| pmallick | 1:8792acb5a039 | 729 | * Enter register mode to read/write registers |
| pmallick | 1:8792acb5a039 | 730 | * @param [in] dev - ad469x_dev device handler. |
| pmallick | 1:8792acb5a039 | 731 | * @param [in] channel - ad469x selected channel. |
| pmallick | 1:8792acb5a039 | 732 | * @param [out] buf - data buffer. |
| pmallick | 1:8792acb5a039 | 733 | * @param [in] samples - sample number. |
| pmallick | 1:8792acb5a039 | 734 | * @return \ref SUCCESS in case of success, \ref FAILURE otherwise. |
| pmallick | 1:8792acb5a039 | 735 | */ |
| pmallick | 1:8792acb5a039 | 736 | int32_t ad469x_read_data(struct ad469x_dev *dev, |
| pmallick | 1:8792acb5a039 | 737 | uint8_t channel, |
| pmallick | 1:8792acb5a039 | 738 | uint32_t *buf, |
| pmallick | 1:8792acb5a039 | 739 | uint16_t samples) |
| pmallick | 1:8792acb5a039 | 740 | { |
| pmallick | 1:8792acb5a039 | 741 | int32_t ret; |
| pmallick | 1:8792acb5a039 | 742 | |
| pmallick | 1:8792acb5a039 | 743 | #if defined(ENABLE_SPI_ENGINE) |
| pmallick | 1:8792acb5a039 | 744 | uint32_t commands_data[1]; |
| pmallick | 1:8792acb5a039 | 745 | struct spi_engine_offload_message msg; |
| pmallick | 1:8792acb5a039 | 746 | uint32_t spi_eng_msg_cmds[3] = { |
| pmallick | 1:8792acb5a039 | 747 | CS_LOW, |
| pmallick | 1:8792acb5a039 | 748 | WRITE_READ(1), |
| pmallick | 1:8792acb5a039 | 749 | CS_HIGH |
| pmallick | 1:8792acb5a039 | 750 | }; |
| pmallick | 1:8792acb5a039 | 751 | if (channel < AD469x_CHANNEL_NO) |
| pmallick | 1:8792acb5a039 | 752 | commands_data[0] = AD469x_CMD_CONFIG_CH_SEL(channel) << 8; |
| pmallick | 1:8792acb5a039 | 753 | else if (channel == AD469x_CHANNEL_TEMP) |
| pmallick | 1:8792acb5a039 | 754 | commands_data[0] = AD469x_CMD_SEL_TEMP_SNSOR_CH << 8; |
| pmallick | 1:8792acb5a039 | 755 | else |
| pmallick | 1:8792acb5a039 | 756 | return FAILURE; |
| pmallick | 1:8792acb5a039 | 757 | |
| pmallick | 1:8792acb5a039 | 758 | pwm_enable(dev->trigger_pwm_desc); |
| pmallick | 1:8792acb5a039 | 759 | |
| pmallick | 1:8792acb5a039 | 760 | ret = spi_engine_offload_init(dev->spi_desc, dev->offload_init_param); |
| pmallick | 1:8792acb5a039 | 761 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 762 | return ret; |
| pmallick | 1:8792acb5a039 | 763 | |
| pmallick | 1:8792acb5a039 | 764 | msg.commands = spi_eng_msg_cmds; |
| pmallick | 1:8792acb5a039 | 765 | msg.no_commands = ARRAY_SIZE(spi_eng_msg_cmds); |
| pmallick | 1:8792acb5a039 | 766 | msg.rx_addr = (uint32_t)buf; |
| pmallick | 1:8792acb5a039 | 767 | msg.commands_data = commands_data; |
| pmallick | 1:8792acb5a039 | 768 | |
| pmallick | 1:8792acb5a039 | 769 | ret = spi_engine_offload_transfer(dev->spi_desc, msg, samples * 2); |
| pmallick | 1:8792acb5a039 | 770 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 771 | return ret; |
| pmallick | 1:8792acb5a039 | 772 | |
| pmallick | 1:8792acb5a039 | 773 | if (dev->dcache_invalidate_range) |
| pmallick | 1:8792acb5a039 | 774 | dev->dcache_invalidate_range(msg.rx_addr, samples * 4); |
| pmallick | 1:8792acb5a039 | 775 | #else |
| pmallick | 1:8792acb5a039 | 776 | // Dummy Data |
| pmallick | 1:8792acb5a039 | 777 | dev->data[0] = 0x0; |
| pmallick | 1:8792acb5a039 | 778 | dev->data[1] = 0x0; |
| pmallick | 1:8792acb5a039 | 779 | ret = spi_write_and_read(dev->spi_desc, dev->data, (samples * 2)); |
| pmallick | 1:8792acb5a039 | 780 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 781 | return FAILURE; |
| pmallick | 1:8792acb5a039 | 782 | |
| pmallick | 1:8792acb5a039 | 783 | *buf = (uint16_t)(dev->data[0] << 8) | dev->data[1]; |
| pmallick | 1:8792acb5a039 | 784 | |
| pmallick | 1:8792acb5a039 | 785 | #endif |
| pmallick | 1:8792acb5a039 | 786 | |
| pmallick | 1:8792acb5a039 | 787 | return ret; |
| pmallick | 1:8792acb5a039 | 788 | } |
| pmallick | 1:8792acb5a039 | 789 | |
| pmallick | 1:8792acb5a039 | 790 | /** |
| pmallick | 1:8792acb5a039 | 791 | * Initialize the device. |
| pmallick | 1:8792acb5a039 | 792 | * @param [out] device - The device structure. |
| pmallick | 1:8792acb5a039 | 793 | * @param [in] init_param - The structure that contains the device initial |
| pmallick | 1:8792acb5a039 | 794 | * parameters. |
| pmallick | 1:8792acb5a039 | 795 | * @return \ref SUCCESS in case of success, \ref FAILURE otherwise. |
| pmallick | 1:8792acb5a039 | 796 | */ |
| pmallick | 1:8792acb5a039 | 797 | int32_t ad469x_init(struct ad469x_dev **device, |
| pmallick | 1:8792acb5a039 | 798 | struct ad469x_init_param *init_param) |
| pmallick | 1:8792acb5a039 | 799 | { |
| pmallick | 1:8792acb5a039 | 800 | struct ad469x_dev *dev; |
| pmallick | 1:8792acb5a039 | 801 | int32_t ret; |
| pmallick | 1:8792acb5a039 | 802 | uint8_t data = 0; |
| pmallick | 1:8792acb5a039 | 803 | |
| pmallick | 1:8792acb5a039 | 804 | dev = (struct ad469x_dev *)malloc(sizeof(*dev)); |
| pmallick | 1:8792acb5a039 | 805 | if (!dev) |
| pmallick | 1:8792acb5a039 | 806 | return FAILURE; |
| pmallick | 1:8792acb5a039 | 807 | |
| pmallick | 1:8792acb5a039 | 808 | #if defined(SPI_ENGINE) |
| pmallick | 1:8792acb5a039 | 809 | ret = axi_clkgen_init(&dev->clkgen, init_param->clkgen_init); |
| pmallick | 1:8792acb5a039 | 810 | if (ret != SUCCESS) { |
| pmallick | 1:8792acb5a039 | 811 | printf("error: %s: axi_clkgen_init() failed\n", |
| pmallick | 1:8792acb5a039 | 812 | init_param->clkgen_init->name); |
| pmallick | 1:8792acb5a039 | 813 | goto error_dev; |
| pmallick | 1:8792acb5a039 | 814 | } |
| pmallick | 1:8792acb5a039 | 815 | |
| pmallick | 1:8792acb5a039 | 816 | ret = axi_clkgen_set_rate(dev->clkgen, init_param->axi_clkgen_rate); |
| pmallick | 1:8792acb5a039 | 817 | if (ret != SUCCESS) { |
| pmallick | 1:8792acb5a039 | 818 | printf("error: %s: axi_clkgen_set_rate() failed\n", |
| pmallick | 1:8792acb5a039 | 819 | init_param->clkgen_init->name); |
| pmallick | 1:8792acb5a039 | 820 | goto error_clkgen; |
| pmallick | 1:8792acb5a039 | 821 | } |
| pmallick | 1:8792acb5a039 | 822 | |
| pmallick | 1:8792acb5a039 | 823 | #endif |
| pmallick | 1:8792acb5a039 | 824 | |
| pmallick | 1:8792acb5a039 | 825 | ret = ad469x_init_gpio(dev, init_param); |
| pmallick | 1:8792acb5a039 | 826 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 827 | goto error_gpio; |
| pmallick | 1:8792acb5a039 | 828 | |
| pmallick | 1:8792acb5a039 | 829 | ret = spi_init(&dev->spi_desc, init_param->spi_init); |
| pmallick | 1:8792acb5a039 | 830 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 831 | goto error_gpio; |
| pmallick | 1:8792acb5a039 | 832 | |
| pmallick | 1:8792acb5a039 | 833 | dev->offload_init_param = init_param->offload_init_param; |
| pmallick | 1:8792acb5a039 | 834 | |
| pmallick | 1:8792acb5a039 | 835 | dev->reg_access_speed = init_param->reg_access_speed; |
| pmallick | 1:8792acb5a039 | 836 | dev->reg_data_width = init_param->reg_data_width; |
| pmallick | 1:8792acb5a039 | 837 | dev->capture_data_width = init_param->capture_data_width; |
| pmallick | 1:8792acb5a039 | 838 | dev->dev_id = init_param->dev_id; |
| pmallick | 1:8792acb5a039 | 839 | dev->dcache_invalidate_range = init_param->dcache_invalidate_range; |
| pmallick | 1:8792acb5a039 | 840 | dev->ch_sequence = AD469x_standard_seq; |
| pmallick | 1:8792acb5a039 | 841 | dev->num_slots = 0; |
| pmallick | 1:8792acb5a039 | 842 | dev->temp_enabled = false; |
| pmallick | 1:8792acb5a039 | 843 | memset(dev->ch_slots, 0, sizeof(dev->ch_slots)); |
| pmallick | 1:8792acb5a039 | 844 | |
| pmallick | 1:8792acb5a039 | 845 | ret = ad469x_spi_reg_write(dev, AD469x_REG_SCRATCH_PAD, AD469x_TEST_DATA); |
| pmallick | 1:8792acb5a039 | 846 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 847 | goto error_spi; |
| pmallick | 1:8792acb5a039 | 848 | |
| pmallick | 1:8792acb5a039 | 849 | ret = ad469x_spi_reg_read(dev, AD469x_REG_SCRATCH_PAD, &data); |
| pmallick | 1:8792acb5a039 | 850 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 851 | goto error_spi; |
| pmallick | 1:8792acb5a039 | 852 | |
| pmallick | 1:8792acb5a039 | 853 | if (data != AD469x_TEST_DATA) |
| pmallick | 1:8792acb5a039 | 854 | goto error_spi; |
| pmallick | 1:8792acb5a039 | 855 | |
| pmallick | 1:8792acb5a039 | 856 | ret = ad469x_set_reg_access_mode(dev, AD469x_BYTE_ACCESS); |
| pmallick | 1:8792acb5a039 | 857 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 858 | goto error_spi; |
| pmallick | 1:8792acb5a039 | 859 | |
| pmallick | 1:8792acb5a039 | 860 | ret = ad469x_set_busy(dev, AD469x_busy_gp0); |
| pmallick | 1:8792acb5a039 | 861 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 862 | goto error_spi; |
| pmallick | 1:8792acb5a039 | 863 | |
| pmallick | 1:8792acb5a039 | 864 | ret = ad469x_seq_osr_clear(dev); |
| pmallick | 1:8792acb5a039 | 865 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 866 | goto error_spi; |
| pmallick | 1:8792acb5a039 | 867 | |
| pmallick | 1:8792acb5a039 | 868 | #if defined(SPI_ENGINE) |
| pmallick | 1:8792acb5a039 | 869 | ret = pwm_init(&dev->trigger_pwm_desc, init_param->trigger_pwm_init); |
| pmallick | 1:8792acb5a039 | 870 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 871 | goto error_spi; |
| pmallick | 1:8792acb5a039 | 872 | #endif |
| pmallick | 1:8792acb5a039 | 873 | |
| pmallick | 1:8792acb5a039 | 874 | |
| pmallick | 1:8792acb5a039 | 875 | *device = dev; |
| pmallick | 1:8792acb5a039 | 876 | |
| pmallick | 1:8792acb5a039 | 877 | return ret; |
| pmallick | 1:8792acb5a039 | 878 | |
| pmallick | 1:8792acb5a039 | 879 | error_spi: |
| pmallick | 1:8792acb5a039 | 880 | spi_remove(dev->spi_desc); |
| pmallick | 1:8792acb5a039 | 881 | error_gpio: |
| pmallick | 1:8792acb5a039 | 882 | gpio_remove(dev->gpio_resetn); |
| pmallick | 1:8792acb5a039 | 883 | |
| pmallick | 1:8792acb5a039 | 884 | #if defined(SPI_ENGINE) |
| pmallick | 1:8792acb5a039 | 885 | error_clkgen: |
| pmallick | 1:8792acb5a039 | 886 | axi_clkgen_remove(dev->clkgen); |
| pmallick | 1:8792acb5a039 | 887 | error_dev: |
| pmallick | 1:8792acb5a039 | 888 | #endif |
| pmallick | 1:8792acb5a039 | 889 | |
| pmallick | 1:8792acb5a039 | 890 | free(dev); |
| pmallick | 1:8792acb5a039 | 891 | |
| pmallick | 1:8792acb5a039 | 892 | return FAILURE; |
| pmallick | 1:8792acb5a039 | 893 | |
| pmallick | 1:8792acb5a039 | 894 | } |
| pmallick | 1:8792acb5a039 | 895 | |
| pmallick | 1:8792acb5a039 | 896 | /** |
| pmallick | 1:8792acb5a039 | 897 | * @brief Free the memory allocated by ad469x_init(). |
| pmallick | 1:8792acb5a039 | 898 | * @param [in] dev - Pointer to the device handler. |
| pmallick | 1:8792acb5a039 | 899 | * @return \ref SUCCESS in case of success, \ref FAILURE otherwise |
| pmallick | 1:8792acb5a039 | 900 | */ |
| pmallick | 1:8792acb5a039 | 901 | int32_t ad469x_remove(struct ad469x_dev *dev) |
| pmallick | 1:8792acb5a039 | 902 | { |
| pmallick | 1:8792acb5a039 | 903 | int32_t ret; |
| pmallick | 1:8792acb5a039 | 904 | |
| pmallick | 1:8792acb5a039 | 905 | if (!dev) |
| pmallick | 1:8792acb5a039 | 906 | return FAILURE; |
| pmallick | 1:8792acb5a039 | 907 | |
| pmallick | 1:8792acb5a039 | 908 | ret = spi_remove(dev->spi_desc); |
| pmallick | 1:8792acb5a039 | 909 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 910 | return ret; |
| pmallick | 1:8792acb5a039 | 911 | |
| pmallick | 1:8792acb5a039 | 912 | ret = gpio_remove(dev->gpio_resetn); |
| pmallick | 1:8792acb5a039 | 913 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 914 | return ret; |
| pmallick | 1:8792acb5a039 | 915 | |
| pmallick | 1:8792acb5a039 | 916 | ret = gpio_remove(dev->gpio_convst); |
| pmallick | 1:8792acb5a039 | 917 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 918 | return ret; |
| pmallick | 1:8792acb5a039 | 919 | |
| pmallick | 1:8792acb5a039 | 920 | ret = gpio_remove(dev->gpio_busy); |
| pmallick | 1:8792acb5a039 | 921 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 922 | return ret; |
| pmallick | 1:8792acb5a039 | 923 | |
| pmallick | 1:8792acb5a039 | 924 | #if defined(SPI_ENGINE) |
| pmallick | 1:8792acb5a039 | 925 | ret = pwm_remove(dev->trigger_pwm_desc); |
| pmallick | 1:8792acb5a039 | 926 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 927 | return ret; |
| pmallick | 1:8792acb5a039 | 928 | |
| pmallick | 1:8792acb5a039 | 929 | ret = axi_clkgen_remove(dev->clkgen); |
| pmallick | 1:8792acb5a039 | 930 | if (ret != SUCCESS) |
| pmallick | 1:8792acb5a039 | 931 | return ret; |
| pmallick | 1:8792acb5a039 | 932 | #endif |
| pmallick | 1:8792acb5a039 | 933 | |
| pmallick | 1:8792acb5a039 | 934 | free(dev); |
| pmallick | 1:8792acb5a039 | 935 | |
| pmallick | 1:8792acb5a039 | 936 | return ret; |
| pmallick | 1:8792acb5a039 | 937 | } |