Pratyush Mallick / Mbed OS EVAL-AD4696

Forked repository for pushing changes to EVAL-AD4696

Dependencies:   platform_drivers

app/ad4696_data_capture.c@1:8792acb5a039, 2021-09-30 (annotated)

Committer:
pmallick
Date:
Thu Sep 30 11:01:05 2021 +0530
Revision:
1:8792acb5a039
AD4696 IIO Application- Initial Revision

Who changed what in which revision?

UserRevisionLine numberNew contents of line
pmallick 1:8792acb5a039 1 /***************************************************************************//**
pmallick 1:8792acb5a039 2 * @file ad4696_data_capture.c
pmallick 1:8792acb5a039 3 * @brief Data capture interface for AD4696 IIO application
pmallick 1:8792acb5a039 4 * @details This module handles the AD4696 data capturing for IIO client
pmallick 1:8792acb5a039 5 ********************************************************************************
pmallick 1:8792acb5a039 6 * Copyright (c) 2021 Analog Devices, Inc.
pmallick 1:8792acb5a039 7 * All rights reserved.
pmallick 1:8792acb5a039 8 *
pmallick 1:8792acb5a039 9 * This software is proprietary to Analog Devices, Inc. and its licensors.
pmallick 1:8792acb5a039 10 * By using this software you agree to the terms of the associated
pmallick 1:8792acb5a039 11 * Analog Devices Software License Agreement.
pmallick 1:8792acb5a039 12 *******************************************************************************/
pmallick 1:8792acb5a039 13
pmallick 1:8792acb5a039 14 /******************************************************************************/
pmallick 1:8792acb5a039 15 /***************************** Include Files **********************************/
pmallick 1:8792acb5a039 16 /******************************************************************************/
pmallick 1:8792acb5a039 17
pmallick 1:8792acb5a039 18 #include <string.h>
pmallick 1:8792acb5a039 19 #include <stdlib.h>
pmallick 1:8792acb5a039 20
pmallick 1:8792acb5a039 21 #include "app_config.h"
pmallick 1:8792acb5a039 22 #include "iio_ad4696.h"
pmallick 1:8792acb5a039 23 #include "ad4696_data_capture.h"
pmallick 1:8792acb5a039 24 #include "adc_data_capture.h"
pmallick 1:8792acb5a039 25 #include "error.h"
pmallick 1:8792acb5a039 26 #include "gpio.h"
pmallick 1:8792acb5a039 27 #include "util.h"
pmallick 1:8792acb5a039 28 #include "pwm.h"
pmallick 1:8792acb5a039 29 #include "ad4696_support.h"
pmallick 1:8792acb5a039 30
pmallick 1:8792acb5a039 31 /******************************************************************************/
pmallick 1:8792acb5a039 32 /********************** Macros and Constants Definition ***********************/
pmallick 1:8792acb5a039 33 /******************************************************************************/
pmallick 1:8792acb5a039 34 /* Note: Timeout is dependent upon MCU clock frequency and tested for SDP-K1
pmallick 1:8792acb5a039 35 * Mbed platform
pmallick 1:8792acb5a039 36 * */
pmallick 1:8792acb5a039 37 #define BSY_CHECK_TIMEOUT 1000
pmallick 1:8792acb5a039 38
pmallick 1:8792acb5a039 39 /******************************************************************************/
pmallick 1:8792acb5a039 40 /********************** Variables and User Defined Data Types *****************/
pmallick 1:8792acb5a039 41 /******************************************************************************/
pmallick 1:8792acb5a039 42 /* Flag to mark the start of continuous read event */
pmallick 1:8792acb5a039 43 static volatile bool continuous_data_read = false;
pmallick 1:8792acb5a039 44 /* Previously active channels */
pmallick 1:8792acb5a039 45 static uint32_t ad4696_prev_active_chns = 0;
pmallick 1:8792acb5a039 46
pmallick 1:8792acb5a039 47 /******************************************************************************/
pmallick 1:8792acb5a039 48 /************************ Functions Declarations ******************************/
pmallick 1:8792acb5a039 49 /******************************************************************************/
pmallick 1:8792acb5a039 50
pmallick 1:8792acb5a039 51 /* Save the previous active channels value */
pmallick 1:8792acb5a039 52 static int32_t ad4696_save_prev_active_chns(void);
pmallick 1:8792acb5a039 53 /* Restore (enable) the previous active channels */
pmallick 1:8792acb5a039 54 static int32_t ad4696_restore_prev_active_chns(void);
pmallick 1:8792acb5a039 55 /* Enable ADC current (user input) channel */
pmallick 1:8792acb5a039 56 static int32_t ad4696_enable_curr_chn(uint8_t chn);
pmallick 1:8792acb5a039 57 /* Enable ADC channels according to channel mask*/
pmallick 1:8792acb5a039 58 static int32_t ad4696_enable_channel_mask(uint32_t chn_msk);
pmallick 1:8792acb5a039 59 /* Disable ADC current (user input) channel */
pmallick 1:8792acb5a039 60 static int32_t ad4696_disable_curr_chn(uint8_t chn);
pmallick 1:8792acb5a039 61 /* Disable all ADC channels */
pmallick 1:8792acb5a039 62 static int32_t ad4696_disable_all_chns(void);
pmallick 1:8792acb5a039 63 /* Enable conversion for single sample read */
pmallick 1:8792acb5a039 64 static int32_t ad4696_single_sample_read_start_ops(uint8_t input_chn);
pmallick 1:8792acb5a039 65 /* Enable conversion for continuous sample read */
pmallick 1:8792acb5a039 66 static int32_t ad4696_enable_continuous_read_conversion(uint32_t ch_mask);
pmallick 1:8792acb5a039 67 /* Disable conversion */
pmallick 1:8792acb5a039 68 static int32_t ad4696_continuous_sample_read_stop_ops(void);
pmallick 1:8792acb5a039 69 /* Wait for conversion to finish on enabled channels and read conversion data */
pmallick 1:8792acb5a039 70 static int32_t ad4696_perform_conv_and_read_sample(uint32_t *adc_data);
pmallick 1:8792acb5a039 71 /* Read ADC raw sample/data */
pmallick 1:8792acb5a039 72 static int32_t ad4696_read_converted_sample(uint32_t *adc_data);
pmallick 1:8792acb5a039 73 /* Monitor end of conversion event */
pmallick 1:8792acb5a039 74 static int32_t ad4696_end_of_conversion_check(void);
pmallick 1:8792acb5a039 75
pmallick 1:8792acb5a039 76 /* Define the variable for data_capture_ops structure */
pmallick 1:8792acb5a039 77 struct data_capture_ops data_capture_ops = {
pmallick 1:8792acb5a039 78 /* Point ad7134 data capture functions to generic ADC data capture functions */
pmallick 1:8792acb5a039 79 .single_sample_read_start_ops = ad4696_single_sample_read_start_ops,
pmallick 1:8792acb5a039 80 .perform_conv_and_read_sample = ad4696_perform_conv_and_read_sample,
pmallick 1:8792acb5a039 81 .single_sample_read_stop_ops = ad4696_continuous_sample_read_stop_ops,
pmallick 1:8792acb5a039 82 .continuous_sample_read_start_ops = ad4696_enable_continuous_read_conversion,
pmallick 1:8792acb5a039 83 .read_converted_sample = ad4696_read_converted_sample,
pmallick 1:8792acb5a039 84 .continuous_sample_read_stop_ops = ad4696_continuous_sample_read_stop_ops,
pmallick 1:8792acb5a039 85 .trigger_next_conversion = NULL
pmallick 1:8792acb5a039 86 };
pmallick 1:8792acb5a039 87
pmallick 1:8792acb5a039 88 /******************************************************************************/
pmallick 1:8792acb5a039 89 /************************ Functions Definitions *******************************/
pmallick 1:8792acb5a039 90 /******************************************************************************/
pmallick 1:8792acb5a039 91
pmallick 1:8792acb5a039 92 /*!
pmallick 1:8792acb5a039 93 * @brief Save the previous active channels
pmallick 1:8792acb5a039 94 * @return SUCCESS in case of success, FAILURE otherwise
pmallick 1:8792acb5a039 95 */
pmallick 1:8792acb5a039 96 static int32_t ad4696_save_prev_active_chns(void)
pmallick 1:8792acb5a039 97 {
pmallick 1:8792acb5a039 98 uint8_t data;
pmallick 1:8792acb5a039 99 /* Read the upper byte of the standard sequencer configuration register*/
pmallick 1:8792acb5a039 100 if (ad469x_spi_reg_read(p_ad4696_dev, AD469x_REG_SEQ_UB, &data) != SUCCESS) {
pmallick 1:8792acb5a039 101 return FAILURE;
pmallick 1:8792acb5a039 102 }
pmallick 1:8792acb5a039 103
pmallick 1:8792acb5a039 104 /* The upper byte channel configuration is saved to the variable and is
pmallick 1:8792acb5a039 105 * shifted by 8 bits to save the lower byte register configuration */
pmallick 1:8792acb5a039 106 ad4696_prev_active_chns = data;
pmallick 1:8792acb5a039 107 ad4696_prev_active_chns <<= 8;
pmallick 1:8792acb5a039 108
pmallick 1:8792acb5a039 109 /* Reads the lower byte of the standard sequencer configuration register*/
pmallick 1:8792acb5a039 110 if (ad469x_spi_reg_read(p_ad4696_dev, AD469x_REG_SEQ_LB, &data) != SUCCESS) {
pmallick 1:8792acb5a039 111 return FAILURE;
pmallick 1:8792acb5a039 112 }
pmallick 1:8792acb5a039 113 ad4696_prev_active_chns |= data;
pmallick 1:8792acb5a039 114
pmallick 1:8792acb5a039 115 return SUCCESS;
pmallick 1:8792acb5a039 116 }
pmallick 1:8792acb5a039 117
pmallick 1:8792acb5a039 118 /*!
pmallick 1:8792acb5a039 119 * @brief Restore (re-enable) the previous active channels
pmallick 1:8792acb5a039 120 * @return SUCCESS in case of success, FAILURE otherwise
pmallick 1:8792acb5a039 121 */
pmallick 1:8792acb5a039 122 static int32_t ad4696_restore_prev_active_chns(void)
pmallick 1:8792acb5a039 123 {
pmallick 1:8792acb5a039 124 if (ad469x_exit_conversion_mode(p_ad4696_dev) != SUCCESS)
pmallick 1:8792acb5a039 125 return FAILURE;
pmallick 1:8792acb5a039 126
pmallick 1:8792acb5a039 127 /* Configure the lower byte of the standard sequencer configuration register*/
pmallick 1:8792acb5a039 128 if (ad469x_spi_reg_write(p_ad4696_dev,
pmallick 1:8792acb5a039 129 AD469x_REG_SEQ_LB,
pmallick 1:8792acb5a039 130 AD469x_SEQ_LB_CONFIG(ad4696_prev_active_chns)) != SUCCESS) {
pmallick 1:8792acb5a039 131 return FAILURE;
pmallick 1:8792acb5a039 132 }
pmallick 1:8792acb5a039 133
pmallick 1:8792acb5a039 134 /* Configure the upper byte of the standard sequencer configuration register*/
pmallick 1:8792acb5a039 135 if (ad469x_spi_reg_write(p_ad4696_dev,
pmallick 1:8792acb5a039 136 AD469x_REG_SEQ_UB,
pmallick 1:8792acb5a039 137 AD469x_SEQ_UB_CONFIG(ad4696_prev_active_chns)) != SUCCESS) {
pmallick 1:8792acb5a039 138 return FAILURE;
pmallick 1:8792acb5a039 139 }
pmallick 1:8792acb5a039 140
pmallick 1:8792acb5a039 141 return SUCCESS;
pmallick 1:8792acb5a039 142 }
pmallick 1:8792acb5a039 143
pmallick 1:8792acb5a039 144 /*!
pmallick 1:8792acb5a039 145 * @brief Disable all active channels
pmallick 1:8792acb5a039 146 * @return SUCCESS in case of success, FAILURE otherwise
pmallick 1:8792acb5a039 147 */
pmallick 1:8792acb5a039 148 static int32_t ad4696_disable_all_chns(void)
pmallick 1:8792acb5a039 149 {
pmallick 1:8792acb5a039 150 /* Reset the lower byte of the standard sequencer configuration register*/
pmallick 1:8792acb5a039 151 if (ad469x_spi_reg_write(p_ad4696_dev,
pmallick 1:8792acb5a039 152 AD469x_REG_SEQ_LB,
pmallick 1:8792acb5a039 153 AD469x_SEQ_CHANNELS_RESET) != SUCCESS) {
pmallick 1:8792acb5a039 154 return FAILURE;
pmallick 1:8792acb5a039 155 }
pmallick 1:8792acb5a039 156
pmallick 1:8792acb5a039 157 /* Reset the upper byte of the standard sequencer configuration register*/
pmallick 1:8792acb5a039 158 if (ad469x_spi_reg_write(p_ad4696_dev,
pmallick 1:8792acb5a039 159 AD469x_REG_SEQ_UB,
pmallick 1:8792acb5a039 160 AD469x_SEQ_CHANNELS_RESET) != SUCCESS) {
pmallick 1:8792acb5a039 161 return FAILURE;
pmallick 1:8792acb5a039 162 }
pmallick 1:8792acb5a039 163
pmallick 1:8792acb5a039 164 return SUCCESS;
pmallick 1:8792acb5a039 165 }
pmallick 1:8792acb5a039 166
pmallick 1:8792acb5a039 167 /*!
pmallick 1:8792acb5a039 168 * @brief Enable input channel
pmallick 1:8792acb5a039 169 * @param chn[in] - Channel to enable
pmallick 1:8792acb5a039 170 * @return SUCCESS in case of success, FAILURE otherwise
pmallick 1:8792acb5a039 171 */
pmallick 1:8792acb5a039 172 static int32_t ad4696_enable_curr_chn(uint8_t chn)
pmallick 1:8792acb5a039 173 {
pmallick 1:8792acb5a039 174 /* If channel number is less than 8, then write to
pmallick 1:8792acb5a039 175 * lower byte configuration register or else write
pmallick 1:8792acb5a039 176 * to upper byte configuration register
pmallick 1:8792acb5a039 177 * */
pmallick 1:8792acb5a039 178 if (chn < (NO_OF_CHANNELS / 2)) {
pmallick 1:8792acb5a039 179 if (ad469x_spi_write_mask(p_ad4696_dev,
pmallick 1:8792acb5a039 180 AD469x_REG_SEQ_LB,
pmallick 1:8792acb5a039 181 AD469x_SEQ_CHANNELS_RESET,
pmallick 1:8792acb5a039 182 AD469x_SINGLE_CHANNEL_EN(chn)) != SUCCESS) {
pmallick 1:8792acb5a039 183 return FAILURE;
pmallick 1:8792acb5a039 184 }
pmallick 1:8792acb5a039 185 }
pmallick 1:8792acb5a039 186 else {
pmallick 1:8792acb5a039 187 if (ad469x_spi_write_mask(p_ad4696_dev,
pmallick 1:8792acb5a039 188 AD469x_REG_SEQ_UB,
pmallick 1:8792acb5a039 189 AD469x_SEQ_CHANNELS_RESET,
pmallick 1:8792acb5a039 190 AD469x_SINGLE_CHANNEL_EN(chn - 8)) != SUCCESS) {
pmallick 1:8792acb5a039 191 return FAILURE;
pmallick 1:8792acb5a039 192 }
pmallick 1:8792acb5a039 193 }
pmallick 1:8792acb5a039 194
pmallick 1:8792acb5a039 195 return SUCCESS;
pmallick 1:8792acb5a039 196 }
pmallick 1:8792acb5a039 197
pmallick 1:8792acb5a039 198 /*!
pmallick 1:8792acb5a039 199 * @brief Enable input channels according to the mask
pmallick 1:8792acb5a039 200 * @param chn_msk[in] - Mask containing channels to be enabled
pmallick 1:8792acb5a039 201 * @return SUCCESS in case of success, FAILURE otherwise
pmallick 1:8792acb5a039 202 */
pmallick 1:8792acb5a039 203 static int32_t ad4696_enable_channel_mask(uint32_t chn_msk)
pmallick 1:8792acb5a039 204 {
pmallick 1:8792acb5a039 205 /* Write the lower byte of the channel mask to the lower byte
pmallick 1:8792acb5a039 206 * of the standard sequencer configuration register
pmallick 1:8792acb5a039 207 * */
pmallick 1:8792acb5a039 208 if (ad469x_spi_reg_write(p_ad4696_dev,
pmallick 1:8792acb5a039 209 AD469x_REG_SEQ_LB,
pmallick 1:8792acb5a039 210 AD469x_SEQ_LB_CONFIG(chn_msk)) != SUCCESS) {
pmallick 1:8792acb5a039 211 return FAILURE;
pmallick 1:8792acb5a039 212 }
pmallick 1:8792acb5a039 213
pmallick 1:8792acb5a039 214 /* Write the upper byte of the channel mask to the upper byte
pmallick 1:8792acb5a039 215 * of the standard sequencer configuration register
pmallick 1:8792acb5a039 216 * */
pmallick 1:8792acb5a039 217 if (ad469x_spi_reg_write(p_ad4696_dev,
pmallick 1:8792acb5a039 218 AD469x_REG_SEQ_UB,
pmallick 1:8792acb5a039 219 AD469x_SEQ_UB_CONFIG(chn_msk)) != SUCCESS) {
pmallick 1:8792acb5a039 220 return FAILURE;
pmallick 1:8792acb5a039 221 }
pmallick 1:8792acb5a039 222
pmallick 1:8792acb5a039 223 return SUCCESS;
pmallick 1:8792acb5a039 224 }
pmallick 1:8792acb5a039 225
pmallick 1:8792acb5a039 226 /*!
pmallick 1:8792acb5a039 227 * @brief Disable input channel
pmallick 1:8792acb5a039 228 * @param chn[in] - Channel to disable
pmallick 1:8792acb5a039 229 * @return SUCCESS in case of success, FAILURE otherwise
pmallick 1:8792acb5a039 230 */
pmallick 1:8792acb5a039 231 static int32_t ad4696_disable_curr_chn(uint8_t chn)
pmallick 1:8792acb5a039 232 {
pmallick 1:8792acb5a039 233 /* If channel number is less than 8, then write
pmallick 1:8792acb5a039 234 * to lower byte configuration register or else
pmallick 1:8792acb5a039 235 * write to upper byte configuration register
pmallick 1:8792acb5a039 236 * */
pmallick 1:8792acb5a039 237 if (chn < (NO_OF_CHANNELS/2)) {
pmallick 1:8792acb5a039 238 if (ad469x_spi_write_mask(p_ad4696_dev,
pmallick 1:8792acb5a039 239 AD469x_REG_SEQ_LB,
pmallick 1:8792acb5a039 240 AD469x_SINGLE_CHANNEL_EN(chn),
pmallick 1:8792acb5a039 241 AD469x_SEQ_CHANNEL_DI) != SUCCESS) {
pmallick 1:8792acb5a039 242 return FAILURE;
pmallick 1:8792acb5a039 243 }
pmallick 1:8792acb5a039 244 }
pmallick 1:8792acb5a039 245 else {
pmallick 1:8792acb5a039 246 if (ad469x_spi_write_mask(p_ad4696_dev,
pmallick 1:8792acb5a039 247 AD469x_REG_SEQ_UB,
pmallick 1:8792acb5a039 248 AD469x_SINGLE_CHANNEL_EN(chn - 8),
pmallick 1:8792acb5a039 249 AD469x_SEQ_CHANNEL_DI) != SUCCESS) {
pmallick 1:8792acb5a039 250 return FAILURE;
pmallick 1:8792acb5a039 251 }
pmallick 1:8792acb5a039 252 }
pmallick 1:8792acb5a039 253
pmallick 1:8792acb5a039 254 return SUCCESS;
pmallick 1:8792acb5a039 255 }
pmallick 1:8792acb5a039 256
pmallick 1:8792acb5a039 257 /*!
pmallick 1:8792acb5a039 258 * @brief Enable conversion for single data read
pmallick 1:8792acb5a039 259 * @param input_chn[in] - Channel to be enabled
pmallick 1:8792acb5a039 260 * @return SUCCESS in case of success, FAILURE otherwise
pmallick 1:8792acb5a039 261 */
pmallick 1:8792acb5a039 262 static int32_t ad4696_single_sample_read_start_ops(uint8_t input_chn)
pmallick 1:8792acb5a039 263 {
pmallick 1:8792acb5a039 264 do {
pmallick 1:8792acb5a039 265 /* Save previously active channels */
pmallick 1:8792acb5a039 266 if (ad4696_save_prev_active_chns() != SUCCESS) {
pmallick 1:8792acb5a039 267 break;
pmallick 1:8792acb5a039 268 }
pmallick 1:8792acb5a039 269
pmallick 1:8792acb5a039 270 /* Disable all channels */
pmallick 1:8792acb5a039 271 if (ad4696_disable_all_chns() != SUCCESS) {
pmallick 1:8792acb5a039 272 break;
pmallick 1:8792acb5a039 273 }
pmallick 1:8792acb5a039 274
pmallick 1:8792acb5a039 275 /* Enable user input channel */
pmallick 1:8792acb5a039 276 if (ad4696_enable_curr_chn(input_chn) != SUCCESS) {
pmallick 1:8792acb5a039 277 break;
pmallick 1:8792acb5a039 278 }
pmallick 1:8792acb5a039 279
pmallick 1:8792acb5a039 280 /* Enter into conversion mode */
pmallick 1:8792acb5a039 281 if (ad469x_enter_conversion_mode(p_ad4696_dev) != SUCCESS) {
pmallick 1:8792acb5a039 282 break;
pmallick 1:8792acb5a039 283 }
pmallick 1:8792acb5a039 284
pmallick 1:8792acb5a039 285 return SUCCESS;
pmallick 1:8792acb5a039 286 } while (0);
pmallick 1:8792acb5a039 287
pmallick 1:8792acb5a039 288 return FAILURE;
pmallick 1:8792acb5a039 289 }
pmallick 1:8792acb5a039 290
pmallick 1:8792acb5a039 291 /*!
pmallick 1:8792acb5a039 292 * @brief Enable conversion for continuous (sequencing) data read
pmallick 1:8792acb5a039 293 * @param ch_mask[in] - Mask containing channels to be enabled
pmallick 1:8792acb5a039 294 * @return SUCCESS in case of success, FAILURE otherwise
pmallick 1:8792acb5a039 295 */
pmallick 1:8792acb5a039 296 static int32_t ad4696_enable_continuous_read_conversion(uint32_t ch_mask)
pmallick 1:8792acb5a039 297 {
pmallick 1:8792acb5a039 298 do {
pmallick 1:8792acb5a039 299 /* Save previously active channels */
pmallick 1:8792acb5a039 300 if (ad4696_save_prev_active_chns() != SUCCESS) {
pmallick 1:8792acb5a039 301 break;
pmallick 1:8792acb5a039 302 }
pmallick 1:8792acb5a039 303
pmallick 1:8792acb5a039 304 /* Disable all channels */
pmallick 1:8792acb5a039 305 if (ad4696_disable_all_chns() != SUCCESS) {
pmallick 1:8792acb5a039 306 break;
pmallick 1:8792acb5a039 307 }
pmallick 1:8792acb5a039 308
pmallick 1:8792acb5a039 309 /* Enable user input channels */
pmallick 1:8792acb5a039 310 if (ad4696_enable_channel_mask(ch_mask) != SUCCESS) {
pmallick 1:8792acb5a039 311 break;
pmallick 1:8792acb5a039 312 }
pmallick 1:8792acb5a039 313
pmallick 1:8792acb5a039 314 /* Start Generating PWM signal */
pmallick 1:8792acb5a039 315 if (pwm_enable(pwm_desc) != SUCCESS) {
pmallick 1:8792acb5a039 316 break;
pmallick 1:8792acb5a039 317 }
pmallick 1:8792acb5a039 318
pmallick 1:8792acb5a039 319 continuous_data_read = true;
pmallick 1:8792acb5a039 320 /* Enter into conversion mode */
pmallick 1:8792acb5a039 321 if (ad469x_enter_conversion_mode(p_ad4696_dev) != SUCCESS) {
pmallick 1:8792acb5a039 322 break;
pmallick 1:8792acb5a039 323 }
pmallick 1:8792acb5a039 324
pmallick 1:8792acb5a039 325 return SUCCESS;
pmallick 1:8792acb5a039 326 } while (0);
pmallick 1:8792acb5a039 327
pmallick 1:8792acb5a039 328 return FAILURE;
pmallick 1:8792acb5a039 329 }
pmallick 1:8792acb5a039 330
pmallick 1:8792acb5a039 331 /*!
pmallick 1:8792acb5a039 332 * @brief Disable ADC conversion
pmallick 1:8792acb5a039 333 * @return SUCCESS in case of success, FAILURE otherwise
pmallick 1:8792acb5a039 334 */
pmallick 1:8792acb5a039 335 static int32_t ad4696_continuous_sample_read_stop_ops(void)
pmallick 1:8792acb5a039 336 {
pmallick 1:8792acb5a039 337 if (continuous_data_read) {
pmallick 1:8792acb5a039 338 /* Stop Generating PWM signal */
pmallick 1:8792acb5a039 339 if (pwm_disable(pwm_desc) != SUCCESS) {
pmallick 1:8792acb5a039 340 return FAILURE;
pmallick 1:8792acb5a039 341 }
pmallick 1:8792acb5a039 342 }
pmallick 1:8792acb5a039 343
pmallick 1:8792acb5a039 344 /* Enter into register mode or exit from conversion mode */
pmallick 1:8792acb5a039 345 if (ad469x_exit_conversion_mode(p_ad4696_dev) != SUCCESS) {
pmallick 1:8792acb5a039 346 return FAILURE;
pmallick 1:8792acb5a039 347 }
pmallick 1:8792acb5a039 348
pmallick 1:8792acb5a039 349 /* Enable back channels which were disabled prior to conversion start*/
pmallick 1:8792acb5a039 350 if (ad4696_restore_prev_active_chns() != SUCCESS) {
pmallick 1:8792acb5a039 351 return FAILURE;
pmallick 1:8792acb5a039 352 }
pmallick 1:8792acb5a039 353
pmallick 1:8792acb5a039 354 continuous_data_read = false;
pmallick 1:8792acb5a039 355 return SUCCESS;
pmallick 1:8792acb5a039 356 }
pmallick 1:8792acb5a039 357
pmallick 1:8792acb5a039 358 /*!
pmallick 1:8792acb5a039 359 * @brief Read ADC raw data for recently sampled channel
pmallick 1:8792acb5a039 360 * @param adc_raw[out] - Pointer to adc data read variable
pmallick 1:8792acb5a039 361 * @return SUCCESS in case of success, FAILURE otherwise
pmallick 1:8792acb5a039 362 * @note This function is intended to call from the conversion end trigger
pmallick 1:8792acb5a039 363 * event. Therefore, this function should just read raw ADC data
pmallick 1:8792acb5a039 364 * without further monitoring conversion end event
pmallick 1:8792acb5a039 365 */
pmallick 1:8792acb5a039 366 static int32_t ad4696_read_converted_sample(uint32_t *adc_raw)
pmallick 1:8792acb5a039 367 {
pmallick 1:8792acb5a039 368 /* Null Check */
pmallick 1:8792acb5a039 369 if (!adc_raw) {
pmallick 1:8792acb5a039 370 return FAILURE;
pmallick 1:8792acb5a039 371 }
pmallick 1:8792acb5a039 372
pmallick 1:8792acb5a039 373 /* Read the converted ADC raw data and return the transaction result*/
pmallick 1:8792acb5a039 374 return ad469x_read_data(p_ad4696_dev, 0, adc_raw, 1);
pmallick 1:8792acb5a039 375 }
pmallick 1:8792acb5a039 376
pmallick 1:8792acb5a039 377 /*!
pmallick 1:8792acb5a039 378 * @brief Read ADC single sample data
pmallick 1:8792acb5a039 379 * @param read_adc_data[out] - Pointer to adc data read variable
pmallick 1:8792acb5a039 380 * @return SUCCESS in case of success, FAILURE otherwise
pmallick 1:8792acb5a039 381 * @details This function performs the sampling on previously active channels
pmallick 1:8792acb5a039 382 * and then reads conversion result
pmallick 1:8792acb5a039 383 */
pmallick 1:8792acb5a039 384 static int32_t ad4696_perform_conv_and_read_sample(uint32_t *read_adc_data)
pmallick 1:8792acb5a039 385 {
pmallick 1:8792acb5a039 386 uint32_t adc_raw = 0;
pmallick 1:8792acb5a039 387
pmallick 1:8792acb5a039 388 /* Read the converted ADC raw data */
pmallick 1:8792acb5a039 389 if (ad469x_read_data(p_ad4696_dev, 1, &adc_raw, 1) != SUCCESS) {
pmallick 1:8792acb5a039 390 return FAILURE;
pmallick 1:8792acb5a039 391 }
pmallick 1:8792acb5a039 392
pmallick 1:8792acb5a039 393 *read_adc_data = adc_raw;
pmallick 1:8792acb5a039 394 return SUCCESS;
pmallick 1:8792acb5a039 395 }
pmallick 1:8792acb5a039 396
pmallick 1:8792acb5a039 397 /*!
pmallick 1:8792acb5a039 398 * @brief Check for the end of conversion event
pmallick 1:8792acb5a039 399 * @return SUCCESS in case of success, FAILURE otherwise
pmallick 1:8792acb5a039 400 * @details This function monitors the state line for BSY pin
pmallick 1:8792acb5a039 401 * until timeout is reached
pmallick 1:8792acb5a039 402 */
pmallick 1:8792acb5a039 403 static int32_t ad4696_end_of_conversion_check(void)
pmallick 1:8792acb5a039 404 {
pmallick 1:8792acb5a039 405 uint16_t timeout = (uint16_t)BSY_CHECK_TIMEOUT; /* time out counter */
pmallick 1:8792acb5a039 406 uint8_t busy = GPIO_HIGH; /* GPIO initial state */
pmallick 1:8792acb5a039 407
pmallick 1:8792acb5a039 408 /* Check for BSY to go low */
pmallick 1:8792acb5a039 409 while (busy == GPIO_HIGH) {
pmallick 1:8792acb5a039 410 gpio_get_value(((struct ad469x_dev *)p_ad4696_dev)->gpio_busy, &busy);
pmallick 1:8792acb5a039 411 timeout--;
pmallick 1:8792acb5a039 412 if (!timeout) {
pmallick 1:8792acb5a039 413 return FAILURE;
pmallick 1:8792acb5a039 414 }
pmallick 1:8792acb5a039 415 }
pmallick 1:8792acb5a039 416
pmallick 1:8792acb5a039 417 timeout = (uint16_t)BSY_CHECK_TIMEOUT;
pmallick 1:8792acb5a039 418 /* Check for BSY pin to go high */
pmallick 1:8792acb5a039 419 while (busy == GPIO_LOW) {
pmallick 1:8792acb5a039 420 gpio_get_value(((struct ad469x_dev *)p_ad4696_dev)->gpio_busy, &busy);
pmallick 1:8792acb5a039 421 timeout--;
pmallick 1:8792acb5a039 422 if (!timeout) {
pmallick 1:8792acb5a039 423 return FAILURE;
pmallick 1:8792acb5a039 424 }
pmallick 1:8792acb5a039 425 }
pmallick 1:8792acb5a039 426
pmallick 1:8792acb5a039 427 return SUCCESS;
pmallick 1:8792acb5a039 428 }