Forked repository for pushing changes to EVAL-AD4696

Dependencies:   platform_drivers

Committer:
pmallick
Date:
Thu Sep 30 11:01:05 2021 +0530
Revision:
1:8792acb5a039
AD4696 IIO Application- Initial Revision

Who changed what in which revision?

UserRevisionLine numberNew contents of line
pmallick 1:8792acb5a039 1 /***************************************************************************//**
pmallick 1:8792acb5a039 2 * @file ad4696_support.h
pmallick 1:8792acb5a039 3 * @brief Header for AD469x No-OS driver supports
pmallick 1:8792acb5a039 4 ********************************************************************************
pmallick 1:8792acb5a039 5 * Copyright (c) 2021 Analog Devices, Inc.
pmallick 1:8792acb5a039 6 *
pmallick 1:8792acb5a039 7 * All rights reserved.
pmallick 1:8792acb5a039 8 *
pmallick 1:8792acb5a039 9 * This software is proprietary to Analog Devices, Inc. and its licensors.
pmallick 1:8792acb5a039 10 * By using this software you agree to the terms of the associated
pmallick 1:8792acb5a039 11 * Analog Devices Software License Agreement.
pmallick 1:8792acb5a039 12 *******************************************************************************/
pmallick 1:8792acb5a039 13
pmallick 1:8792acb5a039 14 #ifndef AD4696_SUPPORT_H_
pmallick 1:8792acb5a039 15 #define AD4696_SUPPORT_H_
pmallick 1:8792acb5a039 16
pmallick 1:8792acb5a039 17 /******************************************************************************/
pmallick 1:8792acb5a039 18 /***************************** Include Files **********************************/
pmallick 1:8792acb5a039 19 /******************************************************************************/
pmallick 1:8792acb5a039 20
pmallick 1:8792acb5a039 21 #include "ad469x.h"
pmallick 1:8792acb5a039 22 #include "util.h"
pmallick 1:8792acb5a039 23
pmallick 1:8792acb5a039 24 /******************************************************************************/
pmallick 1:8792acb5a039 25 /********************** Macros and Constants Definition ***********************/
pmallick 1:8792acb5a039 26 /******************************************************************************/
pmallick 1:8792acb5a039 27
pmallick 1:8792acb5a039 28 /* Number of AD469x registers */
pmallick 1:8792acb5a039 29 #define NUM_OF_REGISTERS 0x17F
pmallick 1:8792acb5a039 30
pmallick 1:8792acb5a039 31 /* Default channel range for AD4696 devices */
pmallick 1:8792acb5a039 32 #define DEFAULT_VREF (5.0)
pmallick 1:8792acb5a039 33
pmallick 1:8792acb5a039 34 /* AD469x_REG_TEMPERATURE */
pmallick 1:8792acb5a039 35 #define AD469x_TEMPERATURE_MSK GENMASK(0,0)
pmallick 1:8792acb5a039 36
pmallick 1:8792acb5a039 37 /* AD469x Sequencer Lower Byte Configuration */
pmallick 1:8792acb5a039 38 #define AD469x_SEQ_LB_CONFIG(x) ( x & GENMASK(7,0))
pmallick 1:8792acb5a039 39
pmallick 1:8792acb5a039 40 /* AD469x Sequencer Upper Byte Configuration */
pmallick 1:8792acb5a039 41 #define AD469x_SEQ_UB_CONFIG(x) ( x >> 8)
pmallick 1:8792acb5a039 42
pmallick 1:8792acb5a039 43 /* AD469x Sequencer Lower Byte Register */
pmallick 1:8792acb5a039 44 #define AD469x_REG_SEQ_LB AD469x_REG_STD_SEQ_CONFIG
pmallick 1:8792acb5a039 45
pmallick 1:8792acb5a039 46 /* AD469x Sequencer Upper Byte Register */
pmallick 1:8792acb5a039 47 #define AD469x_REG_SEQ_UB (AD469x_REG_STD_SEQ_CONFIG + 0x01)
pmallick 1:8792acb5a039 48
pmallick 1:8792acb5a039 49 /* AD469x Sequencer Lower Byte Configuration */
pmallick 1:8792acb5a039 50 #define AD469x_SINGLE_CHANNEL_EN(x) AD469x_CHANNEL(x)
pmallick 1:8792acb5a039 51
pmallick 1:8792acb5a039 52 /* AD469x Enable Autocycle Mode*/
pmallick 1:8792acb5a039 53 #define AD469x_SEQ_CHANNELS_RESET 0x00
pmallick 1:8792acb5a039 54
pmallick 1:8792acb5a039 55 /* AD469x Sequencer disable all channels */
pmallick 1:8792acb5a039 56 #define AD469x_EN_AUTOCYLE_MODE 0x01
pmallick 1:8792acb5a039 57
pmallick 1:8792acb5a039 58 /* AD469x Manual Trigger Configurations */
pmallick 1:8792acb5a039 59 #define AD469x_REG_SETUP_RESET 0x10
pmallick 1:8792acb5a039 60 #define AD469x_REG_SEQ_CTRL_RESET 0x80
pmallick 1:8792acb5a039 61
pmallick 1:8792acb5a039 62 /* AD469x Sequencer disable all channels */
pmallick 1:8792acb5a039 63 #define AD469x_SEQ_CHANNEL_EN 1
pmallick 1:8792acb5a039 64 #define AD469x_SEQ_CHANNEL_DI 0
pmallick 1:8792acb5a039 65
pmallick 1:8792acb5a039 66 /******************************************************************************/
pmallick 1:8792acb5a039 67 /********************** Variables and User Defined Data Types *****************/
pmallick 1:8792acb5a039 68 /******************************************************************************/
pmallick 1:8792acb5a039 69 /**
pmallick 1:8792acb5a039 70 * @enum ad469x_polarity_select
pmallick 1:8792acb5a039 71 * @brief Channel polarity modes
pmallick 1:8792acb5a039 72 */
pmallick 1:8792acb5a039 73 enum ad469x_polarity_select {
pmallick 1:8792acb5a039 74 AD469x_UNIPOLAR_MODE,
pmallick 1:8792acb5a039 75 AD469x_PSEUDO_BIPOLAR_MODE
pmallick 1:8792acb5a039 76 };
pmallick 1:8792acb5a039 77
pmallick 1:8792acb5a039 78 /**
pmallick 1:8792acb5a039 79 * @enum ad469x_pin_pairing_select
pmallick 1:8792acb5a039 80 * @brief Channel pin pairing options
pmallick 1:8792acb5a039 81 */
pmallick 1:8792acb5a039 82 enum ad469x_pin_pairing_select {
pmallick 1:8792acb5a039 83 AD469x_INx_REF_GND,
pmallick 1:8792acb5a039 84 AD469x_INx_COM,
pmallick 1:8792acb5a039 85 AD469x_INx_EVEN_ODD
pmallick 1:8792acb5a039 86 };
pmallick 1:8792acb5a039 87
pmallick 1:8792acb5a039 88 /******************************************************************************/
pmallick 1:8792acb5a039 89 /************************ Public Declarations *********************************/
pmallick 1:8792acb5a039 90 /******************************************************************************/
pmallick 1:8792acb5a039 91
pmallick 1:8792acb5a039 92 int32_t ad4696_enable_manual_trigger_mode(struct ad469x_dev *device);
pmallick 1:8792acb5a039 93 int32_t ad4696_polarity_mode_select(struct ad469x_dev *device);
pmallick 1:8792acb5a039 94
pmallick 1:8792acb5a039 95 #endif /* AD4696_SUPPORT_H_ */