modified mbed-src to overclock K64F MCU to run at 128.125MHz, for running the UART at 8Mbps, call SystemCoreClockUpdate() at the beginning of your code to re-calculate the SystemCoreClock
Fork of mbed-src by
targets/hal/TARGET_Freescale/TARGET_KLXX/i2c_api.c@246:15713155d815, 2014-07-01 (annotated)
- Committer:
- piyamate
- Date:
- Tue Jul 01 00:03:52 2014 +0000
- Revision:
- 246:15713155d815
- Parent:
- 227:7bd0639b8911
Overclock K64F to 128.125MHz
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 82:0b31dbcd4769 | 1 | /* mbed Microcontroller Library |
mbed_official | 82:0b31dbcd4769 | 2 | * Copyright (c) 2006-2013 ARM Limited |
mbed_official | 82:0b31dbcd4769 | 3 | * |
mbed_official | 82:0b31dbcd4769 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
mbed_official | 82:0b31dbcd4769 | 5 | * you may not use this file except in compliance with the License. |
mbed_official | 82:0b31dbcd4769 | 6 | * You may obtain a copy of the License at |
mbed_official | 82:0b31dbcd4769 | 7 | * |
mbed_official | 82:0b31dbcd4769 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
mbed_official | 82:0b31dbcd4769 | 9 | * |
mbed_official | 82:0b31dbcd4769 | 10 | * Unless required by applicable law or agreed to in writing, software |
mbed_official | 82:0b31dbcd4769 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
mbed_official | 82:0b31dbcd4769 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
mbed_official | 82:0b31dbcd4769 | 13 | * See the License for the specific language governing permissions and |
mbed_official | 82:0b31dbcd4769 | 14 | * limitations under the License. |
mbed_official | 82:0b31dbcd4769 | 15 | */ |
mbed_official | 227:7bd0639b8911 | 16 | #include "mbed_assert.h" |
mbed_official | 82:0b31dbcd4769 | 17 | #include "i2c_api.h" |
mbed_official | 82:0b31dbcd4769 | 18 | |
mbed_official | 82:0b31dbcd4769 | 19 | #include "cmsis.h" |
mbed_official | 82:0b31dbcd4769 | 20 | #include "pinmap.h" |
mbed_official | 82:0b31dbcd4769 | 21 | #include "clk_freqs.h" |
mbed_official | 82:0b31dbcd4769 | 22 | #include "PeripheralPins.h" |
mbed_official | 82:0b31dbcd4769 | 23 | |
mbed_official | 82:0b31dbcd4769 | 24 | static const uint16_t ICR[0x40] = { |
mbed_official | 82:0b31dbcd4769 | 25 | 20, 22, 24, 26, 28, |
mbed_official | 82:0b31dbcd4769 | 26 | 30, 34, 40, 28, 32, |
mbed_official | 82:0b31dbcd4769 | 27 | 36, 40, 44, 48, 56, |
mbed_official | 82:0b31dbcd4769 | 28 | 68, 48, 56, 64, 72, |
mbed_official | 82:0b31dbcd4769 | 29 | 80, 88, 104, 128, 80, |
mbed_official | 82:0b31dbcd4769 | 30 | 96, 112, 128, 144, 160, |
mbed_official | 82:0b31dbcd4769 | 31 | 192, 240, 160, 192, 224, |
mbed_official | 82:0b31dbcd4769 | 32 | 256, 288, 320, 384, 480, |
mbed_official | 82:0b31dbcd4769 | 33 | 320, 384, 448, 512, 576, |
mbed_official | 82:0b31dbcd4769 | 34 | 640, 768, 960, 640, 768, |
mbed_official | 82:0b31dbcd4769 | 35 | 896, 1024, 1152, 1280, 1536, |
mbed_official | 82:0b31dbcd4769 | 36 | 1920, 1280, 1536, 1792, 2048, |
mbed_official | 82:0b31dbcd4769 | 37 | 2304, 2560, 3072, 3840 |
mbed_official | 82:0b31dbcd4769 | 38 | }; |
mbed_official | 82:0b31dbcd4769 | 39 | |
mbed_official | 82:0b31dbcd4769 | 40 | |
mbed_official | 82:0b31dbcd4769 | 41 | void i2c_init(i2c_t *obj, PinName sda, PinName scl) { |
mbed_official | 82:0b31dbcd4769 | 42 | // determine the I2C to use |
mbed_official | 82:0b31dbcd4769 | 43 | I2CName i2c_sda = (I2CName)pinmap_peripheral(sda, PinMap_I2C_SDA); |
mbed_official | 82:0b31dbcd4769 | 44 | I2CName i2c_scl = (I2CName)pinmap_peripheral(scl, PinMap_I2C_SCL); |
mbed_official | 82:0b31dbcd4769 | 45 | obj->i2c = (I2C_Type*)pinmap_merge(i2c_sda, i2c_scl); |
mbed_official | 227:7bd0639b8911 | 46 | MBED_ASSERT((int)obj->i2c != NC); |
mbed_official | 82:0b31dbcd4769 | 47 | |
mbed_official | 82:0b31dbcd4769 | 48 | // enable power |
mbed_official | 82:0b31dbcd4769 | 49 | switch ((int)obj->i2c) { |
mbed_official | 82:0b31dbcd4769 | 50 | case I2C_0: SIM->SCGC5 |= 1 << 13; SIM->SCGC4 |= 1 << 6; break; |
mbed_official | 82:0b31dbcd4769 | 51 | case I2C_1: SIM->SCGC5 |= 1 << 11; SIM->SCGC4 |= 1 << 7; break; |
mbed_official | 82:0b31dbcd4769 | 52 | } |
mbed_official | 82:0b31dbcd4769 | 53 | |
mbed_official | 82:0b31dbcd4769 | 54 | // set default frequency at 100k |
mbed_official | 82:0b31dbcd4769 | 55 | i2c_frequency(obj, 100000); |
mbed_official | 82:0b31dbcd4769 | 56 | |
mbed_official | 82:0b31dbcd4769 | 57 | // enable I2C interface |
mbed_official | 82:0b31dbcd4769 | 58 | obj->i2c->C1 |= 0x80; |
mbed_official | 82:0b31dbcd4769 | 59 | |
mbed_official | 82:0b31dbcd4769 | 60 | pinmap_pinout(sda, PinMap_I2C_SDA); |
mbed_official | 82:0b31dbcd4769 | 61 | pinmap_pinout(scl, PinMap_I2C_SCL); |
mbed_official | 82:0b31dbcd4769 | 62 | } |
mbed_official | 82:0b31dbcd4769 | 63 | |
mbed_official | 82:0b31dbcd4769 | 64 | int i2c_start(i2c_t *obj) { |
mbed_official | 82:0b31dbcd4769 | 65 | uint8_t temp; |
mbed_official | 82:0b31dbcd4769 | 66 | volatile int i; |
mbed_official | 82:0b31dbcd4769 | 67 | // if we are in the middle of a transaction |
mbed_official | 82:0b31dbcd4769 | 68 | // activate the repeat_start flag |
mbed_official | 82:0b31dbcd4769 | 69 | if (obj->i2c->S & I2C_S_BUSY_MASK) { |
mbed_official | 82:0b31dbcd4769 | 70 | // KL25Z errata sheet: repeat start cannot be generated if the |
mbed_official | 82:0b31dbcd4769 | 71 | // I2Cx_F[MULT] field is set to a non-zero value |
mbed_official | 82:0b31dbcd4769 | 72 | temp = obj->i2c->F >> 6; |
mbed_official | 82:0b31dbcd4769 | 73 | obj->i2c->F &= 0x3F; |
mbed_official | 82:0b31dbcd4769 | 74 | obj->i2c->C1 |= 0x04; |
mbed_official | 82:0b31dbcd4769 | 75 | for (i = 0; i < 100; i ++) __NOP(); |
mbed_official | 82:0b31dbcd4769 | 76 | obj->i2c->F |= temp << 6; |
mbed_official | 82:0b31dbcd4769 | 77 | } else { |
mbed_official | 82:0b31dbcd4769 | 78 | obj->i2c->C1 |= I2C_C1_MST_MASK; |
mbed_official | 82:0b31dbcd4769 | 79 | obj->i2c->C1 |= I2C_C1_TX_MASK; |
mbed_official | 82:0b31dbcd4769 | 80 | } |
mbed_official | 82:0b31dbcd4769 | 81 | return 0; |
mbed_official | 82:0b31dbcd4769 | 82 | } |
mbed_official | 82:0b31dbcd4769 | 83 | |
mbed_official | 82:0b31dbcd4769 | 84 | int i2c_stop(i2c_t *obj) { |
mbed_official | 82:0b31dbcd4769 | 85 | volatile uint32_t n = 0; |
mbed_official | 82:0b31dbcd4769 | 86 | obj->i2c->C1 &= ~I2C_C1_MST_MASK; |
mbed_official | 82:0b31dbcd4769 | 87 | obj->i2c->C1 &= ~I2C_C1_TX_MASK; |
mbed_official | 82:0b31dbcd4769 | 88 | |
mbed_official | 82:0b31dbcd4769 | 89 | // It seems that there are timing problems |
mbed_official | 82:0b31dbcd4769 | 90 | // when there is no waiting time after a STOP. |
mbed_official | 82:0b31dbcd4769 | 91 | // This wait is also included on the samples |
mbed_official | 82:0b31dbcd4769 | 92 | // code provided with the freedom board |
mbed_official | 82:0b31dbcd4769 | 93 | for (n = 0; n < 100; n++) __NOP(); |
mbed_official | 82:0b31dbcd4769 | 94 | return 0; |
mbed_official | 82:0b31dbcd4769 | 95 | } |
mbed_official | 82:0b31dbcd4769 | 96 | |
mbed_official | 82:0b31dbcd4769 | 97 | static int timeout_status_poll(i2c_t *obj, uint32_t mask) { |
mbed_official | 182:242346c42295 | 98 | uint32_t i, timeout = 100000; |
mbed_official | 82:0b31dbcd4769 | 99 | |
mbed_official | 82:0b31dbcd4769 | 100 | for (i = 0; i < timeout; i++) { |
mbed_official | 82:0b31dbcd4769 | 101 | if (obj->i2c->S & mask) |
mbed_official | 82:0b31dbcd4769 | 102 | return 0; |
mbed_official | 82:0b31dbcd4769 | 103 | } |
mbed_official | 82:0b31dbcd4769 | 104 | |
mbed_official | 82:0b31dbcd4769 | 105 | return 1; |
mbed_official | 82:0b31dbcd4769 | 106 | } |
mbed_official | 82:0b31dbcd4769 | 107 | |
mbed_official | 82:0b31dbcd4769 | 108 | // this function waits the end of a tx transfer and return the status of the transaction: |
mbed_official | 82:0b31dbcd4769 | 109 | // 0: OK ack received |
mbed_official | 82:0b31dbcd4769 | 110 | // 1: OK ack not received |
mbed_official | 82:0b31dbcd4769 | 111 | // 2: failure |
mbed_official | 82:0b31dbcd4769 | 112 | static int i2c_wait_end_tx_transfer(i2c_t *obj) { |
mbed_official | 82:0b31dbcd4769 | 113 | |
mbed_official | 82:0b31dbcd4769 | 114 | // wait for the interrupt flag |
mbed_official | 82:0b31dbcd4769 | 115 | if (timeout_status_poll(obj, I2C_S_IICIF_MASK)) { |
mbed_official | 82:0b31dbcd4769 | 116 | return 2; |
mbed_official | 82:0b31dbcd4769 | 117 | } |
mbed_official | 82:0b31dbcd4769 | 118 | |
mbed_official | 82:0b31dbcd4769 | 119 | obj->i2c->S |= I2C_S_IICIF_MASK; |
mbed_official | 82:0b31dbcd4769 | 120 | |
mbed_official | 82:0b31dbcd4769 | 121 | // wait transfer complete |
mbed_official | 82:0b31dbcd4769 | 122 | if (timeout_status_poll(obj, I2C_S_TCF_MASK)) { |
mbed_official | 82:0b31dbcd4769 | 123 | return 2; |
mbed_official | 82:0b31dbcd4769 | 124 | } |
mbed_official | 82:0b31dbcd4769 | 125 | |
mbed_official | 82:0b31dbcd4769 | 126 | // check if we received the ACK or not |
mbed_official | 82:0b31dbcd4769 | 127 | return obj->i2c->S & I2C_S_RXAK_MASK ? 1 : 0; |
mbed_official | 82:0b31dbcd4769 | 128 | } |
mbed_official | 82:0b31dbcd4769 | 129 | |
mbed_official | 82:0b31dbcd4769 | 130 | // this function waits the end of a rx transfer and return the status of the transaction: |
mbed_official | 82:0b31dbcd4769 | 131 | // 0: OK |
mbed_official | 82:0b31dbcd4769 | 132 | // 1: failure |
mbed_official | 82:0b31dbcd4769 | 133 | static int i2c_wait_end_rx_transfer(i2c_t *obj) { |
mbed_official | 82:0b31dbcd4769 | 134 | // wait for the end of the rx transfer |
mbed_official | 82:0b31dbcd4769 | 135 | if (timeout_status_poll(obj, I2C_S_IICIF_MASK)) { |
mbed_official | 82:0b31dbcd4769 | 136 | return 1; |
mbed_official | 82:0b31dbcd4769 | 137 | } |
mbed_official | 82:0b31dbcd4769 | 138 | |
mbed_official | 82:0b31dbcd4769 | 139 | obj->i2c->S |= I2C_S_IICIF_MASK; |
mbed_official | 82:0b31dbcd4769 | 140 | |
mbed_official | 82:0b31dbcd4769 | 141 | return 0; |
mbed_official | 82:0b31dbcd4769 | 142 | } |
mbed_official | 82:0b31dbcd4769 | 143 | |
mbed_official | 82:0b31dbcd4769 | 144 | static void i2c_send_nack(i2c_t *obj) { |
mbed_official | 82:0b31dbcd4769 | 145 | obj->i2c->C1 |= I2C_C1_TXAK_MASK; // NACK |
mbed_official | 82:0b31dbcd4769 | 146 | } |
mbed_official | 82:0b31dbcd4769 | 147 | |
mbed_official | 82:0b31dbcd4769 | 148 | static void i2c_send_ack(i2c_t *obj) { |
mbed_official | 82:0b31dbcd4769 | 149 | obj->i2c->C1 &= ~I2C_C1_TXAK_MASK; // ACK |
mbed_official | 82:0b31dbcd4769 | 150 | } |
mbed_official | 82:0b31dbcd4769 | 151 | |
mbed_official | 82:0b31dbcd4769 | 152 | static int i2c_do_write(i2c_t *obj, int value) { |
mbed_official | 82:0b31dbcd4769 | 153 | // write the data |
mbed_official | 82:0b31dbcd4769 | 154 | obj->i2c->D = value; |
mbed_official | 82:0b31dbcd4769 | 155 | |
mbed_official | 82:0b31dbcd4769 | 156 | // init and wait the end of the transfer |
mbed_official | 82:0b31dbcd4769 | 157 | return i2c_wait_end_tx_transfer(obj); |
mbed_official | 82:0b31dbcd4769 | 158 | } |
mbed_official | 82:0b31dbcd4769 | 159 | |
mbed_official | 82:0b31dbcd4769 | 160 | static int i2c_do_read(i2c_t *obj, char * data, int last) { |
mbed_official | 82:0b31dbcd4769 | 161 | if (last) |
mbed_official | 82:0b31dbcd4769 | 162 | i2c_send_nack(obj); |
mbed_official | 82:0b31dbcd4769 | 163 | else |
mbed_official | 82:0b31dbcd4769 | 164 | i2c_send_ack(obj); |
mbed_official | 82:0b31dbcd4769 | 165 | |
mbed_official | 82:0b31dbcd4769 | 166 | *data = (obj->i2c->D & 0xFF); |
mbed_official | 82:0b31dbcd4769 | 167 | |
mbed_official | 82:0b31dbcd4769 | 168 | // start rx transfer and wait the end of the transfer |
mbed_official | 82:0b31dbcd4769 | 169 | return i2c_wait_end_rx_transfer(obj); |
mbed_official | 82:0b31dbcd4769 | 170 | } |
mbed_official | 82:0b31dbcd4769 | 171 | |
mbed_official | 82:0b31dbcd4769 | 172 | void i2c_frequency(i2c_t *obj, int hz) { |
mbed_official | 82:0b31dbcd4769 | 173 | uint8_t icr = 0; |
mbed_official | 82:0b31dbcd4769 | 174 | uint8_t mult = 0; |
mbed_official | 82:0b31dbcd4769 | 175 | uint32_t error = 0; |
mbed_official | 82:0b31dbcd4769 | 176 | uint32_t p_error = 0xffffffff; |
mbed_official | 82:0b31dbcd4769 | 177 | uint32_t ref = 0; |
mbed_official | 82:0b31dbcd4769 | 178 | uint8_t i, j; |
mbed_official | 82:0b31dbcd4769 | 179 | // bus clk |
mbed_official | 82:0b31dbcd4769 | 180 | uint32_t PCLK = bus_frequency(); |
mbed_official | 82:0b31dbcd4769 | 181 | uint32_t pulse = PCLK / (hz * 2); |
mbed_official | 82:0b31dbcd4769 | 182 | |
mbed_official | 82:0b31dbcd4769 | 183 | // we look for the values that minimize the error |
mbed_official | 82:0b31dbcd4769 | 184 | |
mbed_official | 82:0b31dbcd4769 | 185 | // test all the MULT values |
mbed_official | 82:0b31dbcd4769 | 186 | for (i = 1; i < 5; i*=2) { |
mbed_official | 82:0b31dbcd4769 | 187 | for (j = 0; j < 0x40; j++) { |
mbed_official | 82:0b31dbcd4769 | 188 | ref = PCLK / (i*ICR[j]); |
mbed_official | 82:0b31dbcd4769 | 189 | if (ref > (uint32_t)hz) |
mbed_official | 82:0b31dbcd4769 | 190 | continue; |
mbed_official | 82:0b31dbcd4769 | 191 | error = hz - ref; |
mbed_official | 82:0b31dbcd4769 | 192 | if (error < p_error) { |
mbed_official | 82:0b31dbcd4769 | 193 | icr = j; |
mbed_official | 82:0b31dbcd4769 | 194 | mult = i/2; |
mbed_official | 82:0b31dbcd4769 | 195 | p_error = error; |
mbed_official | 82:0b31dbcd4769 | 196 | } |
mbed_official | 82:0b31dbcd4769 | 197 | } |
mbed_official | 82:0b31dbcd4769 | 198 | } |
mbed_official | 82:0b31dbcd4769 | 199 | pulse = icr | (mult << 6); |
mbed_official | 82:0b31dbcd4769 | 200 | |
mbed_official | 82:0b31dbcd4769 | 201 | // I2C Rate |
mbed_official | 82:0b31dbcd4769 | 202 | obj->i2c->F = pulse; |
mbed_official | 82:0b31dbcd4769 | 203 | } |
mbed_official | 82:0b31dbcd4769 | 204 | |
mbed_official | 82:0b31dbcd4769 | 205 | int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) { |
mbed_official | 82:0b31dbcd4769 | 206 | int count; |
mbed_official | 82:0b31dbcd4769 | 207 | char dummy_read, *ptr; |
mbed_official | 82:0b31dbcd4769 | 208 | |
mbed_official | 82:0b31dbcd4769 | 209 | if (i2c_start(obj)) { |
mbed_official | 82:0b31dbcd4769 | 210 | i2c_stop(obj); |
mbed_official | 82:0b31dbcd4769 | 211 | return I2C_ERROR_BUS_BUSY; |
mbed_official | 82:0b31dbcd4769 | 212 | } |
mbed_official | 82:0b31dbcd4769 | 213 | |
mbed_official | 82:0b31dbcd4769 | 214 | if (i2c_do_write(obj, (address | 0x01))) { |
mbed_official | 82:0b31dbcd4769 | 215 | i2c_stop(obj); |
mbed_official | 82:0b31dbcd4769 | 216 | return I2C_ERROR_NO_SLAVE; |
mbed_official | 82:0b31dbcd4769 | 217 | } |
mbed_official | 82:0b31dbcd4769 | 218 | |
mbed_official | 82:0b31dbcd4769 | 219 | // set rx mode |
mbed_official | 82:0b31dbcd4769 | 220 | obj->i2c->C1 &= ~I2C_C1_TX_MASK; |
mbed_official | 82:0b31dbcd4769 | 221 | |
mbed_official | 82:0b31dbcd4769 | 222 | // Read in bytes |
mbed_official | 82:0b31dbcd4769 | 223 | for (count = 0; count < (length); count++) { |
mbed_official | 82:0b31dbcd4769 | 224 | ptr = (count == 0) ? &dummy_read : &data[count - 1]; |
mbed_official | 82:0b31dbcd4769 | 225 | uint8_t stop_ = (count == (length - 1)) ? 1 : 0; |
mbed_official | 82:0b31dbcd4769 | 226 | if (i2c_do_read(obj, ptr, stop_)) { |
mbed_official | 82:0b31dbcd4769 | 227 | i2c_stop(obj); |
mbed_official | 82:0b31dbcd4769 | 228 | return count; |
mbed_official | 82:0b31dbcd4769 | 229 | } |
mbed_official | 82:0b31dbcd4769 | 230 | } |
mbed_official | 82:0b31dbcd4769 | 231 | |
mbed_official | 82:0b31dbcd4769 | 232 | // If not repeated start, send stop. |
mbed_official | 82:0b31dbcd4769 | 233 | if (stop) { |
mbed_official | 82:0b31dbcd4769 | 234 | i2c_stop(obj); |
mbed_official | 82:0b31dbcd4769 | 235 | } |
mbed_official | 82:0b31dbcd4769 | 236 | |
mbed_official | 82:0b31dbcd4769 | 237 | // last read |
mbed_official | 82:0b31dbcd4769 | 238 | data[count-1] = obj->i2c->D; |
mbed_official | 82:0b31dbcd4769 | 239 | |
mbed_official | 82:0b31dbcd4769 | 240 | return length; |
mbed_official | 82:0b31dbcd4769 | 241 | } |
mbed_official | 82:0b31dbcd4769 | 242 | int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) { |
mbed_official | 82:0b31dbcd4769 | 243 | int i; |
mbed_official | 82:0b31dbcd4769 | 244 | |
mbed_official | 82:0b31dbcd4769 | 245 | if (i2c_start(obj)) { |
mbed_official | 82:0b31dbcd4769 | 246 | i2c_stop(obj); |
mbed_official | 82:0b31dbcd4769 | 247 | return I2C_ERROR_BUS_BUSY; |
mbed_official | 82:0b31dbcd4769 | 248 | } |
mbed_official | 82:0b31dbcd4769 | 249 | |
mbed_official | 82:0b31dbcd4769 | 250 | if (i2c_do_write(obj, (address & 0xFE))) { |
mbed_official | 82:0b31dbcd4769 | 251 | i2c_stop(obj); |
mbed_official | 82:0b31dbcd4769 | 252 | return I2C_ERROR_NO_SLAVE; |
mbed_official | 82:0b31dbcd4769 | 253 | } |
mbed_official | 82:0b31dbcd4769 | 254 | |
mbed_official | 82:0b31dbcd4769 | 255 | for (i = 0; i < length; i++) { |
mbed_official | 82:0b31dbcd4769 | 256 | if(i2c_do_write(obj, data[i])) { |
mbed_official | 82:0b31dbcd4769 | 257 | i2c_stop(obj); |
mbed_official | 82:0b31dbcd4769 | 258 | return i; |
mbed_official | 82:0b31dbcd4769 | 259 | } |
mbed_official | 82:0b31dbcd4769 | 260 | } |
mbed_official | 82:0b31dbcd4769 | 261 | |
mbed_official | 82:0b31dbcd4769 | 262 | if (stop) { |
mbed_official | 82:0b31dbcd4769 | 263 | i2c_stop(obj); |
mbed_official | 82:0b31dbcd4769 | 264 | } |
mbed_official | 82:0b31dbcd4769 | 265 | |
mbed_official | 82:0b31dbcd4769 | 266 | return length; |
mbed_official | 82:0b31dbcd4769 | 267 | } |
mbed_official | 82:0b31dbcd4769 | 268 | |
mbed_official | 82:0b31dbcd4769 | 269 | void i2c_reset(i2c_t *obj) { |
mbed_official | 82:0b31dbcd4769 | 270 | i2c_stop(obj); |
mbed_official | 82:0b31dbcd4769 | 271 | } |
mbed_official | 82:0b31dbcd4769 | 272 | |
mbed_official | 82:0b31dbcd4769 | 273 | int i2c_byte_read(i2c_t *obj, int last) { |
mbed_official | 82:0b31dbcd4769 | 274 | char data; |
mbed_official | 82:0b31dbcd4769 | 275 | |
mbed_official | 82:0b31dbcd4769 | 276 | // set rx mode |
mbed_official | 82:0b31dbcd4769 | 277 | obj->i2c->C1 &= ~I2C_C1_TX_MASK; |
mbed_official | 82:0b31dbcd4769 | 278 | |
mbed_official | 178:a873352662d8 | 279 | // Setup read |
mbed_official | 82:0b31dbcd4769 | 280 | i2c_do_read(obj, &data, last); |
mbed_official | 178:a873352662d8 | 281 | |
mbed_official | 178:a873352662d8 | 282 | // set tx mode |
mbed_official | 178:a873352662d8 | 283 | obj->i2c->C1 |= I2C_C1_TX_MASK; |
mbed_official | 178:a873352662d8 | 284 | return obj->i2c->D; |
mbed_official | 82:0b31dbcd4769 | 285 | } |
mbed_official | 82:0b31dbcd4769 | 286 | |
mbed_official | 82:0b31dbcd4769 | 287 | int i2c_byte_write(i2c_t *obj, int data) { |
mbed_official | 82:0b31dbcd4769 | 288 | // set tx mode |
mbed_official | 82:0b31dbcd4769 | 289 | obj->i2c->C1 |= I2C_C1_TX_MASK; |
mbed_official | 82:0b31dbcd4769 | 290 | |
mbed_official | 82:0b31dbcd4769 | 291 | return !i2c_do_write(obj, (data & 0xFF)); |
mbed_official | 82:0b31dbcd4769 | 292 | } |
mbed_official | 82:0b31dbcd4769 | 293 | |
mbed_official | 82:0b31dbcd4769 | 294 | |
mbed_official | 82:0b31dbcd4769 | 295 | #if DEVICE_I2CSLAVE |
mbed_official | 82:0b31dbcd4769 | 296 | void i2c_slave_mode(i2c_t *obj, int enable_slave) { |
mbed_official | 82:0b31dbcd4769 | 297 | if (enable_slave) { |
mbed_official | 82:0b31dbcd4769 | 298 | // set slave mode |
mbed_official | 82:0b31dbcd4769 | 299 | obj->i2c->C1 &= ~I2C_C1_MST_MASK; |
mbed_official | 82:0b31dbcd4769 | 300 | obj->i2c->C1 |= I2C_C1_IICIE_MASK; |
mbed_official | 82:0b31dbcd4769 | 301 | } else { |
mbed_official | 82:0b31dbcd4769 | 302 | // set master mode |
mbed_official | 82:0b31dbcd4769 | 303 | obj->i2c->C1 |= I2C_C1_MST_MASK; |
mbed_official | 82:0b31dbcd4769 | 304 | } |
mbed_official | 82:0b31dbcd4769 | 305 | } |
mbed_official | 82:0b31dbcd4769 | 306 | |
mbed_official | 82:0b31dbcd4769 | 307 | int i2c_slave_receive(i2c_t *obj) { |
mbed_official | 82:0b31dbcd4769 | 308 | switch(obj->i2c->S) { |
mbed_official | 82:0b31dbcd4769 | 309 | // read addressed |
mbed_official | 82:0b31dbcd4769 | 310 | case 0xE6: return 1; |
mbed_official | 82:0b31dbcd4769 | 311 | |
mbed_official | 82:0b31dbcd4769 | 312 | // write addressed |
mbed_official | 82:0b31dbcd4769 | 313 | case 0xE2: return 3; |
mbed_official | 82:0b31dbcd4769 | 314 | |
mbed_official | 82:0b31dbcd4769 | 315 | default: return 0; |
mbed_official | 82:0b31dbcd4769 | 316 | } |
mbed_official | 82:0b31dbcd4769 | 317 | } |
mbed_official | 82:0b31dbcd4769 | 318 | |
mbed_official | 82:0b31dbcd4769 | 319 | int i2c_slave_read(i2c_t *obj, char *data, int length) { |
mbed_official | 82:0b31dbcd4769 | 320 | uint8_t dummy_read; |
mbed_official | 82:0b31dbcd4769 | 321 | uint8_t * ptr; |
mbed_official | 82:0b31dbcd4769 | 322 | int count; |
mbed_official | 82:0b31dbcd4769 | 323 | |
mbed_official | 82:0b31dbcd4769 | 324 | // set rx mode |
mbed_official | 82:0b31dbcd4769 | 325 | obj->i2c->C1 &= ~I2C_C1_TX_MASK; |
mbed_official | 82:0b31dbcd4769 | 326 | |
mbed_official | 82:0b31dbcd4769 | 327 | // first dummy read |
mbed_official | 82:0b31dbcd4769 | 328 | dummy_read = obj->i2c->D; |
mbed_official | 82:0b31dbcd4769 | 329 | if(i2c_wait_end_rx_transfer(obj)) { |
mbed_official | 82:0b31dbcd4769 | 330 | return 0; |
mbed_official | 82:0b31dbcd4769 | 331 | } |
mbed_official | 82:0b31dbcd4769 | 332 | |
mbed_official | 82:0b31dbcd4769 | 333 | // read address |
mbed_official | 82:0b31dbcd4769 | 334 | dummy_read = obj->i2c->D; |
mbed_official | 82:0b31dbcd4769 | 335 | if(i2c_wait_end_rx_transfer(obj)) { |
mbed_official | 82:0b31dbcd4769 | 336 | return 0; |
mbed_official | 82:0b31dbcd4769 | 337 | } |
mbed_official | 82:0b31dbcd4769 | 338 | |
mbed_official | 82:0b31dbcd4769 | 339 | // read (length - 1) bytes |
mbed_official | 82:0b31dbcd4769 | 340 | for (count = 0; count < (length - 1); count++) { |
mbed_official | 82:0b31dbcd4769 | 341 | data[count] = obj->i2c->D; |
mbed_official | 82:0b31dbcd4769 | 342 | if(i2c_wait_end_rx_transfer(obj)) { |
mbed_official | 82:0b31dbcd4769 | 343 | return count; |
mbed_official | 82:0b31dbcd4769 | 344 | } |
mbed_official | 82:0b31dbcd4769 | 345 | } |
mbed_official | 82:0b31dbcd4769 | 346 | |
mbed_official | 82:0b31dbcd4769 | 347 | // read last byte |
mbed_official | 82:0b31dbcd4769 | 348 | ptr = (length == 0) ? &dummy_read : (uint8_t *)&data[count]; |
mbed_official | 82:0b31dbcd4769 | 349 | *ptr = obj->i2c->D; |
mbed_official | 82:0b31dbcd4769 | 350 | |
mbed_official | 82:0b31dbcd4769 | 351 | return (length) ? (count + 1) : 0; |
mbed_official | 82:0b31dbcd4769 | 352 | } |
mbed_official | 82:0b31dbcd4769 | 353 | |
mbed_official | 82:0b31dbcd4769 | 354 | int i2c_slave_write(i2c_t *obj, const char *data, int length) { |
mbed_official | 82:0b31dbcd4769 | 355 | int i, count = 0; |
mbed_official | 82:0b31dbcd4769 | 356 | |
mbed_official | 82:0b31dbcd4769 | 357 | // set tx mode |
mbed_official | 82:0b31dbcd4769 | 358 | obj->i2c->C1 |= I2C_C1_TX_MASK; |
mbed_official | 82:0b31dbcd4769 | 359 | |
mbed_official | 82:0b31dbcd4769 | 360 | for (i = 0; i < length; i++) { |
mbed_official | 82:0b31dbcd4769 | 361 | if(i2c_do_write(obj, data[count++]) == 2) { |
mbed_official | 82:0b31dbcd4769 | 362 | return i; |
mbed_official | 82:0b31dbcd4769 | 363 | } |
mbed_official | 82:0b31dbcd4769 | 364 | } |
mbed_official | 82:0b31dbcd4769 | 365 | |
mbed_official | 82:0b31dbcd4769 | 366 | // set rx mode |
mbed_official | 82:0b31dbcd4769 | 367 | obj->i2c->C1 &= ~I2C_C1_TX_MASK; |
mbed_official | 82:0b31dbcd4769 | 368 | |
mbed_official | 82:0b31dbcd4769 | 369 | // dummy rx transfer needed |
mbed_official | 82:0b31dbcd4769 | 370 | // otherwise the master cannot generate a stop bit |
mbed_official | 82:0b31dbcd4769 | 371 | obj->i2c->D; |
mbed_official | 82:0b31dbcd4769 | 372 | if(i2c_wait_end_rx_transfer(obj) == 2) { |
mbed_official | 82:0b31dbcd4769 | 373 | return count; |
mbed_official | 82:0b31dbcd4769 | 374 | } |
mbed_official | 82:0b31dbcd4769 | 375 | |
mbed_official | 82:0b31dbcd4769 | 376 | return count; |
mbed_official | 82:0b31dbcd4769 | 377 | } |
mbed_official | 82:0b31dbcd4769 | 378 | |
mbed_official | 82:0b31dbcd4769 | 379 | void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask) { |
mbed_official | 82:0b31dbcd4769 | 380 | obj->i2c->A1 = address & 0xfe; |
mbed_official | 82:0b31dbcd4769 | 381 | } |
mbed_official | 82:0b31dbcd4769 | 382 | #endif |
mbed_official | 82:0b31dbcd4769 | 383 |