PHung Tung
SPKT
targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_spi.h@0:e87aa4c49e95, 2019-06-04 (annotated)
- Committer:
- phungductung
- Date:
- Tue Jun 04 21:51:46 2019 +0000
- Revision:
- 0:e87aa4c49e95
libray
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| phungductung | 0:e87aa4c49e95 | 1 | /** |
| phungductung | 0:e87aa4c49e95 | 2 | ****************************************************************************** |
| phungductung | 0:e87aa4c49e95 | 3 | * @file stm32f7xx_hal_spi.h |
| phungductung | 0:e87aa4c49e95 | 4 | * @author MCD Application Team |
| phungductung | 0:e87aa4c49e95 | 5 | * @version V1.0.4 |
| phungductung | 0:e87aa4c49e95 | 6 | * @date 09-December-2015 |
| phungductung | 0:e87aa4c49e95 | 7 | * @brief Header file of SPI HAL module. |
| phungductung | 0:e87aa4c49e95 | 8 | ****************************************************************************** |
| phungductung | 0:e87aa4c49e95 | 9 | * @attention |
| phungductung | 0:e87aa4c49e95 | 10 | * |
| phungductung | 0:e87aa4c49e95 | 11 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
| phungductung | 0:e87aa4c49e95 | 12 | * |
| phungductung | 0:e87aa4c49e95 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| phungductung | 0:e87aa4c49e95 | 14 | * are permitted provided that the following conditions are met: |
| phungductung | 0:e87aa4c49e95 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| phungductung | 0:e87aa4c49e95 | 16 | * this list of conditions and the following disclaimer. |
| phungductung | 0:e87aa4c49e95 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| phungductung | 0:e87aa4c49e95 | 18 | * this list of conditions and the following disclaimer in the documentation |
| phungductung | 0:e87aa4c49e95 | 19 | * and/or other materials provided with the distribution. |
| phungductung | 0:e87aa4c49e95 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| phungductung | 0:e87aa4c49e95 | 21 | * may be used to endorse or promote products derived from this software |
| phungductung | 0:e87aa4c49e95 | 22 | * without specific prior written permission. |
| phungductung | 0:e87aa4c49e95 | 23 | * |
| phungductung | 0:e87aa4c49e95 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| phungductung | 0:e87aa4c49e95 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| phungductung | 0:e87aa4c49e95 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| phungductung | 0:e87aa4c49e95 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| phungductung | 0:e87aa4c49e95 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| phungductung | 0:e87aa4c49e95 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| phungductung | 0:e87aa4c49e95 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| phungductung | 0:e87aa4c49e95 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| phungductung | 0:e87aa4c49e95 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| phungductung | 0:e87aa4c49e95 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| phungductung | 0:e87aa4c49e95 | 34 | * |
| phungductung | 0:e87aa4c49e95 | 35 | ****************************************************************************** |
| phungductung | 0:e87aa4c49e95 | 36 | */ |
| phungductung | 0:e87aa4c49e95 | 37 | |
| phungductung | 0:e87aa4c49e95 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| phungductung | 0:e87aa4c49e95 | 39 | #ifndef __STM32F7xx_HAL_SPI_H |
| phungductung | 0:e87aa4c49e95 | 40 | #define __STM32F7xx_HAL_SPI_H |
| phungductung | 0:e87aa4c49e95 | 41 | |
| phungductung | 0:e87aa4c49e95 | 42 | #ifdef __cplusplus |
| phungductung | 0:e87aa4c49e95 | 43 | extern "C" { |
| phungductung | 0:e87aa4c49e95 | 44 | #endif |
| phungductung | 0:e87aa4c49e95 | 45 | |
| phungductung | 0:e87aa4c49e95 | 46 | /* Includes ------------------------------------------------------------------*/ |
| phungductung | 0:e87aa4c49e95 | 47 | #include "stm32f7xx_hal_def.h" |
| phungductung | 0:e87aa4c49e95 | 48 | |
| phungductung | 0:e87aa4c49e95 | 49 | /** @addtogroup STM32F7xx_HAL_Driver |
| phungductung | 0:e87aa4c49e95 | 50 | * @{ |
| phungductung | 0:e87aa4c49e95 | 51 | */ |
| phungductung | 0:e87aa4c49e95 | 52 | |
| phungductung | 0:e87aa4c49e95 | 53 | /** @addtogroup SPI |
| phungductung | 0:e87aa4c49e95 | 54 | * @{ |
| phungductung | 0:e87aa4c49e95 | 55 | */ |
| phungductung | 0:e87aa4c49e95 | 56 | |
| phungductung | 0:e87aa4c49e95 | 57 | /* Exported types ------------------------------------------------------------*/ |
| phungductung | 0:e87aa4c49e95 | 58 | /** @defgroup SPI_Exported_Types SPI Exported Types |
| phungductung | 0:e87aa4c49e95 | 59 | * @{ |
| phungductung | 0:e87aa4c49e95 | 60 | */ |
| phungductung | 0:e87aa4c49e95 | 61 | |
| phungductung | 0:e87aa4c49e95 | 62 | /** |
| phungductung | 0:e87aa4c49e95 | 63 | * @brief SPI Configuration Structure definition |
| phungductung | 0:e87aa4c49e95 | 64 | */ |
| phungductung | 0:e87aa4c49e95 | 65 | typedef struct |
| phungductung | 0:e87aa4c49e95 | 66 | { |
| phungductung | 0:e87aa4c49e95 | 67 | uint32_t Mode; /*!< Specifies the SPI operating mode. |
| phungductung | 0:e87aa4c49e95 | 68 | This parameter can be a value of @ref SPI_Mode */ |
| phungductung | 0:e87aa4c49e95 | 69 | |
| phungductung | 0:e87aa4c49e95 | 70 | uint32_t Direction; /*!< Specifies the SPI bidirectional mode state. |
| phungductung | 0:e87aa4c49e95 | 71 | This parameter can be a value of @ref SPI_Direction */ |
| phungductung | 0:e87aa4c49e95 | 72 | |
| phungductung | 0:e87aa4c49e95 | 73 | uint32_t DataSize; /*!< Specifies the SPI data size. |
| phungductung | 0:e87aa4c49e95 | 74 | This parameter can be a value of @ref SPI_Data_Size */ |
| phungductung | 0:e87aa4c49e95 | 75 | |
| phungductung | 0:e87aa4c49e95 | 76 | uint32_t CLKPolarity; /*!< Specifies the serial clock steady state. |
| phungductung | 0:e87aa4c49e95 | 77 | This parameter can be a value of @ref SPI_Clock_Polarity */ |
| phungductung | 0:e87aa4c49e95 | 78 | |
| phungductung | 0:e87aa4c49e95 | 79 | uint32_t CLKPhase; /*!< Specifies the clock active edge for the bit capture. |
| phungductung | 0:e87aa4c49e95 | 80 | This parameter can be a value of @ref SPI_Clock_Phase */ |
| phungductung | 0:e87aa4c49e95 | 81 | |
| phungductung | 0:e87aa4c49e95 | 82 | uint32_t NSS; /*!< Specifies whether the NSS signal is managed by |
| phungductung | 0:e87aa4c49e95 | 83 | hardware (NSS pin) or by software using the SSI bit. |
| phungductung | 0:e87aa4c49e95 | 84 | This parameter can be a value of @ref SPI_Slave_Select_management */ |
| phungductung | 0:e87aa4c49e95 | 85 | |
| phungductung | 0:e87aa4c49e95 | 86 | uint32_t BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be |
| phungductung | 0:e87aa4c49e95 | 87 | used to configure the transmit and receive SCK clock. |
| phungductung | 0:e87aa4c49e95 | 88 | This parameter can be a value of @ref SPI_BaudRate_Prescaler |
| phungductung | 0:e87aa4c49e95 | 89 | @note The communication clock is derived from the master |
| phungductung | 0:e87aa4c49e95 | 90 | clock. The slave clock does not need to be set. */ |
| phungductung | 0:e87aa4c49e95 | 91 | |
| phungductung | 0:e87aa4c49e95 | 92 | uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit. |
| phungductung | 0:e87aa4c49e95 | 93 | This parameter can be a value of @ref SPI_MSB_LSB_transmission */ |
| phungductung | 0:e87aa4c49e95 | 94 | |
| phungductung | 0:e87aa4c49e95 | 95 | uint32_t TIMode; /*!< Specifies if the TI mode is enabled or not . |
| phungductung | 0:e87aa4c49e95 | 96 | This parameter can be a value of @ref SPI_TI_mode */ |
| phungductung | 0:e87aa4c49e95 | 97 | |
| phungductung | 0:e87aa4c49e95 | 98 | uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not. |
| phungductung | 0:e87aa4c49e95 | 99 | This parameter can be a value of @ref SPI_CRC_Calculation */ |
| phungductung | 0:e87aa4c49e95 | 100 | |
| phungductung | 0:e87aa4c49e95 | 101 | uint32_t CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation. |
| phungductung | 0:e87aa4c49e95 | 102 | This parameter must be a number between Min_Data = 0 and Max_Data = 65535 */ |
| phungductung | 0:e87aa4c49e95 | 103 | |
| phungductung | 0:e87aa4c49e95 | 104 | uint32_t CRCLength; /*!< Specifies the CRC Length used for the CRC calculation. |
| phungductung | 0:e87aa4c49e95 | 105 | CRC Length is only used with Data8 and Data16, not other data size |
| phungductung | 0:e87aa4c49e95 | 106 | This parameter can be a value of @ref SPI_CRC_length */ |
| phungductung | 0:e87aa4c49e95 | 107 | |
| phungductung | 0:e87aa4c49e95 | 108 | uint32_t NSSPMode; /*!< Specifies whether the NSSP signal is enabled or not . |
| phungductung | 0:e87aa4c49e95 | 109 | This parameter can be a value of @ref SPI_NSSP_Mode |
| phungductung | 0:e87aa4c49e95 | 110 | This mode is activated by the NSSP bit in the SPIx_CR2 register and |
| phungductung | 0:e87aa4c49e95 | 111 | it takes effect only if the SPI interface is configured as Motorola SPI |
| phungductung | 0:e87aa4c49e95 | 112 | master (FRF=0) with capture on the first edge (SPIx_CR1 CPHA = 0, |
| phungductung | 0:e87aa4c49e95 | 113 | CPOL setting is ignored).. */ |
| phungductung | 0:e87aa4c49e95 | 114 | } SPI_InitTypeDef; |
| phungductung | 0:e87aa4c49e95 | 115 | |
| phungductung | 0:e87aa4c49e95 | 116 | /** |
| phungductung | 0:e87aa4c49e95 | 117 | * @brief HAL State structures definition |
| phungductung | 0:e87aa4c49e95 | 118 | */ |
| phungductung | 0:e87aa4c49e95 | 119 | typedef enum |
| phungductung | 0:e87aa4c49e95 | 120 | { |
| phungductung | 0:e87aa4c49e95 | 121 | HAL_SPI_STATE_RESET = 0x00, /*!< Peripheral not Initialized */ |
| phungductung | 0:e87aa4c49e95 | 122 | HAL_SPI_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */ |
| phungductung | 0:e87aa4c49e95 | 123 | HAL_SPI_STATE_BUSY = 0x02, /*!< an internal process is ongoing */ |
| phungductung | 0:e87aa4c49e95 | 124 | HAL_SPI_STATE_BUSY_TX = 0x03, /*!< Data Transmission process is ongoing */ |
| phungductung | 0:e87aa4c49e95 | 125 | HAL_SPI_STATE_BUSY_RX = 0x04, /*!< Data Reception process is ongoing */ |
| phungductung | 0:e87aa4c49e95 | 126 | HAL_SPI_STATE_BUSY_TX_RX = 0x05, /*!< Data Transmission and Reception process is ongoing*/ |
| phungductung | 0:e87aa4c49e95 | 127 | HAL_SPI_STATE_ERROR = 0x06 /*!< SPI error state */ |
| phungductung | 0:e87aa4c49e95 | 128 | }HAL_SPI_StateTypeDef; |
| phungductung | 0:e87aa4c49e95 | 129 | |
| phungductung | 0:e87aa4c49e95 | 130 | /** |
| phungductung | 0:e87aa4c49e95 | 131 | * @brief SPI handle Structure definition |
| phungductung | 0:e87aa4c49e95 | 132 | */ |
| phungductung | 0:e87aa4c49e95 | 133 | typedef struct __SPI_HandleTypeDef |
| phungductung | 0:e87aa4c49e95 | 134 | { |
| phungductung | 0:e87aa4c49e95 | 135 | SPI_TypeDef *Instance; /* SPI registers base address */ |
| phungductung | 0:e87aa4c49e95 | 136 | |
| phungductung | 0:e87aa4c49e95 | 137 | SPI_InitTypeDef Init; /* SPI communication parameters */ |
| phungductung | 0:e87aa4c49e95 | 138 | |
| phungductung | 0:e87aa4c49e95 | 139 | uint8_t *pTxBuffPtr; /* Pointer to SPI Tx transfer Buffer */ |
| phungductung | 0:e87aa4c49e95 | 140 | |
| phungductung | 0:e87aa4c49e95 | 141 | uint16_t TxXferSize; /* SPI Tx Transfer size */ |
| phungductung | 0:e87aa4c49e95 | 142 | |
| phungductung | 0:e87aa4c49e95 | 143 | uint16_t TxXferCount; /* SPI Tx Transfer Counter */ |
| phungductung | 0:e87aa4c49e95 | 144 | |
| phungductung | 0:e87aa4c49e95 | 145 | uint8_t *pRxBuffPtr; /* Pointer to SPI Rx transfer Buffer */ |
| phungductung | 0:e87aa4c49e95 | 146 | |
| phungductung | 0:e87aa4c49e95 | 147 | uint16_t RxXferSize; /* SPI Rx Transfer size */ |
| phungductung | 0:e87aa4c49e95 | 148 | |
| phungductung | 0:e87aa4c49e95 | 149 | uint16_t RxXferCount; /* SPI Rx Transfer Counter */ |
| phungductung | 0:e87aa4c49e95 | 150 | |
| phungductung | 0:e87aa4c49e95 | 151 | uint32_t CRCSize; /* SPI CRC size used for the transfer */ |
| phungductung | 0:e87aa4c49e95 | 152 | |
| phungductung | 0:e87aa4c49e95 | 153 | void (*RxISR)(struct __SPI_HandleTypeDef *hspi); /* function pointer on Rx IRQ handler */ |
| phungductung | 0:e87aa4c49e95 | 154 | |
| phungductung | 0:e87aa4c49e95 | 155 | void (*TxISR)(struct __SPI_HandleTypeDef *hspi); /* function pointer on Tx IRQ handler */ |
| phungductung | 0:e87aa4c49e95 | 156 | |
| phungductung | 0:e87aa4c49e95 | 157 | DMA_HandleTypeDef *hdmatx; /* SPI Tx DMA Handle parameters */ |
| phungductung | 0:e87aa4c49e95 | 158 | |
| phungductung | 0:e87aa4c49e95 | 159 | DMA_HandleTypeDef *hdmarx; /* SPI Rx DMA Handle parameters */ |
| phungductung | 0:e87aa4c49e95 | 160 | |
| phungductung | 0:e87aa4c49e95 | 161 | HAL_LockTypeDef Lock; /* Locking object */ |
| phungductung | 0:e87aa4c49e95 | 162 | |
| phungductung | 0:e87aa4c49e95 | 163 | HAL_SPI_StateTypeDef State; /* SPI communication state */ |
| phungductung | 0:e87aa4c49e95 | 164 | |
| phungductung | 0:e87aa4c49e95 | 165 | uint32_t ErrorCode; /* SPI Error code */ |
| phungductung | 0:e87aa4c49e95 | 166 | |
| phungductung | 0:e87aa4c49e95 | 167 | }SPI_HandleTypeDef; |
| phungductung | 0:e87aa4c49e95 | 168 | |
| phungductung | 0:e87aa4c49e95 | 169 | /** |
| phungductung | 0:e87aa4c49e95 | 170 | * @} |
| phungductung | 0:e87aa4c49e95 | 171 | */ |
| phungductung | 0:e87aa4c49e95 | 172 | |
| phungductung | 0:e87aa4c49e95 | 173 | /* Exported constants --------------------------------------------------------*/ |
| phungductung | 0:e87aa4c49e95 | 174 | |
| phungductung | 0:e87aa4c49e95 | 175 | /** @defgroup SPI_Exported_Constants SPI Exported Constants |
| phungductung | 0:e87aa4c49e95 | 176 | * @{ |
| phungductung | 0:e87aa4c49e95 | 177 | */ |
| phungductung | 0:e87aa4c49e95 | 178 | |
| phungductung | 0:e87aa4c49e95 | 179 | /** @defgroup SPI_Error_Code SPI Error Code |
| phungductung | 0:e87aa4c49e95 | 180 | * @{ |
| phungductung | 0:e87aa4c49e95 | 181 | */ |
| phungductung | 0:e87aa4c49e95 | 182 | #define HAL_SPI_ERROR_NONE (uint32_t)0x00000000 /*!< No error */ |
| phungductung | 0:e87aa4c49e95 | 183 | #define HAL_SPI_ERROR_MODF (uint32_t)0x00000001 /*!< MODF error */ |
| phungductung | 0:e87aa4c49e95 | 184 | #define HAL_SPI_ERROR_CRC (uint32_t)0x00000002 /*!< CRC error */ |
| phungductung | 0:e87aa4c49e95 | 185 | #define HAL_SPI_ERROR_OVR (uint32_t)0x00000004 /*!< OVR error */ |
| phungductung | 0:e87aa4c49e95 | 186 | #define HAL_SPI_ERROR_FRE (uint32_t)0x00000008 /*!< FRE error */ |
| phungductung | 0:e87aa4c49e95 | 187 | #define HAL_SPI_ERROR_DMA (uint32_t)0x00000010 /*!< DMA transfer error */ |
| phungductung | 0:e87aa4c49e95 | 188 | #define HAL_SPI_ERROR_FLAG (uint32_t)0x00000020 /*!< Error on BSY/TXE/FTLVL/FRLVL Flag */ |
| phungductung | 0:e87aa4c49e95 | 189 | #define HAL_SPI_ERROR_UNKNOW (uint32_t)0x00000040 /*!< Unknow Error error */ |
| phungductung | 0:e87aa4c49e95 | 190 | /** |
| phungductung | 0:e87aa4c49e95 | 191 | * @} |
| phungductung | 0:e87aa4c49e95 | 192 | */ |
| phungductung | 0:e87aa4c49e95 | 193 | |
| phungductung | 0:e87aa4c49e95 | 194 | |
| phungductung | 0:e87aa4c49e95 | 195 | /** @defgroup SPI_Mode SPI Mode |
| phungductung | 0:e87aa4c49e95 | 196 | * @{ |
| phungductung | 0:e87aa4c49e95 | 197 | */ |
| phungductung | 0:e87aa4c49e95 | 198 | #define SPI_MODE_SLAVE ((uint32_t)0x00000000) |
| phungductung | 0:e87aa4c49e95 | 199 | #define SPI_MODE_MASTER (SPI_CR1_MSTR | SPI_CR1_SSI) |
| phungductung | 0:e87aa4c49e95 | 200 | /** |
| phungductung | 0:e87aa4c49e95 | 201 | * @} |
| phungductung | 0:e87aa4c49e95 | 202 | */ |
| phungductung | 0:e87aa4c49e95 | 203 | |
| phungductung | 0:e87aa4c49e95 | 204 | /** @defgroup SPI_Direction SPI Direction Mode |
| phungductung | 0:e87aa4c49e95 | 205 | * @{ |
| phungductung | 0:e87aa4c49e95 | 206 | */ |
| phungductung | 0:e87aa4c49e95 | 207 | #define SPI_DIRECTION_2LINES ((uint32_t)0x00000000) |
| phungductung | 0:e87aa4c49e95 | 208 | #define SPI_DIRECTION_2LINES_RXONLY SPI_CR1_RXONLY |
| phungductung | 0:e87aa4c49e95 | 209 | #define SPI_DIRECTION_1LINE SPI_CR1_BIDIMODE |
| phungductung | 0:e87aa4c49e95 | 210 | /** |
| phungductung | 0:e87aa4c49e95 | 211 | * @} |
| phungductung | 0:e87aa4c49e95 | 212 | */ |
| phungductung | 0:e87aa4c49e95 | 213 | |
| phungductung | 0:e87aa4c49e95 | 214 | /** @defgroup SPI_Data_Size SPI Data Size |
| phungductung | 0:e87aa4c49e95 | 215 | * @{ |
| phungductung | 0:e87aa4c49e95 | 216 | */ |
| phungductung | 0:e87aa4c49e95 | 217 | #define SPI_DATASIZE_4BIT ((uint32_t)0x0300) |
| phungductung | 0:e87aa4c49e95 | 218 | #define SPI_DATASIZE_5BIT ((uint32_t)0x0400) |
| phungductung | 0:e87aa4c49e95 | 219 | #define SPI_DATASIZE_6BIT ((uint32_t)0x0500) |
| phungductung | 0:e87aa4c49e95 | 220 | #define SPI_DATASIZE_7BIT ((uint32_t)0x0600) |
| phungductung | 0:e87aa4c49e95 | 221 | #define SPI_DATASIZE_8BIT ((uint32_t)0x0700) |
| phungductung | 0:e87aa4c49e95 | 222 | #define SPI_DATASIZE_9BIT ((uint32_t)0x0800) |
| phungductung | 0:e87aa4c49e95 | 223 | #define SPI_DATASIZE_10BIT ((uint32_t)0x0900) |
| phungductung | 0:e87aa4c49e95 | 224 | #define SPI_DATASIZE_11BIT ((uint32_t)0x0A00) |
| phungductung | 0:e87aa4c49e95 | 225 | #define SPI_DATASIZE_12BIT ((uint32_t)0x0B00) |
| phungductung | 0:e87aa4c49e95 | 226 | #define SPI_DATASIZE_13BIT ((uint32_t)0x0C00) |
| phungductung | 0:e87aa4c49e95 | 227 | #define SPI_DATASIZE_14BIT ((uint32_t)0x0D00) |
| phungductung | 0:e87aa4c49e95 | 228 | #define SPI_DATASIZE_15BIT ((uint32_t)0x0E00) |
| phungductung | 0:e87aa4c49e95 | 229 | #define SPI_DATASIZE_16BIT ((uint32_t)0x0F00) |
| phungductung | 0:e87aa4c49e95 | 230 | /** |
| phungductung | 0:e87aa4c49e95 | 231 | * @} |
| phungductung | 0:e87aa4c49e95 | 232 | */ |
| phungductung | 0:e87aa4c49e95 | 233 | |
| phungductung | 0:e87aa4c49e95 | 234 | /** @defgroup SPI_Clock_Polarity SPI Clock Polarity |
| phungductung | 0:e87aa4c49e95 | 235 | * @{ |
| phungductung | 0:e87aa4c49e95 | 236 | */ |
| phungductung | 0:e87aa4c49e95 | 237 | #define SPI_POLARITY_LOW ((uint32_t)0x00000000) |
| phungductung | 0:e87aa4c49e95 | 238 | #define SPI_POLARITY_HIGH SPI_CR1_CPOL |
| phungductung | 0:e87aa4c49e95 | 239 | /** |
| phungductung | 0:e87aa4c49e95 | 240 | * @} |
| phungductung | 0:e87aa4c49e95 | 241 | */ |
| phungductung | 0:e87aa4c49e95 | 242 | |
| phungductung | 0:e87aa4c49e95 | 243 | /** @defgroup SPI_Clock_Phase SPI Clock Phase |
| phungductung | 0:e87aa4c49e95 | 244 | * @{ |
| phungductung | 0:e87aa4c49e95 | 245 | */ |
| phungductung | 0:e87aa4c49e95 | 246 | #define SPI_PHASE_1EDGE ((uint32_t)0x00000000) |
| phungductung | 0:e87aa4c49e95 | 247 | #define SPI_PHASE_2EDGE SPI_CR1_CPHA |
| phungductung | 0:e87aa4c49e95 | 248 | /** |
| phungductung | 0:e87aa4c49e95 | 249 | * @} |
| phungductung | 0:e87aa4c49e95 | 250 | */ |
| phungductung | 0:e87aa4c49e95 | 251 | |
| phungductung | 0:e87aa4c49e95 | 252 | /** @defgroup SPI_Slave_Select_management SPI Slave Select management |
| phungductung | 0:e87aa4c49e95 | 253 | * @{ |
| phungductung | 0:e87aa4c49e95 | 254 | */ |
| phungductung | 0:e87aa4c49e95 | 255 | #define SPI_NSS_SOFT SPI_CR1_SSM |
| phungductung | 0:e87aa4c49e95 | 256 | #define SPI_NSS_HARD_INPUT ((uint32_t)0x00000000) |
| phungductung | 0:e87aa4c49e95 | 257 | #define SPI_NSS_HARD_OUTPUT ((uint32_t)0x00040000) |
| phungductung | 0:e87aa4c49e95 | 258 | /** |
| phungductung | 0:e87aa4c49e95 | 259 | * @} |
| phungductung | 0:e87aa4c49e95 | 260 | */ |
| phungductung | 0:e87aa4c49e95 | 261 | |
| phungductung | 0:e87aa4c49e95 | 262 | /** @defgroup SPI_NSSP_Mode SPI NSS Pulse Mode |
| phungductung | 0:e87aa4c49e95 | 263 | * @{ |
| phungductung | 0:e87aa4c49e95 | 264 | */ |
| phungductung | 0:e87aa4c49e95 | 265 | #define SPI_NSS_PULSE_ENABLE SPI_CR2_NSSP |
| phungductung | 0:e87aa4c49e95 | 266 | #define SPI_NSS_PULSE_DISABLE ((uint32_t)0x00000000) |
| phungductung | 0:e87aa4c49e95 | 267 | /** |
| phungductung | 0:e87aa4c49e95 | 268 | * @} |
| phungductung | 0:e87aa4c49e95 | 269 | */ |
| phungductung | 0:e87aa4c49e95 | 270 | |
| phungductung | 0:e87aa4c49e95 | 271 | /** @defgroup SPI_BaudRate_Prescaler SPI BaudRate Prescaler |
| phungductung | 0:e87aa4c49e95 | 272 | * @{ |
| phungductung | 0:e87aa4c49e95 | 273 | */ |
| phungductung | 0:e87aa4c49e95 | 274 | #define SPI_BAUDRATEPRESCALER_2 ((uint32_t)0x00000000) |
| phungductung | 0:e87aa4c49e95 | 275 | #define SPI_BAUDRATEPRESCALER_4 ((uint32_t)0x00000008) |
| phungductung | 0:e87aa4c49e95 | 276 | #define SPI_BAUDRATEPRESCALER_8 ((uint32_t)0x00000010) |
| phungductung | 0:e87aa4c49e95 | 277 | #define SPI_BAUDRATEPRESCALER_16 ((uint32_t)0x00000018) |
| phungductung | 0:e87aa4c49e95 | 278 | #define SPI_BAUDRATEPRESCALER_32 ((uint32_t)0x00000020) |
| phungductung | 0:e87aa4c49e95 | 279 | #define SPI_BAUDRATEPRESCALER_64 ((uint32_t)0x00000028) |
| phungductung | 0:e87aa4c49e95 | 280 | #define SPI_BAUDRATEPRESCALER_128 ((uint32_t)0x00000030) |
| phungductung | 0:e87aa4c49e95 | 281 | #define SPI_BAUDRATEPRESCALER_256 ((uint32_t)0x00000038) |
| phungductung | 0:e87aa4c49e95 | 282 | /** |
| phungductung | 0:e87aa4c49e95 | 283 | * @} |
| phungductung | 0:e87aa4c49e95 | 284 | */ |
| phungductung | 0:e87aa4c49e95 | 285 | |
| phungductung | 0:e87aa4c49e95 | 286 | /** @defgroup SPI_MSB_LSB_transmission SPI MSB LSB transmission |
| phungductung | 0:e87aa4c49e95 | 287 | * @{ |
| phungductung | 0:e87aa4c49e95 | 288 | */ |
| phungductung | 0:e87aa4c49e95 | 289 | #define SPI_FIRSTBIT_MSB ((uint32_t)0x00000000) |
| phungductung | 0:e87aa4c49e95 | 290 | #define SPI_FIRSTBIT_LSB SPI_CR1_LSBFIRST |
| phungductung | 0:e87aa4c49e95 | 291 | /** |
| phungductung | 0:e87aa4c49e95 | 292 | * @} |
| phungductung | 0:e87aa4c49e95 | 293 | */ |
| phungductung | 0:e87aa4c49e95 | 294 | |
| phungductung | 0:e87aa4c49e95 | 295 | /** @defgroup SPI_TI_mode SPI TI mode |
| phungductung | 0:e87aa4c49e95 | 296 | * @{ |
| phungductung | 0:e87aa4c49e95 | 297 | */ |
| phungductung | 0:e87aa4c49e95 | 298 | #define SPI_TIMODE_DISABLE ((uint32_t)0x00000000) |
| phungductung | 0:e87aa4c49e95 | 299 | #define SPI_TIMODE_ENABLE SPI_CR2_FRF |
| phungductung | 0:e87aa4c49e95 | 300 | /** |
| phungductung | 0:e87aa4c49e95 | 301 | * @} |
| phungductung | 0:e87aa4c49e95 | 302 | */ |
| phungductung | 0:e87aa4c49e95 | 303 | |
| phungductung | 0:e87aa4c49e95 | 304 | /** @defgroup SPI_CRC_Calculation SPI CRC Calculation |
| phungductung | 0:e87aa4c49e95 | 305 | * @{ |
| phungductung | 0:e87aa4c49e95 | 306 | */ |
| phungductung | 0:e87aa4c49e95 | 307 | #define SPI_CRCCALCULATION_DISABLE ((uint32_t)0x00000000) |
| phungductung | 0:e87aa4c49e95 | 308 | #define SPI_CRCCALCULATION_ENABLE SPI_CR1_CRCEN |
| phungductung | 0:e87aa4c49e95 | 309 | /** |
| phungductung | 0:e87aa4c49e95 | 310 | * @} |
| phungductung | 0:e87aa4c49e95 | 311 | */ |
| phungductung | 0:e87aa4c49e95 | 312 | |
| phungductung | 0:e87aa4c49e95 | 313 | /** @defgroup SPI_CRC_length SPI CRC Length |
| phungductung | 0:e87aa4c49e95 | 314 | * @{ |
| phungductung | 0:e87aa4c49e95 | 315 | * This parameter can be one of the following values: |
| phungductung | 0:e87aa4c49e95 | 316 | * SPI_CRC_LENGTH_DATASIZE: aligned with the data size |
| phungductung | 0:e87aa4c49e95 | 317 | * SPI_CRC_LENGTH_8BIT : CRC 8bit |
| phungductung | 0:e87aa4c49e95 | 318 | * SPI_CRC_LENGTH_16BIT : CRC 16bit |
| phungductung | 0:e87aa4c49e95 | 319 | */ |
| phungductung | 0:e87aa4c49e95 | 320 | #define SPI_CRC_LENGTH_DATASIZE ((uint32_t)0x00000000) |
| phungductung | 0:e87aa4c49e95 | 321 | #define SPI_CRC_LENGTH_8BIT ((uint32_t)0x00000001) |
| phungductung | 0:e87aa4c49e95 | 322 | #define SPI_CRC_LENGTH_16BIT ((uint32_t)0x00000002) |
| phungductung | 0:e87aa4c49e95 | 323 | /** |
| phungductung | 0:e87aa4c49e95 | 324 | * @} |
| phungductung | 0:e87aa4c49e95 | 325 | */ |
| phungductung | 0:e87aa4c49e95 | 326 | |
| phungductung | 0:e87aa4c49e95 | 327 | /** @defgroup SPI_FIFO_reception_threshold SPI FIFO Reception Threshold |
| phungductung | 0:e87aa4c49e95 | 328 | * @{ |
| phungductung | 0:e87aa4c49e95 | 329 | * This parameter can be one of the following values: |
| phungductung | 0:e87aa4c49e95 | 330 | * SPI_RXFIFO_THRESHOLD or SPI_RXFIFO_THRESHOLD_QF : |
| phungductung | 0:e87aa4c49e95 | 331 | * RXNE event is generated if the FIFO |
| phungductung | 0:e87aa4c49e95 | 332 | * level is greater or equal to 1/2(16-bits). |
| phungductung | 0:e87aa4c49e95 | 333 | * SPI_RXFIFO_THRESHOLD_HF: RXNE event is generated if the FIFO |
| phungductung | 0:e87aa4c49e95 | 334 | * level is greater or equal to 1/4(8 bits). */ |
| phungductung | 0:e87aa4c49e95 | 335 | #define SPI_RXFIFO_THRESHOLD SPI_CR2_FRXTH |
| phungductung | 0:e87aa4c49e95 | 336 | #define SPI_RXFIFO_THRESHOLD_QF SPI_CR2_FRXTH |
| phungductung | 0:e87aa4c49e95 | 337 | #define SPI_RXFIFO_THRESHOLD_HF ((uint32_t)0x00000000) |
| phungductung | 0:e87aa4c49e95 | 338 | |
| phungductung | 0:e87aa4c49e95 | 339 | /** |
| phungductung | 0:e87aa4c49e95 | 340 | * @} |
| phungductung | 0:e87aa4c49e95 | 341 | */ |
| phungductung | 0:e87aa4c49e95 | 342 | |
| phungductung | 0:e87aa4c49e95 | 343 | /** @defgroup SPI_Interrupt_configuration_definition SPI Interrupt configuration definition |
| phungductung | 0:e87aa4c49e95 | 344 | * @brief SPI Interrupt definition |
| phungductung | 0:e87aa4c49e95 | 345 | * Elements values convention: 0xXXXXXXXX |
| phungductung | 0:e87aa4c49e95 | 346 | * - XXXXXXXX : Interrupt control mask |
| phungductung | 0:e87aa4c49e95 | 347 | * @{ |
| phungductung | 0:e87aa4c49e95 | 348 | */ |
| phungductung | 0:e87aa4c49e95 | 349 | #define SPI_IT_TXE SPI_CR2_TXEIE |
| phungductung | 0:e87aa4c49e95 | 350 | #define SPI_IT_RXNE SPI_CR2_RXNEIE |
| phungductung | 0:e87aa4c49e95 | 351 | #define SPI_IT_ERR SPI_CR2_ERRIE |
| phungductung | 0:e87aa4c49e95 | 352 | /** |
| phungductung | 0:e87aa4c49e95 | 353 | * @} |
| phungductung | 0:e87aa4c49e95 | 354 | */ |
| phungductung | 0:e87aa4c49e95 | 355 | |
| phungductung | 0:e87aa4c49e95 | 356 | |
| phungductung | 0:e87aa4c49e95 | 357 | /** @defgroup SPI_Flag_definition SPI Flag definition |
| phungductung | 0:e87aa4c49e95 | 358 | * @brief Flag definition |
| phungductung | 0:e87aa4c49e95 | 359 | * Elements values convention: 0xXXXXYYYY |
| phungductung | 0:e87aa4c49e95 | 360 | * - XXXX : Flag register Index |
| phungductung | 0:e87aa4c49e95 | 361 | * - YYYY : Flag mask |
| phungductung | 0:e87aa4c49e95 | 362 | * @{ |
| phungductung | 0:e87aa4c49e95 | 363 | */ |
| phungductung | 0:e87aa4c49e95 | 364 | #define SPI_FLAG_RXNE SPI_SR_RXNE /* SPI status flag: Rx buffer not empty flag */ |
| phungductung | 0:e87aa4c49e95 | 365 | #define SPI_FLAG_TXE SPI_SR_TXE /* SPI status flag: Tx buffer empty flag */ |
| phungductung | 0:e87aa4c49e95 | 366 | #define SPI_FLAG_BSY SPI_SR_BSY /* SPI status flag: Busy flag */ |
| phungductung | 0:e87aa4c49e95 | 367 | #define SPI_FLAG_CRCERR SPI_SR_CRCERR /* SPI Error flag: CRC error flag */ |
| phungductung | 0:e87aa4c49e95 | 368 | #define SPI_FLAG_MODF SPI_SR_MODF /* SPI Error flag: Mode fault flag */ |
| phungductung | 0:e87aa4c49e95 | 369 | #define SPI_FLAG_OVR SPI_SR_OVR /* SPI Error flag: Overrun flag */ |
| phungductung | 0:e87aa4c49e95 | 370 | #define SPI_FLAG_FRE SPI_SR_FRE /* SPI Error flag: TI mode frame format error flag */ |
| phungductung | 0:e87aa4c49e95 | 371 | #define SPI_FLAG_FTLVL SPI_SR_FTLVL /* SPI fifo transmission level */ |
| phungductung | 0:e87aa4c49e95 | 372 | #define SPI_FLAG_FRLVL SPI_SR_FRLVL /* SPI fifo reception level */ |
| phungductung | 0:e87aa4c49e95 | 373 | /** |
| phungductung | 0:e87aa4c49e95 | 374 | * @} |
| phungductung | 0:e87aa4c49e95 | 375 | */ |
| phungductung | 0:e87aa4c49e95 | 376 | |
| phungductung | 0:e87aa4c49e95 | 377 | /** @defgroup SPI_transmission_fifo_status_level SPI Transmission FIFO Status Level |
| phungductung | 0:e87aa4c49e95 | 378 | * @{ |
| phungductung | 0:e87aa4c49e95 | 379 | */ |
| phungductung | 0:e87aa4c49e95 | 380 | #define SPI_FTLVL_EMPTY ((uint32_t)0x0000) |
| phungductung | 0:e87aa4c49e95 | 381 | #define SPI_FTLVL_QUARTER_FULL ((uint32_t)0x0800) |
| phungductung | 0:e87aa4c49e95 | 382 | #define SPI_FTLVL_HALF_FULL ((uint32_t)0x1000) |
| phungductung | 0:e87aa4c49e95 | 383 | #define SPI_FTLVL_FULL ((uint32_t)0x1800) |
| phungductung | 0:e87aa4c49e95 | 384 | |
| phungductung | 0:e87aa4c49e95 | 385 | /** |
| phungductung | 0:e87aa4c49e95 | 386 | * @} |
| phungductung | 0:e87aa4c49e95 | 387 | */ |
| phungductung | 0:e87aa4c49e95 | 388 | |
| phungductung | 0:e87aa4c49e95 | 389 | /** @defgroup SPI_reception_fifo_status_level SPI Reception FIFO Status Level |
| phungductung | 0:e87aa4c49e95 | 390 | * @{ |
| phungductung | 0:e87aa4c49e95 | 391 | */ |
| phungductung | 0:e87aa4c49e95 | 392 | #define SPI_FRLVL_EMPTY ((uint32_t)0x0000) |
| phungductung | 0:e87aa4c49e95 | 393 | #define SPI_FRLVL_QUARTER_FULL ((uint32_t)0x0200) |
| phungductung | 0:e87aa4c49e95 | 394 | #define SPI_FRLVL_HALF_FULL ((uint32_t)0x0400) |
| phungductung | 0:e87aa4c49e95 | 395 | #define SPI_FRLVL_FULL ((uint32_t)0x0600) |
| phungductung | 0:e87aa4c49e95 | 396 | /** |
| phungductung | 0:e87aa4c49e95 | 397 | * @} |
| phungductung | 0:e87aa4c49e95 | 398 | */ |
| phungductung | 0:e87aa4c49e95 | 399 | |
| phungductung | 0:e87aa4c49e95 | 400 | /** |
| phungductung | 0:e87aa4c49e95 | 401 | * @} |
| phungductung | 0:e87aa4c49e95 | 402 | */ |
| phungductung | 0:e87aa4c49e95 | 403 | |
| phungductung | 0:e87aa4c49e95 | 404 | /* Exported macros ------------------------------------------------------------*/ |
| phungductung | 0:e87aa4c49e95 | 405 | /** @defgroup SPI_Exported_Macros SPI Exported Macros |
| phungductung | 0:e87aa4c49e95 | 406 | * @{ |
| phungductung | 0:e87aa4c49e95 | 407 | */ |
| phungductung | 0:e87aa4c49e95 | 408 | |
| phungductung | 0:e87aa4c49e95 | 409 | /** @brief Reset SPI handle state |
| phungductung | 0:e87aa4c49e95 | 410 | * @param __HANDLE__: SPI handle. |
| phungductung | 0:e87aa4c49e95 | 411 | * @retval None |
| phungductung | 0:e87aa4c49e95 | 412 | */ |
| phungductung | 0:e87aa4c49e95 | 413 | #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET) |
| phungductung | 0:e87aa4c49e95 | 414 | |
| phungductung | 0:e87aa4c49e95 | 415 | /** @brief Enables or disables the specified SPI interrupts. |
| phungductung | 0:e87aa4c49e95 | 416 | * @param __HANDLE__ : specifies the SPI Handle. |
| phungductung | 0:e87aa4c49e95 | 417 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| phungductung | 0:e87aa4c49e95 | 418 | * @param __INTERRUPT__ : specifies the interrupt source to enable or disable. |
| phungductung | 0:e87aa4c49e95 | 419 | * This parameter can be one of the following values: |
| phungductung | 0:e87aa4c49e95 | 420 | * @arg SPI_IT_TXE: Tx buffer empty interrupt enable |
| phungductung | 0:e87aa4c49e95 | 421 | * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable |
| phungductung | 0:e87aa4c49e95 | 422 | * @arg SPI_IT_ERR: Error interrupt enable |
| phungductung | 0:e87aa4c49e95 | 423 | * @retval None |
| phungductung | 0:e87aa4c49e95 | 424 | */ |
| phungductung | 0:e87aa4c49e95 | 425 | #define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__)) |
| phungductung | 0:e87aa4c49e95 | 426 | #define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= (~(__INTERRUPT__))) |
| phungductung | 0:e87aa4c49e95 | 427 | |
| phungductung | 0:e87aa4c49e95 | 428 | /** @brief Checks if the specified SPI interrupt source is enabled or disabled. |
| phungductung | 0:e87aa4c49e95 | 429 | * @param __HANDLE__ : specifies the SPI Handle. |
| phungductung | 0:e87aa4c49e95 | 430 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| phungductung | 0:e87aa4c49e95 | 431 | * @param __INTERRUPT__ : specifies the SPI interrupt source to check. |
| phungductung | 0:e87aa4c49e95 | 432 | * This parameter can be one of the following values: |
| phungductung | 0:e87aa4c49e95 | 433 | * @arg SPI_IT_TXE: Tx buffer empty interrupt enable |
| phungductung | 0:e87aa4c49e95 | 434 | * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable |
| phungductung | 0:e87aa4c49e95 | 435 | * @arg SPI_IT_ERR: Error interrupt enable |
| phungductung | 0:e87aa4c49e95 | 436 | * @retval The new state of __IT__ (TRUE or FALSE). |
| phungductung | 0:e87aa4c49e95 | 437 | */ |
| phungductung | 0:e87aa4c49e95 | 438 | #define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
| phungductung | 0:e87aa4c49e95 | 439 | |
| phungductung | 0:e87aa4c49e95 | 440 | /** @brief Checks whether the specified SPI flag is set or not. |
| phungductung | 0:e87aa4c49e95 | 441 | * @param __HANDLE__ : specifies the SPI Handle. |
| phungductung | 0:e87aa4c49e95 | 442 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| phungductung | 0:e87aa4c49e95 | 443 | * @param __FLAG__ : specifies the flag to check. |
| phungductung | 0:e87aa4c49e95 | 444 | * This parameter can be one of the following values: |
| phungductung | 0:e87aa4c49e95 | 445 | * @arg SPI_FLAG_RXNE: Receive buffer not empty flag |
| phungductung | 0:e87aa4c49e95 | 446 | * @arg SPI_FLAG_TXE: Transmit buffer empty flag |
| phungductung | 0:e87aa4c49e95 | 447 | * @arg SPI_FLAG_CRCERR: CRC error flag |
| phungductung | 0:e87aa4c49e95 | 448 | * @arg SPI_FLAG_MODF: Mode fault flag |
| phungductung | 0:e87aa4c49e95 | 449 | * @arg SPI_FLAG_OVR: Overrun flag |
| phungductung | 0:e87aa4c49e95 | 450 | * @arg SPI_FLAG_BSY: Busy flag |
| phungductung | 0:e87aa4c49e95 | 451 | * @arg SPI_FLAG_FRE: Frame format error flag |
| phungductung | 0:e87aa4c49e95 | 452 | * @arg SPI_FLAG_FTLVL: SPI fifo transmission level |
| phungductung | 0:e87aa4c49e95 | 453 | * @arg SPI_FLAG_FRLVL: SPI fifo reception level |
| phungductung | 0:e87aa4c49e95 | 454 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
| phungductung | 0:e87aa4c49e95 | 455 | */ |
| phungductung | 0:e87aa4c49e95 | 456 | #define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) |
| phungductung | 0:e87aa4c49e95 | 457 | |
| phungductung | 0:e87aa4c49e95 | 458 | /** @brief Clears the SPI CRCERR pending flag. |
| phungductung | 0:e87aa4c49e95 | 459 | * @param __HANDLE__ : specifies the SPI Handle. |
| phungductung | 0:e87aa4c49e95 | 460 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| phungductung | 0:e87aa4c49e95 | 461 | * @retval None |
| phungductung | 0:e87aa4c49e95 | 462 | */ |
| phungductung | 0:e87aa4c49e95 | 463 | #define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR = (uint16_t)(~SPI_FLAG_CRCERR)) |
| phungductung | 0:e87aa4c49e95 | 464 | |
| phungductung | 0:e87aa4c49e95 | 465 | /** @brief Clears the SPI MODF pending flag. |
| phungductung | 0:e87aa4c49e95 | 466 | * @param __HANDLE__ : specifies the SPI Handle. |
| phungductung | 0:e87aa4c49e95 | 467 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| phungductung | 0:e87aa4c49e95 | 468 | * |
| phungductung | 0:e87aa4c49e95 | 469 | * @retval None |
| phungductung | 0:e87aa4c49e95 | 470 | */ |
| phungductung | 0:e87aa4c49e95 | 471 | #define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__) \ |
| phungductung | 0:e87aa4c49e95 | 472 | do{ \ |
| phungductung | 0:e87aa4c49e95 | 473 | __IO uint32_t tmpreg = 0x00; \ |
| phungductung | 0:e87aa4c49e95 | 474 | tmpreg = (__HANDLE__)->Instance->SR; \ |
| phungductung | 0:e87aa4c49e95 | 475 | (__HANDLE__)->Instance->CR1 &= (~SPI_CR1_SPE); \ |
| phungductung | 0:e87aa4c49e95 | 476 | UNUSED(tmpreg); \ |
| phungductung | 0:e87aa4c49e95 | 477 | } while(0) |
| phungductung | 0:e87aa4c49e95 | 478 | |
| phungductung | 0:e87aa4c49e95 | 479 | /** @brief Clears the SPI OVR pending flag. |
| phungductung | 0:e87aa4c49e95 | 480 | * @param __HANDLE__ : specifies the SPI Handle. |
| phungductung | 0:e87aa4c49e95 | 481 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| phungductung | 0:e87aa4c49e95 | 482 | * |
| phungductung | 0:e87aa4c49e95 | 483 | * @retval None |
| phungductung | 0:e87aa4c49e95 | 484 | */ |
| phungductung | 0:e87aa4c49e95 | 485 | #define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__) \ |
| phungductung | 0:e87aa4c49e95 | 486 | do{ \ |
| phungductung | 0:e87aa4c49e95 | 487 | __IO uint32_t tmpreg = 0x00; \ |
| phungductung | 0:e87aa4c49e95 | 488 | tmpreg = (__HANDLE__)->Instance->DR; \ |
| phungductung | 0:e87aa4c49e95 | 489 | tmpreg = (__HANDLE__)->Instance->SR; \ |
| phungductung | 0:e87aa4c49e95 | 490 | UNUSED(tmpreg); \ |
| phungductung | 0:e87aa4c49e95 | 491 | } while(0) |
| phungductung | 0:e87aa4c49e95 | 492 | |
| phungductung | 0:e87aa4c49e95 | 493 | /** @brief Clears the SPI FRE pending flag. |
| phungductung | 0:e87aa4c49e95 | 494 | * @param __HANDLE__ : specifies the SPI Handle. |
| phungductung | 0:e87aa4c49e95 | 495 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| phungductung | 0:e87aa4c49e95 | 496 | * |
| phungductung | 0:e87aa4c49e95 | 497 | * @retval None |
| phungductung | 0:e87aa4c49e95 | 498 | */ |
| phungductung | 0:e87aa4c49e95 | 499 | #define __HAL_SPI_CLEAR_FREFLAG(__HANDLE__) \ |
| phungductung | 0:e87aa4c49e95 | 500 | do{ \ |
| phungductung | 0:e87aa4c49e95 | 501 | __IO uint32_t tmpreg = 0x00; \ |
| phungductung | 0:e87aa4c49e95 | 502 | tmpreg = (__HANDLE__)->Instance->SR; \ |
| phungductung | 0:e87aa4c49e95 | 503 | UNUSED(tmpreg); \ |
| phungductung | 0:e87aa4c49e95 | 504 | } while(0) |
| phungductung | 0:e87aa4c49e95 | 505 | |
| phungductung | 0:e87aa4c49e95 | 506 | /** @brief Enables the SPI. |
| phungductung | 0:e87aa4c49e95 | 507 | * @param __HANDLE__ : specifies the SPI Handle. |
| phungductung | 0:e87aa4c49e95 | 508 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| phungductung | 0:e87aa4c49e95 | 509 | * @retval None |
| phungductung | 0:e87aa4c49e95 | 510 | */ |
| phungductung | 0:e87aa4c49e95 | 511 | #define __HAL_SPI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_SPE) |
| phungductung | 0:e87aa4c49e95 | 512 | |
| phungductung | 0:e87aa4c49e95 | 513 | /** @brief Disables the SPI. |
| phungductung | 0:e87aa4c49e95 | 514 | * @param __HANDLE__ : specifies the SPI Handle. |
| phungductung | 0:e87aa4c49e95 | 515 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| phungductung | 0:e87aa4c49e95 | 516 | * @retval None |
| phungductung | 0:e87aa4c49e95 | 517 | */ |
| phungductung | 0:e87aa4c49e95 | 518 | #define __HAL_SPI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= (~SPI_CR1_SPE)) |
| phungductung | 0:e87aa4c49e95 | 519 | |
| phungductung | 0:e87aa4c49e95 | 520 | /** |
| phungductung | 0:e87aa4c49e95 | 521 | * @} |
| phungductung | 0:e87aa4c49e95 | 522 | */ |
| phungductung | 0:e87aa4c49e95 | 523 | |
| phungductung | 0:e87aa4c49e95 | 524 | /* Private macros --------------------------------------------------------*/ |
| phungductung | 0:e87aa4c49e95 | 525 | /** @defgroup SPI_Private_Macros SPI Private Macros |
| phungductung | 0:e87aa4c49e95 | 526 | * @{ |
| phungductung | 0:e87aa4c49e95 | 527 | */ |
| phungductung | 0:e87aa4c49e95 | 528 | |
| phungductung | 0:e87aa4c49e95 | 529 | /** @brief Sets the SPI transmit-only mode. |
| phungductung | 0:e87aa4c49e95 | 530 | * @param __HANDLE__ : specifies the SPI Handle. |
| phungductung | 0:e87aa4c49e95 | 531 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| phungductung | 0:e87aa4c49e95 | 532 | * @retval None |
| phungductung | 0:e87aa4c49e95 | 533 | */ |
| phungductung | 0:e87aa4c49e95 | 534 | #define SPI_1LINE_TX(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_BIDIOE) |
| phungductung | 0:e87aa4c49e95 | 535 | |
| phungductung | 0:e87aa4c49e95 | 536 | /** @brief Sets the SPI receive-only mode. |
| phungductung | 0:e87aa4c49e95 | 537 | * @param __HANDLE__ : specifies the SPI Handle. |
| phungductung | 0:e87aa4c49e95 | 538 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| phungductung | 0:e87aa4c49e95 | 539 | * @retval None |
| phungductung | 0:e87aa4c49e95 | 540 | */ |
| phungductung | 0:e87aa4c49e95 | 541 | #define SPI_1LINE_RX(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= (~SPI_CR1_BIDIOE)) |
| phungductung | 0:e87aa4c49e95 | 542 | |
| phungductung | 0:e87aa4c49e95 | 543 | /** @brief Resets the CRC calculation of the SPI. |
| phungductung | 0:e87aa4c49e95 | 544 | * @param __HANDLE__ : specifies the SPI Handle. |
| phungductung | 0:e87aa4c49e95 | 545 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| phungductung | 0:e87aa4c49e95 | 546 | * @retval None |
| phungductung | 0:e87aa4c49e95 | 547 | */ |
| phungductung | 0:e87aa4c49e95 | 548 | #define SPI_RESET_CRC(__HANDLE__) do{(__HANDLE__)->Instance->CR1 &= (uint16_t)(~SPI_CR1_CRCEN);\ |
| phungductung | 0:e87aa4c49e95 | 549 | (__HANDLE__)->Instance->CR1 |= SPI_CR1_CRCEN;}while(0) |
| phungductung | 0:e87aa4c49e95 | 550 | |
| phungductung | 0:e87aa4c49e95 | 551 | #define IS_SPI_MODE(MODE) (((MODE) == SPI_MODE_SLAVE) || \ |
| phungductung | 0:e87aa4c49e95 | 552 | ((MODE) == SPI_MODE_MASTER)) |
| phungductung | 0:e87aa4c49e95 | 553 | |
| phungductung | 0:e87aa4c49e95 | 554 | #define IS_SPI_DIRECTION(MODE) (((MODE) == SPI_DIRECTION_2LINES) || \ |
| phungductung | 0:e87aa4c49e95 | 555 | ((MODE) == SPI_DIRECTION_2LINES_RXONLY) ||\ |
| phungductung | 0:e87aa4c49e95 | 556 | ((MODE) == SPI_DIRECTION_1LINE)) |
| phungductung | 0:e87aa4c49e95 | 557 | |
| phungductung | 0:e87aa4c49e95 | 558 | #define IS_SPI_DIRECTION_2LINES(MODE) ((MODE) == SPI_DIRECTION_2LINES) |
| phungductung | 0:e87aa4c49e95 | 559 | |
| phungductung | 0:e87aa4c49e95 | 560 | #define IS_SPI_DIRECTION_2LINES_OR_1LINE(MODE) (((MODE) == SPI_DIRECTION_2LINES)|| \ |
| phungductung | 0:e87aa4c49e95 | 561 | ((MODE) == SPI_DIRECTION_1LINE)) |
| phungductung | 0:e87aa4c49e95 | 562 | |
| phungductung | 0:e87aa4c49e95 | 563 | #define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DATASIZE_16BIT) || \ |
| phungductung | 0:e87aa4c49e95 | 564 | ((DATASIZE) == SPI_DATASIZE_15BIT) || \ |
| phungductung | 0:e87aa4c49e95 | 565 | ((DATASIZE) == SPI_DATASIZE_14BIT) || \ |
| phungductung | 0:e87aa4c49e95 | 566 | ((DATASIZE) == SPI_DATASIZE_13BIT) || \ |
| phungductung | 0:e87aa4c49e95 | 567 | ((DATASIZE) == SPI_DATASIZE_12BIT) || \ |
| phungductung | 0:e87aa4c49e95 | 568 | ((DATASIZE) == SPI_DATASIZE_11BIT) || \ |
| phungductung | 0:e87aa4c49e95 | 569 | ((DATASIZE) == SPI_DATASIZE_10BIT) || \ |
| phungductung | 0:e87aa4c49e95 | 570 | ((DATASIZE) == SPI_DATASIZE_9BIT) || \ |
| phungductung | 0:e87aa4c49e95 | 571 | ((DATASIZE) == SPI_DATASIZE_8BIT) || \ |
| phungductung | 0:e87aa4c49e95 | 572 | ((DATASIZE) == SPI_DATASIZE_7BIT) || \ |
| phungductung | 0:e87aa4c49e95 | 573 | ((DATASIZE) == SPI_DATASIZE_6BIT) || \ |
| phungductung | 0:e87aa4c49e95 | 574 | ((DATASIZE) == SPI_DATASIZE_5BIT) || \ |
| phungductung | 0:e87aa4c49e95 | 575 | ((DATASIZE) == SPI_DATASIZE_4BIT)) |
| phungductung | 0:e87aa4c49e95 | 576 | |
| phungductung | 0:e87aa4c49e95 | 577 | #define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_POLARITY_LOW) || \ |
| phungductung | 0:e87aa4c49e95 | 578 | ((CPOL) == SPI_POLARITY_HIGH)) |
| phungductung | 0:e87aa4c49e95 | 579 | |
| phungductung | 0:e87aa4c49e95 | 580 | #define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_PHASE_1EDGE) || \ |
| phungductung | 0:e87aa4c49e95 | 581 | ((CPHA) == SPI_PHASE_2EDGE)) |
| phungductung | 0:e87aa4c49e95 | 582 | |
| phungductung | 0:e87aa4c49e95 | 583 | #define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_SOFT) || \ |
| phungductung | 0:e87aa4c49e95 | 584 | ((NSS) == SPI_NSS_HARD_INPUT) || \ |
| phungductung | 0:e87aa4c49e95 | 585 | ((NSS) == SPI_NSS_HARD_OUTPUT)) |
| phungductung | 0:e87aa4c49e95 | 586 | |
| phungductung | 0:e87aa4c49e95 | 587 | #define IS_SPI_NSSP(NSSP) (((NSSP) == SPI_NSS_PULSE_ENABLE) || \ |
| phungductung | 0:e87aa4c49e95 | 588 | ((NSSP) == SPI_NSS_PULSE_DISABLE)) |
| phungductung | 0:e87aa4c49e95 | 589 | |
| phungductung | 0:e87aa4c49e95 | 590 | #define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BAUDRATEPRESCALER_2) || \ |
| phungductung | 0:e87aa4c49e95 | 591 | ((PRESCALER) == SPI_BAUDRATEPRESCALER_4) || \ |
| phungductung | 0:e87aa4c49e95 | 592 | ((PRESCALER) == SPI_BAUDRATEPRESCALER_8) || \ |
| phungductung | 0:e87aa4c49e95 | 593 | ((PRESCALER) == SPI_BAUDRATEPRESCALER_16) || \ |
| phungductung | 0:e87aa4c49e95 | 594 | ((PRESCALER) == SPI_BAUDRATEPRESCALER_32) || \ |
| phungductung | 0:e87aa4c49e95 | 595 | ((PRESCALER) == SPI_BAUDRATEPRESCALER_64) || \ |
| phungductung | 0:e87aa4c49e95 | 596 | ((PRESCALER) == SPI_BAUDRATEPRESCALER_128) || \ |
| phungductung | 0:e87aa4c49e95 | 597 | ((PRESCALER) == SPI_BAUDRATEPRESCALER_256)) |
| phungductung | 0:e87aa4c49e95 | 598 | |
| phungductung | 0:e87aa4c49e95 | 599 | #define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FIRSTBIT_MSB) || \ |
| phungductung | 0:e87aa4c49e95 | 600 | ((BIT) == SPI_FIRSTBIT_LSB)) |
| phungductung | 0:e87aa4c49e95 | 601 | |
| phungductung | 0:e87aa4c49e95 | 602 | #define IS_SPI_TIMODE(MODE) (((MODE) == SPI_TIMODE_DISABLE) || \ |
| phungductung | 0:e87aa4c49e95 | 603 | ((MODE) == SPI_TIMODE_ENABLE)) |
| phungductung | 0:e87aa4c49e95 | 604 | |
| phungductung | 0:e87aa4c49e95 | 605 | #define IS_SPI_CRC_CALCULATION(CALCULATION) (((CALCULATION) == SPI_CRCCALCULATION_DISABLE) || \ |
| phungductung | 0:e87aa4c49e95 | 606 | ((CALCULATION) == SPI_CRCCALCULATION_ENABLE)) |
| phungductung | 0:e87aa4c49e95 | 607 | |
| phungductung | 0:e87aa4c49e95 | 608 | #define IS_SPI_CRC_LENGTH(LENGTH) (((LENGTH) == SPI_CRC_LENGTH_DATASIZE) ||\ |
| phungductung | 0:e87aa4c49e95 | 609 | ((LENGTH) == SPI_CRC_LENGTH_8BIT) || \ |
| phungductung | 0:e87aa4c49e95 | 610 | ((LENGTH) == SPI_CRC_LENGTH_16BIT)) |
| phungductung | 0:e87aa4c49e95 | 611 | |
| phungductung | 0:e87aa4c49e95 | 612 | #define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) (((POLYNOMIAL) >= 0x1) && ((POLYNOMIAL) <= 0xFFFF)) |
| phungductung | 0:e87aa4c49e95 | 613 | |
| phungductung | 0:e87aa4c49e95 | 614 | |
| phungductung | 0:e87aa4c49e95 | 615 | /** |
| phungductung | 0:e87aa4c49e95 | 616 | * @} |
| phungductung | 0:e87aa4c49e95 | 617 | */ |
| phungductung | 0:e87aa4c49e95 | 618 | |
| phungductung | 0:e87aa4c49e95 | 619 | /* Exported functions --------------------------------------------------------*/ |
| phungductung | 0:e87aa4c49e95 | 620 | /** @addtogroup SPI_Exported_Functions SPI Exported Functions |
| phungductung | 0:e87aa4c49e95 | 621 | * @{ |
| phungductung | 0:e87aa4c49e95 | 622 | */ |
| phungductung | 0:e87aa4c49e95 | 623 | |
| phungductung | 0:e87aa4c49e95 | 624 | /** @addtogroup SPI_Exported_Functions_Group1 Initialization and de-initialization functions |
| phungductung | 0:e87aa4c49e95 | 625 | * @{ |
| phungductung | 0:e87aa4c49e95 | 626 | */ |
| phungductung | 0:e87aa4c49e95 | 627 | |
| phungductung | 0:e87aa4c49e95 | 628 | /* Initialization and de-initialization functions ****************************/ |
| phungductung | 0:e87aa4c49e95 | 629 | HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi); |
| phungductung | 0:e87aa4c49e95 | 630 | HAL_StatusTypeDef HAL_SPI_DeInit (SPI_HandleTypeDef *hspi); |
| phungductung | 0:e87aa4c49e95 | 631 | void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi); |
| phungductung | 0:e87aa4c49e95 | 632 | void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi); |
| phungductung | 0:e87aa4c49e95 | 633 | /** |
| phungductung | 0:e87aa4c49e95 | 634 | * @} |
| phungductung | 0:e87aa4c49e95 | 635 | */ |
| phungductung | 0:e87aa4c49e95 | 636 | |
| phungductung | 0:e87aa4c49e95 | 637 | /** @addtogroup SPI_Exported_Functions_Group2 IO operation functions |
| phungductung | 0:e87aa4c49e95 | 638 | * @{ |
| phungductung | 0:e87aa4c49e95 | 639 | */ |
| phungductung | 0:e87aa4c49e95 | 640 | |
| phungductung | 0:e87aa4c49e95 | 641 | /* IO operation functions *****************************************************/ |
| phungductung | 0:e87aa4c49e95 | 642 | HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
| phungductung | 0:e87aa4c49e95 | 643 | HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
| phungductung | 0:e87aa4c49e95 | 644 | HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout); |
| phungductung | 0:e87aa4c49e95 | 645 | HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); |
| phungductung | 0:e87aa4c49e95 | 646 | HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); |
| phungductung | 0:e87aa4c49e95 | 647 | HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size); |
| phungductung | 0:e87aa4c49e95 | 648 | HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); |
| phungductung | 0:e87aa4c49e95 | 649 | HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); |
| phungductung | 0:e87aa4c49e95 | 650 | HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size); |
| phungductung | 0:e87aa4c49e95 | 651 | HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi); |
| phungductung | 0:e87aa4c49e95 | 652 | HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi); |
| phungductung | 0:e87aa4c49e95 | 653 | HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi); |
| phungductung | 0:e87aa4c49e95 | 654 | |
| phungductung | 0:e87aa4c49e95 | 655 | void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi); |
| phungductung | 0:e87aa4c49e95 | 656 | void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi); |
| phungductung | 0:e87aa4c49e95 | 657 | void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi); |
| phungductung | 0:e87aa4c49e95 | 658 | void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi); |
| phungductung | 0:e87aa4c49e95 | 659 | void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi); |
| phungductung | 0:e87aa4c49e95 | 660 | void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi); |
| phungductung | 0:e87aa4c49e95 | 661 | void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi); |
| phungductung | 0:e87aa4c49e95 | 662 | void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi); |
| phungductung | 0:e87aa4c49e95 | 663 | /** |
| phungductung | 0:e87aa4c49e95 | 664 | * @} |
| phungductung | 0:e87aa4c49e95 | 665 | */ |
| phungductung | 0:e87aa4c49e95 | 666 | |
| phungductung | 0:e87aa4c49e95 | 667 | /** @addtogroup SPI_Exported_Functions_Group3 Peripheral State and Errors functions |
| phungductung | 0:e87aa4c49e95 | 668 | * @{ |
| phungductung | 0:e87aa4c49e95 | 669 | */ |
| phungductung | 0:e87aa4c49e95 | 670 | |
| phungductung | 0:e87aa4c49e95 | 671 | /* Peripheral State and Error functions ***************************************/ |
| phungductung | 0:e87aa4c49e95 | 672 | HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi); |
| phungductung | 0:e87aa4c49e95 | 673 | uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi); |
| phungductung | 0:e87aa4c49e95 | 674 | /** |
| phungductung | 0:e87aa4c49e95 | 675 | * @} |
| phungductung | 0:e87aa4c49e95 | 676 | */ |
| phungductung | 0:e87aa4c49e95 | 677 | |
| phungductung | 0:e87aa4c49e95 | 678 | /** |
| phungductung | 0:e87aa4c49e95 | 679 | * @} |
| phungductung | 0:e87aa4c49e95 | 680 | */ |
| phungductung | 0:e87aa4c49e95 | 681 | |
| phungductung | 0:e87aa4c49e95 | 682 | /** |
| phungductung | 0:e87aa4c49e95 | 683 | * @} |
| phungductung | 0:e87aa4c49e95 | 684 | */ |
| phungductung | 0:e87aa4c49e95 | 685 | |
| phungductung | 0:e87aa4c49e95 | 686 | /** |
| phungductung | 0:e87aa4c49e95 | 687 | * @} |
| phungductung | 0:e87aa4c49e95 | 688 | */ |
| phungductung | 0:e87aa4c49e95 | 689 | |
| phungductung | 0:e87aa4c49e95 | 690 | #ifdef __cplusplus |
| phungductung | 0:e87aa4c49e95 | 691 | } |
| phungductung | 0:e87aa4c49e95 | 692 | #endif |
| phungductung | 0:e87aa4c49e95 | 693 | |
| phungductung | 0:e87aa4c49e95 | 694 | #endif /* __STM32F7xx_HAL_SPI_H */ |
| phungductung | 0:e87aa4c49e95 | 695 | |
| phungductung | 0:e87aa4c49e95 | 696 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |