PHung Tung / SRC_STM32F7

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targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_pwr_ex.c@0:e87aa4c49e95, 2019-06-04 (annotated)

Committer:
phungductung
Date:
Tue Jun 04 21:51:46 2019 +0000
Revision:
0:e87aa4c49e95
libray

Who changed what in which revision?

UserRevisionLine numberNew contents of line
phungductung 0:e87aa4c49e95 1 /**
phungductung 0:e87aa4c49e95 2 ******************************************************************************
phungductung 0:e87aa4c49e95 3 * @file stm32f7xx_hal_pwr_ex.c
phungductung 0:e87aa4c49e95 4 * @author MCD Application Team
phungductung 0:e87aa4c49e95 5 * @version V1.0.4
phungductung 0:e87aa4c49e95 6 * @date 09-December-2015
phungductung 0:e87aa4c49e95 7 * @brief Extended PWR HAL module driver.
phungductung 0:e87aa4c49e95 8 * This file provides firmware functions to manage the following
phungductung 0:e87aa4c49e95 9 * functionalities of PWR extension peripheral:
phungductung 0:e87aa4c49e95 10 * + Peripheral Extended features functions
phungductung 0:e87aa4c49e95 11 *
phungductung 0:e87aa4c49e95 12 ******************************************************************************
phungductung 0:e87aa4c49e95 13 * @attention
phungductung 0:e87aa4c49e95 14 *
phungductung 0:e87aa4c49e95 15 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
phungductung 0:e87aa4c49e95 16 *
phungductung 0:e87aa4c49e95 17 * Redistribution and use in source and binary forms, with or without modification,
phungductung 0:e87aa4c49e95 18 * are permitted provided that the following conditions are met:
phungductung 0:e87aa4c49e95 19 * 1. Redistributions of source code must retain the above copyright notice,
phungductung 0:e87aa4c49e95 20 * this list of conditions and the following disclaimer.
phungductung 0:e87aa4c49e95 21 * 2. Redistributions in binary form must reproduce the above copyright notice,
phungductung 0:e87aa4c49e95 22 * this list of conditions and the following disclaimer in the documentation
phungductung 0:e87aa4c49e95 23 * and/or other materials provided with the distribution.
phungductung 0:e87aa4c49e95 24 * 3. Neither the name of STMicroelectronics nor the names of its contributors
phungductung 0:e87aa4c49e95 25 * may be used to endorse or promote products derived from this software
phungductung 0:e87aa4c49e95 26 * without specific prior written permission.
phungductung 0:e87aa4c49e95 27 *
phungductung 0:e87aa4c49e95 28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
phungductung 0:e87aa4c49e95 29 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
phungductung 0:e87aa4c49e95 30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
phungductung 0:e87aa4c49e95 31 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
phungductung 0:e87aa4c49e95 32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
phungductung 0:e87aa4c49e95 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
phungductung 0:e87aa4c49e95 34 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
phungductung 0:e87aa4c49e95 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
phungductung 0:e87aa4c49e95 36 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
phungductung 0:e87aa4c49e95 37 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
phungductung 0:e87aa4c49e95 38 *
phungductung 0:e87aa4c49e95 39 ******************************************************************************
phungductung 0:e87aa4c49e95 40 */
phungductung 0:e87aa4c49e95 41
phungductung 0:e87aa4c49e95 42 /* Includes ------------------------------------------------------------------*/
phungductung 0:e87aa4c49e95 43 #include "stm32f7xx_hal.h"
phungductung 0:e87aa4c49e95 44
phungductung 0:e87aa4c49e95 45 /** @addtogroup STM32F7xx_HAL_Driver
phungductung 0:e87aa4c49e95 46 * @{
phungductung 0:e87aa4c49e95 47 */
phungductung 0:e87aa4c49e95 48
phungductung 0:e87aa4c49e95 49 /** @defgroup PWREx PWREx
phungductung 0:e87aa4c49e95 50 * @brief PWR HAL module driver
phungductung 0:e87aa4c49e95 51 * @{
phungductung 0:e87aa4c49e95 52 */
phungductung 0:e87aa4c49e95 53
phungductung 0:e87aa4c49e95 54 #ifdef HAL_PWR_MODULE_ENABLED
phungductung 0:e87aa4c49e95 55
phungductung 0:e87aa4c49e95 56 /* Private typedef -----------------------------------------------------------*/
phungductung 0:e87aa4c49e95 57 /* Private define ------------------------------------------------------------*/
phungductung 0:e87aa4c49e95 58 /** @addtogroup PWREx_Private_Constants
phungductung 0:e87aa4c49e95 59 * @{
phungductung 0:e87aa4c49e95 60 */
phungductung 0:e87aa4c49e95 61 #define PWR_OVERDRIVE_TIMEOUT_VALUE 1000
phungductung 0:e87aa4c49e95 62 #define PWR_UDERDRIVE_TIMEOUT_VALUE 1000
phungductung 0:e87aa4c49e95 63 #define PWR_BKPREG_TIMEOUT_VALUE 1000
phungductung 0:e87aa4c49e95 64 #define PWR_VOSRDY_TIMEOUT_VALUE 1000
phungductung 0:e87aa4c49e95 65 /**
phungductung 0:e87aa4c49e95 66 * @}
phungductung 0:e87aa4c49e95 67 */
phungductung 0:e87aa4c49e95 68
phungductung 0:e87aa4c49e95 69 /* Private macro -------------------------------------------------------------*/
phungductung 0:e87aa4c49e95 70 /* Private variables ---------------------------------------------------------*/
phungductung 0:e87aa4c49e95 71 /* Private function prototypes -----------------------------------------------*/
phungductung 0:e87aa4c49e95 72 /* Private functions ---------------------------------------------------------*/
phungductung 0:e87aa4c49e95 73 /** @defgroup PWREx_Exported_Functions PWREx Exported Functions
phungductung 0:e87aa4c49e95 74 * @{
phungductung 0:e87aa4c49e95 75 */
phungductung 0:e87aa4c49e95 76
phungductung 0:e87aa4c49e95 77 /** @defgroup PWREx_Exported_Functions_Group1 Peripheral Extended features functions
phungductung 0:e87aa4c49e95 78 * @brief Peripheral Extended features functions
phungductung 0:e87aa4c49e95 79 *
phungductung 0:e87aa4c49e95 80 @verbatim
phungductung 0:e87aa4c49e95 81
phungductung 0:e87aa4c49e95 82 ===============================================================================
phungductung 0:e87aa4c49e95 83 ##### Peripheral extended features functions #####
phungductung 0:e87aa4c49e95 84 ===============================================================================
phungductung 0:e87aa4c49e95 85
phungductung 0:e87aa4c49e95 86 *** Main and Backup Regulators configuration ***
phungductung 0:e87aa4c49e95 87 ================================================
phungductung 0:e87aa4c49e95 88 [..]
phungductung 0:e87aa4c49e95 89 (+) The backup domain includes 4 Kbytes of backup SRAM accessible only from
phungductung 0:e87aa4c49e95 90 the CPU, and address in 32-bit, 16-bit or 8-bit mode. Its content is
phungductung 0:e87aa4c49e95 91 retained even in Standby or VBAT mode when the low power backup regulator
phungductung 0:e87aa4c49e95 92 is enabled. It can be considered as an internal EEPROM when VBAT is
phungductung 0:e87aa4c49e95 93 always present. You can use the HAL_PWREx_EnableBkUpReg() function to
phungductung 0:e87aa4c49e95 94 enable the low power backup regulator.
phungductung 0:e87aa4c49e95 95
phungductung 0:e87aa4c49e95 96 (+) When the backup domain is supplied by VDD (analog switch connected to VDD)
phungductung 0:e87aa4c49e95 97 the backup SRAM is powered from VDD which replaces the VBAT power supply to
phungductung 0:e87aa4c49e95 98 save battery life.
phungductung 0:e87aa4c49e95 99
phungductung 0:e87aa4c49e95 100 (+) The backup SRAM is not mass erased by a tamper event. It is read
phungductung 0:e87aa4c49e95 101 protected to prevent confidential data, such as cryptographic private
phungductung 0:e87aa4c49e95 102 key, from being accessed. The backup SRAM can be erased only through
phungductung 0:e87aa4c49e95 103 the Flash interface when a protection level change from level 1 to
phungductung 0:e87aa4c49e95 104 level 0 is requested.
phungductung 0:e87aa4c49e95 105 -@- Refer to the description of Read protection (RDP) in the Flash
phungductung 0:e87aa4c49e95 106 programming manual.
phungductung 0:e87aa4c49e95 107
phungductung 0:e87aa4c49e95 108 (+) The main internal regulator can be configured to have a tradeoff between
phungductung 0:e87aa4c49e95 109 performance and power consumption when the device does not operate at
phungductung 0:e87aa4c49e95 110 the maximum frequency. This is done through __HAL_PWR_MAINREGULATORMODE_CONFIG()
phungductung 0:e87aa4c49e95 111 macro which configure VOS bit in PWR_CR register
phungductung 0:e87aa4c49e95 112
phungductung 0:e87aa4c49e95 113 Refer to the product datasheets for more details.
phungductung 0:e87aa4c49e95 114
phungductung 0:e87aa4c49e95 115 *** FLASH Power Down configuration ****
phungductung 0:e87aa4c49e95 116 =======================================
phungductung 0:e87aa4c49e95 117 [..]
phungductung 0:e87aa4c49e95 118 (+) By setting the FPDS bit in the PWR_CR register by using the
phungductung 0:e87aa4c49e95 119 HAL_PWREx_EnableFlashPowerDown() function, the Flash memory also enters power
phungductung 0:e87aa4c49e95 120 down mode when the device enters Stop mode. When the Flash memory
phungductung 0:e87aa4c49e95 121 is in power down mode, an additional startup delay is incurred when
phungductung 0:e87aa4c49e95 122 waking up from Stop mode.
phungductung 0:e87aa4c49e95 123
phungductung 0:e87aa4c49e95 124 *** Over-Drive and Under-Drive configuration ****
phungductung 0:e87aa4c49e95 125 =================================================
phungductung 0:e87aa4c49e95 126 [..]
phungductung 0:e87aa4c49e95 127 (+) In Run mode: the main regulator has 2 operating modes available:
phungductung 0:e87aa4c49e95 128 (++) Normal mode: The CPU and core logic operate at maximum frequency at a given
phungductung 0:e87aa4c49e95 129 voltage scaling (scale 1, scale 2 or scale 3)
phungductung 0:e87aa4c49e95 130 (++) Over-drive mode: This mode allows the CPU and the core logic to operate at a
phungductung 0:e87aa4c49e95 131 higher frequency than the normal mode for a given voltage scaling (scale 1,
phungductung 0:e87aa4c49e95 132 scale 2 or scale 3). This mode is enabled through HAL_PWREx_EnableOverDrive() function and
phungductung 0:e87aa4c49e95 133 disabled by HAL_PWREx_DisableOverDrive() function, to enter or exit from Over-drive mode please follow
phungductung 0:e87aa4c49e95 134 the sequence described in Reference manual.
phungductung 0:e87aa4c49e95 135
phungductung 0:e87aa4c49e95 136 (+) In Stop mode: the main regulator or low power regulator supplies a low power
phungductung 0:e87aa4c49e95 137 voltage to the 1.2V domain, thus preserving the content of registers
phungductung 0:e87aa4c49e95 138 and internal SRAM. 2 operating modes are available:
phungductung 0:e87aa4c49e95 139 (++) Normal mode: the 1.2V domain is preserved in nominal leakage mode. This mode is only
phungductung 0:e87aa4c49e95 140 available when the main regulator or the low power regulator is used in Scale 3 or
phungductung 0:e87aa4c49e95 141 low voltage mode.
phungductung 0:e87aa4c49e95 142 (++) Under-drive mode: the 1.2V domain is preserved in reduced leakage mode. This mode is only
phungductung 0:e87aa4c49e95 143 available when the main regulator or the low power regulator is in low voltage mode.
phungductung 0:e87aa4c49e95 144
phungductung 0:e87aa4c49e95 145 @endverbatim
phungductung 0:e87aa4c49e95 146 * @{
phungductung 0:e87aa4c49e95 147 */
phungductung 0:e87aa4c49e95 148
phungductung 0:e87aa4c49e95 149 /**
phungductung 0:e87aa4c49e95 150 * @brief Enables the Backup Regulator.
phungductung 0:e87aa4c49e95 151 * @retval HAL status
phungductung 0:e87aa4c49e95 152 */
phungductung 0:e87aa4c49e95 153 HAL_StatusTypeDef HAL_PWREx_EnableBkUpReg(void)
phungductung 0:e87aa4c49e95 154 {
phungductung 0:e87aa4c49e95 155 uint32_t tickstart = 0;
phungductung 0:e87aa4c49e95 156
phungductung 0:e87aa4c49e95 157 /* Enable Backup regulator */
phungductung 0:e87aa4c49e95 158 PWR->CSR1 |= PWR_CSR1_BRE;
phungductung 0:e87aa4c49e95 159
phungductung 0:e87aa4c49e95 160 /* Get tick */
phungductung 0:e87aa4c49e95 161 tickstart = HAL_GetTick();
phungductung 0:e87aa4c49e95 162
phungductung 0:e87aa4c49e95 163 /* Wait till Backup regulator ready flag is set */
phungductung 0:e87aa4c49e95 164 while(__HAL_PWR_GET_FLAG(PWR_FLAG_BRR) == RESET)
phungductung 0:e87aa4c49e95 165 {
phungductung 0:e87aa4c49e95 166 if((HAL_GetTick() - tickstart ) > PWR_BKPREG_TIMEOUT_VALUE)
phungductung 0:e87aa4c49e95 167 {
phungductung 0:e87aa4c49e95 168 return HAL_TIMEOUT;
phungductung 0:e87aa4c49e95 169 }
phungductung 0:e87aa4c49e95 170 }
phungductung 0:e87aa4c49e95 171 return HAL_OK;
phungductung 0:e87aa4c49e95 172 }
phungductung 0:e87aa4c49e95 173
phungductung 0:e87aa4c49e95 174 /**
phungductung 0:e87aa4c49e95 175 * @brief Disables the Backup Regulator.
phungductung 0:e87aa4c49e95 176 * @retval HAL status
phungductung 0:e87aa4c49e95 177 */
phungductung 0:e87aa4c49e95 178 HAL_StatusTypeDef HAL_PWREx_DisableBkUpReg(void)
phungductung 0:e87aa4c49e95 179 {
phungductung 0:e87aa4c49e95 180 uint32_t tickstart = 0;
phungductung 0:e87aa4c49e95 181
phungductung 0:e87aa4c49e95 182 /* Disable Backup regulator */
phungductung 0:e87aa4c49e95 183 PWR->CSR1 &= (uint32_t)~((uint32_t)PWR_CSR1_BRE);
phungductung 0:e87aa4c49e95 184
phungductung 0:e87aa4c49e95 185 /* Get tick */
phungductung 0:e87aa4c49e95 186 tickstart = HAL_GetTick();
phungductung 0:e87aa4c49e95 187
phungductung 0:e87aa4c49e95 188 /* Wait till Backup regulator ready flag is set */
phungductung 0:e87aa4c49e95 189 while(__HAL_PWR_GET_FLAG(PWR_FLAG_BRR) != RESET)
phungductung 0:e87aa4c49e95 190 {
phungductung 0:e87aa4c49e95 191 if((HAL_GetTick() - tickstart ) > PWR_BKPREG_TIMEOUT_VALUE)
phungductung 0:e87aa4c49e95 192 {
phungductung 0:e87aa4c49e95 193 return HAL_TIMEOUT;
phungductung 0:e87aa4c49e95 194 }
phungductung 0:e87aa4c49e95 195 }
phungductung 0:e87aa4c49e95 196 return HAL_OK;
phungductung 0:e87aa4c49e95 197 }
phungductung 0:e87aa4c49e95 198
phungductung 0:e87aa4c49e95 199 /**
phungductung 0:e87aa4c49e95 200 * @brief Enables the Flash Power Down in Stop mode.
phungductung 0:e87aa4c49e95 201 * @retval None
phungductung 0:e87aa4c49e95 202 */
phungductung 0:e87aa4c49e95 203 void HAL_PWREx_EnableFlashPowerDown(void)
phungductung 0:e87aa4c49e95 204 {
phungductung 0:e87aa4c49e95 205 /* Enable the Flash Power Down */
phungductung 0:e87aa4c49e95 206 PWR->CR1 |= PWR_CR1_FPDS;
phungductung 0:e87aa4c49e95 207 }
phungductung 0:e87aa4c49e95 208
phungductung 0:e87aa4c49e95 209 /**
phungductung 0:e87aa4c49e95 210 * @brief Disables the Flash Power Down in Stop mode.
phungductung 0:e87aa4c49e95 211 * @retval None
phungductung 0:e87aa4c49e95 212 */
phungductung 0:e87aa4c49e95 213 void HAL_PWREx_DisableFlashPowerDown(void)
phungductung 0:e87aa4c49e95 214 {
phungductung 0:e87aa4c49e95 215 /* Disable the Flash Power Down */
phungductung 0:e87aa4c49e95 216 PWR->CR1 &= (uint32_t)~((uint32_t)PWR_CR1_FPDS);
phungductung 0:e87aa4c49e95 217 }
phungductung 0:e87aa4c49e95 218
phungductung 0:e87aa4c49e95 219 /**
phungductung 0:e87aa4c49e95 220 * @brief Enables Main Regulator low voltage mode.
phungductung 0:e87aa4c49e95 221 * @retval None
phungductung 0:e87aa4c49e95 222 */
phungductung 0:e87aa4c49e95 223 void HAL_PWREx_EnableMainRegulatorLowVoltage(void)
phungductung 0:e87aa4c49e95 224 {
phungductung 0:e87aa4c49e95 225 /* Enable Main regulator low voltage */
phungductung 0:e87aa4c49e95 226 PWR->CR1 |= PWR_CR1_MRUDS;
phungductung 0:e87aa4c49e95 227 }
phungductung 0:e87aa4c49e95 228
phungductung 0:e87aa4c49e95 229 /**
phungductung 0:e87aa4c49e95 230 * @brief Disables Main Regulator low voltage mode.
phungductung 0:e87aa4c49e95 231 * @retval None
phungductung 0:e87aa4c49e95 232 */
phungductung 0:e87aa4c49e95 233 void HAL_PWREx_DisableMainRegulatorLowVoltage(void)
phungductung 0:e87aa4c49e95 234 {
phungductung 0:e87aa4c49e95 235 /* Disable Main regulator low voltage */
phungductung 0:e87aa4c49e95 236 PWR->CR1 &= (uint32_t)~((uint32_t)PWR_CR1_MRUDS);
phungductung 0:e87aa4c49e95 237 }
phungductung 0:e87aa4c49e95 238
phungductung 0:e87aa4c49e95 239 /**
phungductung 0:e87aa4c49e95 240 * @brief Enables Low Power Regulator low voltage mode.
phungductung 0:e87aa4c49e95 241 * @retval None
phungductung 0:e87aa4c49e95 242 */
phungductung 0:e87aa4c49e95 243 void HAL_PWREx_EnableLowRegulatorLowVoltage(void)
phungductung 0:e87aa4c49e95 244 {
phungductung 0:e87aa4c49e95 245 /* Enable low power regulator */
phungductung 0:e87aa4c49e95 246 PWR->CR1 |= PWR_CR1_LPUDS;
phungductung 0:e87aa4c49e95 247 }
phungductung 0:e87aa4c49e95 248
phungductung 0:e87aa4c49e95 249 /**
phungductung 0:e87aa4c49e95 250 * @brief Disables Low Power Regulator low voltage mode.
phungductung 0:e87aa4c49e95 251 * @retval None
phungductung 0:e87aa4c49e95 252 */
phungductung 0:e87aa4c49e95 253 void HAL_PWREx_DisableLowRegulatorLowVoltage(void)
phungductung 0:e87aa4c49e95 254 {
phungductung 0:e87aa4c49e95 255 /* Disable low power regulator */
phungductung 0:e87aa4c49e95 256 PWR->CR1 &= (uint32_t)~((uint32_t)PWR_CR1_LPUDS);
phungductung 0:e87aa4c49e95 257 }
phungductung 0:e87aa4c49e95 258
phungductung 0:e87aa4c49e95 259 /**
phungductung 0:e87aa4c49e95 260 * @brief Activates the Over-Drive mode.
phungductung 0:e87aa4c49e95 261 * @note This mode allows the CPU and the core logic to operate at a higher frequency
phungductung 0:e87aa4c49e95 262 * than the normal mode for a given voltage scaling (scale 1, scale 2 or scale 3).
phungductung 0:e87aa4c49e95 263 * @note It is recommended to enter or exit Over-drive mode when the application is not running
phungductung 0:e87aa4c49e95 264 * critical tasks and when the system clock source is either HSI or HSE.
phungductung 0:e87aa4c49e95 265 * During the Over-drive switch activation, no peripheral clocks should be enabled.
phungductung 0:e87aa4c49e95 266 * The peripheral clocks must be enabled once the Over-drive mode is activated.
phungductung 0:e87aa4c49e95 267 * @retval HAL status
phungductung 0:e87aa4c49e95 268 */
phungductung 0:e87aa4c49e95 269 HAL_StatusTypeDef HAL_PWREx_EnableOverDrive(void)
phungductung 0:e87aa4c49e95 270 {
phungductung 0:e87aa4c49e95 271 uint32_t tickstart = 0;
phungductung 0:e87aa4c49e95 272
phungductung 0:e87aa4c49e95 273 __HAL_RCC_PWR_CLK_ENABLE();
phungductung 0:e87aa4c49e95 274
phungductung 0:e87aa4c49e95 275 /* Enable the Over-drive to extend the clock frequency to 216 MHz */
phungductung 0:e87aa4c49e95 276 __HAL_PWR_OVERDRIVE_ENABLE();
phungductung 0:e87aa4c49e95 277
phungductung 0:e87aa4c49e95 278 /* Get tick */
phungductung 0:e87aa4c49e95 279 tickstart = HAL_GetTick();
phungductung 0:e87aa4c49e95 280
phungductung 0:e87aa4c49e95 281 while(!__HAL_PWR_GET_FLAG(PWR_FLAG_ODRDY))
phungductung 0:e87aa4c49e95 282 {
phungductung 0:e87aa4c49e95 283 if((HAL_GetTick() - tickstart ) > PWR_OVERDRIVE_TIMEOUT_VALUE)
phungductung 0:e87aa4c49e95 284 {
phungductung 0:e87aa4c49e95 285 return HAL_TIMEOUT;
phungductung 0:e87aa4c49e95 286 }
phungductung 0:e87aa4c49e95 287 }
phungductung 0:e87aa4c49e95 288
phungductung 0:e87aa4c49e95 289 /* Enable the Over-drive switch */
phungductung 0:e87aa4c49e95 290 __HAL_PWR_OVERDRIVESWITCHING_ENABLE();
phungductung 0:e87aa4c49e95 291
phungductung 0:e87aa4c49e95 292 /* Get tick */
phungductung 0:e87aa4c49e95 293 tickstart = HAL_GetTick();
phungductung 0:e87aa4c49e95 294
phungductung 0:e87aa4c49e95 295 while(!__HAL_PWR_GET_FLAG(PWR_FLAG_ODSWRDY))
phungductung 0:e87aa4c49e95 296 {
phungductung 0:e87aa4c49e95 297 if((HAL_GetTick() - tickstart ) > PWR_OVERDRIVE_TIMEOUT_VALUE)
phungductung 0:e87aa4c49e95 298 {
phungductung 0:e87aa4c49e95 299 return HAL_TIMEOUT;
phungductung 0:e87aa4c49e95 300 }
phungductung 0:e87aa4c49e95 301 }
phungductung 0:e87aa4c49e95 302 return HAL_OK;
phungductung 0:e87aa4c49e95 303 }
phungductung 0:e87aa4c49e95 304
phungductung 0:e87aa4c49e95 305 /**
phungductung 0:e87aa4c49e95 306 * @brief Deactivates the Over-Drive mode.
phungductung 0:e87aa4c49e95 307 * @note This mode allows the CPU and the core logic to operate at a higher frequency
phungductung 0:e87aa4c49e95 308 * than the normal mode for a given voltage scaling (scale 1, scale 2 or scale 3).
phungductung 0:e87aa4c49e95 309 * @note It is recommended to enter or exit Over-drive mode when the application is not running
phungductung 0:e87aa4c49e95 310 * critical tasks and when the system clock source is either HSI or HSE.
phungductung 0:e87aa4c49e95 311 * During the Over-drive switch activation, no peripheral clocks should be enabled.
phungductung 0:e87aa4c49e95 312 * The peripheral clocks must be enabled once the Over-drive mode is activated.
phungductung 0:e87aa4c49e95 313 * @retval HAL status
phungductung 0:e87aa4c49e95 314 */
phungductung 0:e87aa4c49e95 315 HAL_StatusTypeDef HAL_PWREx_DisableOverDrive(void)
phungductung 0:e87aa4c49e95 316 {
phungductung 0:e87aa4c49e95 317 uint32_t tickstart = 0;
phungductung 0:e87aa4c49e95 318
phungductung 0:e87aa4c49e95 319 __HAL_RCC_PWR_CLK_ENABLE();
phungductung 0:e87aa4c49e95 320
phungductung 0:e87aa4c49e95 321 /* Disable the Over-drive switch */
phungductung 0:e87aa4c49e95 322 __HAL_PWR_OVERDRIVESWITCHING_DISABLE();
phungductung 0:e87aa4c49e95 323
phungductung 0:e87aa4c49e95 324 /* Get tick */
phungductung 0:e87aa4c49e95 325 tickstart = HAL_GetTick();
phungductung 0:e87aa4c49e95 326
phungductung 0:e87aa4c49e95 327 while(__HAL_PWR_GET_FLAG(PWR_FLAG_ODSWRDY))
phungductung 0:e87aa4c49e95 328 {
phungductung 0:e87aa4c49e95 329 if((HAL_GetTick() - tickstart ) > PWR_OVERDRIVE_TIMEOUT_VALUE)
phungductung 0:e87aa4c49e95 330 {
phungductung 0:e87aa4c49e95 331 return HAL_TIMEOUT;
phungductung 0:e87aa4c49e95 332 }
phungductung 0:e87aa4c49e95 333 }
phungductung 0:e87aa4c49e95 334
phungductung 0:e87aa4c49e95 335 /* Disable the Over-drive */
phungductung 0:e87aa4c49e95 336 __HAL_PWR_OVERDRIVE_DISABLE();
phungductung 0:e87aa4c49e95 337
phungductung 0:e87aa4c49e95 338 /* Get tick */
phungductung 0:e87aa4c49e95 339 tickstart = HAL_GetTick();
phungductung 0:e87aa4c49e95 340
phungductung 0:e87aa4c49e95 341 while(__HAL_PWR_GET_FLAG(PWR_FLAG_ODRDY))
phungductung 0:e87aa4c49e95 342 {
phungductung 0:e87aa4c49e95 343 if((HAL_GetTick() - tickstart ) > PWR_OVERDRIVE_TIMEOUT_VALUE)
phungductung 0:e87aa4c49e95 344 {
phungductung 0:e87aa4c49e95 345 return HAL_TIMEOUT;
phungductung 0:e87aa4c49e95 346 }
phungductung 0:e87aa4c49e95 347 }
phungductung 0:e87aa4c49e95 348
phungductung 0:e87aa4c49e95 349 return HAL_OK;
phungductung 0:e87aa4c49e95 350 }
phungductung 0:e87aa4c49e95 351
phungductung 0:e87aa4c49e95 352 /**
phungductung 0:e87aa4c49e95 353 * @brief Enters in Under-Drive STOP mode.
phungductung 0:e87aa4c49e95 354 *
phungductung 0:e87aa4c49e95 355 * @note This mode can be selected only when the Under-Drive is already active
phungductung 0:e87aa4c49e95 356 *
phungductung 0:e87aa4c49e95 357 * @note This mode is enabled only with STOP low power mode.
phungductung 0:e87aa4c49e95 358 * In this mode, the 1.2V domain is preserved in reduced leakage mode. This
phungductung 0:e87aa4c49e95 359 * mode is only available when the main regulator or the low power regulator
phungductung 0:e87aa4c49e95 360 * is in low voltage mode
phungductung 0:e87aa4c49e95 361 *
phungductung 0:e87aa4c49e95 362 * @note If the Under-drive mode was enabled, it is automatically disabled after
phungductung 0:e87aa4c49e95 363 * exiting Stop mode.
phungductung 0:e87aa4c49e95 364 * When the voltage regulator operates in Under-drive mode, an additional
phungductung 0:e87aa4c49e95 365 * startup delay is induced when waking up from Stop mode.
phungductung 0:e87aa4c49e95 366 *
phungductung 0:e87aa4c49e95 367 * @note In Stop mode, all I/O pins keep the same state as in Run mode.
phungductung 0:e87aa4c49e95 368 *
phungductung 0:e87aa4c49e95 369 * @note When exiting Stop mode by issuing an interrupt or a wakeup event,
phungductung 0:e87aa4c49e95 370 * the HSI RC oscillator is selected as system clock.
phungductung 0:e87aa4c49e95 371 *
phungductung 0:e87aa4c49e95 372 * @note When the voltage regulator operates in low power mode, an additional
phungductung 0:e87aa4c49e95 373 * startup delay is incurred when waking up from Stop mode.
phungductung 0:e87aa4c49e95 374 * By keeping the internal regulator ON during Stop mode, the consumption
phungductung 0:e87aa4c49e95 375 * is higher although the startup time is reduced.
phungductung 0:e87aa4c49e95 376 *
phungductung 0:e87aa4c49e95 377 * @param Regulator: specifies the regulator state in STOP mode.
phungductung 0:e87aa4c49e95 378 * This parameter can be one of the following values:
phungductung 0:e87aa4c49e95 379 * @arg PWR_MAINREGULATOR_UNDERDRIVE_ON: Main Regulator in under-drive mode
phungductung 0:e87aa4c49e95 380 * and Flash memory in power-down when the device is in Stop under-drive mode
phungductung 0:e87aa4c49e95 381 * @arg PWR_LOWPOWERREGULATOR_UNDERDRIVE_ON: Low Power Regulator in under-drive mode
phungductung 0:e87aa4c49e95 382 * and Flash memory in power-down when the device is in Stop under-drive mode
phungductung 0:e87aa4c49e95 383 * @param STOPEntry: specifies if STOP mode in entered with WFI or WFE instruction.
phungductung 0:e87aa4c49e95 384 * This parameter can be one of the following values:
phungductung 0:e87aa4c49e95 385 * @arg PWR_SLEEPENTRY_WFI: enter STOP mode with WFI instruction
phungductung 0:e87aa4c49e95 386 * @arg PWR_SLEEPENTRY_WFE: enter STOP mode with WFE instruction
phungductung 0:e87aa4c49e95 387 * @retval None
phungductung 0:e87aa4c49e95 388 */
phungductung 0:e87aa4c49e95 389 HAL_StatusTypeDef HAL_PWREx_EnterUnderDriveSTOPMode(uint32_t Regulator, uint8_t STOPEntry)
phungductung 0:e87aa4c49e95 390 {
phungductung 0:e87aa4c49e95 391 uint32_t tempreg = 0;
phungductung 0:e87aa4c49e95 392 uint32_t tickstart = 0;
phungductung 0:e87aa4c49e95 393
phungductung 0:e87aa4c49e95 394 /* Check the parameters */
phungductung 0:e87aa4c49e95 395 assert_param(IS_PWR_REGULATOR_UNDERDRIVE(Regulator));
phungductung 0:e87aa4c49e95 396 assert_param(IS_PWR_STOP_ENTRY(STOPEntry));
phungductung 0:e87aa4c49e95 397
phungductung 0:e87aa4c49e95 398 /* Enable Power ctrl clock */
phungductung 0:e87aa4c49e95 399 __HAL_RCC_PWR_CLK_ENABLE();
phungductung 0:e87aa4c49e95 400 /* Enable the Under-drive Mode ---------------------------------------------*/
phungductung 0:e87aa4c49e95 401 /* Clear Under-drive flag */
phungductung 0:e87aa4c49e95 402 __HAL_PWR_CLEAR_ODRUDR_FLAG();
phungductung 0:e87aa4c49e95 403
phungductung 0:e87aa4c49e95 404 /* Enable the Under-drive */
phungductung 0:e87aa4c49e95 405 __HAL_PWR_UNDERDRIVE_ENABLE();
phungductung 0:e87aa4c49e95 406
phungductung 0:e87aa4c49e95 407 /* Get tick */
phungductung 0:e87aa4c49e95 408 tickstart = HAL_GetTick();
phungductung 0:e87aa4c49e95 409
phungductung 0:e87aa4c49e95 410 /* Wait for UnderDrive mode is ready */
phungductung 0:e87aa4c49e95 411 while(__HAL_PWR_GET_FLAG(PWR_FLAG_UDRDY))
phungductung 0:e87aa4c49e95 412 {
phungductung 0:e87aa4c49e95 413 if((HAL_GetTick() - tickstart ) > PWR_UDERDRIVE_TIMEOUT_VALUE)
phungductung 0:e87aa4c49e95 414 {
phungductung 0:e87aa4c49e95 415 return HAL_TIMEOUT;
phungductung 0:e87aa4c49e95 416 }
phungductung 0:e87aa4c49e95 417 }
phungductung 0:e87aa4c49e95 418
phungductung 0:e87aa4c49e95 419 /* Select the regulator state in STOP mode ---------------------------------*/
phungductung 0:e87aa4c49e95 420 tempreg = PWR->CR1;
phungductung 0:e87aa4c49e95 421 /* Clear PDDS, LPDS, MRLUDS and LPLUDS bits */
phungductung 0:e87aa4c49e95 422 tempreg &= (uint32_t)~(PWR_CR1_PDDS | PWR_CR1_LPDS | PWR_CR1_LPUDS | PWR_CR1_MRUDS);
phungductung 0:e87aa4c49e95 423
phungductung 0:e87aa4c49e95 424 /* Set LPDS, MRLUDS and LPLUDS bits according to PWR_Regulator value */
phungductung 0:e87aa4c49e95 425 tempreg |= Regulator;
phungductung 0:e87aa4c49e95 426
phungductung 0:e87aa4c49e95 427 /* Store the new value */
phungductung 0:e87aa4c49e95 428 PWR->CR1 = tempreg;
phungductung 0:e87aa4c49e95 429
phungductung 0:e87aa4c49e95 430 /* Set SLEEPDEEP bit of Cortex System Control Register */
phungductung 0:e87aa4c49e95 431 SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
phungductung 0:e87aa4c49e95 432
phungductung 0:e87aa4c49e95 433 /* Select STOP mode entry --------------------------------------------------*/
phungductung 0:e87aa4c49e95 434 if(STOPEntry == PWR_SLEEPENTRY_WFI)
phungductung 0:e87aa4c49e95 435 {
phungductung 0:e87aa4c49e95 436 /* Request Wait For Interrupt */
phungductung 0:e87aa4c49e95 437 __WFI();
phungductung 0:e87aa4c49e95 438 }
phungductung 0:e87aa4c49e95 439 else
phungductung 0:e87aa4c49e95 440 {
phungductung 0:e87aa4c49e95 441 /* Request Wait For Event */
phungductung 0:e87aa4c49e95 442 __WFE();
phungductung 0:e87aa4c49e95 443 }
phungductung 0:e87aa4c49e95 444 /* Reset SLEEPDEEP bit of Cortex System Control Register */
phungductung 0:e87aa4c49e95 445 SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
phungductung 0:e87aa4c49e95 446
phungductung 0:e87aa4c49e95 447 return HAL_OK;
phungductung 0:e87aa4c49e95 448 }
phungductung 0:e87aa4c49e95 449
phungductung 0:e87aa4c49e95 450 /**
phungductung 0:e87aa4c49e95 451 * @brief Returns Voltage Scaling Range.
phungductung 0:e87aa4c49e95 452 * @retval VOS bit field (PWR_REGULATOR_VOLTAGE_SCALE1, PWR_REGULATOR_VOLTAGE_SCALE2 or
phungductung 0:e87aa4c49e95 453 * PWR_REGULATOR_VOLTAGE_SCALE3)PWR_REGULATOR_VOLTAGE_SCALE1
phungductung 0:e87aa4c49e95 454 */
phungductung 0:e87aa4c49e95 455 uint32_t HAL_PWREx_GetVoltageRange(void)
phungductung 0:e87aa4c49e95 456 {
phungductung 0:e87aa4c49e95 457 return (PWR->CR1 & PWR_CR1_VOS);
phungductung 0:e87aa4c49e95 458 }
phungductung 0:e87aa4c49e95 459
phungductung 0:e87aa4c49e95 460 /**
phungductung 0:e87aa4c49e95 461 * @brief Configures the main internal regulator output voltage.
phungductung 0:e87aa4c49e95 462 * @param VoltageScaling: specifies the regulator output voltage to achieve
phungductung 0:e87aa4c49e95 463 * a tradeoff between performance and power consumption.
phungductung 0:e87aa4c49e95 464 * This parameter can be one of the following values:
phungductung 0:e87aa4c49e95 465 * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output range 1 mode,
phungductung 0:e87aa4c49e95 466 * typical output voltage at 1.4 V,
phungductung 0:e87aa4c49e95 467 * system frequency up to 216 MHz.
phungductung 0:e87aa4c49e95 468 * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output range 2 mode,
phungductung 0:e87aa4c49e95 469 * typical output voltage at 1.2 V,
phungductung 0:e87aa4c49e95 470 * system frequency up to 180 MHz.
phungductung 0:e87aa4c49e95 471 * @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output range 2 mode,
phungductung 0:e87aa4c49e95 472 * typical output voltage at 1.00 V,
phungductung 0:e87aa4c49e95 473 * system frequency up to 151 MHz.
phungductung 0:e87aa4c49e95 474 * @note To update the system clock frequency(SYSCLK):
phungductung 0:e87aa4c49e95 475 * - Set the HSI or HSE as system clock frequency using the HAL_RCC_ClockConfig().
phungductung 0:e87aa4c49e95 476 * - Call the HAL_RCC_OscConfig() to configure the PLL.
phungductung 0:e87aa4c49e95 477 * - Call HAL_PWREx_ConfigVoltageScaling() API to adjust the voltage scale.
phungductung 0:e87aa4c49e95 478 * - Set the new system clock frequency using the HAL_RCC_ClockConfig().
phungductung 0:e87aa4c49e95 479 * @note The scale can be modified only when the HSI or HSE clock source is selected
phungductung 0:e87aa4c49e95 480 * as system clock source, otherwise the API returns HAL_ERROR.
phungductung 0:e87aa4c49e95 481 * @note When the PLL is OFF, the voltage scale 3 is automatically selected and the VOS bits
phungductung 0:e87aa4c49e95 482 * value in the PWR_CR1 register are not taken in account.
phungductung 0:e87aa4c49e95 483 * @note This API forces the PLL state ON to allow the possibility to configure the voltage scale 1 or 2.
phungductung 0:e87aa4c49e95 484 * @note The new voltage scale is active only when the PLL is ON.
phungductung 0:e87aa4c49e95 485 * @retval HAL Status
phungductung 0:e87aa4c49e95 486 */
phungductung 0:e87aa4c49e95 487 HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling)
phungductung 0:e87aa4c49e95 488 {
phungductung 0:e87aa4c49e95 489 uint32_t tickstart = 0;
phungductung 0:e87aa4c49e95 490
phungductung 0:e87aa4c49e95 491 assert_param(IS_PWR_REGULATOR_VOLTAGE(VoltageScaling));
phungductung 0:e87aa4c49e95 492
phungductung 0:e87aa4c49e95 493 /* Enable Power ctrl clock */
phungductung 0:e87aa4c49e95 494 __HAL_RCC_PWR_CLK_ENABLE();
phungductung 0:e87aa4c49e95 495
phungductung 0:e87aa4c49e95 496 /* Check if the PLL is used as system clock or not */
phungductung 0:e87aa4c49e95 497 if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL)
phungductung 0:e87aa4c49e95 498 {
phungductung 0:e87aa4c49e95 499 /* Disable the main PLL */
phungductung 0:e87aa4c49e95 500 __HAL_RCC_PLL_DISABLE();
phungductung 0:e87aa4c49e95 501
phungductung 0:e87aa4c49e95 502 /* Get Start Tick */
phungductung 0:e87aa4c49e95 503 tickstart = HAL_GetTick();
phungductung 0:e87aa4c49e95 504 /* Wait till PLL is disabled */
phungductung 0:e87aa4c49e95 505 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
phungductung 0:e87aa4c49e95 506 {
phungductung 0:e87aa4c49e95 507 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
phungductung 0:e87aa4c49e95 508 {
phungductung 0:e87aa4c49e95 509 return HAL_TIMEOUT;
phungductung 0:e87aa4c49e95 510 }
phungductung 0:e87aa4c49e95 511 }
phungductung 0:e87aa4c49e95 512
phungductung 0:e87aa4c49e95 513 /* Set Range */
phungductung 0:e87aa4c49e95 514 __HAL_PWR_VOLTAGESCALING_CONFIG(VoltageScaling);
phungductung 0:e87aa4c49e95 515
phungductung 0:e87aa4c49e95 516 /* Enable the main PLL */
phungductung 0:e87aa4c49e95 517 __HAL_RCC_PLL_ENABLE();
phungductung 0:e87aa4c49e95 518
phungductung 0:e87aa4c49e95 519 /* Get Start Tick */
phungductung 0:e87aa4c49e95 520 tickstart = HAL_GetTick();
phungductung 0:e87aa4c49e95 521 /* Wait till PLL is ready */
phungductung 0:e87aa4c49e95 522 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
phungductung 0:e87aa4c49e95 523 {
phungductung 0:e87aa4c49e95 524 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
phungductung 0:e87aa4c49e95 525 {
phungductung 0:e87aa4c49e95 526 return HAL_TIMEOUT;
phungductung 0:e87aa4c49e95 527 }
phungductung 0:e87aa4c49e95 528 }
phungductung 0:e87aa4c49e95 529
phungductung 0:e87aa4c49e95 530 /* Get Start Tick */
phungductung 0:e87aa4c49e95 531 tickstart = HAL_GetTick();
phungductung 0:e87aa4c49e95 532 while((__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY) == RESET))
phungductung 0:e87aa4c49e95 533 {
phungductung 0:e87aa4c49e95 534 if((HAL_GetTick() - tickstart ) > PWR_VOSRDY_TIMEOUT_VALUE)
phungductung 0:e87aa4c49e95 535 {
phungductung 0:e87aa4c49e95 536 return HAL_TIMEOUT;
phungductung 0:e87aa4c49e95 537 }
phungductung 0:e87aa4c49e95 538 }
phungductung 0:e87aa4c49e95 539 }
phungductung 0:e87aa4c49e95 540 else
phungductung 0:e87aa4c49e95 541 {
phungductung 0:e87aa4c49e95 542 return HAL_ERROR;
phungductung 0:e87aa4c49e95 543 }
phungductung 0:e87aa4c49e95 544 return HAL_OK;
phungductung 0:e87aa4c49e95 545 }
phungductung 0:e87aa4c49e95 546
phungductung 0:e87aa4c49e95 547 /**
phungductung 0:e87aa4c49e95 548 * @}
phungductung 0:e87aa4c49e95 549 */
phungductung 0:e87aa4c49e95 550
phungductung 0:e87aa4c49e95 551 /**
phungductung 0:e87aa4c49e95 552 * @}
phungductung 0:e87aa4c49e95 553 */
phungductung 0:e87aa4c49e95 554
phungductung 0:e87aa4c49e95 555 #endif /* HAL_PWR_MODULE_ENABLED */
phungductung 0:e87aa4c49e95 556 /**
phungductung 0:e87aa4c49e95 557 * @}
phungductung 0:e87aa4c49e95 558 */
phungductung 0:e87aa4c49e95 559
phungductung 0:e87aa4c49e95 560 /**
phungductung 0:e87aa4c49e95 561 * @}
phungductung 0:e87aa4c49e95 562 */
phungductung 0:e87aa4c49e95 563
phungductung 0:e87aa4c49e95 564 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/