PHung Tung / SRC_STM32F7

SPKT

Dependents:   WAV

targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_dma_ex.c@0:e87aa4c49e95, 2019-06-04 (annotated)

Committer:
phungductung
Date:
Tue Jun 04 21:51:46 2019 +0000
Revision:
0:e87aa4c49e95
libray

Who changed what in which revision?

UserRevisionLine numberNew contents of line
phungductung 0:e87aa4c49e95 1 /**
phungductung 0:e87aa4c49e95 2 ******************************************************************************
phungductung 0:e87aa4c49e95 3 * @file stm32f7xx_hal_dma_ex.c
phungductung 0:e87aa4c49e95 4 * @author MCD Application Team
phungductung 0:e87aa4c49e95 5 * @version V1.0.4
phungductung 0:e87aa4c49e95 6 * @date 09-December-2015
phungductung 0:e87aa4c49e95 7 * @brief DMA Extension HAL module driver
phungductung 0:e87aa4c49e95 8 * This file provides firmware functions to manage the following
phungductung 0:e87aa4c49e95 9 * functionalities of the DMA Extension peripheral:
phungductung 0:e87aa4c49e95 10 * + Extended features functions
phungductung 0:e87aa4c49e95 11 *
phungductung 0:e87aa4c49e95 12 @verbatim
phungductung 0:e87aa4c49e95 13 ==============================================================================
phungductung 0:e87aa4c49e95 14 ##### How to use this driver #####
phungductung 0:e87aa4c49e95 15 ==============================================================================
phungductung 0:e87aa4c49e95 16 [..]
phungductung 0:e87aa4c49e95 17 The DMA Extension HAL driver can be used as follows:
phungductung 0:e87aa4c49e95 18 (+) Start a multi buffer transfer using the HAL_DMA_MultiBufferStart() function
phungductung 0:e87aa4c49e95 19 for polling mode or HAL_DMA_MultiBufferStart_IT() for interrupt mode.
phungductung 0:e87aa4c49e95 20
phungductung 0:e87aa4c49e95 21 -@- In Memory-to-Memory transfer mode, Multi (Double) Buffer mode is not allowed.
phungductung 0:e87aa4c49e95 22 -@- When Multi (Double) Buffer mode is enabled the, transfer is circular by default.
phungductung 0:e87aa4c49e95 23 -@- In Multi (Double) buffer mode, it is possible to update the base address for
phungductung 0:e87aa4c49e95 24 the AHB memory port on the fly (DMA_SxM0AR or DMA_SxM1AR) when the stream is enabled.
phungductung 0:e87aa4c49e95 25
phungductung 0:e87aa4c49e95 26 @endverbatim
phungductung 0:e87aa4c49e95 27 ******************************************************************************
phungductung 0:e87aa4c49e95 28 * @attention
phungductung 0:e87aa4c49e95 29 *
phungductung 0:e87aa4c49e95 30 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
phungductung 0:e87aa4c49e95 31 *
phungductung 0:e87aa4c49e95 32 * Redistribution and use in source and binary forms, with or without modification,
phungductung 0:e87aa4c49e95 33 * are permitted provided that the following conditions are met:
phungductung 0:e87aa4c49e95 34 * 1. Redistributions of source code must retain the above copyright notice,
phungductung 0:e87aa4c49e95 35 * this list of conditions and the following disclaimer.
phungductung 0:e87aa4c49e95 36 * 2. Redistributions in binary form must reproduce the above copyright notice,
phungductung 0:e87aa4c49e95 37 * this list of conditions and the following disclaimer in the documentation
phungductung 0:e87aa4c49e95 38 * and/or other materials provided with the distribution.
phungductung 0:e87aa4c49e95 39 * 3. Neither the name of STMicroelectronics nor the names of its contributors
phungductung 0:e87aa4c49e95 40 * may be used to endorse or promote products derived from this software
phungductung 0:e87aa4c49e95 41 * without specific prior written permission.
phungductung 0:e87aa4c49e95 42 *
phungductung 0:e87aa4c49e95 43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
phungductung 0:e87aa4c49e95 44 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
phungductung 0:e87aa4c49e95 45 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
phungductung 0:e87aa4c49e95 46 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
phungductung 0:e87aa4c49e95 47 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
phungductung 0:e87aa4c49e95 48 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
phungductung 0:e87aa4c49e95 49 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
phungductung 0:e87aa4c49e95 50 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
phungductung 0:e87aa4c49e95 51 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
phungductung 0:e87aa4c49e95 52 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
phungductung 0:e87aa4c49e95 53 *
phungductung 0:e87aa4c49e95 54 ******************************************************************************
phungductung 0:e87aa4c49e95 55 */
phungductung 0:e87aa4c49e95 56
phungductung 0:e87aa4c49e95 57 /* Includes ------------------------------------------------------------------*/
phungductung 0:e87aa4c49e95 58 #include "stm32f7xx_hal.h"
phungductung 0:e87aa4c49e95 59
phungductung 0:e87aa4c49e95 60 /** @addtogroup STM32F7xx_HAL_Driver
phungductung 0:e87aa4c49e95 61 * @{
phungductung 0:e87aa4c49e95 62 */
phungductung 0:e87aa4c49e95 63
phungductung 0:e87aa4c49e95 64 /** @defgroup DMAEx DMAEx
phungductung 0:e87aa4c49e95 65 * @brief DMA Extended HAL module driver
phungductung 0:e87aa4c49e95 66 * @{
phungductung 0:e87aa4c49e95 67 */
phungductung 0:e87aa4c49e95 68
phungductung 0:e87aa4c49e95 69 #ifdef HAL_DMA_MODULE_ENABLED
phungductung 0:e87aa4c49e95 70
phungductung 0:e87aa4c49e95 71 /* Private types -------------------------------------------------------------*/
phungductung 0:e87aa4c49e95 72 /* Private variables ---------------------------------------------------------*/
phungductung 0:e87aa4c49e95 73 /* Private Constants ---------------------------------------------------------*/
phungductung 0:e87aa4c49e95 74 /* Private macros ------------------------------------------------------------*/
phungductung 0:e87aa4c49e95 75 /* Private functions ---------------------------------------------------------*/
phungductung 0:e87aa4c49e95 76 /** @addtogroup DMAEx_Private_Functions
phungductung 0:e87aa4c49e95 77 * @{
phungductung 0:e87aa4c49e95 78 */
phungductung 0:e87aa4c49e95 79
phungductung 0:e87aa4c49e95 80 static void DMA_MultiBufferSetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
phungductung 0:e87aa4c49e95 81
phungductung 0:e87aa4c49e95 82 /**
phungductung 0:e87aa4c49e95 83 * @brief Set the DMA Transfer parameter.
phungductung 0:e87aa4c49e95 84 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
phungductung 0:e87aa4c49e95 85 * the configuration information for the specified DMA Stream.
phungductung 0:e87aa4c49e95 86 * @param SrcAddress: The source memory Buffer address
phungductung 0:e87aa4c49e95 87 * @param DstAddress: The destination memory Buffer address
phungductung 0:e87aa4c49e95 88 * @param DataLength: The length of data to be transferred from source to destination
phungductung 0:e87aa4c49e95 89 * @retval HAL status
phungductung 0:e87aa4c49e95 90 */
phungductung 0:e87aa4c49e95 91 static void DMA_MultiBufferSetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
phungductung 0:e87aa4c49e95 92 {
phungductung 0:e87aa4c49e95 93 /* Configure DMA Stream data length */
phungductung 0:e87aa4c49e95 94 hdma->Instance->NDTR = DataLength;
phungductung 0:e87aa4c49e95 95
phungductung 0:e87aa4c49e95 96 /* Peripheral to Memory */
phungductung 0:e87aa4c49e95 97 if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
phungductung 0:e87aa4c49e95 98 {
phungductung 0:e87aa4c49e95 99 /* Configure DMA Stream destination address */
phungductung 0:e87aa4c49e95 100 hdma->Instance->PAR = DstAddress;
phungductung 0:e87aa4c49e95 101
phungductung 0:e87aa4c49e95 102 /* Configure DMA Stream source address */
phungductung 0:e87aa4c49e95 103 hdma->Instance->M0AR = SrcAddress;
phungductung 0:e87aa4c49e95 104 }
phungductung 0:e87aa4c49e95 105 /* Memory to Peripheral */
phungductung 0:e87aa4c49e95 106 else
phungductung 0:e87aa4c49e95 107 {
phungductung 0:e87aa4c49e95 108 /* Configure DMA Stream source address */
phungductung 0:e87aa4c49e95 109 hdma->Instance->PAR = SrcAddress;
phungductung 0:e87aa4c49e95 110
phungductung 0:e87aa4c49e95 111 /* Configure DMA Stream destination address */
phungductung 0:e87aa4c49e95 112 hdma->Instance->M0AR = DstAddress;
phungductung 0:e87aa4c49e95 113 }
phungductung 0:e87aa4c49e95 114 }
phungductung 0:e87aa4c49e95 115
phungductung 0:e87aa4c49e95 116 /**
phungductung 0:e87aa4c49e95 117 * @}
phungductung 0:e87aa4c49e95 118 */
phungductung 0:e87aa4c49e95 119
phungductung 0:e87aa4c49e95 120 /* Exported functions ---------------------------------------------------------*/
phungductung 0:e87aa4c49e95 121
phungductung 0:e87aa4c49e95 122 /** @addtogroup DMAEx_Exported_Functions
phungductung 0:e87aa4c49e95 123 * @{
phungductung 0:e87aa4c49e95 124 */
phungductung 0:e87aa4c49e95 125
phungductung 0:e87aa4c49e95 126
phungductung 0:e87aa4c49e95 127 /** @addtogroup DMAEx_Exported_Functions_Group1
phungductung 0:e87aa4c49e95 128 *
phungductung 0:e87aa4c49e95 129 @verbatim
phungductung 0:e87aa4c49e95 130 ===============================================================================
phungductung 0:e87aa4c49e95 131 ##### Extended features functions #####
phungductung 0:e87aa4c49e95 132 ===============================================================================
phungductung 0:e87aa4c49e95 133 [..] This section provides functions allowing to:
phungductung 0:e87aa4c49e95 134 (+) Configure the source, destination address and data length and
phungductung 0:e87aa4c49e95 135 Start MultiBuffer DMA transfer
phungductung 0:e87aa4c49e95 136 (+) Configure the source, destination address and data length and
phungductung 0:e87aa4c49e95 137 Start MultiBuffer DMA transfer with interrupt
phungductung 0:e87aa4c49e95 138 (+) Change on the fly the memory0 or memory1 address.
phungductung 0:e87aa4c49e95 139
phungductung 0:e87aa4c49e95 140 @endverbatim
phungductung 0:e87aa4c49e95 141 * @{
phungductung 0:e87aa4c49e95 142 */
phungductung 0:e87aa4c49e95 143
phungductung 0:e87aa4c49e95 144
phungductung 0:e87aa4c49e95 145 /**
phungductung 0:e87aa4c49e95 146 * @brief Starts the multi_buffer DMA Transfer.
phungductung 0:e87aa4c49e95 147 * @param hdma : pointer to a DMA_HandleTypeDef structure that contains
phungductung 0:e87aa4c49e95 148 * the configuration information for the specified DMA Stream.
phungductung 0:e87aa4c49e95 149 * @param SrcAddress: The source memory Buffer address
phungductung 0:e87aa4c49e95 150 * @param DstAddress: The destination memory Buffer address
phungductung 0:e87aa4c49e95 151 * @param SecondMemAddress: The second memory Buffer address in case of multi buffer Transfer
phungductung 0:e87aa4c49e95 152 * @param DataLength: The length of data to be transferred from source to destination
phungductung 0:e87aa4c49e95 153 * @retval HAL status
phungductung 0:e87aa4c49e95 154 */
phungductung 0:e87aa4c49e95 155 HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength)
phungductung 0:e87aa4c49e95 156 {
phungductung 0:e87aa4c49e95 157 /* Process Locked */
phungductung 0:e87aa4c49e95 158 __HAL_LOCK(hdma);
phungductung 0:e87aa4c49e95 159
phungductung 0:e87aa4c49e95 160 /* Current memory buffer used is Memory 0 */
phungductung 0:e87aa4c49e95 161 if((hdma->Instance->CR & DMA_SxCR_CT) == 0)
phungductung 0:e87aa4c49e95 162 {
phungductung 0:e87aa4c49e95 163 hdma->State = HAL_DMA_STATE_BUSY_MEM0;
phungductung 0:e87aa4c49e95 164 }
phungductung 0:e87aa4c49e95 165 /* Current memory buffer used is Memory 1 */
phungductung 0:e87aa4c49e95 166 else if((hdma->Instance->CR & DMA_SxCR_CT) != 0)
phungductung 0:e87aa4c49e95 167 {
phungductung 0:e87aa4c49e95 168 hdma->State = HAL_DMA_STATE_BUSY_MEM1;
phungductung 0:e87aa4c49e95 169 }
phungductung 0:e87aa4c49e95 170
phungductung 0:e87aa4c49e95 171 /* Check the parameters */
phungductung 0:e87aa4c49e95 172 assert_param(IS_DMA_BUFFER_SIZE(DataLength));
phungductung 0:e87aa4c49e95 173
phungductung 0:e87aa4c49e95 174 /* Disable the peripheral */
phungductung 0:e87aa4c49e95 175 __HAL_DMA_DISABLE(hdma);
phungductung 0:e87aa4c49e95 176
phungductung 0:e87aa4c49e95 177 /* Enable the double buffer mode */
phungductung 0:e87aa4c49e95 178 hdma->Instance->CR |= (uint32_t)DMA_SxCR_DBM;
phungductung 0:e87aa4c49e95 179
phungductung 0:e87aa4c49e95 180 /* Configure DMA Stream destination address */
phungductung 0:e87aa4c49e95 181 hdma->Instance->M1AR = SecondMemAddress;
phungductung 0:e87aa4c49e95 182
phungductung 0:e87aa4c49e95 183 /* Configure the source, destination address and the data length */
phungductung 0:e87aa4c49e95 184 DMA_MultiBufferSetConfig(hdma, SrcAddress, DstAddress, DataLength);
phungductung 0:e87aa4c49e95 185
phungductung 0:e87aa4c49e95 186 /* Enable the peripheral */
phungductung 0:e87aa4c49e95 187 __HAL_DMA_ENABLE(hdma);
phungductung 0:e87aa4c49e95 188
phungductung 0:e87aa4c49e95 189 return HAL_OK;
phungductung 0:e87aa4c49e95 190 }
phungductung 0:e87aa4c49e95 191
phungductung 0:e87aa4c49e95 192 /**
phungductung 0:e87aa4c49e95 193 * @brief Starts the multi_buffer DMA Transfer with interrupt enabled.
phungductung 0:e87aa4c49e95 194 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
phungductung 0:e87aa4c49e95 195 * the configuration information for the specified DMA Stream.
phungductung 0:e87aa4c49e95 196 * @param SrcAddress: The source memory Buffer address
phungductung 0:e87aa4c49e95 197 * @param DstAddress: The destination memory Buffer address
phungductung 0:e87aa4c49e95 198 * @param SecondMemAddress: The second memory Buffer address in case of multi buffer Transfer
phungductung 0:e87aa4c49e95 199 * @param DataLength: The length of data to be transferred from source to destination
phungductung 0:e87aa4c49e95 200 * @retval HAL status
phungductung 0:e87aa4c49e95 201 */
phungductung 0:e87aa4c49e95 202 HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength)
phungductung 0:e87aa4c49e95 203 {
phungductung 0:e87aa4c49e95 204 /* Process Locked */
phungductung 0:e87aa4c49e95 205 __HAL_LOCK(hdma);
phungductung 0:e87aa4c49e95 206
phungductung 0:e87aa4c49e95 207 /* Current memory buffer used is Memory 0 */
phungductung 0:e87aa4c49e95 208 if((hdma->Instance->CR & DMA_SxCR_CT) == 0)
phungductung 0:e87aa4c49e95 209 {
phungductung 0:e87aa4c49e95 210 hdma->State = HAL_DMA_STATE_BUSY_MEM0;
phungductung 0:e87aa4c49e95 211 }
phungductung 0:e87aa4c49e95 212 /* Current memory buffer used is Memory 1 */
phungductung 0:e87aa4c49e95 213 else if((hdma->Instance->CR & DMA_SxCR_CT) != 0)
phungductung 0:e87aa4c49e95 214 {
phungductung 0:e87aa4c49e95 215 hdma->State = HAL_DMA_STATE_BUSY_MEM1;
phungductung 0:e87aa4c49e95 216 }
phungductung 0:e87aa4c49e95 217
phungductung 0:e87aa4c49e95 218 /* Check the parameters */
phungductung 0:e87aa4c49e95 219 assert_param(IS_DMA_BUFFER_SIZE(DataLength));
phungductung 0:e87aa4c49e95 220
phungductung 0:e87aa4c49e95 221 /* Disable the peripheral */
phungductung 0:e87aa4c49e95 222 __HAL_DMA_DISABLE(hdma);
phungductung 0:e87aa4c49e95 223
phungductung 0:e87aa4c49e95 224 /* Enable the Double buffer mode */
phungductung 0:e87aa4c49e95 225 hdma->Instance->CR |= (uint32_t)DMA_SxCR_DBM;
phungductung 0:e87aa4c49e95 226
phungductung 0:e87aa4c49e95 227 /* Configure DMA Stream destination address */
phungductung 0:e87aa4c49e95 228 hdma->Instance->M1AR = SecondMemAddress;
phungductung 0:e87aa4c49e95 229
phungductung 0:e87aa4c49e95 230 /* Configure the source, destination address and the data length */
phungductung 0:e87aa4c49e95 231 DMA_MultiBufferSetConfig(hdma, SrcAddress, DstAddress, DataLength);
phungductung 0:e87aa4c49e95 232
phungductung 0:e87aa4c49e95 233 /* Enable the transfer complete interrupt */
phungductung 0:e87aa4c49e95 234 __HAL_DMA_ENABLE_IT(hdma, DMA_IT_TC);
phungductung 0:e87aa4c49e95 235
phungductung 0:e87aa4c49e95 236 /* Enable the Half transfer interrupt */
phungductung 0:e87aa4c49e95 237 __HAL_DMA_ENABLE_IT(hdma, DMA_IT_HT);
phungductung 0:e87aa4c49e95 238
phungductung 0:e87aa4c49e95 239 /* Enable the transfer Error interrupt */
phungductung 0:e87aa4c49e95 240 __HAL_DMA_ENABLE_IT(hdma, DMA_IT_TE);
phungductung 0:e87aa4c49e95 241
phungductung 0:e87aa4c49e95 242 /* Enable the fifo Error interrupt */
phungductung 0:e87aa4c49e95 243 __HAL_DMA_ENABLE_IT(hdma, DMA_IT_FE);
phungductung 0:e87aa4c49e95 244
phungductung 0:e87aa4c49e95 245 /* Enable the direct mode Error interrupt */
phungductung 0:e87aa4c49e95 246 __HAL_DMA_ENABLE_IT(hdma, DMA_IT_DME);
phungductung 0:e87aa4c49e95 247
phungductung 0:e87aa4c49e95 248 /* Enable the peripheral */
phungductung 0:e87aa4c49e95 249 __HAL_DMA_ENABLE(hdma);
phungductung 0:e87aa4c49e95 250
phungductung 0:e87aa4c49e95 251 return HAL_OK;
phungductung 0:e87aa4c49e95 252 }
phungductung 0:e87aa4c49e95 253
phungductung 0:e87aa4c49e95 254 /**
phungductung 0:e87aa4c49e95 255 * @brief Change the memory0 or memory1 address on the fly.
phungductung 0:e87aa4c49e95 256 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
phungductung 0:e87aa4c49e95 257 * the configuration information for the specified DMA Stream.
phungductung 0:e87aa4c49e95 258 * @param Address: The new address
phungductung 0:e87aa4c49e95 259 * @param memory: the memory to be changed, This parameter can be one of
phungductung 0:e87aa4c49e95 260 * the following values:
phungductung 0:e87aa4c49e95 261 * MEMORY0 /
phungductung 0:e87aa4c49e95 262 * MEMORY1
phungductung 0:e87aa4c49e95 263 * @note The MEMORY0 address can be changed only when the current transfer use
phungductung 0:e87aa4c49e95 264 * MEMORY1 and the MEMORY1 address can be changed only when the current
phungductung 0:e87aa4c49e95 265 * transfer use MEMORY0.
phungductung 0:e87aa4c49e95 266 * @retval HAL status
phungductung 0:e87aa4c49e95 267 */
phungductung 0:e87aa4c49e95 268 HAL_StatusTypeDef HAL_DMAEx_ChangeMemory(DMA_HandleTypeDef *hdma, uint32_t Address, HAL_DMA_MemoryTypeDef memory)
phungductung 0:e87aa4c49e95 269 {
phungductung 0:e87aa4c49e95 270 if(memory == MEMORY0)
phungductung 0:e87aa4c49e95 271 {
phungductung 0:e87aa4c49e95 272 /* change the memory0 address */
phungductung 0:e87aa4c49e95 273 hdma->Instance->M0AR = Address;
phungductung 0:e87aa4c49e95 274 }
phungductung 0:e87aa4c49e95 275 else
phungductung 0:e87aa4c49e95 276 {
phungductung 0:e87aa4c49e95 277 /* change the memory1 address */
phungductung 0:e87aa4c49e95 278 hdma->Instance->M1AR = Address;
phungductung 0:e87aa4c49e95 279 }
phungductung 0:e87aa4c49e95 280
phungductung 0:e87aa4c49e95 281 return HAL_OK;
phungductung 0:e87aa4c49e95 282 }
phungductung 0:e87aa4c49e95 283
phungductung 0:e87aa4c49e95 284 /**
phungductung 0:e87aa4c49e95 285 * @}
phungductung 0:e87aa4c49e95 286 */
phungductung 0:e87aa4c49e95 287
phungductung 0:e87aa4c49e95 288 /**
phungductung 0:e87aa4c49e95 289 * @}
phungductung 0:e87aa4c49e95 290 */
phungductung 0:e87aa4c49e95 291
phungductung 0:e87aa4c49e95 292 #endif /* HAL_DMA_MODULE_ENABLED */
phungductung 0:e87aa4c49e95 293 /**
phungductung 0:e87aa4c49e95 294 * @}
phungductung 0:e87aa4c49e95 295 */
phungductung 0:e87aa4c49e95 296
phungductung 0:e87aa4c49e95 297 /**
phungductung 0:e87aa4c49e95 298 * @}
phungductung 0:e87aa4c49e95 299 */
phungductung 0:e87aa4c49e95 300
phungductung 0:e87aa4c49e95 301 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/