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targets/cmsis/core_ca9.h@0:e87aa4c49e95, 2019-06-04 (annotated)

Committer:
phungductung
Date:
Tue Jun 04 21:51:46 2019 +0000
Revision:
0:e87aa4c49e95
libray

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phungductung 0:e87aa4c49e95 1 /**************************************************************************//**
phungductung 0:e87aa4c49e95 2 * @file core_ca9.h
phungductung 0:e87aa4c49e95 3 * @brief CMSIS Cortex-A9 Core Peripheral Access Layer Header File
phungductung 0:e87aa4c49e95 4 * @version
phungductung 0:e87aa4c49e95 5 * @date 25 March 2013
phungductung 0:e87aa4c49e95 6 *
phungductung 0:e87aa4c49e95 7 * @note
phungductung 0:e87aa4c49e95 8 *
phungductung 0:e87aa4c49e95 9 ******************************************************************************/
phungductung 0:e87aa4c49e95 10 /* Copyright (c) 2009 - 2012 ARM LIMITED
phungductung 0:e87aa4c49e95 11
phungductung 0:e87aa4c49e95 12 All rights reserved.
phungductung 0:e87aa4c49e95 13 Redistribution and use in source and binary forms, with or without
phungductung 0:e87aa4c49e95 14 modification, are permitted provided that the following conditions are met:
phungductung 0:e87aa4c49e95 15 - Redistributions of source code must retain the above copyright
phungductung 0:e87aa4c49e95 16 notice, this list of conditions and the following disclaimer.
phungductung 0:e87aa4c49e95 17 - Redistributions in binary form must reproduce the above copyright
phungductung 0:e87aa4c49e95 18 notice, this list of conditions and the following disclaimer in the
phungductung 0:e87aa4c49e95 19 documentation and/or other materials provided with the distribution.
phungductung 0:e87aa4c49e95 20 - Neither the name of ARM nor the names of its contributors may be used
phungductung 0:e87aa4c49e95 21 to endorse or promote products derived from this software without
phungductung 0:e87aa4c49e95 22 specific prior written permission.
phungductung 0:e87aa4c49e95 23 *
phungductung 0:e87aa4c49e95 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
phungductung 0:e87aa4c49e95 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
phungductung 0:e87aa4c49e95 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
phungductung 0:e87aa4c49e95 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
phungductung 0:e87aa4c49e95 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
phungductung 0:e87aa4c49e95 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
phungductung 0:e87aa4c49e95 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
phungductung 0:e87aa4c49e95 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
phungductung 0:e87aa4c49e95 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
phungductung 0:e87aa4c49e95 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
phungductung 0:e87aa4c49e95 34 POSSIBILITY OF SUCH DAMAGE.
phungductung 0:e87aa4c49e95 35 ---------------------------------------------------------------------------*/
phungductung 0:e87aa4c49e95 36
phungductung 0:e87aa4c49e95 37
phungductung 0:e87aa4c49e95 38 #if defined ( __ICCARM__ )
phungductung 0:e87aa4c49e95 39 #pragma system_include /* treat file as system include file for MISRA check */
phungductung 0:e87aa4c49e95 40 #endif
phungductung 0:e87aa4c49e95 41
phungductung 0:e87aa4c49e95 42 #ifdef __cplusplus
phungductung 0:e87aa4c49e95 43 extern "C" {
phungductung 0:e87aa4c49e95 44 #endif
phungductung 0:e87aa4c49e95 45
phungductung 0:e87aa4c49e95 46 #ifndef __CORE_CA9_H_GENERIC
phungductung 0:e87aa4c49e95 47 #define __CORE_CA9_H_GENERIC
phungductung 0:e87aa4c49e95 48
phungductung 0:e87aa4c49e95 49
phungductung 0:e87aa4c49e95 50 /** \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
phungductung 0:e87aa4c49e95 51 CMSIS violates the following MISRA-C:2004 rules:
phungductung 0:e87aa4c49e95 52
phungductung 0:e87aa4c49e95 53 \li Required Rule 8.5, object/function definition in header file.<br>
phungductung 0:e87aa4c49e95 54 Function definitions in header files are used to allow 'inlining'.
phungductung 0:e87aa4c49e95 55
phungductung 0:e87aa4c49e95 56 \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
phungductung 0:e87aa4c49e95 57 Unions are used for effective representation of core registers.
phungductung 0:e87aa4c49e95 58
phungductung 0:e87aa4c49e95 59 \li Advisory Rule 19.7, Function-like macro defined.<br>
phungductung 0:e87aa4c49e95 60 Function-like macros are used to allow more efficient code.
phungductung 0:e87aa4c49e95 61 */
phungductung 0:e87aa4c49e95 62
phungductung 0:e87aa4c49e95 63
phungductung 0:e87aa4c49e95 64 /*******************************************************************************
phungductung 0:e87aa4c49e95 65 * CMSIS definitions
phungductung 0:e87aa4c49e95 66 ******************************************************************************/
phungductung 0:e87aa4c49e95 67 /** \ingroup Cortex_A9
phungductung 0:e87aa4c49e95 68 @{
phungductung 0:e87aa4c49e95 69 */
phungductung 0:e87aa4c49e95 70
phungductung 0:e87aa4c49e95 71 /* CMSIS CA9 definitions */
phungductung 0:e87aa4c49e95 72 #define __CA9_CMSIS_VERSION_MAIN (0x03) /*!< [31:16] CMSIS HAL main version */
phungductung 0:e87aa4c49e95 73 #define __CA9_CMSIS_VERSION_SUB (0x10) /*!< [15:0] CMSIS HAL sub version */
phungductung 0:e87aa4c49e95 74 #define __CA9_CMSIS_VERSION ((__CA9_CMSIS_VERSION_MAIN << 16) | \
phungductung 0:e87aa4c49e95 75 __CA9_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */
phungductung 0:e87aa4c49e95 76
phungductung 0:e87aa4c49e95 77 #define __CORTEX_A (0x09) /*!< Cortex-A Core */
phungductung 0:e87aa4c49e95 78
phungductung 0:e87aa4c49e95 79
phungductung 0:e87aa4c49e95 80 #if defined ( __CC_ARM )
phungductung 0:e87aa4c49e95 81 #define __ASM __asm /*!< asm keyword for ARM Compiler */
phungductung 0:e87aa4c49e95 82 #define __INLINE __inline /*!< inline keyword for ARM Compiler */
phungductung 0:e87aa4c49e95 83 #define __STATIC_INLINE static __inline
phungductung 0:e87aa4c49e95 84 #define __STATIC_ASM static __asm
phungductung 0:e87aa4c49e95 85
phungductung 0:e87aa4c49e95 86 #elif defined ( __ICCARM__ )
phungductung 0:e87aa4c49e95 87 #define __ASM __asm /*!< asm keyword for IAR Compiler */
phungductung 0:e87aa4c49e95 88 #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
phungductung 0:e87aa4c49e95 89 #define __STATIC_INLINE static inline
phungductung 0:e87aa4c49e95 90 #define __STATIC_ASM static __asm
phungductung 0:e87aa4c49e95 91
phungductung 0:e87aa4c49e95 92 #include <stdint.h>
phungductung 0:e87aa4c49e95 93 inline uint32_t __get_PSR(void) {
phungductung 0:e87aa4c49e95 94 __ASM("mrs r0, cpsr");
phungductung 0:e87aa4c49e95 95 }
phungductung 0:e87aa4c49e95 96
phungductung 0:e87aa4c49e95 97 #elif defined ( __TMS470__ )
phungductung 0:e87aa4c49e95 98 #define __ASM __asm /*!< asm keyword for TI CCS Compiler */
phungductung 0:e87aa4c49e95 99 #define __STATIC_INLINE static inline
phungductung 0:e87aa4c49e95 100 #define __STATIC_ASM static __asm
phungductung 0:e87aa4c49e95 101
phungductung 0:e87aa4c49e95 102 #elif defined ( __GNUC__ )
phungductung 0:e87aa4c49e95 103 #define __ASM __asm /*!< asm keyword for GNU Compiler */
phungductung 0:e87aa4c49e95 104 #define __INLINE inline /*!< inline keyword for GNU Compiler */
phungductung 0:e87aa4c49e95 105 #define __STATIC_INLINE static inline
phungductung 0:e87aa4c49e95 106 #define __STATIC_ASM static __asm
phungductung 0:e87aa4c49e95 107
phungductung 0:e87aa4c49e95 108 #elif defined ( __TASKING__ )
phungductung 0:e87aa4c49e95 109 #define __ASM __asm /*!< asm keyword for TASKING Compiler */
phungductung 0:e87aa4c49e95 110 #define __INLINE inline /*!< inline keyword for TASKING Compiler */
phungductung 0:e87aa4c49e95 111 #define __STATIC_INLINE static inline
phungductung 0:e87aa4c49e95 112 #define __STATIC_ASM static __asm
phungductung 0:e87aa4c49e95 113
phungductung 0:e87aa4c49e95 114 #endif
phungductung 0:e87aa4c49e95 115
phungductung 0:e87aa4c49e95 116 /** __FPU_USED indicates whether an FPU is used or not. For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
phungductung 0:e87aa4c49e95 117 */
phungductung 0:e87aa4c49e95 118 #if defined ( __CC_ARM )
phungductung 0:e87aa4c49e95 119 #if defined __TARGET_FPU_VFP
phungductung 0:e87aa4c49e95 120 #if (__FPU_PRESENT == 1)
phungductung 0:e87aa4c49e95 121 #define __FPU_USED 1
phungductung 0:e87aa4c49e95 122 #else
phungductung 0:e87aa4c49e95 123 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
phungductung 0:e87aa4c49e95 124 #define __FPU_USED 0
phungductung 0:e87aa4c49e95 125 #endif
phungductung 0:e87aa4c49e95 126 #else
phungductung 0:e87aa4c49e95 127 #define __FPU_USED 0
phungductung 0:e87aa4c49e95 128 #endif
phungductung 0:e87aa4c49e95 129
phungductung 0:e87aa4c49e95 130 #elif defined ( __ICCARM__ )
phungductung 0:e87aa4c49e95 131 #if defined __ARMVFP__
phungductung 0:e87aa4c49e95 132 #if (__FPU_PRESENT == 1)
phungductung 0:e87aa4c49e95 133 #define __FPU_USED 1
phungductung 0:e87aa4c49e95 134 #else
phungductung 0:e87aa4c49e95 135 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
phungductung 0:e87aa4c49e95 136 #define __FPU_USED 0
phungductung 0:e87aa4c49e95 137 #endif
phungductung 0:e87aa4c49e95 138 #else
phungductung 0:e87aa4c49e95 139 #define __FPU_USED 0
phungductung 0:e87aa4c49e95 140 #endif
phungductung 0:e87aa4c49e95 141
phungductung 0:e87aa4c49e95 142 #elif defined ( __TMS470__ )
phungductung 0:e87aa4c49e95 143 #if defined __TI_VFP_SUPPORT__
phungductung 0:e87aa4c49e95 144 #if (__FPU_PRESENT == 1)
phungductung 0:e87aa4c49e95 145 #define __FPU_USED 1
phungductung 0:e87aa4c49e95 146 #else
phungductung 0:e87aa4c49e95 147 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
phungductung 0:e87aa4c49e95 148 #define __FPU_USED 0
phungductung 0:e87aa4c49e95 149 #endif
phungductung 0:e87aa4c49e95 150 #else
phungductung 0:e87aa4c49e95 151 #define __FPU_USED 0
phungductung 0:e87aa4c49e95 152 #endif
phungductung 0:e87aa4c49e95 153
phungductung 0:e87aa4c49e95 154 #elif defined ( __GNUC__ )
phungductung 0:e87aa4c49e95 155 #if defined (__VFP_FP__) && !defined(__SOFTFP__)
phungductung 0:e87aa4c49e95 156 #if (__FPU_PRESENT == 1)
phungductung 0:e87aa4c49e95 157 #define __FPU_USED 1
phungductung 0:e87aa4c49e95 158 #else
phungductung 0:e87aa4c49e95 159 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
phungductung 0:e87aa4c49e95 160 #define __FPU_USED 0
phungductung 0:e87aa4c49e95 161 #endif
phungductung 0:e87aa4c49e95 162 #else
phungductung 0:e87aa4c49e95 163 #define __FPU_USED 0
phungductung 0:e87aa4c49e95 164 #endif
phungductung 0:e87aa4c49e95 165
phungductung 0:e87aa4c49e95 166 #elif defined ( __TASKING__ )
phungductung 0:e87aa4c49e95 167 #if defined __FPU_VFP__
phungductung 0:e87aa4c49e95 168 #if (__FPU_PRESENT == 1)
phungductung 0:e87aa4c49e95 169 #define __FPU_USED 1
phungductung 0:e87aa4c49e95 170 #else
phungductung 0:e87aa4c49e95 171 #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
phungductung 0:e87aa4c49e95 172 #define __FPU_USED 0
phungductung 0:e87aa4c49e95 173 #endif
phungductung 0:e87aa4c49e95 174 #else
phungductung 0:e87aa4c49e95 175 #define __FPU_USED 0
phungductung 0:e87aa4c49e95 176 #endif
phungductung 0:e87aa4c49e95 177 #endif
phungductung 0:e87aa4c49e95 178
phungductung 0:e87aa4c49e95 179 #include <stdint.h> /*!< standard types definitions */
phungductung 0:e87aa4c49e95 180 #include "core_caInstr.h" /*!< Core Instruction Access */
phungductung 0:e87aa4c49e95 181 #include "core_caFunc.h" /*!< Core Function Access */
phungductung 0:e87aa4c49e95 182 #include "core_cm4_simd.h" /*!< Compiler specific SIMD Intrinsics */
phungductung 0:e87aa4c49e95 183
phungductung 0:e87aa4c49e95 184 #endif /* __CORE_CA9_H_GENERIC */
phungductung 0:e87aa4c49e95 185
phungductung 0:e87aa4c49e95 186 #ifndef __CMSIS_GENERIC
phungductung 0:e87aa4c49e95 187
phungductung 0:e87aa4c49e95 188 #ifndef __CORE_CA9_H_DEPENDANT
phungductung 0:e87aa4c49e95 189 #define __CORE_CA9_H_DEPENDANT
phungductung 0:e87aa4c49e95 190
phungductung 0:e87aa4c49e95 191 /* check device defines and use defaults */
phungductung 0:e87aa4c49e95 192 #if defined __CHECK_DEVICE_DEFINES
phungductung 0:e87aa4c49e95 193 #ifndef __CA9_REV
phungductung 0:e87aa4c49e95 194 #define __CA9_REV 0x0000
phungductung 0:e87aa4c49e95 195 #warning "__CA9_REV not defined in device header file; using default!"
phungductung 0:e87aa4c49e95 196 #endif
phungductung 0:e87aa4c49e95 197
phungductung 0:e87aa4c49e95 198 #ifndef __FPU_PRESENT
phungductung 0:e87aa4c49e95 199 #define __FPU_PRESENT 1
phungductung 0:e87aa4c49e95 200 #warning "__FPU_PRESENT not defined in device header file; using default!"
phungductung 0:e87aa4c49e95 201 #endif
phungductung 0:e87aa4c49e95 202
phungductung 0:e87aa4c49e95 203 #ifndef __Vendor_SysTickConfig
phungductung 0:e87aa4c49e95 204 #define __Vendor_SysTickConfig 1
phungductung 0:e87aa4c49e95 205 #endif
phungductung 0:e87aa4c49e95 206
phungductung 0:e87aa4c49e95 207 #if __Vendor_SysTickConfig == 0
phungductung 0:e87aa4c49e95 208 #error "__Vendor_SysTickConfig set to 0, but vendor systick timer must be supplied for Cortex-A9"
phungductung 0:e87aa4c49e95 209 #endif
phungductung 0:e87aa4c49e95 210 #endif
phungductung 0:e87aa4c49e95 211
phungductung 0:e87aa4c49e95 212 /* IO definitions (access restrictions to peripheral registers) */
phungductung 0:e87aa4c49e95 213 /**
phungductung 0:e87aa4c49e95 214 \defgroup CMSIS_glob_defs CMSIS Global Defines
phungductung 0:e87aa4c49e95 215
phungductung 0:e87aa4c49e95 216 <strong>IO Type Qualifiers</strong> are used
phungductung 0:e87aa4c49e95 217 \li to specify the access to peripheral variables.
phungductung 0:e87aa4c49e95 218 \li for automatic generation of peripheral register debug information.
phungductung 0:e87aa4c49e95 219 */
phungductung 0:e87aa4c49e95 220 #ifdef __cplusplus
phungductung 0:e87aa4c49e95 221 #define __I volatile /*!< Defines 'read only' permissions */
phungductung 0:e87aa4c49e95 222 #else
phungductung 0:e87aa4c49e95 223 #define __I volatile const /*!< Defines 'read only' permissions */
phungductung 0:e87aa4c49e95 224 #endif
phungductung 0:e87aa4c49e95 225 #define __O volatile /*!< Defines 'write only' permissions */
phungductung 0:e87aa4c49e95 226 #define __IO volatile /*!< Defines 'read / write' permissions */
phungductung 0:e87aa4c49e95 227
phungductung 0:e87aa4c49e95 228 /*@} end of group Cortex_A9 */
phungductung 0:e87aa4c49e95 229
phungductung 0:e87aa4c49e95 230
phungductung 0:e87aa4c49e95 231 /*******************************************************************************
phungductung 0:e87aa4c49e95 232 * Register Abstraction
phungductung 0:e87aa4c49e95 233 ******************************************************************************/
phungductung 0:e87aa4c49e95 234 /** \defgroup CMSIS_core_register Defines and Type Definitions
phungductung 0:e87aa4c49e95 235 \brief Type definitions and defines for Cortex-A processor based devices.
phungductung 0:e87aa4c49e95 236 */
phungductung 0:e87aa4c49e95 237
phungductung 0:e87aa4c49e95 238 /** \ingroup CMSIS_core_register
phungductung 0:e87aa4c49e95 239 \defgroup CMSIS_CORE Status and Control Registers
phungductung 0:e87aa4c49e95 240 \brief Core Register type definitions.
phungductung 0:e87aa4c49e95 241 @{
phungductung 0:e87aa4c49e95 242 */
phungductung 0:e87aa4c49e95 243
phungductung 0:e87aa4c49e95 244 /** \brief Union type to access the Application Program Status Register (APSR).
phungductung 0:e87aa4c49e95 245 */
phungductung 0:e87aa4c49e95 246 typedef union
phungductung 0:e87aa4c49e95 247 {
phungductung 0:e87aa4c49e95 248 struct
phungductung 0:e87aa4c49e95 249 {
phungductung 0:e87aa4c49e95 250 uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */
phungductung 0:e87aa4c49e95 251 uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
phungductung 0:e87aa4c49e95 252 uint32_t reserved1:7; /*!< bit: 20..23 Reserved */
phungductung 0:e87aa4c49e95 253 uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
phungductung 0:e87aa4c49e95 254 uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
phungductung 0:e87aa4c49e95 255 uint32_t C:1; /*!< bit: 29 Carry condition code flag */
phungductung 0:e87aa4c49e95 256 uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
phungductung 0:e87aa4c49e95 257 uint32_t N:1; /*!< bit: 31 Negative condition code flag */
phungductung 0:e87aa4c49e95 258 } b; /*!< Structure used for bit access */
phungductung 0:e87aa4c49e95 259 uint32_t w; /*!< Type used for word access */
phungductung 0:e87aa4c49e95 260 } APSR_Type;
phungductung 0:e87aa4c49e95 261
phungductung 0:e87aa4c49e95 262
phungductung 0:e87aa4c49e95 263 /*@} end of group CMSIS_CORE */
phungductung 0:e87aa4c49e95 264
phungductung 0:e87aa4c49e95 265 /*@} end of CMSIS_Core_FPUFunctions */
phungductung 0:e87aa4c49e95 266
phungductung 0:e87aa4c49e95 267
phungductung 0:e87aa4c49e95 268 #endif /* __CORE_CA9_H_GENERIC */
phungductung 0:e87aa4c49e95 269
phungductung 0:e87aa4c49e95 270 #endif /* __CMSIS_GENERIC */
phungductung 0:e87aa4c49e95 271
phungductung 0:e87aa4c49e95 272 #ifdef __cplusplus
phungductung 0:e87aa4c49e95 273 }
phungductung 0:e87aa4c49e95 274
phungductung 0:e87aa4c49e95 275
phungductung 0:e87aa4c49e95 276 #endif