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targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_uart.h@0:e87aa4c49e95, 2019-06-04 (annotated)

Committer:: phungductung
Date:: Tue Jun 04 21:51:46 2019 +0000
Revision:: 0:e87aa4c49e95

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phungductung	0:e87aa4c49e95	1	/**
phungductung	0:e87aa4c49e95	2	******************************************************************************
phungductung	0:e87aa4c49e95	3	* @file stm32f7xx_hal_uart.h
phungductung	0:e87aa4c49e95	4	* @author MCD Application Team
phungductung	0:e87aa4c49e95	5	* @version V1.0.4
phungductung	0:e87aa4c49e95	6	* @date 09-December-2015
phungductung	0:e87aa4c49e95	7	* @brief Header file of UART HAL module.
phungductung	0:e87aa4c49e95	8	******************************************************************************
phungductung	0:e87aa4c49e95	9	* @attention
phungductung	0:e87aa4c49e95	10	*
phungductung	0:e87aa4c49e95	11	* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
phungductung	0:e87aa4c49e95	12	*
phungductung	0:e87aa4c49e95	13	* Redistribution and use in source and binary forms, with or without modification,
phungductung	0:e87aa4c49e95	14	* are permitted provided that the following conditions are met:
phungductung	0:e87aa4c49e95	15	* 1. Redistributions of source code must retain the above copyright notice,
phungductung	0:e87aa4c49e95	16	* this list of conditions and the following disclaimer.
phungductung	0:e87aa4c49e95	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
phungductung	0:e87aa4c49e95	18	* this list of conditions and the following disclaimer in the documentation
phungductung	0:e87aa4c49e95	19	* and/or other materials provided with the distribution.
phungductung	0:e87aa4c49e95	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
phungductung	0:e87aa4c49e95	21	* may be used to endorse or promote products derived from this software
phungductung	0:e87aa4c49e95	22	* without specific prior written permission.
phungductung	0:e87aa4c49e95	23	*
phungductung	0:e87aa4c49e95	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
phungductung	0:e87aa4c49e95	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
phungductung	0:e87aa4c49e95	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
phungductung	0:e87aa4c49e95	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
phungductung	0:e87aa4c49e95	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
phungductung	0:e87aa4c49e95	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
phungductung	0:e87aa4c49e95	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
phungductung	0:e87aa4c49e95	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
phungductung	0:e87aa4c49e95	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
phungductung	0:e87aa4c49e95	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
phungductung	0:e87aa4c49e95	34	*
phungductung	0:e87aa4c49e95	35	******************************************************************************
phungductung	0:e87aa4c49e95	36	*/
phungductung	0:e87aa4c49e95	37
phungductung	0:e87aa4c49e95	38	/* Define to prevent recursive inclusion -------------------------------------*/
phungductung	0:e87aa4c49e95	39	#ifndef __STM32F7xx_HAL_UART_H
phungductung	0:e87aa4c49e95	40	#define __STM32F7xx_HAL_UART_H
phungductung	0:e87aa4c49e95	41
phungductung	0:e87aa4c49e95	42	#ifdef __cplusplus
phungductung	0:e87aa4c49e95	43	extern "C" {
phungductung	0:e87aa4c49e95	44	#endif
phungductung	0:e87aa4c49e95	45
phungductung	0:e87aa4c49e95	46	/* Includes ------------------------------------------------------------------*/
phungductung	0:e87aa4c49e95	47	#include "stm32f7xx_hal_def.h"
phungductung	0:e87aa4c49e95	48
phungductung	0:e87aa4c49e95	49	/** @addtogroup STM32F7xx_HAL_Driver
phungductung	0:e87aa4c49e95	50	* @{
phungductung	0:e87aa4c49e95	51	*/
phungductung	0:e87aa4c49e95	52
phungductung	0:e87aa4c49e95	53	/** @addtogroup UART
phungductung	0:e87aa4c49e95	54	* @{
phungductung	0:e87aa4c49e95	55	*/
phungductung	0:e87aa4c49e95	56
phungductung	0:e87aa4c49e95	57	/* Exported types ------------------------------------------------------------*/
phungductung	0:e87aa4c49e95	58	/** @defgroup UART_Exported_Types UART Exported Types
phungductung	0:e87aa4c49e95	59	* @{
phungductung	0:e87aa4c49e95	60	*/
phungductung	0:e87aa4c49e95	61
phungductung	0:e87aa4c49e95	62	/**
phungductung	0:e87aa4c49e95	63	* @brief UART Init Structure definition
phungductung	0:e87aa4c49e95	64	*/
phungductung	0:e87aa4c49e95	65	typedef struct
phungductung	0:e87aa4c49e95	66	{
phungductung	0:e87aa4c49e95	67	uint32_t BaudRate; /*!< This member configures the UART communication baud rate.
phungductung	0:e87aa4c49e95	68	The baud rate register is computed using the following formula:
phungductung	0:e87aa4c49e95	69	- If oversampling is 16 or in LIN mode,
phungductung	0:e87aa4c49e95	70	Baud Rate Register = ((PCLKx) / ((huart->Init.BaudRate)))
phungductung	0:e87aa4c49e95	71	- If oversampling is 8,
phungductung	0:e87aa4c49e95	72	Baud Rate Register[15:4] = ((2 * PCLKx) / ((huart->Init.BaudRate)))[15:4]
phungductung	0:e87aa4c49e95	73	Baud Rate Register[3] = 0
phungductung	0:e87aa4c49e95	74	Baud Rate Register[2:0] = (((2 * PCLKx) / ((huart->Init.BaudRate)))[3:0]) >> 1 */
phungductung	0:e87aa4c49e95	75
phungductung	0:e87aa4c49e95	76	uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
phungductung	0:e87aa4c49e95	77	This parameter can be a value of @ref UARTEx_Word_Length */
phungductung	0:e87aa4c49e95	78
phungductung	0:e87aa4c49e95	79	uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
phungductung	0:e87aa4c49e95	80	This parameter can be a value of @ref UART_Stop_Bits */
phungductung	0:e87aa4c49e95	81
phungductung	0:e87aa4c49e95	82	uint32_t Parity; /*!< Specifies the parity mode.
phungductung	0:e87aa4c49e95	83	This parameter can be a value of @ref UART_Parity
phungductung	0:e87aa4c49e95	84	@note When parity is enabled, the computed parity is inserted
phungductung	0:e87aa4c49e95	85	at the MSB position of the transmitted data (9th bit when
phungductung	0:e87aa4c49e95	86	the word length is set to 9 data bits; 8th bit when the
phungductung	0:e87aa4c49e95	87	word length is set to 8 data bits). */
phungductung	0:e87aa4c49e95	88
phungductung	0:e87aa4c49e95	89	uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
phungductung	0:e87aa4c49e95	90	This parameter can be a value of @ref UART_Mode */
phungductung	0:e87aa4c49e95	91
phungductung	0:e87aa4c49e95	92	uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled
phungductung	0:e87aa4c49e95	93	or disabled.
phungductung	0:e87aa4c49e95	94	This parameter can be a value of @ref UART_Hardware_Flow_Control */
phungductung	0:e87aa4c49e95	95
phungductung	0:e87aa4c49e95	96	uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to fPCLK/8).
phungductung	0:e87aa4c49e95	97	This parameter can be a value of @ref UART_Over_Sampling */
phungductung	0:e87aa4c49e95	98
phungductung	0:e87aa4c49e95	99	uint32_t OneBitSampling; /*!< Specifies whether a single sample or three samples' majority vote is selected.
phungductung	0:e87aa4c49e95	100	Selecting the single sample method increases the receiver tolerance to clock
phungductung	0:e87aa4c49e95	101	deviations. This parameter can be a value of @ref UART_OneBit_Sampling */
phungductung	0:e87aa4c49e95	102	}UART_InitTypeDef;
phungductung	0:e87aa4c49e95	103
phungductung	0:e87aa4c49e95	104	/**
phungductung	0:e87aa4c49e95	105	* @brief UART Advanced Features initialization structure definition
phungductung	0:e87aa4c49e95	106	*/
phungductung	0:e87aa4c49e95	107	typedef struct
phungductung	0:e87aa4c49e95	108	{
phungductung	0:e87aa4c49e95	109	uint32_t AdvFeatureInit; /*!< Specifies which advanced UART features is initialized. Several
phungductung	0:e87aa4c49e95	110	Advanced Features may be initialized at the same time .
phungductung	0:e87aa4c49e95	111	This parameter can be a value of @ref UART_Advanced_Features_Initialization_Type */
phungductung	0:e87aa4c49e95	112
phungductung	0:e87aa4c49e95	113	uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted.
phungductung	0:e87aa4c49e95	114	This parameter can be a value of @ref UART_Tx_Inv */
phungductung	0:e87aa4c49e95	115
phungductung	0:e87aa4c49e95	116	uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted.
phungductung	0:e87aa4c49e95	117	This parameter can be a value of @ref UART_Rx_Inv */
phungductung	0:e87aa4c49e95	118
phungductung	0:e87aa4c49e95	119	uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic
phungductung	0:e87aa4c49e95	120	vs negative/inverted logic).
phungductung	0:e87aa4c49e95	121	This parameter can be a value of @ref UART_Data_Inv */
phungductung	0:e87aa4c49e95	122
phungductung	0:e87aa4c49e95	123	uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped.
phungductung	0:e87aa4c49e95	124	This parameter can be a value of @ref UART_Rx_Tx_Swap */
phungductung	0:e87aa4c49e95	125
phungductung	0:e87aa4c49e95	126	uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled.
phungductung	0:e87aa4c49e95	127	This parameter can be a value of @ref UART_Overrun_Disable */
phungductung	0:e87aa4c49e95	128
phungductung	0:e87aa4c49e95	129	uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error.
phungductung	0:e87aa4c49e95	130	This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error */
phungductung	0:e87aa4c49e95	131
phungductung	0:e87aa4c49e95	132	uint32_t AutoBaudRateEnable; /*!< Specifies whether auto Baud rate detection is enabled.
phungductung	0:e87aa4c49e95	133	This parameter can be a value of @ref UART_AutoBaudRate_Enable */
phungductung	0:e87aa4c49e95	134
phungductung	0:e87aa4c49e95	135	uint32_t AutoBaudRateMode; /*!< If auto Baud rate detection is enabled, specifies how the rate
phungductung	0:e87aa4c49e95	136	detection is carried out.
phungductung	0:e87aa4c49e95	137	This parameter can be a value of @ref UART_AutoBaud_Rate_Mode */
phungductung	0:e87aa4c49e95	138
phungductung	0:e87aa4c49e95	139	uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line.
phungductung	0:e87aa4c49e95	140	This parameter can be a value of @ref UART_MSB_First */
phungductung	0:e87aa4c49e95	141	} UART_AdvFeatureInitTypeDef;
phungductung	0:e87aa4c49e95	142
phungductung	0:e87aa4c49e95	143
phungductung	0:e87aa4c49e95	144
phungductung	0:e87aa4c49e95	145	/**
phungductung	0:e87aa4c49e95	146	* @brief HAL UART State structures definition
phungductung	0:e87aa4c49e95	147	*/
phungductung	0:e87aa4c49e95	148	typedef enum
phungductung	0:e87aa4c49e95	149	{
phungductung	0:e87aa4c49e95	150	HAL_UART_STATE_RESET = 0x00, /!< Peripheral is not initialized /
phungductung	0:e87aa4c49e95	151	HAL_UART_STATE_READY = 0x01, /!< Peripheral Initialized and ready for use /
phungductung	0:e87aa4c49e95	152	HAL_UART_STATE_BUSY = 0x02, /!< an internal process is ongoing /
phungductung	0:e87aa4c49e95	153	HAL_UART_STATE_BUSY_TX = 0x12, /!< Data Transmission process is ongoing /
phungductung	0:e87aa4c49e95	154	HAL_UART_STATE_BUSY_RX = 0x22, /!< Data Reception process is ongoing /
phungductung	0:e87aa4c49e95	155	HAL_UART_STATE_BUSY_TX_RX = 0x32, /!< Data Transmission and Reception process is ongoing /
phungductung	0:e87aa4c49e95	156	HAL_UART_STATE_TIMEOUT = 0x03, /!< Timeout state /
phungductung	0:e87aa4c49e95	157	HAL_UART_STATE_ERROR = 0x04 /!< Error /
phungductung	0:e87aa4c49e95	158	}HAL_UART_StateTypeDef;
phungductung	0:e87aa4c49e95	159
phungductung	0:e87aa4c49e95	160	/**
phungductung	0:e87aa4c49e95	161	* @brief UART clock sources definition
phungductung	0:e87aa4c49e95	162	*/
phungductung	0:e87aa4c49e95	163	typedef enum
phungductung	0:e87aa4c49e95	164	{
phungductung	0:e87aa4c49e95	165	UART_CLOCKSOURCE_PCLK1 = 0x00, /!< PCLK1 clock source /
phungductung	0:e87aa4c49e95	166	UART_CLOCKSOURCE_PCLK2 = 0x01, /!< PCLK2 clock source /
phungductung	0:e87aa4c49e95	167	UART_CLOCKSOURCE_HSI = 0x02, /!< HSI clock source /
phungductung	0:e87aa4c49e95	168	UART_CLOCKSOURCE_SYSCLK = 0x04, /!< SYSCLK clock source /
phungductung	0:e87aa4c49e95	169	UART_CLOCKSOURCE_LSE = 0x08, /!< LSE clock source /
phungductung	0:e87aa4c49e95	170	UART_CLOCKSOURCE_UNDEFINED = 0x10 /!< Undefined clock source /
phungductung	0:e87aa4c49e95	171	}UART_ClockSourceTypeDef;
phungductung	0:e87aa4c49e95	172
phungductung	0:e87aa4c49e95	173	/**
phungductung	0:e87aa4c49e95	174	* @brief UART handle Structure definition
phungductung	0:e87aa4c49e95	175	*/
phungductung	0:e87aa4c49e95	176	typedef struct
phungductung	0:e87aa4c49e95	177	{
phungductung	0:e87aa4c49e95	178	USART_TypeDef Instance; /!< UART registers base address */
phungductung	0:e87aa4c49e95	179
phungductung	0:e87aa4c49e95	180	UART_InitTypeDef Init; /!< UART communication parameters /
phungductung	0:e87aa4c49e95	181
phungductung	0:e87aa4c49e95	182	UART_AdvFeatureInitTypeDef AdvancedInit; /!< UART Advanced Features initialization parameters /
phungductung	0:e87aa4c49e95	183
phungductung	0:e87aa4c49e95	184	uint8_t pTxBuffPtr; /!< Pointer to UART Tx transfer Buffer */
phungductung	0:e87aa4c49e95	185
phungductung	0:e87aa4c49e95	186	uint16_t TxXferSize; /!< UART Tx Transfer size /
phungductung	0:e87aa4c49e95	187
phungductung	0:e87aa4c49e95	188	uint16_t TxXferCount; /!< UART Tx Transfer Counter /
phungductung	0:e87aa4c49e95	189
phungductung	0:e87aa4c49e95	190	uint8_t pRxBuffPtr; /!< Pointer to UART Rx transfer Buffer */
phungductung	0:e87aa4c49e95	191
phungductung	0:e87aa4c49e95	192	uint16_t RxXferSize; /!< UART Rx Transfer size /
phungductung	0:e87aa4c49e95	193
phungductung	0:e87aa4c49e95	194	uint16_t RxXferCount; /!< UART Rx Transfer Counter /
phungductung	0:e87aa4c49e95	195
phungductung	0:e87aa4c49e95	196	uint16_t Mask; /!< UART Rx RDR register mask /
phungductung	0:e87aa4c49e95	197
phungductung	0:e87aa4c49e95	198	DMA_HandleTypeDef hdmatx; /!< UART Tx DMA Handle parameters */
phungductung	0:e87aa4c49e95	199
phungductung	0:e87aa4c49e95	200	DMA_HandleTypeDef hdmarx; /!< UART Rx DMA Handle parameters */
phungductung	0:e87aa4c49e95	201
phungductung	0:e87aa4c49e95	202	HAL_LockTypeDef Lock; /!< Locking object /
phungductung	0:e87aa4c49e95	203
phungductung	0:e87aa4c49e95	204	__IO HAL_UART_StateTypeDef State; /!< UART communication state /
phungductung	0:e87aa4c49e95	205
phungductung	0:e87aa4c49e95	206	__IO uint32_t ErrorCode; /!< UART Error code /
phungductung	0:e87aa4c49e95	207
phungductung	0:e87aa4c49e95	208	}UART_HandleTypeDef;
phungductung	0:e87aa4c49e95	209
phungductung	0:e87aa4c49e95	210	/**
phungductung	0:e87aa4c49e95	211	* @}
phungductung	0:e87aa4c49e95	212	*/
phungductung	0:e87aa4c49e95	213
phungductung	0:e87aa4c49e95	214	/* Exported constants --------------------------------------------------------*/
phungductung	0:e87aa4c49e95	215	/** @defgroup UART_Exported_Constants UART Exported Constants
phungductung	0:e87aa4c49e95	216	* @{
phungductung	0:e87aa4c49e95	217	*/
phungductung	0:e87aa4c49e95	218	/** @defgroup UART_Error_Definition UART Error Definition
phungductung	0:e87aa4c49e95	219	* @{
phungductung	0:e87aa4c49e95	220	*/
phungductung	0:e87aa4c49e95	221	#define HAL_UART_ERROR_NONE ((uint32_t)0x00000000) /!< No error /
phungductung	0:e87aa4c49e95	222	#define HAL_UART_ERROR_PE ((uint32_t)0x00000001) /!< Parity error /
phungductung	0:e87aa4c49e95	223	#define HAL_UART_ERROR_NE ((uint32_t)0x00000002) /!< Noise error /
phungductung	0:e87aa4c49e95	224	#define HAL_UART_ERROR_FE ((uint32_t)0x00000004) /!< frame error /
phungductung	0:e87aa4c49e95	225	#define HAL_UART_ERROR_ORE ((uint32_t)0x00000008) /!< Overrun error /
phungductung	0:e87aa4c49e95	226	#define HAL_UART_ERROR_DMA ((uint32_t)0x00000010) /!< DMA transfer error /
phungductung	0:e87aa4c49e95	227	/**
phungductung	0:e87aa4c49e95	228	* @}
phungductung	0:e87aa4c49e95	229	*/
phungductung	0:e87aa4c49e95	230	/** @defgroup UART_Stop_Bits UART Number of Stop Bits
phungductung	0:e87aa4c49e95	231	* @{
phungductung	0:e87aa4c49e95	232	*/
phungductung	0:e87aa4c49e95	233	#define UART_STOPBITS_1 ((uint32_t)0x0000)
phungductung	0:e87aa4c49e95	234	#define UART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1)
phungductung	0:e87aa4c49e95	235	/**
phungductung	0:e87aa4c49e95	236	* @}
phungductung	0:e87aa4c49e95	237	*/
phungductung	0:e87aa4c49e95	238
phungductung	0:e87aa4c49e95	239	/** @defgroup UART_Parity UART Parity
phungductung	0:e87aa4c49e95	240	* @{
phungductung	0:e87aa4c49e95	241	*/
phungductung	0:e87aa4c49e95	242	#define UART_PARITY_NONE ((uint32_t)0x00000000)
phungductung	0:e87aa4c49e95	243	#define UART_PARITY_EVEN ((uint32_t)USART_CR1_PCE)
phungductung	0:e87aa4c49e95	244	#define UART_PARITY_ODD ((uint32_t)(USART_CR1_PCE \| USART_CR1_PS))
phungductung	0:e87aa4c49e95	245	/**
phungductung	0:e87aa4c49e95	246	* @}
phungductung	0:e87aa4c49e95	247	*/
phungductung	0:e87aa4c49e95	248
phungductung	0:e87aa4c49e95	249	/** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control
phungductung	0:e87aa4c49e95	250	* @{
phungductung	0:e87aa4c49e95	251	*/
phungductung	0:e87aa4c49e95	252	#define UART_HWCONTROL_NONE ((uint32_t)0x00000000)
phungductung	0:e87aa4c49e95	253	#define UART_HWCONTROL_RTS ((uint32_t)USART_CR3_RTSE)
phungductung	0:e87aa4c49e95	254	#define UART_HWCONTROL_CTS ((uint32_t)USART_CR3_CTSE)
phungductung	0:e87aa4c49e95	255	#define UART_HWCONTROL_RTS_CTS ((uint32_t)(USART_CR3_RTSE \| USART_CR3_CTSE))
phungductung	0:e87aa4c49e95	256	/**
phungductung	0:e87aa4c49e95	257	* @}
phungductung	0:e87aa4c49e95	258	*/
phungductung	0:e87aa4c49e95	259
phungductung	0:e87aa4c49e95	260	/** @defgroup UART_Mode UART Transfer Mode
phungductung	0:e87aa4c49e95	261	* @{
phungductung	0:e87aa4c49e95	262	*/
phungductung	0:e87aa4c49e95	263	#define UART_MODE_RX ((uint32_t)USART_CR1_RE)
phungductung	0:e87aa4c49e95	264	#define UART_MODE_TX ((uint32_t)USART_CR1_TE)
phungductung	0:e87aa4c49e95	265	#define UART_MODE_TX_RX ((uint32_t)(USART_CR1_TE \|USART_CR1_RE))
phungductung	0:e87aa4c49e95	266	/**
phungductung	0:e87aa4c49e95	267	* @}
phungductung	0:e87aa4c49e95	268	*/
phungductung	0:e87aa4c49e95	269
phungductung	0:e87aa4c49e95	270	/** @defgroup UART_State UART State
phungductung	0:e87aa4c49e95	271	* @{
phungductung	0:e87aa4c49e95	272	*/
phungductung	0:e87aa4c49e95	273	#define UART_STATE_DISABLE ((uint32_t)0x00000000)
phungductung	0:e87aa4c49e95	274	#define UART_STATE_ENABLE ((uint32_t)USART_CR1_UE)
phungductung	0:e87aa4c49e95	275	/**
phungductung	0:e87aa4c49e95	276	* @}
phungductung	0:e87aa4c49e95	277	*/
phungductung	0:e87aa4c49e95	278
phungductung	0:e87aa4c49e95	279	/** @defgroup UART_Over_Sampling UART Over Sampling
phungductung	0:e87aa4c49e95	280	* @{
phungductung	0:e87aa4c49e95	281	*/
phungductung	0:e87aa4c49e95	282	#define UART_OVERSAMPLING_16 ((uint32_t)0x00000000)
phungductung	0:e87aa4c49e95	283	#define UART_OVERSAMPLING_8 ((uint32_t)USART_CR1_OVER8)
phungductung	0:e87aa4c49e95	284	/**
phungductung	0:e87aa4c49e95	285	* @}
phungductung	0:e87aa4c49e95	286	*/
phungductung	0:e87aa4c49e95	287
phungductung	0:e87aa4c49e95	288	/** @defgroup UART_OneBit_Sampling UART One Bit Sampling Method
phungductung	0:e87aa4c49e95	289	* @{
phungductung	0:e87aa4c49e95	290	*/
phungductung	0:e87aa4c49e95	291	#define UART_ONE_BIT_SAMPLE_DISABLE ((uint32_t)0x00000000)
phungductung	0:e87aa4c49e95	292	#define UART_ONE_BIT_SAMPLE_ENABLE ((uint32_t)USART_CR3_ONEBIT)
phungductung	0:e87aa4c49e95	293	/**
phungductung	0:e87aa4c49e95	294	* @}
phungductung	0:e87aa4c49e95	295	*/
phungductung	0:e87aa4c49e95	296
phungductung	0:e87aa4c49e95	297	/** @defgroup UART_AutoBaud_Rate_Mode UART Advanced Feature AutoBaud Rate Mode
phungductung	0:e87aa4c49e95	298	* @{
phungductung	0:e87aa4c49e95	299	*/
phungductung	0:e87aa4c49e95	300	#define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT ((uint32_t)0x0000)
phungductung	0:e87aa4c49e95	301	#define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE ((uint32_t)USART_CR2_ABRMODE_0)
phungductung	0:e87aa4c49e95	302	#define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME ((uint32_t)USART_CR2_ABRMODE_1)
phungductung	0:e87aa4c49e95	303	#define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME ((uint32_t)USART_CR2_ABRMODE)
phungductung	0:e87aa4c49e95	304	/**
phungductung	0:e87aa4c49e95	305	* @}
phungductung	0:e87aa4c49e95	306	*/
phungductung	0:e87aa4c49e95	307
phungductung	0:e87aa4c49e95	308	/** @defgroup UART_Receiver_TimeOut UART Receiver TimeOut
phungductung	0:e87aa4c49e95	309	* @{
phungductung	0:e87aa4c49e95	310	*/
phungductung	0:e87aa4c49e95	311	#define UART_RECEIVER_TIMEOUT_DISABLE ((uint32_t)0x00000000)
phungductung	0:e87aa4c49e95	312	#define UART_RECEIVER_TIMEOUT_ENABLE ((uint32_t)USART_CR2_RTOEN)
phungductung	0:e87aa4c49e95	313	/**
phungductung	0:e87aa4c49e95	314	* @}
phungductung	0:e87aa4c49e95	315	*/
phungductung	0:e87aa4c49e95	316
phungductung	0:e87aa4c49e95	317	/** @defgroup UART_LIN UART Local Interconnection Network mode
phungductung	0:e87aa4c49e95	318	* @{
phungductung	0:e87aa4c49e95	319	*/
phungductung	0:e87aa4c49e95	320	#define UART_LIN_DISABLE ((uint32_t)0x00000000)
phungductung	0:e87aa4c49e95	321	#define UART_LIN_ENABLE ((uint32_t)USART_CR2_LINEN)
phungductung	0:e87aa4c49e95	322	/**
phungductung	0:e87aa4c49e95	323	* @}
phungductung	0:e87aa4c49e95	324	*/
phungductung	0:e87aa4c49e95	325
phungductung	0:e87aa4c49e95	326	/** @defgroup UART_LIN_Break_Detection UART LIN Break Detection
phungductung	0:e87aa4c49e95	327	* @{
phungductung	0:e87aa4c49e95	328	*/
phungductung	0:e87aa4c49e95	329	#define UART_LINBREAKDETECTLENGTH_10B ((uint32_t)0x00000000)
phungductung	0:e87aa4c49e95	330	#define UART_LINBREAKDETECTLENGTH_11B ((uint32_t)USART_CR2_LBDL)
phungductung	0:e87aa4c49e95	331	/**
phungductung	0:e87aa4c49e95	332	* @}
phungductung	0:e87aa4c49e95	333	*/
phungductung	0:e87aa4c49e95	334
phungductung	0:e87aa4c49e95	335	/** @defgroup UART_DMA_Tx UART DMA Tx
phungductung	0:e87aa4c49e95	336	* @{
phungductung	0:e87aa4c49e95	337	*/
phungductung	0:e87aa4c49e95	338	#define UART_DMA_TX_DISABLE ((uint32_t)0x00000000)
phungductung	0:e87aa4c49e95	339	#define UART_DMA_TX_ENABLE ((uint32_t)USART_CR3_DMAT)
phungductung	0:e87aa4c49e95	340	/**
phungductung	0:e87aa4c49e95	341	* @}
phungductung	0:e87aa4c49e95	342	*/
phungductung	0:e87aa4c49e95	343
phungductung	0:e87aa4c49e95	344	/** @defgroup UART_DMA_Rx UART DMA Rx
phungductung	0:e87aa4c49e95	345	* @{
phungductung	0:e87aa4c49e95	346	*/
phungductung	0:e87aa4c49e95	347	#define UART_DMA_RX_DISABLE ((uint32_t)0x0000)
phungductung	0:e87aa4c49e95	348	#define UART_DMA_RX_ENABLE ((uint32_t)USART_CR3_DMAR)
phungductung	0:e87aa4c49e95	349	/**
phungductung	0:e87aa4c49e95	350	* @}
phungductung	0:e87aa4c49e95	351	*/
phungductung	0:e87aa4c49e95	352
phungductung	0:e87aa4c49e95	353	/** @defgroup UART_Half_Duplex_Selection UART Half Duplex Selection
phungductung	0:e87aa4c49e95	354	* @{
phungductung	0:e87aa4c49e95	355	*/
phungductung	0:e87aa4c49e95	356	#define UART_HALF_DUPLEX_DISABLE ((uint32_t)0x0000)
phungductung	0:e87aa4c49e95	357	#define UART_HALF_DUPLEX_ENABLE ((uint32_t)USART_CR3_HDSEL)
phungductung	0:e87aa4c49e95	358	/**
phungductung	0:e87aa4c49e95	359	* @}
phungductung	0:e87aa4c49e95	360	*/
phungductung	0:e87aa4c49e95	361
phungductung	0:e87aa4c49e95	362	/** @defgroup UART_WakeUp_Methods UART WakeUp Methods
phungductung	0:e87aa4c49e95	363	* @{
phungductung	0:e87aa4c49e95	364	*/
phungductung	0:e87aa4c49e95	365	#define UART_WAKEUPMETHOD_IDLELINE ((uint32_t)0x00000000)
phungductung	0:e87aa4c49e95	366	#define UART_WAKEUPMETHOD_ADDRESSMARK ((uint32_t)USART_CR1_WAKE)
phungductung	0:e87aa4c49e95	367	/**
phungductung	0:e87aa4c49e95	368	* @}
phungductung	0:e87aa4c49e95	369	*/
phungductung	0:e87aa4c49e95	370
phungductung	0:e87aa4c49e95	371	/** @defgroup UART_Request_Parameters UART Request Parameters
phungductung	0:e87aa4c49e95	372	* @{
phungductung	0:e87aa4c49e95	373	*/
phungductung	0:e87aa4c49e95	374	#define UART_AUTOBAUD_REQUEST ((uint32_t)USART_RQR_ABRRQ) /!< Auto-Baud Rate Request /
phungductung	0:e87aa4c49e95	375	#define UART_SENDBREAK_REQUEST ((uint32_t)USART_RQR_SBKRQ) /!< Send Break Request /
phungductung	0:e87aa4c49e95	376	#define UART_MUTE_MODE_REQUEST ((uint32_t)USART_RQR_MMRQ) /!< Mute Mode Request /
phungductung	0:e87aa4c49e95	377	#define UART_RXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_RXFRQ) /!< Receive Data flush Request /
phungductung	0:e87aa4c49e95	378	#define UART_TXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_TXFRQ) /!< Transmit data flush Request /
phungductung	0:e87aa4c49e95	379	/**
phungductung	0:e87aa4c49e95	380	* @}
phungductung	0:e87aa4c49e95	381	*/
phungductung	0:e87aa4c49e95	382
phungductung	0:e87aa4c49e95	383	/** @defgroup UART_Advanced_Features_Initialization_Type UART Advanced Feature Initialization Type
phungductung	0:e87aa4c49e95	384	* @{
phungductung	0:e87aa4c49e95	385	*/
phungductung	0:e87aa4c49e95	386	#define UART_ADVFEATURE_NO_INIT ((uint32_t)0x00000000)
phungductung	0:e87aa4c49e95	387	#define UART_ADVFEATURE_TXINVERT_INIT ((uint32_t)0x00000001)
phungductung	0:e87aa4c49e95	388	#define UART_ADVFEATURE_RXINVERT_INIT ((uint32_t)0x00000002)
phungductung	0:e87aa4c49e95	389	#define UART_ADVFEATURE_DATAINVERT_INIT ((uint32_t)0x00000004)
phungductung	0:e87aa4c49e95	390	#define UART_ADVFEATURE_SWAP_INIT ((uint32_t)0x00000008)
phungductung	0:e87aa4c49e95	391	#define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT ((uint32_t)0x00000010)
phungductung	0:e87aa4c49e95	392	#define UART_ADVFEATURE_DMADISABLEONERROR_INIT ((uint32_t)0x00000020)
phungductung	0:e87aa4c49e95	393	#define UART_ADVFEATURE_AUTOBAUDRATE_INIT ((uint32_t)0x00000040)
phungductung	0:e87aa4c49e95	394	#define UART_ADVFEATURE_MSBFIRST_INIT ((uint32_t)0x00000080)
phungductung	0:e87aa4c49e95	395	/**
phungductung	0:e87aa4c49e95	396	* @}
phungductung	0:e87aa4c49e95	397	*/
phungductung	0:e87aa4c49e95	398
phungductung	0:e87aa4c49e95	399	/** @defgroup UART_Tx_Inv UART Advanced Feature TX Pin Active Level Inversion
phungductung	0:e87aa4c49e95	400	* @{
phungductung	0:e87aa4c49e95	401	*/
phungductung	0:e87aa4c49e95	402	#define UART_ADVFEATURE_TXINV_DISABLE ((uint32_t)0x00000000)
phungductung	0:e87aa4c49e95	403	#define UART_ADVFEATURE_TXINV_ENABLE ((uint32_t)USART_CR2_TXINV)
phungductung	0:e87aa4c49e95	404	/**
phungductung	0:e87aa4c49e95	405	* @}
phungductung	0:e87aa4c49e95	406	*/
phungductung	0:e87aa4c49e95	407
phungductung	0:e87aa4c49e95	408	/** @defgroup UART_Rx_Inv UART Advanced Feature RX Pin Active Level Inversion
phungductung	0:e87aa4c49e95	409	* @{
phungductung	0:e87aa4c49e95	410	*/
phungductung	0:e87aa4c49e95	411	#define UART_ADVFEATURE_RXINV_DISABLE ((uint32_t)0x00000000)
phungductung	0:e87aa4c49e95	412	#define UART_ADVFEATURE_RXINV_ENABLE ((uint32_t)USART_CR2_RXINV)
phungductung	0:e87aa4c49e95	413	/**
phungductung	0:e87aa4c49e95	414	* @}
phungductung	0:e87aa4c49e95	415	*/
phungductung	0:e87aa4c49e95	416
phungductung	0:e87aa4c49e95	417	/** @defgroup UART_Data_Inv UART Advanced Feature Binary Data Inversion
phungductung	0:e87aa4c49e95	418	* @{
phungductung	0:e87aa4c49e95	419	*/
phungductung	0:e87aa4c49e95	420	#define UART_ADVFEATURE_DATAINV_DISABLE ((uint32_t)0x00000000)
phungductung	0:e87aa4c49e95	421	#define UART_ADVFEATURE_DATAINV_ENABLE ((uint32_t)USART_CR2_DATAINV)
phungductung	0:e87aa4c49e95	422	/**
phungductung	0:e87aa4c49e95	423	* @}
phungductung	0:e87aa4c49e95	424	*/
phungductung	0:e87aa4c49e95	425
phungductung	0:e87aa4c49e95	426	/** @defgroup UART_Rx_Tx_Swap UART Advanced Feature RX TX Pins Swap
phungductung	0:e87aa4c49e95	427	* @{
phungductung	0:e87aa4c49e95	428	*/
phungductung	0:e87aa4c49e95	429	#define UART_ADVFEATURE_SWAP_DISABLE ((uint32_t)0x00000000)
phungductung	0:e87aa4c49e95	430	#define UART_ADVFEATURE_SWAP_ENABLE ((uint32_t)USART_CR2_SWAP)
phungductung	0:e87aa4c49e95	431	/**
phungductung	0:e87aa4c49e95	432	* @}
phungductung	0:e87aa4c49e95	433	*/
phungductung	0:e87aa4c49e95	434
phungductung	0:e87aa4c49e95	435	/** @defgroup UART_Overrun_Disable UART Advanced Feature Overrun Disable
phungductung	0:e87aa4c49e95	436	* @{
phungductung	0:e87aa4c49e95	437	*/
phungductung	0:e87aa4c49e95	438	#define UART_ADVFEATURE_OVERRUN_ENABLE ((uint32_t)0x00000000)
phungductung	0:e87aa4c49e95	439	#define UART_ADVFEATURE_OVERRUN_DISABLE ((uint32_t)USART_CR3_OVRDIS)
phungductung	0:e87aa4c49e95	440	/**
phungductung	0:e87aa4c49e95	441	* @}
phungductung	0:e87aa4c49e95	442	*/
phungductung	0:e87aa4c49e95	443
phungductung	0:e87aa4c49e95	444	/** @defgroup UART_AutoBaudRate_Enable UART Advanced Feature Auto BaudRate Enable
phungductung	0:e87aa4c49e95	445	* @{
phungductung	0:e87aa4c49e95	446	*/
phungductung	0:e87aa4c49e95	447	#define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE ((uint32_t)0x00000000)
phungductung	0:e87aa4c49e95	448	#define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE ((uint32_t)USART_CR2_ABREN)
phungductung	0:e87aa4c49e95	449	/**
phungductung	0:e87aa4c49e95	450	* @}
phungductung	0:e87aa4c49e95	451	*/
phungductung	0:e87aa4c49e95	452
phungductung	0:e87aa4c49e95	453	/** @defgroup UART_DMA_Disable_on_Rx_Error UART Advanced Feature DMA Disable On Rx Error
phungductung	0:e87aa4c49e95	454	* @{
phungductung	0:e87aa4c49e95	455	*/
phungductung	0:e87aa4c49e95	456	#define UART_ADVFEATURE_DMA_ENABLEONRXERROR ((uint32_t)0x00000000)
phungductung	0:e87aa4c49e95	457	#define UART_ADVFEATURE_DMA_DISABLEONRXERROR ((uint32_t)USART_CR3_DDRE)
phungductung	0:e87aa4c49e95	458	/**
phungductung	0:e87aa4c49e95	459	* @}
phungductung	0:e87aa4c49e95	460	*/
phungductung	0:e87aa4c49e95	461
phungductung	0:e87aa4c49e95	462	/** @defgroup UART_MSB_First UART Advanced Feature MSB First
phungductung	0:e87aa4c49e95	463	* @{
phungductung	0:e87aa4c49e95	464	*/
phungductung	0:e87aa4c49e95	465	#define UART_ADVFEATURE_MSBFIRST_DISABLE ((uint32_t)0x00000000)
phungductung	0:e87aa4c49e95	466	#define UART_ADVFEATURE_MSBFIRST_ENABLE ((uint32_t)USART_CR2_MSBFIRST)
phungductung	0:e87aa4c49e95	467	/**
phungductung	0:e87aa4c49e95	468	* @}
phungductung	0:e87aa4c49e95	469	*/
phungductung	0:e87aa4c49e95	470
phungductung	0:e87aa4c49e95	471	/** @defgroup UART_Mute_Mode UART Advanced Feature Mute Mode Enable
phungductung	0:e87aa4c49e95	472	* @{
phungductung	0:e87aa4c49e95	473	*/
phungductung	0:e87aa4c49e95	474	#define UART_ADVFEATURE_MUTEMODE_DISABLE ((uint32_t)0x00000000)
phungductung	0:e87aa4c49e95	475	#define UART_ADVFEATURE_MUTEMODE_ENABLE ((uint32_t)USART_CR1_MME)
phungductung	0:e87aa4c49e95	476	/**
phungductung	0:e87aa4c49e95	477	* @}
phungductung	0:e87aa4c49e95	478	*/
phungductung	0:e87aa4c49e95	479
phungductung	0:e87aa4c49e95	480	/** @defgroup UART_CR2_ADDRESS_LSB_POS UART Address-matching LSB Position In CR2 Register
phungductung	0:e87aa4c49e95	481	* @{
phungductung	0:e87aa4c49e95	482	*/
phungductung	0:e87aa4c49e95	483	#define UART_CR2_ADDRESS_LSB_POS ((uint32_t) 24)
phungductung	0:e87aa4c49e95	484	/**
phungductung	0:e87aa4c49e95	485	* @}
phungductung	0:e87aa4c49e95	486	*/
phungductung	0:e87aa4c49e95	487
phungductung	0:e87aa4c49e95	488	/** @defgroup UART_DriverEnable_Polarity UART DriverEnable Polarity
phungductung	0:e87aa4c49e95	489	* @{
phungductung	0:e87aa4c49e95	490	*/
phungductung	0:e87aa4c49e95	491	#define UART_DE_POLARITY_HIGH ((uint32_t)0x00000000)
phungductung	0:e87aa4c49e95	492	#define UART_DE_POLARITY_LOW ((uint32_t)USART_CR3_DEP)
phungductung	0:e87aa4c49e95	493	/**
phungductung	0:e87aa4c49e95	494	* @}
phungductung	0:e87aa4c49e95	495	*/
phungductung	0:e87aa4c49e95	496
phungductung	0:e87aa4c49e95	497	/** @defgroup UART_CR1_DEAT_ADDRESS_LSB_POS UART Driver Enable Assertion Time LSB Position In CR1 Register
phungductung	0:e87aa4c49e95	498	* @{
phungductung	0:e87aa4c49e95	499	*/
phungductung	0:e87aa4c49e95	500	#define UART_CR1_DEAT_ADDRESS_LSB_POS ((uint32_t) 21)
phungductung	0:e87aa4c49e95	501	/**
phungductung	0:e87aa4c49e95	502	* @}
phungductung	0:e87aa4c49e95	503	*/
phungductung	0:e87aa4c49e95	504
phungductung	0:e87aa4c49e95	505	/** @defgroup UART_CR1_DEDT_ADDRESS_LSB_POS UART Driver Enable DeAssertion Time LSB Position In CR1 Register
phungductung	0:e87aa4c49e95	506	* @{
phungductung	0:e87aa4c49e95	507	*/
phungductung	0:e87aa4c49e95	508	#define UART_CR1_DEDT_ADDRESS_LSB_POS ((uint32_t) 16)
phungductung	0:e87aa4c49e95	509	/**
phungductung	0:e87aa4c49e95	510	* @}
phungductung	0:e87aa4c49e95	511	*/
phungductung	0:e87aa4c49e95	512
phungductung	0:e87aa4c49e95	513	/** @defgroup UART_Interruption_Mask UART Interruptions Flag Mask
phungductung	0:e87aa4c49e95	514	* @{
phungductung	0:e87aa4c49e95	515	*/
phungductung	0:e87aa4c49e95	516	#define UART_IT_MASK ((uint32_t)0x001F)
phungductung	0:e87aa4c49e95	517	/**
phungductung	0:e87aa4c49e95	518	* @}
phungductung	0:e87aa4c49e95	519	*/
phungductung	0:e87aa4c49e95	520
phungductung	0:e87aa4c49e95	521	/** @defgroup UART_TimeOut_Value UART polling-based communications time-out value
phungductung	0:e87aa4c49e95	522	* @{
phungductung	0:e87aa4c49e95	523	*/
phungductung	0:e87aa4c49e95	524	#define HAL_UART_TIMEOUT_VALUE 0x1FFFFFF
phungductung	0:e87aa4c49e95	525	/**
phungductung	0:e87aa4c49e95	526	* @}
phungductung	0:e87aa4c49e95	527	*/
phungductung	0:e87aa4c49e95	528
phungductung	0:e87aa4c49e95	529	/** @defgroup UART_Flags UART Status Flags
phungductung	0:e87aa4c49e95	530	* Elements values convention: 0xXXXX
phungductung	0:e87aa4c49e95	531	* - 0xXXXX : Flag mask in the ISR register
phungductung	0:e87aa4c49e95	532	* @{
phungductung	0:e87aa4c49e95	533	*/
phungductung	0:e87aa4c49e95	534	#define UART_FLAG_TEACK ((uint32_t)0x00200000)
phungductung	0:e87aa4c49e95	535	#define UART_FLAG_SBKF ((uint32_t)0x00040000)
phungductung	0:e87aa4c49e95	536	#define UART_FLAG_CMF ((uint32_t)0x00020000)
phungductung	0:e87aa4c49e95	537	#define UART_FLAG_BUSY ((uint32_t)0x00010000)
phungductung	0:e87aa4c49e95	538	#define UART_FLAG_ABRF ((uint32_t)0x00008000)
phungductung	0:e87aa4c49e95	539	#define UART_FLAG_ABRE ((uint32_t)0x00004000)
phungductung	0:e87aa4c49e95	540	#define UART_FLAG_EOBF ((uint32_t)0x00001000)
phungductung	0:e87aa4c49e95	541	#define UART_FLAG_RTOF ((uint32_t)0x00000800)
phungductung	0:e87aa4c49e95	542	#define UART_FLAG_CTS ((uint32_t)0x00000400)
phungductung	0:e87aa4c49e95	543	#define UART_FLAG_CTSIF ((uint32_t)0x00000200)
phungductung	0:e87aa4c49e95	544	#define UART_FLAG_LBDF ((uint32_t)0x00000100)
phungductung	0:e87aa4c49e95	545	#define UART_FLAG_TXE ((uint32_t)0x00000080)
phungductung	0:e87aa4c49e95	546	#define UART_FLAG_TC ((uint32_t)0x00000040)
phungductung	0:e87aa4c49e95	547	#define UART_FLAG_RXNE ((uint32_t)0x00000020)
phungductung	0:e87aa4c49e95	548	#define UART_FLAG_IDLE ((uint32_t)0x00000010)
phungductung	0:e87aa4c49e95	549	#define UART_FLAG_ORE ((uint32_t)0x00000008)
phungductung	0:e87aa4c49e95	550	#define UART_FLAG_NE ((uint32_t)0x00000004)
phungductung	0:e87aa4c49e95	551	#define UART_FLAG_FE ((uint32_t)0x00000002)
phungductung	0:e87aa4c49e95	552	#define UART_FLAG_PE ((uint32_t)0x00000001)
phungductung	0:e87aa4c49e95	553	/**
phungductung	0:e87aa4c49e95	554	* @}
phungductung	0:e87aa4c49e95	555	*/
phungductung	0:e87aa4c49e95	556
phungductung	0:e87aa4c49e95	557	/** @defgroup UART_Interrupt_definition UART Interrupts Definition
phungductung	0:e87aa4c49e95	558	* Elements values convention: 0000ZZZZ0XXYYYYYb
phungductung	0:e87aa4c49e95	559	* - YYYYY : Interrupt source position in the XX register (5bits)
phungductung	0:e87aa4c49e95	560	* - XX : Interrupt source register (2bits)
phungductung	0:e87aa4c49e95	561	* - 01: CR1 register
phungductung	0:e87aa4c49e95	562	* - 10: CR2 register
phungductung	0:e87aa4c49e95	563	* - 11: CR3 register
phungductung	0:e87aa4c49e95	564	* - ZZZZ : Flag position in the ISR register(4bits)
phungductung	0:e87aa4c49e95	565	* @{
phungductung	0:e87aa4c49e95	566	*/
phungductung	0:e87aa4c49e95	567	#define UART_IT_PE ((uint32_t)0x0028)
phungductung	0:e87aa4c49e95	568	#define UART_IT_TXE ((uint32_t)0x0727)
phungductung	0:e87aa4c49e95	569	#define UART_IT_TC ((uint32_t)0x0626)
phungductung	0:e87aa4c49e95	570	#define UART_IT_RXNE ((uint32_t)0x0525)
phungductung	0:e87aa4c49e95	571	#define UART_IT_IDLE ((uint32_t)0x0424)
phungductung	0:e87aa4c49e95	572	#define UART_IT_LBD ((uint32_t)0x0846)
phungductung	0:e87aa4c49e95	573	#define UART_IT_CTS ((uint32_t)0x096A)
phungductung	0:e87aa4c49e95	574	#define UART_IT_CM ((uint32_t)0x112E)
phungductung	0:e87aa4c49e95	575
phungductung	0:e87aa4c49e95	576	/** Elements values convention: 000000000XXYYYYYb
phungductung	0:e87aa4c49e95	577	* - YYYYY : Interrupt source position in the XX register (5bits)
phungductung	0:e87aa4c49e95	578	* - XX : Interrupt source register (2bits)
phungductung	0:e87aa4c49e95	579	* - 01: CR1 register
phungductung	0:e87aa4c49e95	580	* - 10: CR2 register
phungductung	0:e87aa4c49e95	581	* - 11: CR3 register
phungductung	0:e87aa4c49e95	582	*/
phungductung	0:e87aa4c49e95	583	#define UART_IT_ERR ((uint32_t)0x0060)
phungductung	0:e87aa4c49e95	584
phungductung	0:e87aa4c49e95	585	/** Elements values convention: 0000ZZZZ00000000b
phungductung	0:e87aa4c49e95	586	* - ZZZZ : Flag position in the ISR register(4bits)
phungductung	0:e87aa4c49e95	587	*/
phungductung	0:e87aa4c49e95	588	#define UART_IT_ORE ((uint32_t)0x0300)
phungductung	0:e87aa4c49e95	589	#define UART_IT_NE ((uint32_t)0x0200)
phungductung	0:e87aa4c49e95	590	#define UART_IT_FE ((uint32_t)0x0100)
phungductung	0:e87aa4c49e95	591	/**
phungductung	0:e87aa4c49e95	592	* @}
phungductung	0:e87aa4c49e95	593	*/
phungductung	0:e87aa4c49e95	594
phungductung	0:e87aa4c49e95	595	/** @defgroup UART_IT_CLEAR_Flags UART Interruption Clear Flags
phungductung	0:e87aa4c49e95	596	* @{
phungductung	0:e87aa4c49e95	597	*/
phungductung	0:e87aa4c49e95	598	#define UART_CLEAR_PEF USART_ICR_PECF /!< Parity Error Clear Flag /
phungductung	0:e87aa4c49e95	599	#define UART_CLEAR_FEF USART_ICR_FECF /!< Framing Error Clear Flag /
phungductung	0:e87aa4c49e95	600	#define UART_CLEAR_NEF USART_ICR_NCF /!< Noise detected Clear Flag /
phungductung	0:e87aa4c49e95	601	#define UART_CLEAR_OREF USART_ICR_ORECF /!< OverRun Error Clear Flag /
phungductung	0:e87aa4c49e95	602	#define UART_CLEAR_IDLEF USART_ICR_IDLECF /!< IDLE line detected Clear Flag /
phungductung	0:e87aa4c49e95	603	#define UART_CLEAR_TCF USART_ICR_TCCF /!< Transmission Complete Clear Flag /
phungductung	0:e87aa4c49e95	604	#define UART_CLEAR_LBDF USART_ICR_LBDCF /!< LIN Break Detection Clear Flag /
phungductung	0:e87aa4c49e95	605	#define UART_CLEAR_CTSF USART_ICR_CTSCF /!< CTS Interrupt Clear Flag /
phungductung	0:e87aa4c49e95	606	#define UART_CLEAR_RTOF USART_ICR_RTOCF /!< Receiver Time Out Clear Flag /
phungductung	0:e87aa4c49e95	607	#define UART_CLEAR_EOBF USART_ICR_EOBCF /!< End Of Block Clear Flag /
phungductung	0:e87aa4c49e95	608	#define UART_CLEAR_CMF USART_ICR_CMCF /!< Character Match Clear Flag /
phungductung	0:e87aa4c49e95	609	/**
phungductung	0:e87aa4c49e95	610	* @}
phungductung	0:e87aa4c49e95	611	*/
phungductung	0:e87aa4c49e95	612
phungductung	0:e87aa4c49e95	613
phungductung	0:e87aa4c49e95	614	/**
phungductung	0:e87aa4c49e95	615	* @}
phungductung	0:e87aa4c49e95	616	*/
phungductung	0:e87aa4c49e95	617
phungductung	0:e87aa4c49e95	618	/* Exported macros -----------------------------------------------------------*/
phungductung	0:e87aa4c49e95	619	/** @defgroup UART_Exported_Macros UART Exported Macros
phungductung	0:e87aa4c49e95	620	* @{
phungductung	0:e87aa4c49e95	621	*/
phungductung	0:e87aa4c49e95	622
phungductung	0:e87aa4c49e95	623	/** @brief Reset UART handle state
phungductung	0:e87aa4c49e95	624	* @param __HANDLE__: UART handle.
phungductung	0:e87aa4c49e95	625	* @retval None
phungductung	0:e87aa4c49e95	626	*/
phungductung	0:e87aa4c49e95	627	#define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_UART_STATE_RESET)
phungductung	0:e87aa4c49e95	628
phungductung	0:e87aa4c49e95	629	/** @brief Flush the UART Data registers
phungductung	0:e87aa4c49e95	630	* @param __HANDLE__: specifies the UART Handle.
phungductung	0:e87aa4c49e95	631	*/
phungductung	0:e87aa4c49e95	632	#define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \
phungductung	0:e87aa4c49e95	633	do{ \
phungductung	0:e87aa4c49e95	634	SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \
phungductung	0:e87aa4c49e95	635	SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \
phungductung	0:e87aa4c49e95	636	} while(0)
phungductung	0:e87aa4c49e95	637
phungductung	0:e87aa4c49e95	638	/** @brief Clears the specified UART ISR flag, in setting the proper ICR register flag.
phungductung	0:e87aa4c49e95	639	* @param __HANDLE__: specifies the UART Handle.
phungductung	0:e87aa4c49e95	640	* @param __FLAG__: specifies the interrupt clear register flag that needs to be set
phungductung	0:e87aa4c49e95	641	* to clear the corresponding interrupt
phungductung	0:e87aa4c49e95	642	* This parameter can be one of the following values:
phungductung	0:e87aa4c49e95	643	* @arg UART_CLEAR_PEF: Parity Error Clear Flag
phungductung	0:e87aa4c49e95	644	* @arg UART_CLEAR_FEF: Framing Error Clear Flag
phungductung	0:e87aa4c49e95	645	* @arg UART_CLEAR_NEF: Noise detected Clear Flag
phungductung	0:e87aa4c49e95	646	* @arg UART_CLEAR_OREF: OverRun Error Clear Flag
phungductung	0:e87aa4c49e95	647	* @arg UART_CLEAR_IDLEF: IDLE line detected Clear Flag
phungductung	0:e87aa4c49e95	648	* @arg UART_CLEAR_TCF: Transmission Complete Clear Flag
phungductung	0:e87aa4c49e95	649	* @arg UART_CLEAR_LBDF: LIN Break Detection Clear Flag
phungductung	0:e87aa4c49e95	650	* @arg UART_CLEAR_CTSF: CTS Interrupt Clear Flag
phungductung	0:e87aa4c49e95	651	* @arg UART_CLEAR_RTOF: Receiver Time Out Clear Flag
phungductung	0:e87aa4c49e95	652	* @arg UART_CLEAR_EOBF: End Of Block Clear Flag
phungductung	0:e87aa4c49e95	653	* @arg UART_CLEAR_CMF: Character Match Clear Flag
phungductung	0:e87aa4c49e95	654	* @retval None
phungductung	0:e87aa4c49e95	655	*/
phungductung	0:e87aa4c49e95	656	#define __HAL_UART_CLEAR_IT(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__FLAG__))
phungductung	0:e87aa4c49e95	657
phungductung	0:e87aa4c49e95	658	/** @brief Clear the UART PE pending flag.
phungductung	0:e87aa4c49e95	659	* @param __HANDLE__: specifies the UART Handle.
phungductung	0:e87aa4c49e95	660	* @retval None
phungductung	0:e87aa4c49e95	661	*/
phungductung	0:e87aa4c49e95	662	#define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) __HAL_UART_CLEAR_IT((__HANDLE__),UART_CLEAR_PEF)
phungductung	0:e87aa4c49e95	663
phungductung	0:e87aa4c49e95	664	/** @brief Clear the UART FE pending flag.
phungductung	0:e87aa4c49e95	665	* @param __HANDLE__: specifies the UART Handle.
phungductung	0:e87aa4c49e95	666	* @retval None
phungductung	0:e87aa4c49e95	667	*/
phungductung	0:e87aa4c49e95	668	#define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_IT((__HANDLE__),UART_CLEAR_FEF)
phungductung	0:e87aa4c49e95	669
phungductung	0:e87aa4c49e95	670	/** @brief Clear the UART NE pending flag.
phungductung	0:e87aa4c49e95	671	* @param __HANDLE__: specifies the UART Handle.
phungductung	0:e87aa4c49e95	672	* @retval None
phungductung	0:e87aa4c49e95	673	*/
phungductung	0:e87aa4c49e95	674	#define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_IT((__HANDLE__),UART_CLEAR_NEF)
phungductung	0:e87aa4c49e95	675
phungductung	0:e87aa4c49e95	676	/** @brief Clear the UART ORE pending flag.
phungductung	0:e87aa4c49e95	677	* @param __HANDLE__: specifies the UART Handle.
phungductung	0:e87aa4c49e95	678	* @retval None
phungductung	0:e87aa4c49e95	679	*/
phungductung	0:e87aa4c49e95	680	#define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_IT((__HANDLE__),UART_CLEAR_OREF)
phungductung	0:e87aa4c49e95	681
phungductung	0:e87aa4c49e95	682	/** @brief Clear the UART IDLE pending flag.
phungductung	0:e87aa4c49e95	683	* @param __HANDLE__: specifies the UART Handle.
phungductung	0:e87aa4c49e95	684	* @retval None
phungductung	0:e87aa4c49e95	685	*/
phungductung	0:e87aa4c49e95	686	#define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_IT((__HANDLE__),UART_CLEAR_IDLEF)
phungductung	0:e87aa4c49e95	687
phungductung	0:e87aa4c49e95	688	/** @brief Checks whether the specified UART flag is set or not.
phungductung	0:e87aa4c49e95	689	* @param __HANDLE__: specifies the UART Handle.
phungductung	0:e87aa4c49e95	690	* @param __FLAG__: specifies the flag to check.
phungductung	0:e87aa4c49e95	691	* This parameter can be one of the following values:
phungductung	0:e87aa4c49e95	692	* @arg UART_FLAG_REACK: Receive enable acknowledge flag
phungductung	0:e87aa4c49e95	693	* @arg UART_FLAG_TEACK: Transmit enable acknowledge flag
phungductung	0:e87aa4c49e95	694	* @arg UART_FLAG_WUF: Wake up from stop mode flag
phungductung	0:e87aa4c49e95	695	* @arg UART_FLAG_RWU: Receiver wake up flag (is the UART in mute mode)
phungductung	0:e87aa4c49e95	696	* @arg UART_FLAG_SBKF: Send Break flag
phungductung	0:e87aa4c49e95	697	* @arg UART_FLAG_CMF: Character match flag
phungductung	0:e87aa4c49e95	698	* @arg UART_FLAG_BUSY: Busy flag
phungductung	0:e87aa4c49e95	699	* @arg UART_FLAG_ABRF: Auto Baud rate detection flag
phungductung	0:e87aa4c49e95	700	* @arg UART_FLAG_ABRE: Auto Baud rate detection error flag
phungductung	0:e87aa4c49e95	701	* @arg UART_FLAG_EOBF: End of block flag
phungductung	0:e87aa4c49e95	702	* @arg UART_FLAG_RTOF: Receiver timeout flag
phungductung	0:e87aa4c49e95	703	* @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5)
phungductung	0:e87aa4c49e95	704	* @arg UART_FLAG_LBD: LIN Break detection flag
phungductung	0:e87aa4c49e95	705	* @arg UART_FLAG_TXE: Transmit data register empty flag
phungductung	0:e87aa4c49e95	706	* @arg UART_FLAG_TC: Transmission Complete flag
phungductung	0:e87aa4c49e95	707	* @arg UART_FLAG_RXNE: Receive data register not empty flag
phungductung	0:e87aa4c49e95	708	* @arg UART_FLAG_IDLE: Idle Line detection flag
phungductung	0:e87aa4c49e95	709	* @arg UART_FLAG_ORE: OverRun Error flag
phungductung	0:e87aa4c49e95	710	* @arg UART_FLAG_NE: Noise Error flag
phungductung	0:e87aa4c49e95	711	* @arg UART_FLAG_FE: Framing Error flag
phungductung	0:e87aa4c49e95	712	* @arg UART_FLAG_PE: Parity Error flag
phungductung	0:e87aa4c49e95	713	* @retval The new state of __FLAG__ (TRUE or FALSE).
phungductung	0:e87aa4c49e95	714	*/
phungductung	0:e87aa4c49e95	715	#define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__))
phungductung	0:e87aa4c49e95	716
phungductung	0:e87aa4c49e95	717	/** @brief Enables the specified UART interrupt.
phungductung	0:e87aa4c49e95	718	* @param __HANDLE__: specifies the UART Handle.
phungductung	0:e87aa4c49e95	719	* @param __INTERRUPT__: specifies the UART interrupt source to enable.
phungductung	0:e87aa4c49e95	720	* This parameter can be one of the following values:
phungductung	0:e87aa4c49e95	721	* @arg UART_IT_WUF: Wakeup from stop mode interrupt
phungductung	0:e87aa4c49e95	722	* @arg UART_IT_CM: Character match interrupt
phungductung	0:e87aa4c49e95	723	* @arg UART_IT_CTS: CTS change interrupt
phungductung	0:e87aa4c49e95	724	* @arg UART_IT_LBD: LIN Break detection interrupt
phungductung	0:e87aa4c49e95	725	* @arg UART_IT_TXE: Transmit Data Register empty interrupt
phungductung	0:e87aa4c49e95	726	* @arg UART_IT_TC: Transmission complete interrupt
phungductung	0:e87aa4c49e95	727	* @arg UART_IT_RXNE: Receive Data register not empty interrupt
phungductung	0:e87aa4c49e95	728	* @arg UART_IT_IDLE: Idle line detection interrupt
phungductung	0:e87aa4c49e95	729	* @arg UART_IT_PE: Parity Error interrupt
phungductung	0:e87aa4c49e95	730	* @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
phungductung	0:e87aa4c49e95	731	* @retval None
phungductung	0:e87aa4c49e95	732	*/
phungductung	0:e87aa4c49e95	733	#define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1)? ((__HANDLE__)->Instance->CR1 \|= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
phungductung	0:e87aa4c49e95	734	((((uint8_t)(__INTERRUPT__)) >> 5U) == 2)? ((__HANDLE__)->Instance->CR2 \|= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
phungductung	0:e87aa4c49e95	735	((__HANDLE__)->Instance->CR3 \|= (1U << ((__INTERRUPT__) & UART_IT_MASK))))
phungductung	0:e87aa4c49e95	736
phungductung	0:e87aa4c49e95	737
phungductung	0:e87aa4c49e95	738	/** @brief Disables the specified UART interrupt.
phungductung	0:e87aa4c49e95	739	* @param __HANDLE__: specifies the UART Handle.
phungductung	0:e87aa4c49e95	740	* @param __INTERRUPT__: specifies the UART interrupt source to disable.
phungductung	0:e87aa4c49e95	741	* This parameter can be one of the following values:
phungductung	0:e87aa4c49e95	742	* @arg UART_IT_CM: Character match interrupt
phungductung	0:e87aa4c49e95	743	* @arg UART_IT_CTS: CTS change interrupt
phungductung	0:e87aa4c49e95	744	* @arg UART_IT_LBD: LIN Break detection interrupt
phungductung	0:e87aa4c49e95	745	* @arg UART_IT_TXE: Transmit Data Register empty interrupt
phungductung	0:e87aa4c49e95	746	* @arg UART_IT_TC: Transmission complete interrupt
phungductung	0:e87aa4c49e95	747	* @arg UART_IT_RXNE: Receive Data register not empty interrupt
phungductung	0:e87aa4c49e95	748	* @arg UART_IT_IDLE: Idle line detection interrupt
phungductung	0:e87aa4c49e95	749	* @arg UART_IT_PE: Parity Error interrupt
phungductung	0:e87aa4c49e95	750	* @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
phungductung	0:e87aa4c49e95	751	* @retval None
phungductung	0:e87aa4c49e95	752	*/
phungductung	0:e87aa4c49e95	753	#define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1)? ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
phungductung	0:e87aa4c49e95	754	((((uint8_t)(__INTERRUPT__)) >> 5U) == 2)? ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
phungductung	0:e87aa4c49e95	755	((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))))
phungductung	0:e87aa4c49e95	756
phungductung	0:e87aa4c49e95	757	/** @brief Checks whether the specified UART interrupt has occurred or not.
phungductung	0:e87aa4c49e95	758	* @param __HANDLE__: specifies the UART Handle.
phungductung	0:e87aa4c49e95	759	* @param __IT__: specifies the UART interrupt to check.
phungductung	0:e87aa4c49e95	760	* This parameter can be one of the following values:
phungductung	0:e87aa4c49e95	761	* @arg UART_IT_CM: Character match interrupt
phungductung	0:e87aa4c49e95	762	* @arg UART_IT_CTS: CTS change interrupt (not available for UART4 and UART5)
phungductung	0:e87aa4c49e95	763	* @arg UART_IT_LBD: LIN Break detection interrupt
phungductung	0:e87aa4c49e95	764	* @arg UART_IT_TXE: Transmit Data Register empty interrupt
phungductung	0:e87aa4c49e95	765	* @arg UART_IT_TC: Transmission complete interrupt
phungductung	0:e87aa4c49e95	766	* @arg UART_IT_RXNE: Receive Data register not empty interrupt
phungductung	0:e87aa4c49e95	767	* @arg UART_IT_IDLE: Idle line detection interrupt
phungductung	0:e87aa4c49e95	768	* @arg UART_IT_ORE: OverRun Error interrupt
phungductung	0:e87aa4c49e95	769	* @arg UART_IT_NE: Noise Error interrupt
phungductung	0:e87aa4c49e95	770	* @arg UART_IT_FE: Framing Error interrupt
phungductung	0:e87aa4c49e95	771	* @arg UART_IT_PE: Parity Error interrupt
phungductung	0:e87aa4c49e95	772	* @retval The new state of __IT__ (TRUE or FALSE).
phungductung	0:e87aa4c49e95	773	*/
phungductung	0:e87aa4c49e95	774	#define __HAL_UART_GET_IT(__HANDLE__, __IT__) ((__HANDLE__)->Instance->ISR & ((uint32_t)1 << ((__IT__)>> 0x08)))
phungductung	0:e87aa4c49e95	775
phungductung	0:e87aa4c49e95	776	/** @brief Checks whether the specified UART interrupt source is enabled.
phungductung	0:e87aa4c49e95	777	* @param __HANDLE__: specifies the UART Handle.
phungductung	0:e87aa4c49e95	778	* @param __IT__: specifies the UART interrupt source to check.
phungductung	0:e87aa4c49e95	779	* This parameter can be one of the following values:
phungductung	0:e87aa4c49e95	780	* @arg UART_IT_CTS: CTS change interrupt (not available for UART4 and UART5)
phungductung	0:e87aa4c49e95	781	* @arg UART_IT_LBD: LIN Break detection interrupt
phungductung	0:e87aa4c49e95	782	* @arg UART_IT_TXE: Transmit Data Register empty interrupt
phungductung	0:e87aa4c49e95	783	* @arg UART_IT_TC: Transmission complete interrupt
phungductung	0:e87aa4c49e95	784	* @arg UART_IT_RXNE: Receive Data register not empty interrupt
phungductung	0:e87aa4c49e95	785	* @arg UART_IT_IDLE: Idle line detection interrupt
phungductung	0:e87aa4c49e95	786	* @arg UART_IT_ORE: OverRun Error interrupt
phungductung	0:e87aa4c49e95	787	* @arg UART_IT_NE: Noise Error interrupt
phungductung	0:e87aa4c49e95	788	* @arg UART_IT_FE: Framing Error interrupt
phungductung	0:e87aa4c49e95	789	* @arg UART_IT_PE: Parity Error interrupt
phungductung	0:e87aa4c49e95	790	* @retval The new state of __IT__ (TRUE or FALSE).
phungductung	0:e87aa4c49e95	791	*/
phungductung	0:e87aa4c49e95	792	#define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __IT__) ((((((uint8_t)(__IT__)) >> 5U) == 1)? (__HANDLE__)->Instance->CR1:(((((uint8_t)(__IT__)) >> 5U) == 2)? \
phungductung	0:e87aa4c49e95	793	(__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & ((uint32_t)1 << (((uint16_t)(__IT__)) & UART_IT_MASK)))
phungductung	0:e87aa4c49e95	794
phungductung	0:e87aa4c49e95	795	/** @brief Set a specific UART request flag.
phungductung	0:e87aa4c49e95	796	* @param __HANDLE__: specifies the UART Handle.
phungductung	0:e87aa4c49e95	797	* @param __REQ__: specifies the request flag to set
phungductung	0:e87aa4c49e95	798	* This parameter can be one of the following values:
phungductung	0:e87aa4c49e95	799	* @arg UART_AUTOBAUD_REQUEST: Auto-Baud Rate Request
phungductung	0:e87aa4c49e95	800	* @arg UART_SENDBREAK_REQUEST: Send Break Request
phungductung	0:e87aa4c49e95	801	* @arg UART_MUTE_MODE_REQUEST: Mute Mode Request
phungductung	0:e87aa4c49e95	802	* @arg UART_RXDATA_FLUSH_REQUEST: Receive Data flush Request
phungductung	0:e87aa4c49e95	803	* @arg UART_TXDATA_FLUSH_REQUEST: Transmit data flush Request
phungductung	0:e87aa4c49e95	804	* @retval None
phungductung	0:e87aa4c49e95	805	*/
phungductung	0:e87aa4c49e95	806	#define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR \|= (uint32_t)(__REQ__))
phungductung	0:e87aa4c49e95	807
phungductung	0:e87aa4c49e95	808	/** @brief Enables the UART one bit sample method
phungductung	0:e87aa4c49e95	809	* @param __HANDLE__: specifies the UART Handle.
phungductung	0:e87aa4c49e95	810	* @retval None
phungductung	0:e87aa4c49e95	811	*/
phungductung	0:e87aa4c49e95	812	#define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3\|= USART_CR3_ONEBIT)
phungductung	0:e87aa4c49e95	813
phungductung	0:e87aa4c49e95	814	/** @brief Disables the UART one bit sample method
phungductung	0:e87aa4c49e95	815	* @param __HANDLE__: specifies the UART Handle.
phungductung	0:e87aa4c49e95	816	* @retval None
phungductung	0:e87aa4c49e95	817	*/
phungductung	0:e87aa4c49e95	818	#define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_ONEBIT))
phungductung	0:e87aa4c49e95	819
phungductung	0:e87aa4c49e95	820	/** @brief Enable UART
phungductung	0:e87aa4c49e95	821	* @param __HANDLE__: specifies the UART Handle.
phungductung	0:e87aa4c49e95	822	* @retval None
phungductung	0:e87aa4c49e95	823	*/
phungductung	0:e87aa4c49e95	824	#define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 \|= USART_CR1_UE)
phungductung	0:e87aa4c49e95	825
phungductung	0:e87aa4c49e95	826	/** @brief Disable UART
phungductung	0:e87aa4c49e95	827	* @param __HANDLE__: specifies the UART Handle.
phungductung	0:e87aa4c49e95	828	* @retval None
phungductung	0:e87aa4c49e95	829	*/
phungductung	0:e87aa4c49e95	830	#define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
phungductung	0:e87aa4c49e95	831
phungductung	0:e87aa4c49e95	832	/** @brief Enable CTS flow control
phungductung	0:e87aa4c49e95	833	* This macro allows to enable CTS hardware flow control for a given UART instance,
phungductung	0:e87aa4c49e95	834	* without need to call HAL_UART_Init() function.
phungductung	0:e87aa4c49e95	835	* As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
phungductung	0:e87aa4c49e95	836	* @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
phungductung	0:e87aa4c49e95	837	* for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
phungductung	0:e87aa4c49e95	838	* - UART instance should have already been initialised (through call of HAL_UART_Init() )
phungductung	0:e87aa4c49e95	839	* - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
phungductung	0:e87aa4c49e95	840	* and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
phungductung	0:e87aa4c49e95	841	* @param __HANDLE__: specifies the UART Handle.
phungductung	0:e87aa4c49e95	842	* The Handle Instance can be USART1, USART2 or LPUART.
phungductung	0:e87aa4c49e95	843	* @retval None
phungductung	0:e87aa4c49e95	844	*/
phungductung	0:e87aa4c49e95	845	#define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \
phungductung	0:e87aa4c49e95	846	do{ \
phungductung	0:e87aa4c49e95	847	SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
phungductung	0:e87aa4c49e95	848	(__HANDLE__)->Init.HwFlowCtl \|= USART_CR3_CTSE; \
phungductung	0:e87aa4c49e95	849	} while(0)
phungductung	0:e87aa4c49e95	850
phungductung	0:e87aa4c49e95	851	/** @brief Disable CTS flow control
phungductung	0:e87aa4c49e95	852	* This macro allows to disable CTS hardware flow control for a given UART instance,
phungductung	0:e87aa4c49e95	853	* without need to call HAL_UART_Init() function.
phungductung	0:e87aa4c49e95	854	* As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
phungductung	0:e87aa4c49e95	855	* @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
phungductung	0:e87aa4c49e95	856	* for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
phungductung	0:e87aa4c49e95	857	* - UART instance should have already been initialised (through call of HAL_UART_Init() )
phungductung	0:e87aa4c49e95	858	* - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
phungductung	0:e87aa4c49e95	859	* and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
phungductung	0:e87aa4c49e95	860	* @param __HANDLE__: specifies the UART Handle.
phungductung	0:e87aa4c49e95	861	* The Handle Instance can be USART1, USART2 or LPUART.
phungductung	0:e87aa4c49e95	862	* @retval None
phungductung	0:e87aa4c49e95	863	*/
phungductung	0:e87aa4c49e95	864	#define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \
phungductung	0:e87aa4c49e95	865	do{ \
phungductung	0:e87aa4c49e95	866	CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
phungductung	0:e87aa4c49e95	867	(__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \
phungductung	0:e87aa4c49e95	868	} while(0)
phungductung	0:e87aa4c49e95	869
phungductung	0:e87aa4c49e95	870	/** @brief Enable RTS flow control
phungductung	0:e87aa4c49e95	871	* This macro allows to enable RTS hardware flow control for a given UART instance,
phungductung	0:e87aa4c49e95	872	* without need to call HAL_UART_Init() function.
phungductung	0:e87aa4c49e95	873	* As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
phungductung	0:e87aa4c49e95	874	* @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
phungductung	0:e87aa4c49e95	875	* for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
phungductung	0:e87aa4c49e95	876	* - UART instance should have already been initialised (through call of HAL_UART_Init() )
phungductung	0:e87aa4c49e95	877	* - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
phungductung	0:e87aa4c49e95	878	* and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
phungductung	0:e87aa4c49e95	879	* @param __HANDLE__: specifies the UART Handle.
phungductung	0:e87aa4c49e95	880	* The Handle Instance can be USART1, USART2 or LPUART.
phungductung	0:e87aa4c49e95	881	* @retval None
phungductung	0:e87aa4c49e95	882	*/
phungductung	0:e87aa4c49e95	883	#define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \
phungductung	0:e87aa4c49e95	884	do{ \
phungductung	0:e87aa4c49e95	885	SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \
phungductung	0:e87aa4c49e95	886	(__HANDLE__)->Init.HwFlowCtl \|= USART_CR3_RTSE; \
phungductung	0:e87aa4c49e95	887	} while(0)
phungductung	0:e87aa4c49e95	888
phungductung	0:e87aa4c49e95	889	/** @brief Disable RTS flow control
phungductung	0:e87aa4c49e95	890	* This macro allows to disable RTS hardware flow control for a given UART instance,
phungductung	0:e87aa4c49e95	891	* without need to call HAL_UART_Init() function.
phungductung	0:e87aa4c49e95	892	* As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
phungductung	0:e87aa4c49e95	893	* @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
phungductung	0:e87aa4c49e95	894	* for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
phungductung	0:e87aa4c49e95	895	* - UART instance should have already been initialised (through call of HAL_UART_Init() )
phungductung	0:e87aa4c49e95	896	* - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
phungductung	0:e87aa4c49e95	897	* and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
phungductung	0:e87aa4c49e95	898	* @param __HANDLE__: specifies the UART Handle.
phungductung	0:e87aa4c49e95	899	* The Handle Instance can be USART1, USART2 or LPUART.
phungductung	0:e87aa4c49e95	900	* @retval None
phungductung	0:e87aa4c49e95	901	*/
phungductung	0:e87aa4c49e95	902	#define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \
phungductung	0:e87aa4c49e95	903	do{ \
phungductung	0:e87aa4c49e95	904	CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\
phungductung	0:e87aa4c49e95	905	(__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \
phungductung	0:e87aa4c49e95	906	} while(0)
phungductung	0:e87aa4c49e95	907
phungductung	0:e87aa4c49e95	908	/**
phungductung	0:e87aa4c49e95	909	* @}
phungductung	0:e87aa4c49e95	910	*/
phungductung	0:e87aa4c49e95	911
phungductung	0:e87aa4c49e95	912	/* Private macros --------------------------------------------------------*/
phungductung	0:e87aa4c49e95	913	/** @defgroup UART_Private_Macros UART Private Macros
phungductung	0:e87aa4c49e95	914	* @{
phungductung	0:e87aa4c49e95	915	*/
phungductung	0:e87aa4c49e95	916	/** @brief BRR division operation to set BRR register with LPUART
phungductung	0:e87aa4c49e95	917	* @param _PCLK_: LPUART clock
phungductung	0:e87aa4c49e95	918	* @param _BAUD_: Baud rate set by the user
phungductung	0:e87aa4c49e95	919	* @retval Division result
phungductung	0:e87aa4c49e95	920	*/
phungductung	0:e87aa4c49e95	921	#define UART_DIV_LPUART(_PCLK_, _BAUD_) (((_PCLK_)*256)/((_BAUD_)))
phungductung	0:e87aa4c49e95	922
phungductung	0:e87aa4c49e95	923	/** @brief BRR division operation to set BRR register in 8-bit oversampling mode
phungductung	0:e87aa4c49e95	924	* @param _PCLK_: UART clock
phungductung	0:e87aa4c49e95	925	* @param _BAUD_: Baud rate set by the user
phungductung	0:e87aa4c49e95	926	* @retval Division result
phungductung	0:e87aa4c49e95	927	*/
phungductung	0:e87aa4c49e95	928	#define UART_DIV_SAMPLING8(_PCLK_, _BAUD_) (((_PCLK_)*2)/((_BAUD_)))
phungductung	0:e87aa4c49e95	929
phungductung	0:e87aa4c49e95	930	/** @brief BRR division operation to set BRR register in 16-bit oversampling mode
phungductung	0:e87aa4c49e95	931	* @param _PCLK_: UART clock
phungductung	0:e87aa4c49e95	932	* @param _BAUD_: Baud rate set by the user
phungductung	0:e87aa4c49e95	933	* @retval Division result
phungductung	0:e87aa4c49e95	934	*/
phungductung	0:e87aa4c49e95	935	#define UART_DIV_SAMPLING16(_PCLK_, _BAUD_) (((_PCLK_))/((_BAUD_)))
phungductung	0:e87aa4c49e95	936
phungductung	0:e87aa4c49e95	937	/** @brief Check UART Baud rate
phungductung	0:e87aa4c49e95	938	* @param BAUDRATE: Baudrate specified by the user
phungductung	0:e87aa4c49e95	939	* The maximum Baud Rate is derived from the maximum clock on F7 (i.e. 216 MHz)
phungductung	0:e87aa4c49e95	940	* divided by the smallest oversampling used on the USART (i.e. 8)
phungductung	0:e87aa4c49e95	941	* @retval Test result (TRUE or FALSE).
phungductung	0:e87aa4c49e95	942	*/
phungductung	0:e87aa4c49e95	943	#define IS_UART_BAUDRATE(BAUDRATE) ((BAUDRATE) < 9000001)
phungductung	0:e87aa4c49e95	944
phungductung	0:e87aa4c49e95	945	/** @brief Check UART assertion time
phungductung	0:e87aa4c49e95	946	* @param TIME: 5-bit value assertion time
phungductung	0:e87aa4c49e95	947	* @retval Test result (TRUE or FALSE).
phungductung	0:e87aa4c49e95	948	*/
phungductung	0:e87aa4c49e95	949	#define IS_UART_ASSERTIONTIME(TIME) ((TIME) <= 0x1F)
phungductung	0:e87aa4c49e95	950
phungductung	0:e87aa4c49e95	951	/** @brief Check UART deassertion time
phungductung	0:e87aa4c49e95	952	* @param TIME: 5-bit value deassertion time
phungductung	0:e87aa4c49e95	953	* @retval Test result (TRUE or FALSE).
phungductung	0:e87aa4c49e95	954	*/
phungductung	0:e87aa4c49e95	955	#define IS_UART_DEASSERTIONTIME(TIME) ((TIME) <= 0x1F)
phungductung	0:e87aa4c49e95	956
phungductung	0:e87aa4c49e95	957	#define IS_UART_STOPBITS(STOPBITS) (((STOPBITS) == UART_STOPBITS_1) \|\| \
phungductung	0:e87aa4c49e95	958	((STOPBITS) == UART_STOPBITS_2))
phungductung	0:e87aa4c49e95	959
phungductung	0:e87aa4c49e95	960	#define IS_UART_PARITY(PARITY) (((PARITY) == UART_PARITY_NONE) \|\| \
phungductung	0:e87aa4c49e95	961	((PARITY) == UART_PARITY_EVEN) \|\| \
phungductung	0:e87aa4c49e95	962	((PARITY) == UART_PARITY_ODD))
phungductung	0:e87aa4c49e95	963
phungductung	0:e87aa4c49e95	964	#define IS_UART_HARDWARE_FLOW_CONTROL(CONTROL)\
phungductung	0:e87aa4c49e95	965	(((CONTROL) == UART_HWCONTROL_NONE) \|\| \
phungductung	0:e87aa4c49e95	966	((CONTROL) == UART_HWCONTROL_RTS) \|\| \
phungductung	0:e87aa4c49e95	967	((CONTROL) == UART_HWCONTROL_CTS) \|\| \
phungductung	0:e87aa4c49e95	968	((CONTROL) == UART_HWCONTROL_RTS_CTS))
phungductung	0:e87aa4c49e95	969
phungductung	0:e87aa4c49e95	970	#define IS_UART_MODE(MODE) ((((MODE) & (~((uint32_t)(UART_MODE_TX_RX)))) == (uint32_t)0x00) && ((MODE) != (uint32_t)0x00))
phungductung	0:e87aa4c49e95	971
phungductung	0:e87aa4c49e95	972	#define IS_UART_STATE(STATE) (((STATE) == UART_STATE_DISABLE) \|\| \
phungductung	0:e87aa4c49e95	973	((STATE) == UART_STATE_ENABLE))
phungductung	0:e87aa4c49e95	974
phungductung	0:e87aa4c49e95	975	#define IS_UART_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16) \|\| \
phungductung	0:e87aa4c49e95	976	((SAMPLING) == UART_OVERSAMPLING_8))
phungductung	0:e87aa4c49e95	977
phungductung	0:e87aa4c49e95	978	#define IS_UART_ONE_BIT_SAMPLE(ONEBIT) (((ONEBIT) == UART_ONE_BIT_SAMPLE_DISABLE) \|\| \
phungductung	0:e87aa4c49e95	979	((ONEBIT) == UART_ONE_BIT_SAMPLE_ENABLE))
phungductung	0:e87aa4c49e95	980
phungductung	0:e87aa4c49e95	981	#define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(MODE) (((MODE) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) \|\| \
phungductung	0:e87aa4c49e95	982	((MODE) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) \|\| \
phungductung	0:e87aa4c49e95	983	((MODE) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME) \|\| \
phungductung	0:e87aa4c49e95	984	((MODE) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME))
phungductung	0:e87aa4c49e95	985
phungductung	0:e87aa4c49e95	986	#define IS_UART_RECEIVER_TIMEOUT(TIMEOUT) (((TIMEOUT) == UART_RECEIVER_TIMEOUT_DISABLE) \|\| \
phungductung	0:e87aa4c49e95	987	((TIMEOUT) == UART_RECEIVER_TIMEOUT_ENABLE))
phungductung	0:e87aa4c49e95	988
phungductung	0:e87aa4c49e95	989	#define IS_UART_LIN(LIN) (((LIN) == UART_LIN_DISABLE) \|\| \
phungductung	0:e87aa4c49e95	990	((LIN) == UART_LIN_ENABLE))
phungductung	0:e87aa4c49e95	991
phungductung	0:e87aa4c49e95	992	#define IS_UART_WAKEUPMETHOD(WAKEUP) (((WAKEUP) == UART_WAKEUPMETHOD_IDLELINE) \|\| \
phungductung	0:e87aa4c49e95	993	((WAKEUP) == UART_WAKEUPMETHOD_ADDRESSMARK))
phungductung	0:e87aa4c49e95	994
phungductung	0:e87aa4c49e95	995	#define IS_UART_LIN_BREAK_DETECT_LENGTH(LENGTH) (((LENGTH) == UART_LINBREAKDETECTLENGTH_10B) \|\| \
phungductung	0:e87aa4c49e95	996	((LENGTH) == UART_LINBREAKDETECTLENGTH_11B))
phungductung	0:e87aa4c49e95	997
phungductung	0:e87aa4c49e95	998	#define IS_UART_DMA_TX(DMATX) (((DMATX) == UART_DMA_TX_DISABLE) \|\| \
phungductung	0:e87aa4c49e95	999	((DMATX) == UART_DMA_TX_ENABLE))
phungductung	0:e87aa4c49e95	1000
phungductung	0:e87aa4c49e95	1001	#define IS_UART_DMA_RX(DMARX) (((DMARX) == UART_DMA_RX_DISABLE) \|\| \
phungductung	0:e87aa4c49e95	1002	((DMARX) == UART_DMA_RX_ENABLE))
phungductung	0:e87aa4c49e95	1003
phungductung	0:e87aa4c49e95	1004	#define IS_UART_HALF_DUPLEX(HDSEL) (((HDSEL) == UART_HALF_DUPLEX_DISABLE) \|\| \
phungductung	0:e87aa4c49e95	1005	((HDSEL) == UART_HALF_DUPLEX_ENABLE))
phungductung	0:e87aa4c49e95	1006
phungductung	0:e87aa4c49e95	1007	#define IS_UART_REQUEST_PARAMETER(PARAM) (((PARAM) == UART_AUTOBAUD_REQUEST) \|\| \
phungductung	0:e87aa4c49e95	1008	((PARAM) == UART_SENDBREAK_REQUEST) \|\| \
phungductung	0:e87aa4c49e95	1009	((PARAM) == UART_MUTE_MODE_REQUEST) \|\| \
phungductung	0:e87aa4c49e95	1010	((PARAM) == UART_RXDATA_FLUSH_REQUEST) \|\| \
phungductung	0:e87aa4c49e95	1011	((PARAM) == UART_TXDATA_FLUSH_REQUEST))
phungductung	0:e87aa4c49e95	1012
phungductung	0:e87aa4c49e95	1013	#define IS_UART_ADVFEATURE_INIT(INIT) ((INIT) <= (UART_ADVFEATURE_NO_INIT \| \
phungductung	0:e87aa4c49e95	1014	UART_ADVFEATURE_TXINVERT_INIT \| \
phungductung	0:e87aa4c49e95	1015	UART_ADVFEATURE_RXINVERT_INIT \| \
phungductung	0:e87aa4c49e95	1016	UART_ADVFEATURE_DATAINVERT_INIT \| \
phungductung	0:e87aa4c49e95	1017	UART_ADVFEATURE_SWAP_INIT \| \
phungductung	0:e87aa4c49e95	1018	UART_ADVFEATURE_RXOVERRUNDISABLE_INIT \| \
phungductung	0:e87aa4c49e95	1019	UART_ADVFEATURE_DMADISABLEONERROR_INIT \| \
phungductung	0:e87aa4c49e95	1020	UART_ADVFEATURE_AUTOBAUDRATE_INIT \| \
phungductung	0:e87aa4c49e95	1021	UART_ADVFEATURE_MSBFIRST_INIT))
phungductung	0:e87aa4c49e95	1022
phungductung	0:e87aa4c49e95	1023	#define IS_UART_ADVFEATURE_TXINV(TXINV) (((TXINV) == UART_ADVFEATURE_TXINV_DISABLE) \|\| \
phungductung	0:e87aa4c49e95	1024	((TXINV) == UART_ADVFEATURE_TXINV_ENABLE))
phungductung	0:e87aa4c49e95	1025
phungductung	0:e87aa4c49e95	1026	#define IS_UART_ADVFEATURE_RXINV(RXINV) (((RXINV) == UART_ADVFEATURE_RXINV_DISABLE) \|\| \
phungductung	0:e87aa4c49e95	1027	((RXINV) == UART_ADVFEATURE_RXINV_ENABLE))
phungductung	0:e87aa4c49e95	1028
phungductung	0:e87aa4c49e95	1029	#define IS_UART_ADVFEATURE_DATAINV(DATAINV) (((DATAINV) == UART_ADVFEATURE_DATAINV_DISABLE) \|\| \
phungductung	0:e87aa4c49e95	1030	((DATAINV) == UART_ADVFEATURE_DATAINV_ENABLE))
phungductung	0:e87aa4c49e95	1031
phungductung	0:e87aa4c49e95	1032	#define IS_UART_ADVFEATURE_SWAP(SWAP) (((SWAP) == UART_ADVFEATURE_SWAP_DISABLE) \|\| \
phungductung	0:e87aa4c49e95	1033	((SWAP) == UART_ADVFEATURE_SWAP_ENABLE))
phungductung	0:e87aa4c49e95	1034
phungductung	0:e87aa4c49e95	1035	#define IS_UART_OVERRUN(OVERRUN) (((OVERRUN) == UART_ADVFEATURE_OVERRUN_ENABLE) \|\| \
phungductung	0:e87aa4c49e95	1036	((OVERRUN) == UART_ADVFEATURE_OVERRUN_DISABLE))
phungductung	0:e87aa4c49e95	1037
phungductung	0:e87aa4c49e95	1038	#define IS_UART_ADVFEATURE_AUTOBAUDRATE(AUTOBAUDRATE) (((AUTOBAUDRATE) == UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) \|\| \
phungductung	0:e87aa4c49e95	1039	((AUTOBAUDRATE) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE))
phungductung	0:e87aa4c49e95	1040
phungductung	0:e87aa4c49e95	1041	#define IS_UART_ADVFEATURE_DMAONRXERROR(DMA) (((DMA) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) \|\| \
phungductung	0:e87aa4c49e95	1042	((DMA) == UART_ADVFEATURE_DMA_DISABLEONRXERROR))
phungductung	0:e87aa4c49e95	1043
phungductung	0:e87aa4c49e95	1044	#define IS_UART_ADVFEATURE_MSBFIRST(MSBFIRST) (((MSBFIRST) == UART_ADVFEATURE_MSBFIRST_DISABLE) \|\| \
phungductung	0:e87aa4c49e95	1045	((MSBFIRST) == UART_ADVFEATURE_MSBFIRST_ENABLE))
phungductung	0:e87aa4c49e95	1046
phungductung	0:e87aa4c49e95	1047	#define IS_UART_MUTE_MODE(MUTE) (((MUTE) == UART_ADVFEATURE_MUTEMODE_DISABLE) \|\| \
phungductung	0:e87aa4c49e95	1048	((MUTE) == UART_ADVFEATURE_MUTEMODE_ENABLE))
phungductung	0:e87aa4c49e95	1049
phungductung	0:e87aa4c49e95	1050	#define IS_UART_DE_POLARITY(POLARITY) (((POLARITY) == UART_DE_POLARITY_HIGH) \|\| \
phungductung	0:e87aa4c49e95	1051	((POLARITY) == UART_DE_POLARITY_LOW))
phungductung	0:e87aa4c49e95	1052
phungductung	0:e87aa4c49e95	1053	/**
phungductung	0:e87aa4c49e95	1054	* @}
phungductung	0:e87aa4c49e95	1055	*/
phungductung	0:e87aa4c49e95	1056	/* Include UART HAL Extension module */
phungductung	0:e87aa4c49e95	1057	#include "stm32f7xx_hal_uart_ex.h"
phungductung	0:e87aa4c49e95	1058	/* Exported functions --------------------------------------------------------*/
phungductung	0:e87aa4c49e95	1059	/** @addtogroup UART_Exported_Functions UART Exported Functions
phungductung	0:e87aa4c49e95	1060	* @{
phungductung	0:e87aa4c49e95	1061	*/
phungductung	0:e87aa4c49e95	1062
phungductung	0:e87aa4c49e95	1063	/** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions
phungductung	0:e87aa4c49e95	1064	* @{
phungductung	0:e87aa4c49e95	1065	*/
phungductung	0:e87aa4c49e95	1066
phungductung	0:e87aa4c49e95	1067	/* Initialization and de-initialization functions ****************************/
phungductung	0:e87aa4c49e95	1068	HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart);
phungductung	0:e87aa4c49e95	1069	HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart);
phungductung	0:e87aa4c49e95	1070	HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength);
phungductung	0:e87aa4c49e95	1071	HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod);
phungductung	0:e87aa4c49e95	1072	HAL_StatusTypeDef HAL_UART_DeInit (UART_HandleTypeDef *huart);
phungductung	0:e87aa4c49e95	1073	void HAL_UART_MspInit(UART_HandleTypeDef *huart);
phungductung	0:e87aa4c49e95	1074	void HAL_UART_MspDeInit(UART_HandleTypeDef *huart);
phungductung	0:e87aa4c49e95	1075
phungductung	0:e87aa4c49e95	1076	/**
phungductung	0:e87aa4c49e95	1077	* @}
phungductung	0:e87aa4c49e95	1078	*/
phungductung	0:e87aa4c49e95	1079
phungductung	0:e87aa4c49e95	1080	/** @addtogroup UART_Exported_Functions_Group2 IO operation functions
phungductung	0:e87aa4c49e95	1081	* @{
phungductung	0:e87aa4c49e95	1082	*/
phungductung	0:e87aa4c49e95	1083
phungductung	0:e87aa4c49e95	1084	/* IO operation functions *****************************************************/
phungductung	0:e87aa4c49e95	1085	HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size, uint32_t Timeout);
phungductung	0:e87aa4c49e95	1086	HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size, uint32_t Timeout);
phungductung	0:e87aa4c49e95	1087	HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size);
phungductung	0:e87aa4c49e95	1088	HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size);
phungductung	0:e87aa4c49e95	1089	HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size);
phungductung	0:e87aa4c49e95	1090	HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size);
phungductung	0:e87aa4c49e95	1091	HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart);
phungductung	0:e87aa4c49e95	1092	HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart);
phungductung	0:e87aa4c49e95	1093	HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart);
phungductung	0:e87aa4c49e95	1094	void HAL_UART_IRQHandler(UART_HandleTypeDef *huart);
phungductung	0:e87aa4c49e95	1095	void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart);
phungductung	0:e87aa4c49e95	1096	void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart);
phungductung	0:e87aa4c49e95	1097	void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart);
phungductung	0:e87aa4c49e95	1098	void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart);
phungductung	0:e87aa4c49e95	1099	void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart);
phungductung	0:e87aa4c49e95	1100
phungductung	0:e87aa4c49e95	1101	/**
phungductung	0:e87aa4c49e95	1102	* @}
phungductung	0:e87aa4c49e95	1103	*/
phungductung	0:e87aa4c49e95	1104
phungductung	0:e87aa4c49e95	1105	/** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions
phungductung	0:e87aa4c49e95	1106	* @{
phungductung	0:e87aa4c49e95	1107	*/
phungductung	0:e87aa4c49e95	1108
phungductung	0:e87aa4c49e95	1109	/* Peripheral Control functions ************************************************/
phungductung	0:e87aa4c49e95	1110	HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart);
phungductung	0:e87aa4c49e95	1111	HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart);
phungductung	0:e87aa4c49e95	1112	HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart);
phungductung	0:e87aa4c49e95	1113	void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart);
phungductung	0:e87aa4c49e95	1114	HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart);
phungductung	0:e87aa4c49e95	1115	HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart);
phungductung	0:e87aa4c49e95	1116
phungductung	0:e87aa4c49e95	1117	/**
phungductung	0:e87aa4c49e95	1118	* @}
phungductung	0:e87aa4c49e95	1119	*/
phungductung	0:e87aa4c49e95	1120
phungductung	0:e87aa4c49e95	1121	/** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Error functions
phungductung	0:e87aa4c49e95	1122	* @{
phungductung	0:e87aa4c49e95	1123	*/
phungductung	0:e87aa4c49e95	1124
phungductung	0:e87aa4c49e95	1125	/* Peripheral State and Errors functions **************************************************/
phungductung	0:e87aa4c49e95	1126	HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart);
phungductung	0:e87aa4c49e95	1127	uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart);
phungductung	0:e87aa4c49e95	1128
phungductung	0:e87aa4c49e95	1129	/**
phungductung	0:e87aa4c49e95	1130	* @}
phungductung	0:e87aa4c49e95	1131	*/
phungductung	0:e87aa4c49e95	1132
phungductung	0:e87aa4c49e95	1133	/**
phungductung	0:e87aa4c49e95	1134	* @}
phungductung	0:e87aa4c49e95	1135	*/
phungductung	0:e87aa4c49e95	1136
phungductung	0:e87aa4c49e95	1137	/* Private functions -----------------------------------------------------------*/
phungductung	0:e87aa4c49e95	1138	/** @addtogroup UART_Private_Functions UART Private Functions
phungductung	0:e87aa4c49e95	1139	* @{
phungductung	0:e87aa4c49e95	1140	*/
phungductung	0:e87aa4c49e95	1141
phungductung	0:e87aa4c49e95	1142	HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart);
phungductung	0:e87aa4c49e95	1143	HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart);
phungductung	0:e87aa4c49e95	1144	HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
phungductung	0:e87aa4c49e95	1145	void UART_AdvFeatureConfig(UART_HandleTypeDef *huart);
phungductung	0:e87aa4c49e95	1146
phungductung	0:e87aa4c49e95	1147	/**
phungductung	0:e87aa4c49e95	1148	* @}
phungductung	0:e87aa4c49e95	1149	*/
phungductung	0:e87aa4c49e95	1150
phungductung	0:e87aa4c49e95	1151	/**
phungductung	0:e87aa4c49e95	1152	* @}
phungductung	0:e87aa4c49e95	1153	*/
phungductung	0:e87aa4c49e95	1154
phungductung	0:e87aa4c49e95	1155	/**
phungductung	0:e87aa4c49e95	1156	* @}
phungductung	0:e87aa4c49e95	1157	*/
phungductung	0:e87aa4c49e95	1158
phungductung	0:e87aa4c49e95	1159	#ifdef __cplusplus
phungductung	0:e87aa4c49e95	1160	}
phungductung	0:e87aa4c49e95	1161	#endif
phungductung	0:e87aa4c49e95	1162
phungductung	0:e87aa4c49e95	1163	#endif /* __STM32F7xx_HAL_UART_H */
phungductung	0:e87aa4c49e95	1164
phungductung	0:e87aa4c49e95	1165	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Library
Created:	04 Jun 2019
Imports:	8
Forks:	0
Commits:	1
Dependents:	1
Dependencies:	0
Followers:	1

targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_uart.h@0:e87aa4c49e95, 2019-06-04 (annotated)

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