PHung Tung
SPKT
targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_tim_ex.c@0:e87aa4c49e95, 2019-06-04 (annotated)
- Committer:
- phungductung
- Date:
- Tue Jun 04 21:51:46 2019 +0000
- Revision:
- 0:e87aa4c49e95
libray
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| phungductung | 0:e87aa4c49e95 | 1 | /** |
| phungductung | 0:e87aa4c49e95 | 2 | ****************************************************************************** |
| phungductung | 0:e87aa4c49e95 | 3 | * @file stm32f7xx_hal_tim_ex.c |
| phungductung | 0:e87aa4c49e95 | 4 | * @author MCD Application Team |
| phungductung | 0:e87aa4c49e95 | 5 | * @version V1.0.4 |
| phungductung | 0:e87aa4c49e95 | 6 | * @date 09-December-2015 |
| phungductung | 0:e87aa4c49e95 | 7 | * @brief TIM HAL module driver. |
| phungductung | 0:e87aa4c49e95 | 8 | * This file provides firmware functions to manage the following |
| phungductung | 0:e87aa4c49e95 | 9 | * functionalities of the Timer extension peripheral: |
| phungductung | 0:e87aa4c49e95 | 10 | * + Time Hall Sensor Interface Initialization |
| phungductung | 0:e87aa4c49e95 | 11 | * + Time Hall Sensor Interface Start |
| phungductung | 0:e87aa4c49e95 | 12 | * + Time Complementary signal bread and dead time configuration |
| phungductung | 0:e87aa4c49e95 | 13 | * + Time Master and Slave synchronization configuration |
| phungductung | 0:e87aa4c49e95 | 14 | * + Time Output Compare/PWM Channel Configuration (for channels 5 and 6) |
| phungductung | 0:e87aa4c49e95 | 15 | * + Time OCRef clear configuration |
| phungductung | 0:e87aa4c49e95 | 16 | * + Timer remapping capabilities configuration |
| phungductung | 0:e87aa4c49e95 | 17 | @verbatim |
| phungductung | 0:e87aa4c49e95 | 18 | ============================================================================== |
| phungductung | 0:e87aa4c49e95 | 19 | ##### TIMER Extended features ##### |
| phungductung | 0:e87aa4c49e95 | 20 | ============================================================================== |
| phungductung | 0:e87aa4c49e95 | 21 | [..] |
| phungductung | 0:e87aa4c49e95 | 22 | The Timer Extension features include: |
| phungductung | 0:e87aa4c49e95 | 23 | (#) Complementary outputs with programmable dead-time for : |
| phungductung | 0:e87aa4c49e95 | 24 | (++) Input Capture |
| phungductung | 0:e87aa4c49e95 | 25 | (++) Output Compare |
| phungductung | 0:e87aa4c49e95 | 26 | (++) PWM generation (Edge and Center-aligned Mode) |
| phungductung | 0:e87aa4c49e95 | 27 | (++) One-pulse mode output |
| phungductung | 0:e87aa4c49e95 | 28 | (#) Synchronization circuit to control the timer with external signals and to |
| phungductung | 0:e87aa4c49e95 | 29 | interconnect several timers together. |
| phungductung | 0:e87aa4c49e95 | 30 | (#) Break input to put the timer output signals in reset state or in a known state. |
| phungductung | 0:e87aa4c49e95 | 31 | (#) Supports incremental (quadrature) encoder and hall-sensor circuitry for |
| phungductung | 0:e87aa4c49e95 | 32 | positioning purposes |
| phungductung | 0:e87aa4c49e95 | 33 | |
| phungductung | 0:e87aa4c49e95 | 34 | ##### How to use this driver ##### |
| phungductung | 0:e87aa4c49e95 | 35 | ============================================================================== |
| phungductung | 0:e87aa4c49e95 | 36 | [..] |
| phungductung | 0:e87aa4c49e95 | 37 | (#) Initialize the TIM low level resources by implementing the following functions |
| phungductung | 0:e87aa4c49e95 | 38 | depending from feature used : |
| phungductung | 0:e87aa4c49e95 | 39 | (++) Complementary Output Compare : HAL_TIM_OC_MspInit() |
| phungductung | 0:e87aa4c49e95 | 40 | (++) Complementary PWM generation : HAL_TIM_PWM_MspInit() |
| phungductung | 0:e87aa4c49e95 | 41 | (++) Complementary One-pulse mode output : HAL_TIM_OnePulse_MspInit() |
| phungductung | 0:e87aa4c49e95 | 42 | (++) Hall Sensor output : HAL_TIM_HallSensor_MspInit() |
| phungductung | 0:e87aa4c49e95 | 43 | |
| phungductung | 0:e87aa4c49e95 | 44 | (#) Initialize the TIM low level resources : |
| phungductung | 0:e87aa4c49e95 | 45 | (##) Enable the TIM interface clock using __TIMx_CLK_ENABLE(); |
| phungductung | 0:e87aa4c49e95 | 46 | (##) TIM pins configuration |
| phungductung | 0:e87aa4c49e95 | 47 | (+++) Enable the clock for the TIM GPIOs using the following function: |
| phungductung | 0:e87aa4c49e95 | 48 | __GPIOx_CLK_ENABLE(); |
| phungductung | 0:e87aa4c49e95 | 49 | (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init(); |
| phungductung | 0:e87aa4c49e95 | 50 | |
| phungductung | 0:e87aa4c49e95 | 51 | (#) The external Clock can be configured, if needed (the default clock is the |
| phungductung | 0:e87aa4c49e95 | 52 | internal clock from the APBx), using the following function: |
| phungductung | 0:e87aa4c49e95 | 53 | HAL_TIM_ConfigClockSource, the clock configuration should be done before |
| phungductung | 0:e87aa4c49e95 | 54 | any start function. |
| phungductung | 0:e87aa4c49e95 | 55 | |
| phungductung | 0:e87aa4c49e95 | 56 | (#) Configure the TIM in the desired functioning mode using one of the |
| phungductung | 0:e87aa4c49e95 | 57 | initialization function of this driver: |
| phungductung | 0:e87aa4c49e95 | 58 | (++) HAL_TIMEx_HallSensor_Init and HAL_TIMEx_ConfigCommutationEvent: to use the |
| phungductung | 0:e87aa4c49e95 | 59 | Timer Hall Sensor Interface and the commutation event with the corresponding |
| phungductung | 0:e87aa4c49e95 | 60 | Interrupt and DMA request if needed (Note that One Timer is used to interface |
| phungductung | 0:e87aa4c49e95 | 61 | with the Hall sensor Interface and another Timer should be used to use |
| phungductung | 0:e87aa4c49e95 | 62 | the commutation event). |
| phungductung | 0:e87aa4c49e95 | 63 | |
| phungductung | 0:e87aa4c49e95 | 64 | (#) Activate the TIM peripheral using one of the start functions: |
| phungductung | 0:e87aa4c49e95 | 65 | (++) Complementary Output Compare : HAL_TIMEx_OCN_Start(), HAL_TIMEx_OCN_Start_DMA(), HAL_TIMEx_OC_Start_IT() |
| phungductung | 0:e87aa4c49e95 | 66 | (++) Complementary PWM generation : HAL_TIMEx_PWMN_Start(), HAL_TIMEx_PWMN_Start_DMA(), HAL_TIMEx_PWMN_Start_IT() |
| phungductung | 0:e87aa4c49e95 | 67 | (++) Complementary One-pulse mode output : HAL_TIMEx_OnePulseN_Start(), HAL_TIMEx_OnePulseN_Start_IT() |
| phungductung | 0:e87aa4c49e95 | 68 | (++) Hall Sensor output : HAL_TIMEx_HallSensor_Start(), HAL_TIMEx_HallSensor_Start_DMA(), HAL_TIMEx_HallSensor_Start_IT(). |
| phungductung | 0:e87aa4c49e95 | 69 | |
| phungductung | 0:e87aa4c49e95 | 70 | |
| phungductung | 0:e87aa4c49e95 | 71 | @endverbatim |
| phungductung | 0:e87aa4c49e95 | 72 | ****************************************************************************** |
| phungductung | 0:e87aa4c49e95 | 73 | * @attention |
| phungductung | 0:e87aa4c49e95 | 74 | * |
| phungductung | 0:e87aa4c49e95 | 75 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
| phungductung | 0:e87aa4c49e95 | 76 | * |
| phungductung | 0:e87aa4c49e95 | 77 | * Redistribution and use in source and binary forms, with or without modification, |
| phungductung | 0:e87aa4c49e95 | 78 | * are permitted provided that the following conditions are met: |
| phungductung | 0:e87aa4c49e95 | 79 | * 1. Redistributions of source code must retain the above copyright notice, |
| phungductung | 0:e87aa4c49e95 | 80 | * this list of conditions and the following disclaimer. |
| phungductung | 0:e87aa4c49e95 | 81 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| phungductung | 0:e87aa4c49e95 | 82 | * this list of conditions and the following disclaimer in the documentation |
| phungductung | 0:e87aa4c49e95 | 83 | * and/or other materials provided with the distribution. |
| phungductung | 0:e87aa4c49e95 | 84 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| phungductung | 0:e87aa4c49e95 | 85 | * may be used to endorse or promote products derived from this software |
| phungductung | 0:e87aa4c49e95 | 86 | * without specific prior written permission. |
| phungductung | 0:e87aa4c49e95 | 87 | * |
| phungductung | 0:e87aa4c49e95 | 88 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| phungductung | 0:e87aa4c49e95 | 89 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| phungductung | 0:e87aa4c49e95 | 90 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| phungductung | 0:e87aa4c49e95 | 91 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| phungductung | 0:e87aa4c49e95 | 92 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| phungductung | 0:e87aa4c49e95 | 93 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| phungductung | 0:e87aa4c49e95 | 94 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| phungductung | 0:e87aa4c49e95 | 95 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| phungductung | 0:e87aa4c49e95 | 96 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| phungductung | 0:e87aa4c49e95 | 97 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| phungductung | 0:e87aa4c49e95 | 98 | * |
| phungductung | 0:e87aa4c49e95 | 99 | ****************************************************************************** |
| phungductung | 0:e87aa4c49e95 | 100 | */ |
| phungductung | 0:e87aa4c49e95 | 101 | |
| phungductung | 0:e87aa4c49e95 | 102 | /* Includes ------------------------------------------------------------------*/ |
| phungductung | 0:e87aa4c49e95 | 103 | #include "stm32f7xx_hal.h" |
| phungductung | 0:e87aa4c49e95 | 104 | |
| phungductung | 0:e87aa4c49e95 | 105 | /** @addtogroup STM32F7xx_HAL_Driver |
| phungductung | 0:e87aa4c49e95 | 106 | * @{ |
| phungductung | 0:e87aa4c49e95 | 107 | */ |
| phungductung | 0:e87aa4c49e95 | 108 | |
| phungductung | 0:e87aa4c49e95 | 109 | /** @defgroup TIMEx TIMEx |
| phungductung | 0:e87aa4c49e95 | 110 | * @brief TIM Extended HAL module driver |
| phungductung | 0:e87aa4c49e95 | 111 | * @{ |
| phungductung | 0:e87aa4c49e95 | 112 | */ |
| phungductung | 0:e87aa4c49e95 | 113 | |
| phungductung | 0:e87aa4c49e95 | 114 | #ifdef HAL_TIM_MODULE_ENABLED |
| phungductung | 0:e87aa4c49e95 | 115 | |
| phungductung | 0:e87aa4c49e95 | 116 | /* Private typedef -----------------------------------------------------------*/ |
| phungductung | 0:e87aa4c49e95 | 117 | /* Private define ------------------------------------------------------------*/ |
| phungductung | 0:e87aa4c49e95 | 118 | #define BDTR_BKF_SHIFT (16) |
| phungductung | 0:e87aa4c49e95 | 119 | #define BDTR_BK2F_SHIFT (20) |
| phungductung | 0:e87aa4c49e95 | 120 | /* Private macro -------------------------------------------------------------*/ |
| phungductung | 0:e87aa4c49e95 | 121 | /* Private variables ---------------------------------------------------------*/ |
| phungductung | 0:e87aa4c49e95 | 122 | /* Private function prototypes -----------------------------------------------*/ |
| phungductung | 0:e87aa4c49e95 | 123 | /** @addtogroup TIMEx_Private_Functions |
| phungductung | 0:e87aa4c49e95 | 124 | * @{ |
| phungductung | 0:e87aa4c49e95 | 125 | */ |
| phungductung | 0:e87aa4c49e95 | 126 | static void TIM_CCxNChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelNState); |
| phungductung | 0:e87aa4c49e95 | 127 | static void TIM_OC5_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config); |
| phungductung | 0:e87aa4c49e95 | 128 | static void TIM_OC6_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config); |
| phungductung | 0:e87aa4c49e95 | 129 | /** |
| phungductung | 0:e87aa4c49e95 | 130 | * @} |
| phungductung | 0:e87aa4c49e95 | 131 | */ |
| phungductung | 0:e87aa4c49e95 | 132 | /* Private functions ---------------------------------------------------------*/ |
| phungductung | 0:e87aa4c49e95 | 133 | |
| phungductung | 0:e87aa4c49e95 | 134 | /** @defgroup TIMEx_Exported_Functions TIMEx Exported Functions |
| phungductung | 0:e87aa4c49e95 | 135 | * @{ |
| phungductung | 0:e87aa4c49e95 | 136 | */ |
| phungductung | 0:e87aa4c49e95 | 137 | |
| phungductung | 0:e87aa4c49e95 | 138 | /** @defgroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions |
| phungductung | 0:e87aa4c49e95 | 139 | * @brief Timer Hall Sensor functions |
| phungductung | 0:e87aa4c49e95 | 140 | * |
| phungductung | 0:e87aa4c49e95 | 141 | @verbatim |
| phungductung | 0:e87aa4c49e95 | 142 | ============================================================================== |
| phungductung | 0:e87aa4c49e95 | 143 | ##### Timer Hall Sensor functions ##### |
| phungductung | 0:e87aa4c49e95 | 144 | ============================================================================== |
| phungductung | 0:e87aa4c49e95 | 145 | [..] |
| phungductung | 0:e87aa4c49e95 | 146 | This section provides functions allowing to: |
| phungductung | 0:e87aa4c49e95 | 147 | (+) Initialize and configure TIM HAL Sensor. |
| phungductung | 0:e87aa4c49e95 | 148 | (+) De-initialize TIM HAL Sensor. |
| phungductung | 0:e87aa4c49e95 | 149 | (+) Start the Hall Sensor Interface. |
| phungductung | 0:e87aa4c49e95 | 150 | (+) Stop the Hall Sensor Interface. |
| phungductung | 0:e87aa4c49e95 | 151 | (+) Start the Hall Sensor Interface and enable interrupts. |
| phungductung | 0:e87aa4c49e95 | 152 | (+) Stop the Hall Sensor Interface and disable interrupts. |
| phungductung | 0:e87aa4c49e95 | 153 | (+) Start the Hall Sensor Interface and enable DMA transfers. |
| phungductung | 0:e87aa4c49e95 | 154 | (+) Stop the Hall Sensor Interface and disable DMA transfers. |
| phungductung | 0:e87aa4c49e95 | 155 | |
| phungductung | 0:e87aa4c49e95 | 156 | @endverbatim |
| phungductung | 0:e87aa4c49e95 | 157 | * @{ |
| phungductung | 0:e87aa4c49e95 | 158 | */ |
| phungductung | 0:e87aa4c49e95 | 159 | /** |
| phungductung | 0:e87aa4c49e95 | 160 | * @brief Initializes the TIM Hall Sensor Interface and create the associated handle. |
| phungductung | 0:e87aa4c49e95 | 161 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
| phungductung | 0:e87aa4c49e95 | 162 | * the configuration information for TIM module. |
| phungductung | 0:e87aa4c49e95 | 163 | * @param sConfig: TIM Hall Sensor configuration structure |
| phungductung | 0:e87aa4c49e95 | 164 | * @retval HAL status |
| phungductung | 0:e87aa4c49e95 | 165 | */ |
| phungductung | 0:e87aa4c49e95 | 166 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef* sConfig) |
| phungductung | 0:e87aa4c49e95 | 167 | { |
| phungductung | 0:e87aa4c49e95 | 168 | TIM_OC_InitTypeDef OC_Config; |
| phungductung | 0:e87aa4c49e95 | 169 | |
| phungductung | 0:e87aa4c49e95 | 170 | /* Check the TIM handle allocation */ |
| phungductung | 0:e87aa4c49e95 | 171 | if(htim == NULL) |
| phungductung | 0:e87aa4c49e95 | 172 | { |
| phungductung | 0:e87aa4c49e95 | 173 | return HAL_ERROR; |
| phungductung | 0:e87aa4c49e95 | 174 | } |
| phungductung | 0:e87aa4c49e95 | 175 | |
| phungductung | 0:e87aa4c49e95 | 176 | assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); |
| phungductung | 0:e87aa4c49e95 | 177 | assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); |
| phungductung | 0:e87aa4c49e95 | 178 | assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); |
| phungductung | 0:e87aa4c49e95 | 179 | assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity)); |
| phungductung | 0:e87aa4c49e95 | 180 | assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler)); |
| phungductung | 0:e87aa4c49e95 | 181 | assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter)); |
| phungductung | 0:e87aa4c49e95 | 182 | |
| phungductung | 0:e87aa4c49e95 | 183 | /* Set the TIM state */ |
| phungductung | 0:e87aa4c49e95 | 184 | htim->State= HAL_TIM_STATE_BUSY; |
| phungductung | 0:e87aa4c49e95 | 185 | |
| phungductung | 0:e87aa4c49e95 | 186 | /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ |
| phungductung | 0:e87aa4c49e95 | 187 | HAL_TIMEx_HallSensor_MspInit(htim); |
| phungductung | 0:e87aa4c49e95 | 188 | |
| phungductung | 0:e87aa4c49e95 | 189 | /* Configure the Time base in the Encoder Mode */ |
| phungductung | 0:e87aa4c49e95 | 190 | TIM_Base_SetConfig(htim->Instance, &htim->Init); |
| phungductung | 0:e87aa4c49e95 | 191 | |
| phungductung | 0:e87aa4c49e95 | 192 | /* Configure the Channel 1 as Input Channel to interface with the three Outputs of the Hall sensor */ |
| phungductung | 0:e87aa4c49e95 | 193 | TIM_TI1_SetConfig(htim->Instance, sConfig->IC1Polarity, TIM_ICSELECTION_TRC, sConfig->IC1Filter); |
| phungductung | 0:e87aa4c49e95 | 194 | |
| phungductung | 0:e87aa4c49e95 | 195 | /* Reset the IC1PSC Bits */ |
| phungductung | 0:e87aa4c49e95 | 196 | htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC; |
| phungductung | 0:e87aa4c49e95 | 197 | /* Set the IC1PSC value */ |
| phungductung | 0:e87aa4c49e95 | 198 | htim->Instance->CCMR1 |= sConfig->IC1Prescaler; |
| phungductung | 0:e87aa4c49e95 | 199 | |
| phungductung | 0:e87aa4c49e95 | 200 | /* Enable the Hall sensor interface (XOR function of the three inputs) */ |
| phungductung | 0:e87aa4c49e95 | 201 | htim->Instance->CR2 |= TIM_CR2_TI1S; |
| phungductung | 0:e87aa4c49e95 | 202 | |
| phungductung | 0:e87aa4c49e95 | 203 | /* Select the TIM_TS_TI1F_ED signal as Input trigger for the TIM */ |
| phungductung | 0:e87aa4c49e95 | 204 | htim->Instance->SMCR &= ~TIM_SMCR_TS; |
| phungductung | 0:e87aa4c49e95 | 205 | htim->Instance->SMCR |= TIM_TS_TI1F_ED; |
| phungductung | 0:e87aa4c49e95 | 206 | |
| phungductung | 0:e87aa4c49e95 | 207 | /* Use the TIM_TS_TI1F_ED signal to reset the TIM counter each edge detection */ |
| phungductung | 0:e87aa4c49e95 | 208 | htim->Instance->SMCR &= ~TIM_SMCR_SMS; |
| phungductung | 0:e87aa4c49e95 | 209 | htim->Instance->SMCR |= TIM_SLAVEMODE_RESET; |
| phungductung | 0:e87aa4c49e95 | 210 | |
| phungductung | 0:e87aa4c49e95 | 211 | /* Program channel 2 in PWM 2 mode with the desired Commutation_Delay*/ |
| phungductung | 0:e87aa4c49e95 | 212 | OC_Config.OCFastMode = TIM_OCFAST_DISABLE; |
| phungductung | 0:e87aa4c49e95 | 213 | OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET; |
| phungductung | 0:e87aa4c49e95 | 214 | OC_Config.OCMode = TIM_OCMODE_PWM2; |
| phungductung | 0:e87aa4c49e95 | 215 | OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET; |
| phungductung | 0:e87aa4c49e95 | 216 | OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH; |
| phungductung | 0:e87aa4c49e95 | 217 | OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH; |
| phungductung | 0:e87aa4c49e95 | 218 | OC_Config.Pulse = sConfig->Commutation_Delay; |
| phungductung | 0:e87aa4c49e95 | 219 | |
| phungductung | 0:e87aa4c49e95 | 220 | TIM_OC2_SetConfig(htim->Instance, &OC_Config); |
| phungductung | 0:e87aa4c49e95 | 221 | |
| phungductung | 0:e87aa4c49e95 | 222 | /* Select OC2REF as trigger output on TRGO: write the MMS bits in the TIMx_CR2 |
| phungductung | 0:e87aa4c49e95 | 223 | register to 101 */ |
| phungductung | 0:e87aa4c49e95 | 224 | htim->Instance->CR2 &= ~TIM_CR2_MMS; |
| phungductung | 0:e87aa4c49e95 | 225 | htim->Instance->CR2 |= TIM_TRGO_OC2REF; |
| phungductung | 0:e87aa4c49e95 | 226 | |
| phungductung | 0:e87aa4c49e95 | 227 | /* Initialize the TIM state*/ |
| phungductung | 0:e87aa4c49e95 | 228 | htim->State= HAL_TIM_STATE_READY; |
| phungductung | 0:e87aa4c49e95 | 229 | |
| phungductung | 0:e87aa4c49e95 | 230 | return HAL_OK; |
| phungductung | 0:e87aa4c49e95 | 231 | } |
| phungductung | 0:e87aa4c49e95 | 232 | |
| phungductung | 0:e87aa4c49e95 | 233 | /** |
| phungductung | 0:e87aa4c49e95 | 234 | * @brief DeInitializes the TIM Hall Sensor interface |
| phungductung | 0:e87aa4c49e95 | 235 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
| phungductung | 0:e87aa4c49e95 | 236 | * the configuration information for TIM module. |
| phungductung | 0:e87aa4c49e95 | 237 | * @retval HAL status |
| phungductung | 0:e87aa4c49e95 | 238 | */ |
| phungductung | 0:e87aa4c49e95 | 239 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim) |
| phungductung | 0:e87aa4c49e95 | 240 | { |
| phungductung | 0:e87aa4c49e95 | 241 | /* Check the parameters */ |
| phungductung | 0:e87aa4c49e95 | 242 | assert_param(IS_TIM_INSTANCE(htim->Instance)); |
| phungductung | 0:e87aa4c49e95 | 243 | |
| phungductung | 0:e87aa4c49e95 | 244 | htim->State = HAL_TIM_STATE_BUSY; |
| phungductung | 0:e87aa4c49e95 | 245 | |
| phungductung | 0:e87aa4c49e95 | 246 | /* Disable the TIM Peripheral Clock */ |
| phungductung | 0:e87aa4c49e95 | 247 | __HAL_TIM_DISABLE(htim); |
| phungductung | 0:e87aa4c49e95 | 248 | |
| phungductung | 0:e87aa4c49e95 | 249 | /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ |
| phungductung | 0:e87aa4c49e95 | 250 | HAL_TIMEx_HallSensor_MspDeInit(htim); |
| phungductung | 0:e87aa4c49e95 | 251 | |
| phungductung | 0:e87aa4c49e95 | 252 | /* Change TIM state */ |
| phungductung | 0:e87aa4c49e95 | 253 | htim->State = HAL_TIM_STATE_RESET; |
| phungductung | 0:e87aa4c49e95 | 254 | |
| phungductung | 0:e87aa4c49e95 | 255 | /* Release Lock */ |
| phungductung | 0:e87aa4c49e95 | 256 | __HAL_UNLOCK(htim); |
| phungductung | 0:e87aa4c49e95 | 257 | |
| phungductung | 0:e87aa4c49e95 | 258 | return HAL_OK; |
| phungductung | 0:e87aa4c49e95 | 259 | } |
| phungductung | 0:e87aa4c49e95 | 260 | |
| phungductung | 0:e87aa4c49e95 | 261 | /** |
| phungductung | 0:e87aa4c49e95 | 262 | * @brief Initializes the TIM Hall Sensor MSP. |
| phungductung | 0:e87aa4c49e95 | 263 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
| phungductung | 0:e87aa4c49e95 | 264 | * the configuration information for TIM module. |
| phungductung | 0:e87aa4c49e95 | 265 | * @retval None |
| phungductung | 0:e87aa4c49e95 | 266 | */ |
| phungductung | 0:e87aa4c49e95 | 267 | __weak void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim) |
| phungductung | 0:e87aa4c49e95 | 268 | { |
| phungductung | 0:e87aa4c49e95 | 269 | /* Prevent unused argument(s) compilation warning */ |
| phungductung | 0:e87aa4c49e95 | 270 | UNUSED(htim); |
| phungductung | 0:e87aa4c49e95 | 271 | |
| phungductung | 0:e87aa4c49e95 | 272 | /* NOTE : This function Should not be modified, when the callback is needed, |
| phungductung | 0:e87aa4c49e95 | 273 | the HAL_TIMEx_HallSensor_MspInit could be implemented in the user file |
| phungductung | 0:e87aa4c49e95 | 274 | */ |
| phungductung | 0:e87aa4c49e95 | 275 | } |
| phungductung | 0:e87aa4c49e95 | 276 | |
| phungductung | 0:e87aa4c49e95 | 277 | /** |
| phungductung | 0:e87aa4c49e95 | 278 | * @brief DeInitializes TIM Hall Sensor MSP. |
| phungductung | 0:e87aa4c49e95 | 279 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
| phungductung | 0:e87aa4c49e95 | 280 | * the configuration information for TIM module. |
| phungductung | 0:e87aa4c49e95 | 281 | * @retval None |
| phungductung | 0:e87aa4c49e95 | 282 | */ |
| phungductung | 0:e87aa4c49e95 | 283 | __weak void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim) |
| phungductung | 0:e87aa4c49e95 | 284 | { |
| phungductung | 0:e87aa4c49e95 | 285 | /* Prevent unused argument(s) compilation warning */ |
| phungductung | 0:e87aa4c49e95 | 286 | UNUSED(htim); |
| phungductung | 0:e87aa4c49e95 | 287 | |
| phungductung | 0:e87aa4c49e95 | 288 | /* NOTE : This function Should not be modified, when the callback is needed, |
| phungductung | 0:e87aa4c49e95 | 289 | the HAL_TIMEx_HallSensor_MspDeInit could be implemented in the user file |
| phungductung | 0:e87aa4c49e95 | 290 | */ |
| phungductung | 0:e87aa4c49e95 | 291 | } |
| phungductung | 0:e87aa4c49e95 | 292 | |
| phungductung | 0:e87aa4c49e95 | 293 | /** |
| phungductung | 0:e87aa4c49e95 | 294 | * @brief Starts the TIM Hall Sensor Interface. |
| phungductung | 0:e87aa4c49e95 | 295 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
| phungductung | 0:e87aa4c49e95 | 296 | * the configuration information for TIM module. |
| phungductung | 0:e87aa4c49e95 | 297 | * @retval HAL status |
| phungductung | 0:e87aa4c49e95 | 298 | */ |
| phungductung | 0:e87aa4c49e95 | 299 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim) |
| phungductung | 0:e87aa4c49e95 | 300 | { |
| phungductung | 0:e87aa4c49e95 | 301 | /* Check the parameters */ |
| phungductung | 0:e87aa4c49e95 | 302 | assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); |
| phungductung | 0:e87aa4c49e95 | 303 | |
| phungductung | 0:e87aa4c49e95 | 304 | /* Enable the Input Capture channels 1 |
| phungductung | 0:e87aa4c49e95 | 305 | (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
| phungductung | 0:e87aa4c49e95 | 306 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); |
| phungductung | 0:e87aa4c49e95 | 307 | |
| phungductung | 0:e87aa4c49e95 | 308 | /* Enable the Peripheral */ |
| phungductung | 0:e87aa4c49e95 | 309 | __HAL_TIM_ENABLE(htim); |
| phungductung | 0:e87aa4c49e95 | 310 | |
| phungductung | 0:e87aa4c49e95 | 311 | /* Return function status */ |
| phungductung | 0:e87aa4c49e95 | 312 | return HAL_OK; |
| phungductung | 0:e87aa4c49e95 | 313 | } |
| phungductung | 0:e87aa4c49e95 | 314 | |
| phungductung | 0:e87aa4c49e95 | 315 | /** |
| phungductung | 0:e87aa4c49e95 | 316 | * @brief Stops the TIM Hall sensor Interface. |
| phungductung | 0:e87aa4c49e95 | 317 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
| phungductung | 0:e87aa4c49e95 | 318 | * the configuration information for TIM module. |
| phungductung | 0:e87aa4c49e95 | 319 | * @retval HAL status |
| phungductung | 0:e87aa4c49e95 | 320 | */ |
| phungductung | 0:e87aa4c49e95 | 321 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim) |
| phungductung | 0:e87aa4c49e95 | 322 | { |
| phungductung | 0:e87aa4c49e95 | 323 | /* Check the parameters */ |
| phungductung | 0:e87aa4c49e95 | 324 | assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); |
| phungductung | 0:e87aa4c49e95 | 325 | |
| phungductung | 0:e87aa4c49e95 | 326 | /* Disable the Input Capture channels 1, 2 and 3 |
| phungductung | 0:e87aa4c49e95 | 327 | (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
| phungductung | 0:e87aa4c49e95 | 328 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); |
| phungductung | 0:e87aa4c49e95 | 329 | |
| phungductung | 0:e87aa4c49e95 | 330 | /* Disable the Peripheral */ |
| phungductung | 0:e87aa4c49e95 | 331 | __HAL_TIM_DISABLE(htim); |
| phungductung | 0:e87aa4c49e95 | 332 | |
| phungductung | 0:e87aa4c49e95 | 333 | /* Return function status */ |
| phungductung | 0:e87aa4c49e95 | 334 | return HAL_OK; |
| phungductung | 0:e87aa4c49e95 | 335 | } |
| phungductung | 0:e87aa4c49e95 | 336 | |
| phungductung | 0:e87aa4c49e95 | 337 | /** |
| phungductung | 0:e87aa4c49e95 | 338 | * @brief Starts the TIM Hall Sensor Interface in interrupt mode. |
| phungductung | 0:e87aa4c49e95 | 339 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
| phungductung | 0:e87aa4c49e95 | 340 | * the configuration information for TIM module. |
| phungductung | 0:e87aa4c49e95 | 341 | * @retval HAL status |
| phungductung | 0:e87aa4c49e95 | 342 | */ |
| phungductung | 0:e87aa4c49e95 | 343 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim) |
| phungductung | 0:e87aa4c49e95 | 344 | { |
| phungductung | 0:e87aa4c49e95 | 345 | /* Check the parameters */ |
| phungductung | 0:e87aa4c49e95 | 346 | assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); |
| phungductung | 0:e87aa4c49e95 | 347 | |
| phungductung | 0:e87aa4c49e95 | 348 | /* Enable the capture compare Interrupts 1 event */ |
| phungductung | 0:e87aa4c49e95 | 349 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); |
| phungductung | 0:e87aa4c49e95 | 350 | |
| phungductung | 0:e87aa4c49e95 | 351 | /* Enable the Input Capture channels 1 |
| phungductung | 0:e87aa4c49e95 | 352 | (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
| phungductung | 0:e87aa4c49e95 | 353 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); |
| phungductung | 0:e87aa4c49e95 | 354 | |
| phungductung | 0:e87aa4c49e95 | 355 | /* Enable the Peripheral */ |
| phungductung | 0:e87aa4c49e95 | 356 | __HAL_TIM_ENABLE(htim); |
| phungductung | 0:e87aa4c49e95 | 357 | |
| phungductung | 0:e87aa4c49e95 | 358 | /* Return function status */ |
| phungductung | 0:e87aa4c49e95 | 359 | return HAL_OK; |
| phungductung | 0:e87aa4c49e95 | 360 | } |
| phungductung | 0:e87aa4c49e95 | 361 | |
| phungductung | 0:e87aa4c49e95 | 362 | /** |
| phungductung | 0:e87aa4c49e95 | 363 | * @brief Stops the TIM Hall Sensor Interface in interrupt mode. |
| phungductung | 0:e87aa4c49e95 | 364 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
| phungductung | 0:e87aa4c49e95 | 365 | * the configuration information for TIM module. |
| phungductung | 0:e87aa4c49e95 | 366 | * @retval HAL status |
| phungductung | 0:e87aa4c49e95 | 367 | */ |
| phungductung | 0:e87aa4c49e95 | 368 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim) |
| phungductung | 0:e87aa4c49e95 | 369 | { |
| phungductung | 0:e87aa4c49e95 | 370 | /* Check the parameters */ |
| phungductung | 0:e87aa4c49e95 | 371 | assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); |
| phungductung | 0:e87aa4c49e95 | 372 | |
| phungductung | 0:e87aa4c49e95 | 373 | /* Disable the Input Capture channels 1 |
| phungductung | 0:e87aa4c49e95 | 374 | (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
| phungductung | 0:e87aa4c49e95 | 375 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); |
| phungductung | 0:e87aa4c49e95 | 376 | |
| phungductung | 0:e87aa4c49e95 | 377 | /* Disable the capture compare Interrupts event */ |
| phungductung | 0:e87aa4c49e95 | 378 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); |
| phungductung | 0:e87aa4c49e95 | 379 | |
| phungductung | 0:e87aa4c49e95 | 380 | /* Disable the Peripheral */ |
| phungductung | 0:e87aa4c49e95 | 381 | __HAL_TIM_DISABLE(htim); |
| phungductung | 0:e87aa4c49e95 | 382 | |
| phungductung | 0:e87aa4c49e95 | 383 | /* Return function status */ |
| phungductung | 0:e87aa4c49e95 | 384 | return HAL_OK; |
| phungductung | 0:e87aa4c49e95 | 385 | } |
| phungductung | 0:e87aa4c49e95 | 386 | |
| phungductung | 0:e87aa4c49e95 | 387 | /** |
| phungductung | 0:e87aa4c49e95 | 388 | * @brief Starts the TIM Hall Sensor Interface in DMA mode. |
| phungductung | 0:e87aa4c49e95 | 389 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
| phungductung | 0:e87aa4c49e95 | 390 | * the configuration information for TIM module. |
| phungductung | 0:e87aa4c49e95 | 391 | * @param pData: The destination Buffer address. |
| phungductung | 0:e87aa4c49e95 | 392 | * @param Length: The length of data to be transferred from TIM peripheral to memory. |
| phungductung | 0:e87aa4c49e95 | 393 | * @retval HAL status |
| phungductung | 0:e87aa4c49e95 | 394 | */ |
| phungductung | 0:e87aa4c49e95 | 395 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length) |
| phungductung | 0:e87aa4c49e95 | 396 | { |
| phungductung | 0:e87aa4c49e95 | 397 | /* Check the parameters */ |
| phungductung | 0:e87aa4c49e95 | 398 | assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); |
| phungductung | 0:e87aa4c49e95 | 399 | |
| phungductung | 0:e87aa4c49e95 | 400 | if((htim->State == HAL_TIM_STATE_BUSY)) |
| phungductung | 0:e87aa4c49e95 | 401 | { |
| phungductung | 0:e87aa4c49e95 | 402 | return HAL_BUSY; |
| phungductung | 0:e87aa4c49e95 | 403 | } |
| phungductung | 0:e87aa4c49e95 | 404 | else if((htim->State == HAL_TIM_STATE_READY)) |
| phungductung | 0:e87aa4c49e95 | 405 | { |
| phungductung | 0:e87aa4c49e95 | 406 | if(((uint32_t)pData == 0 ) && (Length > 0)) |
| phungductung | 0:e87aa4c49e95 | 407 | { |
| phungductung | 0:e87aa4c49e95 | 408 | return HAL_ERROR; |
| phungductung | 0:e87aa4c49e95 | 409 | } |
| phungductung | 0:e87aa4c49e95 | 410 | else |
| phungductung | 0:e87aa4c49e95 | 411 | { |
| phungductung | 0:e87aa4c49e95 | 412 | htim->State = HAL_TIM_STATE_BUSY; |
| phungductung | 0:e87aa4c49e95 | 413 | } |
| phungductung | 0:e87aa4c49e95 | 414 | } |
| phungductung | 0:e87aa4c49e95 | 415 | /* Enable the Input Capture channels 1 |
| phungductung | 0:e87aa4c49e95 | 416 | (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
| phungductung | 0:e87aa4c49e95 | 417 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); |
| phungductung | 0:e87aa4c49e95 | 418 | |
| phungductung | 0:e87aa4c49e95 | 419 | /* Set the DMA Input Capture 1 Callback */ |
| phungductung | 0:e87aa4c49e95 | 420 | htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMACaptureCplt; |
| phungductung | 0:e87aa4c49e95 | 421 | /* Set the DMA error callback */ |
| phungductung | 0:e87aa4c49e95 | 422 | htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ; |
| phungductung | 0:e87aa4c49e95 | 423 | |
| phungductung | 0:e87aa4c49e95 | 424 | /* Enable the DMA Stream for Capture 1*/ |
| phungductung | 0:e87aa4c49e95 | 425 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length); |
| phungductung | 0:e87aa4c49e95 | 426 | |
| phungductung | 0:e87aa4c49e95 | 427 | /* Enable the capture compare 1 Interrupt */ |
| phungductung | 0:e87aa4c49e95 | 428 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); |
| phungductung | 0:e87aa4c49e95 | 429 | |
| phungductung | 0:e87aa4c49e95 | 430 | /* Enable the Peripheral */ |
| phungductung | 0:e87aa4c49e95 | 431 | __HAL_TIM_ENABLE(htim); |
| phungductung | 0:e87aa4c49e95 | 432 | |
| phungductung | 0:e87aa4c49e95 | 433 | /* Return function status */ |
| phungductung | 0:e87aa4c49e95 | 434 | return HAL_OK; |
| phungductung | 0:e87aa4c49e95 | 435 | } |
| phungductung | 0:e87aa4c49e95 | 436 | |
| phungductung | 0:e87aa4c49e95 | 437 | /** |
| phungductung | 0:e87aa4c49e95 | 438 | * @brief Stops the TIM Hall Sensor Interface in DMA mode. |
| phungductung | 0:e87aa4c49e95 | 439 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
| phungductung | 0:e87aa4c49e95 | 440 | * the configuration information for TIM module. |
| phungductung | 0:e87aa4c49e95 | 441 | * @retval HAL status |
| phungductung | 0:e87aa4c49e95 | 442 | */ |
| phungductung | 0:e87aa4c49e95 | 443 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim) |
| phungductung | 0:e87aa4c49e95 | 444 | { |
| phungductung | 0:e87aa4c49e95 | 445 | /* Check the parameters */ |
| phungductung | 0:e87aa4c49e95 | 446 | assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); |
| phungductung | 0:e87aa4c49e95 | 447 | |
| phungductung | 0:e87aa4c49e95 | 448 | /* Disable the Input Capture channels 1 |
| phungductung | 0:e87aa4c49e95 | 449 | (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
| phungductung | 0:e87aa4c49e95 | 450 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); |
| phungductung | 0:e87aa4c49e95 | 451 | |
| phungductung | 0:e87aa4c49e95 | 452 | |
| phungductung | 0:e87aa4c49e95 | 453 | /* Disable the capture compare Interrupts 1 event */ |
| phungductung | 0:e87aa4c49e95 | 454 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); |
| phungductung | 0:e87aa4c49e95 | 455 | |
| phungductung | 0:e87aa4c49e95 | 456 | /* Disable the Peripheral */ |
| phungductung | 0:e87aa4c49e95 | 457 | __HAL_TIM_DISABLE(htim); |
| phungductung | 0:e87aa4c49e95 | 458 | |
| phungductung | 0:e87aa4c49e95 | 459 | /* Return function status */ |
| phungductung | 0:e87aa4c49e95 | 460 | return HAL_OK; |
| phungductung | 0:e87aa4c49e95 | 461 | } |
| phungductung | 0:e87aa4c49e95 | 462 | |
| phungductung | 0:e87aa4c49e95 | 463 | /** |
| phungductung | 0:e87aa4c49e95 | 464 | * @} |
| phungductung | 0:e87aa4c49e95 | 465 | */ |
| phungductung | 0:e87aa4c49e95 | 466 | |
| phungductung | 0:e87aa4c49e95 | 467 | /** @defgroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions |
| phungductung | 0:e87aa4c49e95 | 468 | * @brief Timer Complementary Output Compare functions |
| phungductung | 0:e87aa4c49e95 | 469 | * |
| phungductung | 0:e87aa4c49e95 | 470 | @verbatim |
| phungductung | 0:e87aa4c49e95 | 471 | ============================================================================== |
| phungductung | 0:e87aa4c49e95 | 472 | ##### Timer Complementary Output Compare functions ##### |
| phungductung | 0:e87aa4c49e95 | 473 | ============================================================================== |
| phungductung | 0:e87aa4c49e95 | 474 | [..] |
| phungductung | 0:e87aa4c49e95 | 475 | This section provides functions allowing to: |
| phungductung | 0:e87aa4c49e95 | 476 | (+) Start the Complementary Output Compare/PWM. |
| phungductung | 0:e87aa4c49e95 | 477 | (+) Stop the Complementary Output Compare/PWM. |
| phungductung | 0:e87aa4c49e95 | 478 | (+) Start the Complementary Output Compare/PWM and enable interrupts. |
| phungductung | 0:e87aa4c49e95 | 479 | (+) Stop the Complementary Output Compare/PWM and disable interrupts. |
| phungductung | 0:e87aa4c49e95 | 480 | (+) Start the Complementary Output Compare/PWM and enable DMA transfers. |
| phungductung | 0:e87aa4c49e95 | 481 | (+) Stop the Complementary Output Compare/PWM and disable DMA transfers. |
| phungductung | 0:e87aa4c49e95 | 482 | |
| phungductung | 0:e87aa4c49e95 | 483 | @endverbatim |
| phungductung | 0:e87aa4c49e95 | 484 | * @{ |
| phungductung | 0:e87aa4c49e95 | 485 | */ |
| phungductung | 0:e87aa4c49e95 | 486 | |
| phungductung | 0:e87aa4c49e95 | 487 | /** |
| phungductung | 0:e87aa4c49e95 | 488 | * @brief Starts the TIM Output Compare signal generation on the complementary |
| phungductung | 0:e87aa4c49e95 | 489 | * output. |
| phungductung | 0:e87aa4c49e95 | 490 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
| phungductung | 0:e87aa4c49e95 | 491 | * the configuration information for TIM module. |
| phungductung | 0:e87aa4c49e95 | 492 | * @param Channel: TIM Channel to be enabled. |
| phungductung | 0:e87aa4c49e95 | 493 | * This parameter can be one of the following values: |
| phungductung | 0:e87aa4c49e95 | 494 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| phungductung | 0:e87aa4c49e95 | 495 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| phungductung | 0:e87aa4c49e95 | 496 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
| phungductung | 0:e87aa4c49e95 | 497 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
| phungductung | 0:e87aa4c49e95 | 498 | * @retval HAL status |
| phungductung | 0:e87aa4c49e95 | 499 | */ |
| phungductung | 0:e87aa4c49e95 | 500 | HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel) |
| phungductung | 0:e87aa4c49e95 | 501 | { |
| phungductung | 0:e87aa4c49e95 | 502 | /* Check the parameters */ |
| phungductung | 0:e87aa4c49e95 | 503 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
| phungductung | 0:e87aa4c49e95 | 504 | |
| phungductung | 0:e87aa4c49e95 | 505 | /* Enable the Capture compare channel N */ |
| phungductung | 0:e87aa4c49e95 | 506 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
| phungductung | 0:e87aa4c49e95 | 507 | |
| phungductung | 0:e87aa4c49e95 | 508 | /* Enable the Main Output */ |
| phungductung | 0:e87aa4c49e95 | 509 | __HAL_TIM_MOE_ENABLE(htim); |
| phungductung | 0:e87aa4c49e95 | 510 | |
| phungductung | 0:e87aa4c49e95 | 511 | /* Enable the Peripheral */ |
| phungductung | 0:e87aa4c49e95 | 512 | __HAL_TIM_ENABLE(htim); |
| phungductung | 0:e87aa4c49e95 | 513 | |
| phungductung | 0:e87aa4c49e95 | 514 | /* Return function status */ |
| phungductung | 0:e87aa4c49e95 | 515 | return HAL_OK; |
| phungductung | 0:e87aa4c49e95 | 516 | } |
| phungductung | 0:e87aa4c49e95 | 517 | |
| phungductung | 0:e87aa4c49e95 | 518 | /** |
| phungductung | 0:e87aa4c49e95 | 519 | * @brief Stops the TIM Output Compare signal generation on the complementary |
| phungductung | 0:e87aa4c49e95 | 520 | * output. |
| phungductung | 0:e87aa4c49e95 | 521 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
| phungductung | 0:e87aa4c49e95 | 522 | * the configuration information for TIM module. |
| phungductung | 0:e87aa4c49e95 | 523 | * @param Channel: TIM Channel to be disabled. |
| phungductung | 0:e87aa4c49e95 | 524 | * This parameter can be one of the following values: |
| phungductung | 0:e87aa4c49e95 | 525 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| phungductung | 0:e87aa4c49e95 | 526 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| phungductung | 0:e87aa4c49e95 | 527 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
| phungductung | 0:e87aa4c49e95 | 528 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
| phungductung | 0:e87aa4c49e95 | 529 | * @retval HAL status |
| phungductung | 0:e87aa4c49e95 | 530 | */ |
| phungductung | 0:e87aa4c49e95 | 531 | HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) |
| phungductung | 0:e87aa4c49e95 | 532 | { |
| phungductung | 0:e87aa4c49e95 | 533 | /* Check the parameters */ |
| phungductung | 0:e87aa4c49e95 | 534 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
| phungductung | 0:e87aa4c49e95 | 535 | |
| phungductung | 0:e87aa4c49e95 | 536 | /* Disable the Capture compare channel N */ |
| phungductung | 0:e87aa4c49e95 | 537 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
| phungductung | 0:e87aa4c49e95 | 538 | |
| phungductung | 0:e87aa4c49e95 | 539 | /* Disable the Main Output */ |
| phungductung | 0:e87aa4c49e95 | 540 | __HAL_TIM_MOE_DISABLE(htim); |
| phungductung | 0:e87aa4c49e95 | 541 | |
| phungductung | 0:e87aa4c49e95 | 542 | /* Disable the Peripheral */ |
| phungductung | 0:e87aa4c49e95 | 543 | __HAL_TIM_DISABLE(htim); |
| phungductung | 0:e87aa4c49e95 | 544 | |
| phungductung | 0:e87aa4c49e95 | 545 | /* Return function status */ |
| phungductung | 0:e87aa4c49e95 | 546 | return HAL_OK; |
| phungductung | 0:e87aa4c49e95 | 547 | } |
| phungductung | 0:e87aa4c49e95 | 548 | |
| phungductung | 0:e87aa4c49e95 | 549 | /** |
| phungductung | 0:e87aa4c49e95 | 550 | * @brief Starts the TIM Output Compare signal generation in interrupt mode |
| phungductung | 0:e87aa4c49e95 | 551 | * on the complementary output. |
| phungductung | 0:e87aa4c49e95 | 552 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
| phungductung | 0:e87aa4c49e95 | 553 | * the configuration information for TIM module. |
| phungductung | 0:e87aa4c49e95 | 554 | * @param Channel: TIM Channel to be enabled. |
| phungductung | 0:e87aa4c49e95 | 555 | * This parameter can be one of the following values: |
| phungductung | 0:e87aa4c49e95 | 556 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| phungductung | 0:e87aa4c49e95 | 557 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| phungductung | 0:e87aa4c49e95 | 558 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
| phungductung | 0:e87aa4c49e95 | 559 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
| phungductung | 0:e87aa4c49e95 | 560 | * @retval HAL status |
| phungductung | 0:e87aa4c49e95 | 561 | */ |
| phungductung | 0:e87aa4c49e95 | 562 | HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) |
| phungductung | 0:e87aa4c49e95 | 563 | { |
| phungductung | 0:e87aa4c49e95 | 564 | /* Check the parameters */ |
| phungductung | 0:e87aa4c49e95 | 565 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
| phungductung | 0:e87aa4c49e95 | 566 | |
| phungductung | 0:e87aa4c49e95 | 567 | switch (Channel) |
| phungductung | 0:e87aa4c49e95 | 568 | { |
| phungductung | 0:e87aa4c49e95 | 569 | case TIM_CHANNEL_1: |
| phungductung | 0:e87aa4c49e95 | 570 | { |
| phungductung | 0:e87aa4c49e95 | 571 | /* Enable the TIM Output Compare interrupt */ |
| phungductung | 0:e87aa4c49e95 | 572 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); |
| phungductung | 0:e87aa4c49e95 | 573 | } |
| phungductung | 0:e87aa4c49e95 | 574 | break; |
| phungductung | 0:e87aa4c49e95 | 575 | |
| phungductung | 0:e87aa4c49e95 | 576 | case TIM_CHANNEL_2: |
| phungductung | 0:e87aa4c49e95 | 577 | { |
| phungductung | 0:e87aa4c49e95 | 578 | /* Enable the TIM Output Compare interrupt */ |
| phungductung | 0:e87aa4c49e95 | 579 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); |
| phungductung | 0:e87aa4c49e95 | 580 | } |
| phungductung | 0:e87aa4c49e95 | 581 | break; |
| phungductung | 0:e87aa4c49e95 | 582 | |
| phungductung | 0:e87aa4c49e95 | 583 | case TIM_CHANNEL_3: |
| phungductung | 0:e87aa4c49e95 | 584 | { |
| phungductung | 0:e87aa4c49e95 | 585 | /* Enable the TIM Output Compare interrupt */ |
| phungductung | 0:e87aa4c49e95 | 586 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); |
| phungductung | 0:e87aa4c49e95 | 587 | } |
| phungductung | 0:e87aa4c49e95 | 588 | break; |
| phungductung | 0:e87aa4c49e95 | 589 | |
| phungductung | 0:e87aa4c49e95 | 590 | case TIM_CHANNEL_4: |
| phungductung | 0:e87aa4c49e95 | 591 | { |
| phungductung | 0:e87aa4c49e95 | 592 | /* Enable the TIM Output Compare interrupt */ |
| phungductung | 0:e87aa4c49e95 | 593 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4); |
| phungductung | 0:e87aa4c49e95 | 594 | } |
| phungductung | 0:e87aa4c49e95 | 595 | break; |
| phungductung | 0:e87aa4c49e95 | 596 | |
| phungductung | 0:e87aa4c49e95 | 597 | default: |
| phungductung | 0:e87aa4c49e95 | 598 | break; |
| phungductung | 0:e87aa4c49e95 | 599 | } |
| phungductung | 0:e87aa4c49e95 | 600 | |
| phungductung | 0:e87aa4c49e95 | 601 | /* Enable the TIM Break interrupt */ |
| phungductung | 0:e87aa4c49e95 | 602 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK); |
| phungductung | 0:e87aa4c49e95 | 603 | |
| phungductung | 0:e87aa4c49e95 | 604 | /* Enable the Capture compare channel N */ |
| phungductung | 0:e87aa4c49e95 | 605 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
| phungductung | 0:e87aa4c49e95 | 606 | |
| phungductung | 0:e87aa4c49e95 | 607 | /* Enable the Main Output */ |
| phungductung | 0:e87aa4c49e95 | 608 | __HAL_TIM_MOE_ENABLE(htim); |
| phungductung | 0:e87aa4c49e95 | 609 | |
| phungductung | 0:e87aa4c49e95 | 610 | /* Enable the Peripheral */ |
| phungductung | 0:e87aa4c49e95 | 611 | __HAL_TIM_ENABLE(htim); |
| phungductung | 0:e87aa4c49e95 | 612 | |
| phungductung | 0:e87aa4c49e95 | 613 | /* Return function status */ |
| phungductung | 0:e87aa4c49e95 | 614 | return HAL_OK; |
| phungductung | 0:e87aa4c49e95 | 615 | } |
| phungductung | 0:e87aa4c49e95 | 616 | |
| phungductung | 0:e87aa4c49e95 | 617 | /** |
| phungductung | 0:e87aa4c49e95 | 618 | * @brief Stops the TIM Output Compare signal generation in interrupt mode |
| phungductung | 0:e87aa4c49e95 | 619 | * on the complementary output. |
| phungductung | 0:e87aa4c49e95 | 620 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
| phungductung | 0:e87aa4c49e95 | 621 | * the configuration information for TIM module. |
| phungductung | 0:e87aa4c49e95 | 622 | * @param Channel: TIM Channel to be disabled. |
| phungductung | 0:e87aa4c49e95 | 623 | * This parameter can be one of the following values: |
| phungductung | 0:e87aa4c49e95 | 624 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| phungductung | 0:e87aa4c49e95 | 625 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| phungductung | 0:e87aa4c49e95 | 626 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
| phungductung | 0:e87aa4c49e95 | 627 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
| phungductung | 0:e87aa4c49e95 | 628 | * @retval HAL status |
| phungductung | 0:e87aa4c49e95 | 629 | */ |
| phungductung | 0:e87aa4c49e95 | 630 | HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) |
| phungductung | 0:e87aa4c49e95 | 631 | { |
| phungductung | 0:e87aa4c49e95 | 632 | uint32_t tmpccer = 0; |
| phungductung | 0:e87aa4c49e95 | 633 | |
| phungductung | 0:e87aa4c49e95 | 634 | /* Check the parameters */ |
| phungductung | 0:e87aa4c49e95 | 635 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
| phungductung | 0:e87aa4c49e95 | 636 | |
| phungductung | 0:e87aa4c49e95 | 637 | switch (Channel) |
| phungductung | 0:e87aa4c49e95 | 638 | { |
| phungductung | 0:e87aa4c49e95 | 639 | case TIM_CHANNEL_1: |
| phungductung | 0:e87aa4c49e95 | 640 | { |
| phungductung | 0:e87aa4c49e95 | 641 | /* Disable the TIM Output Compare interrupt */ |
| phungductung | 0:e87aa4c49e95 | 642 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); |
| phungductung | 0:e87aa4c49e95 | 643 | } |
| phungductung | 0:e87aa4c49e95 | 644 | break; |
| phungductung | 0:e87aa4c49e95 | 645 | |
| phungductung | 0:e87aa4c49e95 | 646 | case TIM_CHANNEL_2: |
| phungductung | 0:e87aa4c49e95 | 647 | { |
| phungductung | 0:e87aa4c49e95 | 648 | /* Disable the TIM Output Compare interrupt */ |
| phungductung | 0:e87aa4c49e95 | 649 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); |
| phungductung | 0:e87aa4c49e95 | 650 | } |
| phungductung | 0:e87aa4c49e95 | 651 | break; |
| phungductung | 0:e87aa4c49e95 | 652 | |
| phungductung | 0:e87aa4c49e95 | 653 | case TIM_CHANNEL_3: |
| phungductung | 0:e87aa4c49e95 | 654 | { |
| phungductung | 0:e87aa4c49e95 | 655 | /* Disable the TIM Output Compare interrupt */ |
| phungductung | 0:e87aa4c49e95 | 656 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); |
| phungductung | 0:e87aa4c49e95 | 657 | } |
| phungductung | 0:e87aa4c49e95 | 658 | break; |
| phungductung | 0:e87aa4c49e95 | 659 | |
| phungductung | 0:e87aa4c49e95 | 660 | case TIM_CHANNEL_4: |
| phungductung | 0:e87aa4c49e95 | 661 | { |
| phungductung | 0:e87aa4c49e95 | 662 | /* Disable the TIM Output Compare interrupt */ |
| phungductung | 0:e87aa4c49e95 | 663 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4); |
| phungductung | 0:e87aa4c49e95 | 664 | } |
| phungductung | 0:e87aa4c49e95 | 665 | break; |
| phungductung | 0:e87aa4c49e95 | 666 | |
| phungductung | 0:e87aa4c49e95 | 667 | default: |
| phungductung | 0:e87aa4c49e95 | 668 | break; |
| phungductung | 0:e87aa4c49e95 | 669 | } |
| phungductung | 0:e87aa4c49e95 | 670 | |
| phungductung | 0:e87aa4c49e95 | 671 | /* Disable the Capture compare channel N */ |
| phungductung | 0:e87aa4c49e95 | 672 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
| phungductung | 0:e87aa4c49e95 | 673 | |
| phungductung | 0:e87aa4c49e95 | 674 | /* Disable the TIM Break interrupt (only if no more channel is active) */ |
| phungductung | 0:e87aa4c49e95 | 675 | tmpccer = htim->Instance->CCER; |
| phungductung | 0:e87aa4c49e95 | 676 | if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == RESET) |
| phungductung | 0:e87aa4c49e95 | 677 | { |
| phungductung | 0:e87aa4c49e95 | 678 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK); |
| phungductung | 0:e87aa4c49e95 | 679 | } |
| phungductung | 0:e87aa4c49e95 | 680 | |
| phungductung | 0:e87aa4c49e95 | 681 | /* Disable the Main Output */ |
| phungductung | 0:e87aa4c49e95 | 682 | __HAL_TIM_MOE_DISABLE(htim); |
| phungductung | 0:e87aa4c49e95 | 683 | |
| phungductung | 0:e87aa4c49e95 | 684 | /* Disable the Peripheral */ |
| phungductung | 0:e87aa4c49e95 | 685 | __HAL_TIM_DISABLE(htim); |
| phungductung | 0:e87aa4c49e95 | 686 | |
| phungductung | 0:e87aa4c49e95 | 687 | /* Return function status */ |
| phungductung | 0:e87aa4c49e95 | 688 | return HAL_OK; |
| phungductung | 0:e87aa4c49e95 | 689 | } |
| phungductung | 0:e87aa4c49e95 | 690 | |
| phungductung | 0:e87aa4c49e95 | 691 | /** |
| phungductung | 0:e87aa4c49e95 | 692 | * @brief Starts the TIM Output Compare signal generation in DMA mode |
| phungductung | 0:e87aa4c49e95 | 693 | * on the complementary output. |
| phungductung | 0:e87aa4c49e95 | 694 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
| phungductung | 0:e87aa4c49e95 | 695 | * the configuration information for TIM module. |
| phungductung | 0:e87aa4c49e95 | 696 | * @param Channel: TIM Channel to be enabled. |
| phungductung | 0:e87aa4c49e95 | 697 | * This parameter can be one of the following values: |
| phungductung | 0:e87aa4c49e95 | 698 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| phungductung | 0:e87aa4c49e95 | 699 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| phungductung | 0:e87aa4c49e95 | 700 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
| phungductung | 0:e87aa4c49e95 | 701 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
| phungductung | 0:e87aa4c49e95 | 702 | * @param pData: The source Buffer address. |
| phungductung | 0:e87aa4c49e95 | 703 | * @param Length: The length of data to be transferred from memory to TIM peripheral |
| phungductung | 0:e87aa4c49e95 | 704 | * @retval HAL status |
| phungductung | 0:e87aa4c49e95 | 705 | */ |
| phungductung | 0:e87aa4c49e95 | 706 | HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length) |
| phungductung | 0:e87aa4c49e95 | 707 | { |
| phungductung | 0:e87aa4c49e95 | 708 | /* Check the parameters */ |
| phungductung | 0:e87aa4c49e95 | 709 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
| phungductung | 0:e87aa4c49e95 | 710 | |
| phungductung | 0:e87aa4c49e95 | 711 | if((htim->State == HAL_TIM_STATE_BUSY)) |
| phungductung | 0:e87aa4c49e95 | 712 | { |
| phungductung | 0:e87aa4c49e95 | 713 | return HAL_BUSY; |
| phungductung | 0:e87aa4c49e95 | 714 | } |
| phungductung | 0:e87aa4c49e95 | 715 | else if((htim->State == HAL_TIM_STATE_READY)) |
| phungductung | 0:e87aa4c49e95 | 716 | { |
| phungductung | 0:e87aa4c49e95 | 717 | if(((uint32_t)pData == 0 ) && (Length > 0)) |
| phungductung | 0:e87aa4c49e95 | 718 | { |
| phungductung | 0:e87aa4c49e95 | 719 | return HAL_ERROR; |
| phungductung | 0:e87aa4c49e95 | 720 | } |
| phungductung | 0:e87aa4c49e95 | 721 | else |
| phungductung | 0:e87aa4c49e95 | 722 | { |
| phungductung | 0:e87aa4c49e95 | 723 | htim->State = HAL_TIM_STATE_BUSY; |
| phungductung | 0:e87aa4c49e95 | 724 | } |
| phungductung | 0:e87aa4c49e95 | 725 | } |
| phungductung | 0:e87aa4c49e95 | 726 | switch (Channel) |
| phungductung | 0:e87aa4c49e95 | 727 | { |
| phungductung | 0:e87aa4c49e95 | 728 | case TIM_CHANNEL_1: |
| phungductung | 0:e87aa4c49e95 | 729 | { |
| phungductung | 0:e87aa4c49e95 | 730 | /* Set the DMA Period elapsed callback */ |
| phungductung | 0:e87aa4c49e95 | 731 | htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt; |
| phungductung | 0:e87aa4c49e95 | 732 | |
| phungductung | 0:e87aa4c49e95 | 733 | /* Set the DMA error callback */ |
| phungductung | 0:e87aa4c49e95 | 734 | htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ; |
| phungductung | 0:e87aa4c49e95 | 735 | |
| phungductung | 0:e87aa4c49e95 | 736 | /* Enable the DMA Stream */ |
| phungductung | 0:e87aa4c49e95 | 737 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length); |
| phungductung | 0:e87aa4c49e95 | 738 | |
| phungductung | 0:e87aa4c49e95 | 739 | /* Enable the TIM Output Compare DMA request */ |
| phungductung | 0:e87aa4c49e95 | 740 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); |
| phungductung | 0:e87aa4c49e95 | 741 | } |
| phungductung | 0:e87aa4c49e95 | 742 | break; |
| phungductung | 0:e87aa4c49e95 | 743 | |
| phungductung | 0:e87aa4c49e95 | 744 | case TIM_CHANNEL_2: |
| phungductung | 0:e87aa4c49e95 | 745 | { |
| phungductung | 0:e87aa4c49e95 | 746 | /* Set the DMA Period elapsed callback */ |
| phungductung | 0:e87aa4c49e95 | 747 | htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt; |
| phungductung | 0:e87aa4c49e95 | 748 | |
| phungductung | 0:e87aa4c49e95 | 749 | /* Set the DMA error callback */ |
| phungductung | 0:e87aa4c49e95 | 750 | htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = HAL_TIM_DMAError ; |
| phungductung | 0:e87aa4c49e95 | 751 | |
| phungductung | 0:e87aa4c49e95 | 752 | /* Enable the DMA Stream */ |
| phungductung | 0:e87aa4c49e95 | 753 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length); |
| phungductung | 0:e87aa4c49e95 | 754 | |
| phungductung | 0:e87aa4c49e95 | 755 | /* Enable the TIM Output Compare DMA request */ |
| phungductung | 0:e87aa4c49e95 | 756 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); |
| phungductung | 0:e87aa4c49e95 | 757 | } |
| phungductung | 0:e87aa4c49e95 | 758 | break; |
| phungductung | 0:e87aa4c49e95 | 759 | |
| phungductung | 0:e87aa4c49e95 | 760 | case TIM_CHANNEL_3: |
| phungductung | 0:e87aa4c49e95 | 761 | { |
| phungductung | 0:e87aa4c49e95 | 762 | /* Set the DMA Period elapsed callback */ |
| phungductung | 0:e87aa4c49e95 | 763 | htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt; |
| phungductung | 0:e87aa4c49e95 | 764 | |
| phungductung | 0:e87aa4c49e95 | 765 | /* Set the DMA error callback */ |
| phungductung | 0:e87aa4c49e95 | 766 | htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = HAL_TIM_DMAError ; |
| phungductung | 0:e87aa4c49e95 | 767 | |
| phungductung | 0:e87aa4c49e95 | 768 | /* Enable the DMA Stream */ |
| phungductung | 0:e87aa4c49e95 | 769 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length); |
| phungductung | 0:e87aa4c49e95 | 770 | |
| phungductung | 0:e87aa4c49e95 | 771 | /* Enable the TIM Output Compare DMA request */ |
| phungductung | 0:e87aa4c49e95 | 772 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); |
| phungductung | 0:e87aa4c49e95 | 773 | } |
| phungductung | 0:e87aa4c49e95 | 774 | break; |
| phungductung | 0:e87aa4c49e95 | 775 | |
| phungductung | 0:e87aa4c49e95 | 776 | case TIM_CHANNEL_4: |
| phungductung | 0:e87aa4c49e95 | 777 | { |
| phungductung | 0:e87aa4c49e95 | 778 | /* Set the DMA Period elapsed callback */ |
| phungductung | 0:e87aa4c49e95 | 779 | htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt; |
| phungductung | 0:e87aa4c49e95 | 780 | |
| phungductung | 0:e87aa4c49e95 | 781 | /* Set the DMA error callback */ |
| phungductung | 0:e87aa4c49e95 | 782 | htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = HAL_TIM_DMAError ; |
| phungductung | 0:e87aa4c49e95 | 783 | |
| phungductung | 0:e87aa4c49e95 | 784 | /* Enable the DMA Stream */ |
| phungductung | 0:e87aa4c49e95 | 785 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length); |
| phungductung | 0:e87aa4c49e95 | 786 | |
| phungductung | 0:e87aa4c49e95 | 787 | /* Enable the TIM Output Compare DMA request */ |
| phungductung | 0:e87aa4c49e95 | 788 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4); |
| phungductung | 0:e87aa4c49e95 | 789 | } |
| phungductung | 0:e87aa4c49e95 | 790 | break; |
| phungductung | 0:e87aa4c49e95 | 791 | |
| phungductung | 0:e87aa4c49e95 | 792 | default: |
| phungductung | 0:e87aa4c49e95 | 793 | break; |
| phungductung | 0:e87aa4c49e95 | 794 | } |
| phungductung | 0:e87aa4c49e95 | 795 | |
| phungductung | 0:e87aa4c49e95 | 796 | /* Enable the Capture compare channel N */ |
| phungductung | 0:e87aa4c49e95 | 797 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
| phungductung | 0:e87aa4c49e95 | 798 | |
| phungductung | 0:e87aa4c49e95 | 799 | /* Enable the Main Output */ |
| phungductung | 0:e87aa4c49e95 | 800 | __HAL_TIM_MOE_ENABLE(htim); |
| phungductung | 0:e87aa4c49e95 | 801 | |
| phungductung | 0:e87aa4c49e95 | 802 | /* Enable the Peripheral */ |
| phungductung | 0:e87aa4c49e95 | 803 | __HAL_TIM_ENABLE(htim); |
| phungductung | 0:e87aa4c49e95 | 804 | |
| phungductung | 0:e87aa4c49e95 | 805 | /* Return function status */ |
| phungductung | 0:e87aa4c49e95 | 806 | return HAL_OK; |
| phungductung | 0:e87aa4c49e95 | 807 | } |
| phungductung | 0:e87aa4c49e95 | 808 | |
| phungductung | 0:e87aa4c49e95 | 809 | /** |
| phungductung | 0:e87aa4c49e95 | 810 | * @brief Stops the TIM Output Compare signal generation in DMA mode |
| phungductung | 0:e87aa4c49e95 | 811 | * on the complementary output. |
| phungductung | 0:e87aa4c49e95 | 812 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
| phungductung | 0:e87aa4c49e95 | 813 | * the configuration information for TIM module. |
| phungductung | 0:e87aa4c49e95 | 814 | * @param Channel: TIM Channel to be disabled. |
| phungductung | 0:e87aa4c49e95 | 815 | * This parameter can be one of the following values: |
| phungductung | 0:e87aa4c49e95 | 816 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| phungductung | 0:e87aa4c49e95 | 817 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| phungductung | 0:e87aa4c49e95 | 818 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
| phungductung | 0:e87aa4c49e95 | 819 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
| phungductung | 0:e87aa4c49e95 | 820 | * @retval HAL status |
| phungductung | 0:e87aa4c49e95 | 821 | */ |
| phungductung | 0:e87aa4c49e95 | 822 | HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) |
| phungductung | 0:e87aa4c49e95 | 823 | { |
| phungductung | 0:e87aa4c49e95 | 824 | /* Check the parameters */ |
| phungductung | 0:e87aa4c49e95 | 825 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
| phungductung | 0:e87aa4c49e95 | 826 | |
| phungductung | 0:e87aa4c49e95 | 827 | switch (Channel) |
| phungductung | 0:e87aa4c49e95 | 828 | { |
| phungductung | 0:e87aa4c49e95 | 829 | case TIM_CHANNEL_1: |
| phungductung | 0:e87aa4c49e95 | 830 | { |
| phungductung | 0:e87aa4c49e95 | 831 | /* Disable the TIM Output Compare DMA request */ |
| phungductung | 0:e87aa4c49e95 | 832 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); |
| phungductung | 0:e87aa4c49e95 | 833 | } |
| phungductung | 0:e87aa4c49e95 | 834 | break; |
| phungductung | 0:e87aa4c49e95 | 835 | |
| phungductung | 0:e87aa4c49e95 | 836 | case TIM_CHANNEL_2: |
| phungductung | 0:e87aa4c49e95 | 837 | { |
| phungductung | 0:e87aa4c49e95 | 838 | /* Disable the TIM Output Compare DMA request */ |
| phungductung | 0:e87aa4c49e95 | 839 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); |
| phungductung | 0:e87aa4c49e95 | 840 | } |
| phungductung | 0:e87aa4c49e95 | 841 | break; |
| phungductung | 0:e87aa4c49e95 | 842 | |
| phungductung | 0:e87aa4c49e95 | 843 | case TIM_CHANNEL_3: |
| phungductung | 0:e87aa4c49e95 | 844 | { |
| phungductung | 0:e87aa4c49e95 | 845 | /* Disable the TIM Output Compare DMA request */ |
| phungductung | 0:e87aa4c49e95 | 846 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); |
| phungductung | 0:e87aa4c49e95 | 847 | } |
| phungductung | 0:e87aa4c49e95 | 848 | break; |
| phungductung | 0:e87aa4c49e95 | 849 | |
| phungductung | 0:e87aa4c49e95 | 850 | case TIM_CHANNEL_4: |
| phungductung | 0:e87aa4c49e95 | 851 | { |
| phungductung | 0:e87aa4c49e95 | 852 | /* Disable the TIM Output Compare interrupt */ |
| phungductung | 0:e87aa4c49e95 | 853 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4); |
| phungductung | 0:e87aa4c49e95 | 854 | } |
| phungductung | 0:e87aa4c49e95 | 855 | break; |
| phungductung | 0:e87aa4c49e95 | 856 | |
| phungductung | 0:e87aa4c49e95 | 857 | default: |
| phungductung | 0:e87aa4c49e95 | 858 | break; |
| phungductung | 0:e87aa4c49e95 | 859 | } |
| phungductung | 0:e87aa4c49e95 | 860 | |
| phungductung | 0:e87aa4c49e95 | 861 | /* Disable the Capture compare channel N */ |
| phungductung | 0:e87aa4c49e95 | 862 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
| phungductung | 0:e87aa4c49e95 | 863 | |
| phungductung | 0:e87aa4c49e95 | 864 | /* Disable the Main Output */ |
| phungductung | 0:e87aa4c49e95 | 865 | __HAL_TIM_MOE_DISABLE(htim); |
| phungductung | 0:e87aa4c49e95 | 866 | |
| phungductung | 0:e87aa4c49e95 | 867 | /* Disable the Peripheral */ |
| phungductung | 0:e87aa4c49e95 | 868 | __HAL_TIM_DISABLE(htim); |
| phungductung | 0:e87aa4c49e95 | 869 | |
| phungductung | 0:e87aa4c49e95 | 870 | /* Change the htim state */ |
| phungductung | 0:e87aa4c49e95 | 871 | htim->State = HAL_TIM_STATE_READY; |
| phungductung | 0:e87aa4c49e95 | 872 | |
| phungductung | 0:e87aa4c49e95 | 873 | /* Return function status */ |
| phungductung | 0:e87aa4c49e95 | 874 | return HAL_OK; |
| phungductung | 0:e87aa4c49e95 | 875 | } |
| phungductung | 0:e87aa4c49e95 | 876 | |
| phungductung | 0:e87aa4c49e95 | 877 | /** |
| phungductung | 0:e87aa4c49e95 | 878 | * @} |
| phungductung | 0:e87aa4c49e95 | 879 | */ |
| phungductung | 0:e87aa4c49e95 | 880 | |
| phungductung | 0:e87aa4c49e95 | 881 | /** @defgroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions |
| phungductung | 0:e87aa4c49e95 | 882 | * @brief Timer Complementary PWM functions |
| phungductung | 0:e87aa4c49e95 | 883 | * |
| phungductung | 0:e87aa4c49e95 | 884 | @verbatim |
| phungductung | 0:e87aa4c49e95 | 885 | ============================================================================== |
| phungductung | 0:e87aa4c49e95 | 886 | ##### Timer Complementary PWM functions ##### |
| phungductung | 0:e87aa4c49e95 | 887 | ============================================================================== |
| phungductung | 0:e87aa4c49e95 | 888 | [..] |
| phungductung | 0:e87aa4c49e95 | 889 | This section provides functions allowing to: |
| phungductung | 0:e87aa4c49e95 | 890 | (+) Start the Complementary PWM. |
| phungductung | 0:e87aa4c49e95 | 891 | (+) Stop the Complementary PWM. |
| phungductung | 0:e87aa4c49e95 | 892 | (+) Start the Complementary PWM and enable interrupts. |
| phungductung | 0:e87aa4c49e95 | 893 | (+) Stop the Complementary PWM and disable interrupts. |
| phungductung | 0:e87aa4c49e95 | 894 | (+) Start the Complementary PWM and enable DMA transfers. |
| phungductung | 0:e87aa4c49e95 | 895 | (+) Stop the Complementary PWM and disable DMA transfers. |
| phungductung | 0:e87aa4c49e95 | 896 | (+) Start the Complementary Input Capture measurement. |
| phungductung | 0:e87aa4c49e95 | 897 | (+) Stop the Complementary Input Capture. |
| phungductung | 0:e87aa4c49e95 | 898 | (+) Start the Complementary Input Capture and enable interrupts. |
| phungductung | 0:e87aa4c49e95 | 899 | (+) Stop the Complementary Input Capture and disable interrupts. |
| phungductung | 0:e87aa4c49e95 | 900 | (+) Start the Complementary Input Capture and enable DMA transfers. |
| phungductung | 0:e87aa4c49e95 | 901 | (+) Stop the Complementary Input Capture and disable DMA transfers. |
| phungductung | 0:e87aa4c49e95 | 902 | (+) Start the Complementary One Pulse generation. |
| phungductung | 0:e87aa4c49e95 | 903 | (+) Stop the Complementary One Pulse. |
| phungductung | 0:e87aa4c49e95 | 904 | (+) Start the Complementary One Pulse and enable interrupts. |
| phungductung | 0:e87aa4c49e95 | 905 | (+) Stop the Complementary One Pulse and disable interrupts. |
| phungductung | 0:e87aa4c49e95 | 906 | |
| phungductung | 0:e87aa4c49e95 | 907 | @endverbatim |
| phungductung | 0:e87aa4c49e95 | 908 | * @{ |
| phungductung | 0:e87aa4c49e95 | 909 | */ |
| phungductung | 0:e87aa4c49e95 | 910 | |
| phungductung | 0:e87aa4c49e95 | 911 | /** |
| phungductung | 0:e87aa4c49e95 | 912 | * @brief Starts the PWM signal generation on the complementary output. |
| phungductung | 0:e87aa4c49e95 | 913 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
| phungductung | 0:e87aa4c49e95 | 914 | * the configuration information for TIM module. |
| phungductung | 0:e87aa4c49e95 | 915 | * @param Channel: TIM Channel to be enabled. |
| phungductung | 0:e87aa4c49e95 | 916 | * This parameter can be one of the following values: |
| phungductung | 0:e87aa4c49e95 | 917 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| phungductung | 0:e87aa4c49e95 | 918 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| phungductung | 0:e87aa4c49e95 | 919 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
| phungductung | 0:e87aa4c49e95 | 920 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
| phungductung | 0:e87aa4c49e95 | 921 | * @retval HAL status |
| phungductung | 0:e87aa4c49e95 | 922 | */ |
| phungductung | 0:e87aa4c49e95 | 923 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel) |
| phungductung | 0:e87aa4c49e95 | 924 | { |
| phungductung | 0:e87aa4c49e95 | 925 | /* Check the parameters */ |
| phungductung | 0:e87aa4c49e95 | 926 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
| phungductung | 0:e87aa4c49e95 | 927 | |
| phungductung | 0:e87aa4c49e95 | 928 | /* Enable the complementary PWM output */ |
| phungductung | 0:e87aa4c49e95 | 929 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
| phungductung | 0:e87aa4c49e95 | 930 | |
| phungductung | 0:e87aa4c49e95 | 931 | /* Enable the Main Output */ |
| phungductung | 0:e87aa4c49e95 | 932 | __HAL_TIM_MOE_ENABLE(htim); |
| phungductung | 0:e87aa4c49e95 | 933 | |
| phungductung | 0:e87aa4c49e95 | 934 | /* Enable the Peripheral */ |
| phungductung | 0:e87aa4c49e95 | 935 | __HAL_TIM_ENABLE(htim); |
| phungductung | 0:e87aa4c49e95 | 936 | |
| phungductung | 0:e87aa4c49e95 | 937 | /* Return function status */ |
| phungductung | 0:e87aa4c49e95 | 938 | return HAL_OK; |
| phungductung | 0:e87aa4c49e95 | 939 | } |
| phungductung | 0:e87aa4c49e95 | 940 | |
| phungductung | 0:e87aa4c49e95 | 941 | /** |
| phungductung | 0:e87aa4c49e95 | 942 | * @brief Stops the PWM signal generation on the complementary output. |
| phungductung | 0:e87aa4c49e95 | 943 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
| phungductung | 0:e87aa4c49e95 | 944 | * the configuration information for TIM module. |
| phungductung | 0:e87aa4c49e95 | 945 | * @param Channel: TIM Channel to be disabled. |
| phungductung | 0:e87aa4c49e95 | 946 | * This parameter can be one of the following values: |
| phungductung | 0:e87aa4c49e95 | 947 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| phungductung | 0:e87aa4c49e95 | 948 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| phungductung | 0:e87aa4c49e95 | 949 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
| phungductung | 0:e87aa4c49e95 | 950 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
| phungductung | 0:e87aa4c49e95 | 951 | * @retval HAL status |
| phungductung | 0:e87aa4c49e95 | 952 | */ |
| phungductung | 0:e87aa4c49e95 | 953 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) |
| phungductung | 0:e87aa4c49e95 | 954 | { |
| phungductung | 0:e87aa4c49e95 | 955 | /* Check the parameters */ |
| phungductung | 0:e87aa4c49e95 | 956 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
| phungductung | 0:e87aa4c49e95 | 957 | |
| phungductung | 0:e87aa4c49e95 | 958 | /* Disable the complementary PWM output */ |
| phungductung | 0:e87aa4c49e95 | 959 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
| phungductung | 0:e87aa4c49e95 | 960 | |
| phungductung | 0:e87aa4c49e95 | 961 | /* Disable the Main Output */ |
| phungductung | 0:e87aa4c49e95 | 962 | __HAL_TIM_MOE_DISABLE(htim); |
| phungductung | 0:e87aa4c49e95 | 963 | |
| phungductung | 0:e87aa4c49e95 | 964 | /* Disable the Peripheral */ |
| phungductung | 0:e87aa4c49e95 | 965 | __HAL_TIM_DISABLE(htim); |
| phungductung | 0:e87aa4c49e95 | 966 | |
| phungductung | 0:e87aa4c49e95 | 967 | /* Return function status */ |
| phungductung | 0:e87aa4c49e95 | 968 | return HAL_OK; |
| phungductung | 0:e87aa4c49e95 | 969 | } |
| phungductung | 0:e87aa4c49e95 | 970 | |
| phungductung | 0:e87aa4c49e95 | 971 | /** |
| phungductung | 0:e87aa4c49e95 | 972 | * @brief Starts the PWM signal generation in interrupt mode on the |
| phungductung | 0:e87aa4c49e95 | 973 | * complementary output. |
| phungductung | 0:e87aa4c49e95 | 974 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
| phungductung | 0:e87aa4c49e95 | 975 | * the configuration information for TIM module. |
| phungductung | 0:e87aa4c49e95 | 976 | * @param Channel: TIM Channel to be disabled. |
| phungductung | 0:e87aa4c49e95 | 977 | * This parameter can be one of the following values: |
| phungductung | 0:e87aa4c49e95 | 978 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| phungductung | 0:e87aa4c49e95 | 979 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| phungductung | 0:e87aa4c49e95 | 980 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
| phungductung | 0:e87aa4c49e95 | 981 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
| phungductung | 0:e87aa4c49e95 | 982 | * @retval HAL status |
| phungductung | 0:e87aa4c49e95 | 983 | */ |
| phungductung | 0:e87aa4c49e95 | 984 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) |
| phungductung | 0:e87aa4c49e95 | 985 | { |
| phungductung | 0:e87aa4c49e95 | 986 | /* Check the parameters */ |
| phungductung | 0:e87aa4c49e95 | 987 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
| phungductung | 0:e87aa4c49e95 | 988 | |
| phungductung | 0:e87aa4c49e95 | 989 | switch (Channel) |
| phungductung | 0:e87aa4c49e95 | 990 | { |
| phungductung | 0:e87aa4c49e95 | 991 | case TIM_CHANNEL_1: |
| phungductung | 0:e87aa4c49e95 | 992 | { |
| phungductung | 0:e87aa4c49e95 | 993 | /* Enable the TIM Capture/Compare 1 interrupt */ |
| phungductung | 0:e87aa4c49e95 | 994 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); |
| phungductung | 0:e87aa4c49e95 | 995 | } |
| phungductung | 0:e87aa4c49e95 | 996 | break; |
| phungductung | 0:e87aa4c49e95 | 997 | |
| phungductung | 0:e87aa4c49e95 | 998 | case TIM_CHANNEL_2: |
| phungductung | 0:e87aa4c49e95 | 999 | { |
| phungductung | 0:e87aa4c49e95 | 1000 | /* Enable the TIM Capture/Compare 2 interrupt */ |
| phungductung | 0:e87aa4c49e95 | 1001 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); |
| phungductung | 0:e87aa4c49e95 | 1002 | } |
| phungductung | 0:e87aa4c49e95 | 1003 | break; |
| phungductung | 0:e87aa4c49e95 | 1004 | |
| phungductung | 0:e87aa4c49e95 | 1005 | case TIM_CHANNEL_3: |
| phungductung | 0:e87aa4c49e95 | 1006 | { |
| phungductung | 0:e87aa4c49e95 | 1007 | /* Enable the TIM Capture/Compare 3 interrupt */ |
| phungductung | 0:e87aa4c49e95 | 1008 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); |
| phungductung | 0:e87aa4c49e95 | 1009 | } |
| phungductung | 0:e87aa4c49e95 | 1010 | break; |
| phungductung | 0:e87aa4c49e95 | 1011 | |
| phungductung | 0:e87aa4c49e95 | 1012 | case TIM_CHANNEL_4: |
| phungductung | 0:e87aa4c49e95 | 1013 | { |
| phungductung | 0:e87aa4c49e95 | 1014 | /* Enable the TIM Capture/Compare 4 interrupt */ |
| phungductung | 0:e87aa4c49e95 | 1015 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4); |
| phungductung | 0:e87aa4c49e95 | 1016 | } |
| phungductung | 0:e87aa4c49e95 | 1017 | break; |
| phungductung | 0:e87aa4c49e95 | 1018 | |
| phungductung | 0:e87aa4c49e95 | 1019 | default: |
| phungductung | 0:e87aa4c49e95 | 1020 | break; |
| phungductung | 0:e87aa4c49e95 | 1021 | } |
| phungductung | 0:e87aa4c49e95 | 1022 | |
| phungductung | 0:e87aa4c49e95 | 1023 | /* Enable the TIM Break interrupt */ |
| phungductung | 0:e87aa4c49e95 | 1024 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK); |
| phungductung | 0:e87aa4c49e95 | 1025 | |
| phungductung | 0:e87aa4c49e95 | 1026 | /* Enable the complementary PWM output */ |
| phungductung | 0:e87aa4c49e95 | 1027 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
| phungductung | 0:e87aa4c49e95 | 1028 | |
| phungductung | 0:e87aa4c49e95 | 1029 | /* Enable the Main Output */ |
| phungductung | 0:e87aa4c49e95 | 1030 | __HAL_TIM_MOE_ENABLE(htim); |
| phungductung | 0:e87aa4c49e95 | 1031 | |
| phungductung | 0:e87aa4c49e95 | 1032 | /* Enable the Peripheral */ |
| phungductung | 0:e87aa4c49e95 | 1033 | __HAL_TIM_ENABLE(htim); |
| phungductung | 0:e87aa4c49e95 | 1034 | |
| phungductung | 0:e87aa4c49e95 | 1035 | /* Return function status */ |
| phungductung | 0:e87aa4c49e95 | 1036 | return HAL_OK; |
| phungductung | 0:e87aa4c49e95 | 1037 | } |
| phungductung | 0:e87aa4c49e95 | 1038 | |
| phungductung | 0:e87aa4c49e95 | 1039 | /** |
| phungductung | 0:e87aa4c49e95 | 1040 | * @brief Stops the PWM signal generation in interrupt mode on the |
| phungductung | 0:e87aa4c49e95 | 1041 | * complementary output. |
| phungductung | 0:e87aa4c49e95 | 1042 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
| phungductung | 0:e87aa4c49e95 | 1043 | * the configuration information for TIM module. |
| phungductung | 0:e87aa4c49e95 | 1044 | * @param Channel: TIM Channel to be disabled. |
| phungductung | 0:e87aa4c49e95 | 1045 | * This parameter can be one of the following values: |
| phungductung | 0:e87aa4c49e95 | 1046 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| phungductung | 0:e87aa4c49e95 | 1047 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| phungductung | 0:e87aa4c49e95 | 1048 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
| phungductung | 0:e87aa4c49e95 | 1049 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
| phungductung | 0:e87aa4c49e95 | 1050 | * @retval HAL status |
| phungductung | 0:e87aa4c49e95 | 1051 | */ |
| phungductung | 0:e87aa4c49e95 | 1052 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT (TIM_HandleTypeDef *htim, uint32_t Channel) |
| phungductung | 0:e87aa4c49e95 | 1053 | { |
| phungductung | 0:e87aa4c49e95 | 1054 | uint32_t tmpccer = 0; |
| phungductung | 0:e87aa4c49e95 | 1055 | |
| phungductung | 0:e87aa4c49e95 | 1056 | /* Check the parameters */ |
| phungductung | 0:e87aa4c49e95 | 1057 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
| phungductung | 0:e87aa4c49e95 | 1058 | |
| phungductung | 0:e87aa4c49e95 | 1059 | switch (Channel) |
| phungductung | 0:e87aa4c49e95 | 1060 | { |
| phungductung | 0:e87aa4c49e95 | 1061 | case TIM_CHANNEL_1: |
| phungductung | 0:e87aa4c49e95 | 1062 | { |
| phungductung | 0:e87aa4c49e95 | 1063 | /* Disable the TIM Capture/Compare 1 interrupt */ |
| phungductung | 0:e87aa4c49e95 | 1064 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); |
| phungductung | 0:e87aa4c49e95 | 1065 | } |
| phungductung | 0:e87aa4c49e95 | 1066 | break; |
| phungductung | 0:e87aa4c49e95 | 1067 | |
| phungductung | 0:e87aa4c49e95 | 1068 | case TIM_CHANNEL_2: |
| phungductung | 0:e87aa4c49e95 | 1069 | { |
| phungductung | 0:e87aa4c49e95 | 1070 | /* Disable the TIM Capture/Compare 2 interrupt */ |
| phungductung | 0:e87aa4c49e95 | 1071 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); |
| phungductung | 0:e87aa4c49e95 | 1072 | } |
| phungductung | 0:e87aa4c49e95 | 1073 | break; |
| phungductung | 0:e87aa4c49e95 | 1074 | |
| phungductung | 0:e87aa4c49e95 | 1075 | case TIM_CHANNEL_3: |
| phungductung | 0:e87aa4c49e95 | 1076 | { |
| phungductung | 0:e87aa4c49e95 | 1077 | /* Disable the TIM Capture/Compare 3 interrupt */ |
| phungductung | 0:e87aa4c49e95 | 1078 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); |
| phungductung | 0:e87aa4c49e95 | 1079 | } |
| phungductung | 0:e87aa4c49e95 | 1080 | break; |
| phungductung | 0:e87aa4c49e95 | 1081 | |
| phungductung | 0:e87aa4c49e95 | 1082 | case TIM_CHANNEL_4: |
| phungductung | 0:e87aa4c49e95 | 1083 | { |
| phungductung | 0:e87aa4c49e95 | 1084 | /* Disable the TIM Capture/Compare 3 interrupt */ |
| phungductung | 0:e87aa4c49e95 | 1085 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4); |
| phungductung | 0:e87aa4c49e95 | 1086 | } |
| phungductung | 0:e87aa4c49e95 | 1087 | break; |
| phungductung | 0:e87aa4c49e95 | 1088 | |
| phungductung | 0:e87aa4c49e95 | 1089 | default: |
| phungductung | 0:e87aa4c49e95 | 1090 | break; |
| phungductung | 0:e87aa4c49e95 | 1091 | } |
| phungductung | 0:e87aa4c49e95 | 1092 | |
| phungductung | 0:e87aa4c49e95 | 1093 | /* Disable the complementary PWM output */ |
| phungductung | 0:e87aa4c49e95 | 1094 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
| phungductung | 0:e87aa4c49e95 | 1095 | |
| phungductung | 0:e87aa4c49e95 | 1096 | /* Disable the TIM Break interrupt (only if no more channel is active) */ |
| phungductung | 0:e87aa4c49e95 | 1097 | tmpccer = htim->Instance->CCER; |
| phungductung | 0:e87aa4c49e95 | 1098 | if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == RESET) |
| phungductung | 0:e87aa4c49e95 | 1099 | { |
| phungductung | 0:e87aa4c49e95 | 1100 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK); |
| phungductung | 0:e87aa4c49e95 | 1101 | } |
| phungductung | 0:e87aa4c49e95 | 1102 | |
| phungductung | 0:e87aa4c49e95 | 1103 | /* Disable the Main Output */ |
| phungductung | 0:e87aa4c49e95 | 1104 | __HAL_TIM_MOE_DISABLE(htim); |
| phungductung | 0:e87aa4c49e95 | 1105 | |
| phungductung | 0:e87aa4c49e95 | 1106 | /* Disable the Peripheral */ |
| phungductung | 0:e87aa4c49e95 | 1107 | __HAL_TIM_DISABLE(htim); |
| phungductung | 0:e87aa4c49e95 | 1108 | |
| phungductung | 0:e87aa4c49e95 | 1109 | /* Return function status */ |
| phungductung | 0:e87aa4c49e95 | 1110 | return HAL_OK; |
| phungductung | 0:e87aa4c49e95 | 1111 | } |
| phungductung | 0:e87aa4c49e95 | 1112 | |
| phungductung | 0:e87aa4c49e95 | 1113 | /** |
| phungductung | 0:e87aa4c49e95 | 1114 | * @brief Starts the TIM PWM signal generation in DMA mode on the |
| phungductung | 0:e87aa4c49e95 | 1115 | * complementary output |
| phungductung | 0:e87aa4c49e95 | 1116 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
| phungductung | 0:e87aa4c49e95 | 1117 | * the configuration information for TIM module. |
| phungductung | 0:e87aa4c49e95 | 1118 | * @param Channel: TIM Channel to be enabled. |
| phungductung | 0:e87aa4c49e95 | 1119 | * This parameter can be one of the following values: |
| phungductung | 0:e87aa4c49e95 | 1120 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| phungductung | 0:e87aa4c49e95 | 1121 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| phungductung | 0:e87aa4c49e95 | 1122 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
| phungductung | 0:e87aa4c49e95 | 1123 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
| phungductung | 0:e87aa4c49e95 | 1124 | * @param pData: The source Buffer address. |
| phungductung | 0:e87aa4c49e95 | 1125 | * @param Length: The length of data to be transferred from memory to TIM peripheral |
| phungductung | 0:e87aa4c49e95 | 1126 | * @retval HAL status |
| phungductung | 0:e87aa4c49e95 | 1127 | */ |
| phungductung | 0:e87aa4c49e95 | 1128 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length) |
| phungductung | 0:e87aa4c49e95 | 1129 | { |
| phungductung | 0:e87aa4c49e95 | 1130 | /* Check the parameters */ |
| phungductung | 0:e87aa4c49e95 | 1131 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
| phungductung | 0:e87aa4c49e95 | 1132 | |
| phungductung | 0:e87aa4c49e95 | 1133 | if((htim->State == HAL_TIM_STATE_BUSY)) |
| phungductung | 0:e87aa4c49e95 | 1134 | { |
| phungductung | 0:e87aa4c49e95 | 1135 | return HAL_BUSY; |
| phungductung | 0:e87aa4c49e95 | 1136 | } |
| phungductung | 0:e87aa4c49e95 | 1137 | else if((htim->State == HAL_TIM_STATE_READY)) |
| phungductung | 0:e87aa4c49e95 | 1138 | { |
| phungductung | 0:e87aa4c49e95 | 1139 | if(((uint32_t)pData == 0 ) && (Length > 0)) |
| phungductung | 0:e87aa4c49e95 | 1140 | { |
| phungductung | 0:e87aa4c49e95 | 1141 | return HAL_ERROR; |
| phungductung | 0:e87aa4c49e95 | 1142 | } |
| phungductung | 0:e87aa4c49e95 | 1143 | else |
| phungductung | 0:e87aa4c49e95 | 1144 | { |
| phungductung | 0:e87aa4c49e95 | 1145 | htim->State = HAL_TIM_STATE_BUSY; |
| phungductung | 0:e87aa4c49e95 | 1146 | } |
| phungductung | 0:e87aa4c49e95 | 1147 | } |
| phungductung | 0:e87aa4c49e95 | 1148 | switch (Channel) |
| phungductung | 0:e87aa4c49e95 | 1149 | { |
| phungductung | 0:e87aa4c49e95 | 1150 | case TIM_CHANNEL_1: |
| phungductung | 0:e87aa4c49e95 | 1151 | { |
| phungductung | 0:e87aa4c49e95 | 1152 | /* Set the DMA Period elapsed callback */ |
| phungductung | 0:e87aa4c49e95 | 1153 | htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt; |
| phungductung | 0:e87aa4c49e95 | 1154 | |
| phungductung | 0:e87aa4c49e95 | 1155 | /* Set the DMA error callback */ |
| phungductung | 0:e87aa4c49e95 | 1156 | htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ; |
| phungductung | 0:e87aa4c49e95 | 1157 | |
| phungductung | 0:e87aa4c49e95 | 1158 | /* Enable the DMA Stream */ |
| phungductung | 0:e87aa4c49e95 | 1159 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length); |
| phungductung | 0:e87aa4c49e95 | 1160 | |
| phungductung | 0:e87aa4c49e95 | 1161 | /* Enable the TIM Capture/Compare 1 DMA request */ |
| phungductung | 0:e87aa4c49e95 | 1162 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); |
| phungductung | 0:e87aa4c49e95 | 1163 | } |
| phungductung | 0:e87aa4c49e95 | 1164 | break; |
| phungductung | 0:e87aa4c49e95 | 1165 | |
| phungductung | 0:e87aa4c49e95 | 1166 | case TIM_CHANNEL_2: |
| phungductung | 0:e87aa4c49e95 | 1167 | { |
| phungductung | 0:e87aa4c49e95 | 1168 | /* Set the DMA Period elapsed callback */ |
| phungductung | 0:e87aa4c49e95 | 1169 | htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt; |
| phungductung | 0:e87aa4c49e95 | 1170 | |
| phungductung | 0:e87aa4c49e95 | 1171 | /* Set the DMA error callback */ |
| phungductung | 0:e87aa4c49e95 | 1172 | htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = HAL_TIM_DMAError ; |
| phungductung | 0:e87aa4c49e95 | 1173 | |
| phungductung | 0:e87aa4c49e95 | 1174 | /* Enable the DMA Stream */ |
| phungductung | 0:e87aa4c49e95 | 1175 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length); |
| phungductung | 0:e87aa4c49e95 | 1176 | |
| phungductung | 0:e87aa4c49e95 | 1177 | /* Enable the TIM Capture/Compare 2 DMA request */ |
| phungductung | 0:e87aa4c49e95 | 1178 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); |
| phungductung | 0:e87aa4c49e95 | 1179 | } |
| phungductung | 0:e87aa4c49e95 | 1180 | break; |
| phungductung | 0:e87aa4c49e95 | 1181 | |
| phungductung | 0:e87aa4c49e95 | 1182 | case TIM_CHANNEL_3: |
| phungductung | 0:e87aa4c49e95 | 1183 | { |
| phungductung | 0:e87aa4c49e95 | 1184 | /* Set the DMA Period elapsed callback */ |
| phungductung | 0:e87aa4c49e95 | 1185 | htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt; |
| phungductung | 0:e87aa4c49e95 | 1186 | |
| phungductung | 0:e87aa4c49e95 | 1187 | /* Set the DMA error callback */ |
| phungductung | 0:e87aa4c49e95 | 1188 | htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = HAL_TIM_DMAError ; |
| phungductung | 0:e87aa4c49e95 | 1189 | |
| phungductung | 0:e87aa4c49e95 | 1190 | /* Enable the DMA Stream */ |
| phungductung | 0:e87aa4c49e95 | 1191 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length); |
| phungductung | 0:e87aa4c49e95 | 1192 | |
| phungductung | 0:e87aa4c49e95 | 1193 | /* Enable the TIM Capture/Compare 3 DMA request */ |
| phungductung | 0:e87aa4c49e95 | 1194 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); |
| phungductung | 0:e87aa4c49e95 | 1195 | } |
| phungductung | 0:e87aa4c49e95 | 1196 | break; |
| phungductung | 0:e87aa4c49e95 | 1197 | |
| phungductung | 0:e87aa4c49e95 | 1198 | case TIM_CHANNEL_4: |
| phungductung | 0:e87aa4c49e95 | 1199 | { |
| phungductung | 0:e87aa4c49e95 | 1200 | /* Set the DMA Period elapsed callback */ |
| phungductung | 0:e87aa4c49e95 | 1201 | htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt; |
| phungductung | 0:e87aa4c49e95 | 1202 | |
| phungductung | 0:e87aa4c49e95 | 1203 | /* Set the DMA error callback */ |
| phungductung | 0:e87aa4c49e95 | 1204 | htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = HAL_TIM_DMAError ; |
| phungductung | 0:e87aa4c49e95 | 1205 | |
| phungductung | 0:e87aa4c49e95 | 1206 | /* Enable the DMA Stream */ |
| phungductung | 0:e87aa4c49e95 | 1207 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length); |
| phungductung | 0:e87aa4c49e95 | 1208 | |
| phungductung | 0:e87aa4c49e95 | 1209 | /* Enable the TIM Capture/Compare 4 DMA request */ |
| phungductung | 0:e87aa4c49e95 | 1210 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4); |
| phungductung | 0:e87aa4c49e95 | 1211 | } |
| phungductung | 0:e87aa4c49e95 | 1212 | break; |
| phungductung | 0:e87aa4c49e95 | 1213 | |
| phungductung | 0:e87aa4c49e95 | 1214 | default: |
| phungductung | 0:e87aa4c49e95 | 1215 | break; |
| phungductung | 0:e87aa4c49e95 | 1216 | } |
| phungductung | 0:e87aa4c49e95 | 1217 | |
| phungductung | 0:e87aa4c49e95 | 1218 | /* Enable the complementary PWM output */ |
| phungductung | 0:e87aa4c49e95 | 1219 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
| phungductung | 0:e87aa4c49e95 | 1220 | |
| phungductung | 0:e87aa4c49e95 | 1221 | /* Enable the Main Output */ |
| phungductung | 0:e87aa4c49e95 | 1222 | __HAL_TIM_MOE_ENABLE(htim); |
| phungductung | 0:e87aa4c49e95 | 1223 | |
| phungductung | 0:e87aa4c49e95 | 1224 | /* Enable the Peripheral */ |
| phungductung | 0:e87aa4c49e95 | 1225 | __HAL_TIM_ENABLE(htim); |
| phungductung | 0:e87aa4c49e95 | 1226 | |
| phungductung | 0:e87aa4c49e95 | 1227 | /* Return function status */ |
| phungductung | 0:e87aa4c49e95 | 1228 | return HAL_OK; |
| phungductung | 0:e87aa4c49e95 | 1229 | } |
| phungductung | 0:e87aa4c49e95 | 1230 | |
| phungductung | 0:e87aa4c49e95 | 1231 | /** |
| phungductung | 0:e87aa4c49e95 | 1232 | * @brief Stops the TIM PWM signal generation in DMA mode on the complementary |
| phungductung | 0:e87aa4c49e95 | 1233 | * output |
| phungductung | 0:e87aa4c49e95 | 1234 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
| phungductung | 0:e87aa4c49e95 | 1235 | * the configuration information for TIM module. |
| phungductung | 0:e87aa4c49e95 | 1236 | * @param Channel: TIM Channel to be disabled. |
| phungductung | 0:e87aa4c49e95 | 1237 | * This parameter can be one of the following values: |
| phungductung | 0:e87aa4c49e95 | 1238 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| phungductung | 0:e87aa4c49e95 | 1239 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| phungductung | 0:e87aa4c49e95 | 1240 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
| phungductung | 0:e87aa4c49e95 | 1241 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
| phungductung | 0:e87aa4c49e95 | 1242 | * @retval HAL status |
| phungductung | 0:e87aa4c49e95 | 1243 | */ |
| phungductung | 0:e87aa4c49e95 | 1244 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) |
| phungductung | 0:e87aa4c49e95 | 1245 | { |
| phungductung | 0:e87aa4c49e95 | 1246 | /* Check the parameters */ |
| phungductung | 0:e87aa4c49e95 | 1247 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
| phungductung | 0:e87aa4c49e95 | 1248 | |
| phungductung | 0:e87aa4c49e95 | 1249 | switch (Channel) |
| phungductung | 0:e87aa4c49e95 | 1250 | { |
| phungductung | 0:e87aa4c49e95 | 1251 | case TIM_CHANNEL_1: |
| phungductung | 0:e87aa4c49e95 | 1252 | { |
| phungductung | 0:e87aa4c49e95 | 1253 | /* Disable the TIM Capture/Compare 1 DMA request */ |
| phungductung | 0:e87aa4c49e95 | 1254 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); |
| phungductung | 0:e87aa4c49e95 | 1255 | } |
| phungductung | 0:e87aa4c49e95 | 1256 | break; |
| phungductung | 0:e87aa4c49e95 | 1257 | |
| phungductung | 0:e87aa4c49e95 | 1258 | case TIM_CHANNEL_2: |
| phungductung | 0:e87aa4c49e95 | 1259 | { |
| phungductung | 0:e87aa4c49e95 | 1260 | /* Disable the TIM Capture/Compare 2 DMA request */ |
| phungductung | 0:e87aa4c49e95 | 1261 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); |
| phungductung | 0:e87aa4c49e95 | 1262 | } |
| phungductung | 0:e87aa4c49e95 | 1263 | break; |
| phungductung | 0:e87aa4c49e95 | 1264 | |
| phungductung | 0:e87aa4c49e95 | 1265 | case TIM_CHANNEL_3: |
| phungductung | 0:e87aa4c49e95 | 1266 | { |
| phungductung | 0:e87aa4c49e95 | 1267 | /* Disable the TIM Capture/Compare 3 DMA request */ |
| phungductung | 0:e87aa4c49e95 | 1268 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); |
| phungductung | 0:e87aa4c49e95 | 1269 | } |
| phungductung | 0:e87aa4c49e95 | 1270 | break; |
| phungductung | 0:e87aa4c49e95 | 1271 | |
| phungductung | 0:e87aa4c49e95 | 1272 | case TIM_CHANNEL_4: |
| phungductung | 0:e87aa4c49e95 | 1273 | { |
| phungductung | 0:e87aa4c49e95 | 1274 | /* Disable the TIM Capture/Compare 4 DMA request */ |
| phungductung | 0:e87aa4c49e95 | 1275 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4); |
| phungductung | 0:e87aa4c49e95 | 1276 | } |
| phungductung | 0:e87aa4c49e95 | 1277 | break; |
| phungductung | 0:e87aa4c49e95 | 1278 | |
| phungductung | 0:e87aa4c49e95 | 1279 | default: |
| phungductung | 0:e87aa4c49e95 | 1280 | break; |
| phungductung | 0:e87aa4c49e95 | 1281 | } |
| phungductung | 0:e87aa4c49e95 | 1282 | |
| phungductung | 0:e87aa4c49e95 | 1283 | /* Disable the complementary PWM output */ |
| phungductung | 0:e87aa4c49e95 | 1284 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
| phungductung | 0:e87aa4c49e95 | 1285 | |
| phungductung | 0:e87aa4c49e95 | 1286 | /* Disable the Main Output */ |
| phungductung | 0:e87aa4c49e95 | 1287 | __HAL_TIM_MOE_DISABLE(htim); |
| phungductung | 0:e87aa4c49e95 | 1288 | |
| phungductung | 0:e87aa4c49e95 | 1289 | /* Disable the Peripheral */ |
| phungductung | 0:e87aa4c49e95 | 1290 | __HAL_TIM_DISABLE(htim); |
| phungductung | 0:e87aa4c49e95 | 1291 | |
| phungductung | 0:e87aa4c49e95 | 1292 | /* Change the htim state */ |
| phungductung | 0:e87aa4c49e95 | 1293 | htim->State = HAL_TIM_STATE_READY; |
| phungductung | 0:e87aa4c49e95 | 1294 | |
| phungductung | 0:e87aa4c49e95 | 1295 | /* Return function status */ |
| phungductung | 0:e87aa4c49e95 | 1296 | return HAL_OK; |
| phungductung | 0:e87aa4c49e95 | 1297 | } |
| phungductung | 0:e87aa4c49e95 | 1298 | |
| phungductung | 0:e87aa4c49e95 | 1299 | /** |
| phungductung | 0:e87aa4c49e95 | 1300 | * @} |
| phungductung | 0:e87aa4c49e95 | 1301 | */ |
| phungductung | 0:e87aa4c49e95 | 1302 | |
| phungductung | 0:e87aa4c49e95 | 1303 | /** @defgroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions |
| phungductung | 0:e87aa4c49e95 | 1304 | * @brief Timer Complementary One Pulse functions |
| phungductung | 0:e87aa4c49e95 | 1305 | * |
| phungductung | 0:e87aa4c49e95 | 1306 | @verbatim |
| phungductung | 0:e87aa4c49e95 | 1307 | ============================================================================== |
| phungductung | 0:e87aa4c49e95 | 1308 | ##### Timer Complementary One Pulse functions ##### |
| phungductung | 0:e87aa4c49e95 | 1309 | ============================================================================== |
| phungductung | 0:e87aa4c49e95 | 1310 | [..] |
| phungductung | 0:e87aa4c49e95 | 1311 | This section provides functions allowing to: |
| phungductung | 0:e87aa4c49e95 | 1312 | (+) Start the Complementary One Pulse generation. |
| phungductung | 0:e87aa4c49e95 | 1313 | (+) Stop the Complementary One Pulse. |
| phungductung | 0:e87aa4c49e95 | 1314 | (+) Start the Complementary One Pulse and enable interrupts. |
| phungductung | 0:e87aa4c49e95 | 1315 | (+) Stop the Complementary One Pulse and disable interrupts. |
| phungductung | 0:e87aa4c49e95 | 1316 | |
| phungductung | 0:e87aa4c49e95 | 1317 | @endverbatim |
| phungductung | 0:e87aa4c49e95 | 1318 | * @{ |
| phungductung | 0:e87aa4c49e95 | 1319 | */ |
| phungductung | 0:e87aa4c49e95 | 1320 | |
| phungductung | 0:e87aa4c49e95 | 1321 | /** |
| phungductung | 0:e87aa4c49e95 | 1322 | * @brief Starts the TIM One Pulse signal generation on the complemetary |
| phungductung | 0:e87aa4c49e95 | 1323 | * output. |
| phungductung | 0:e87aa4c49e95 | 1324 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
| phungductung | 0:e87aa4c49e95 | 1325 | * the configuration information for TIM module. |
| phungductung | 0:e87aa4c49e95 | 1326 | * @param OutputChannel: TIM Channel to be enabled. |
| phungductung | 0:e87aa4c49e95 | 1327 | * This parameter can be one of the following values: |
| phungductung | 0:e87aa4c49e95 | 1328 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| phungductung | 0:e87aa4c49e95 | 1329 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| phungductung | 0:e87aa4c49e95 | 1330 | * @retval HAL status |
| phungductung | 0:e87aa4c49e95 | 1331 | */ |
| phungductung | 0:e87aa4c49e95 | 1332 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel) |
| phungductung | 0:e87aa4c49e95 | 1333 | { |
| phungductung | 0:e87aa4c49e95 | 1334 | /* Check the parameters */ |
| phungductung | 0:e87aa4c49e95 | 1335 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); |
| phungductung | 0:e87aa4c49e95 | 1336 | |
| phungductung | 0:e87aa4c49e95 | 1337 | /* Enable the complementary One Pulse output */ |
| phungductung | 0:e87aa4c49e95 | 1338 | TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE); |
| phungductung | 0:e87aa4c49e95 | 1339 | |
| phungductung | 0:e87aa4c49e95 | 1340 | /* Enable the Main Output */ |
| phungductung | 0:e87aa4c49e95 | 1341 | __HAL_TIM_MOE_ENABLE(htim); |
| phungductung | 0:e87aa4c49e95 | 1342 | |
| phungductung | 0:e87aa4c49e95 | 1343 | /* Return function status */ |
| phungductung | 0:e87aa4c49e95 | 1344 | return HAL_OK; |
| phungductung | 0:e87aa4c49e95 | 1345 | } |
| phungductung | 0:e87aa4c49e95 | 1346 | |
| phungductung | 0:e87aa4c49e95 | 1347 | /** |
| phungductung | 0:e87aa4c49e95 | 1348 | * @brief Stops the TIM One Pulse signal generation on the complementary |
| phungductung | 0:e87aa4c49e95 | 1349 | * output. |
| phungductung | 0:e87aa4c49e95 | 1350 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
| phungductung | 0:e87aa4c49e95 | 1351 | * the configuration information for TIM module. |
| phungductung | 0:e87aa4c49e95 | 1352 | * @param OutputChannel: TIM Channel to be disabled. |
| phungductung | 0:e87aa4c49e95 | 1353 | * This parameter can be one of the following values: |
| phungductung | 0:e87aa4c49e95 | 1354 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| phungductung | 0:e87aa4c49e95 | 1355 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| phungductung | 0:e87aa4c49e95 | 1356 | * @retval HAL status |
| phungductung | 0:e87aa4c49e95 | 1357 | */ |
| phungductung | 0:e87aa4c49e95 | 1358 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel) |
| phungductung | 0:e87aa4c49e95 | 1359 | { |
| phungductung | 0:e87aa4c49e95 | 1360 | |
| phungductung | 0:e87aa4c49e95 | 1361 | /* Check the parameters */ |
| phungductung | 0:e87aa4c49e95 | 1362 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); |
| phungductung | 0:e87aa4c49e95 | 1363 | |
| phungductung | 0:e87aa4c49e95 | 1364 | /* Disable the complementary One Pulse output */ |
| phungductung | 0:e87aa4c49e95 | 1365 | TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE); |
| phungductung | 0:e87aa4c49e95 | 1366 | |
| phungductung | 0:e87aa4c49e95 | 1367 | /* Disable the Main Output */ |
| phungductung | 0:e87aa4c49e95 | 1368 | __HAL_TIM_MOE_DISABLE(htim); |
| phungductung | 0:e87aa4c49e95 | 1369 | |
| phungductung | 0:e87aa4c49e95 | 1370 | /* Disable the Peripheral */ |
| phungductung | 0:e87aa4c49e95 | 1371 | __HAL_TIM_DISABLE(htim); |
| phungductung | 0:e87aa4c49e95 | 1372 | |
| phungductung | 0:e87aa4c49e95 | 1373 | /* Return function status */ |
| phungductung | 0:e87aa4c49e95 | 1374 | return HAL_OK; |
| phungductung | 0:e87aa4c49e95 | 1375 | } |
| phungductung | 0:e87aa4c49e95 | 1376 | |
| phungductung | 0:e87aa4c49e95 | 1377 | /** |
| phungductung | 0:e87aa4c49e95 | 1378 | * @brief Starts the TIM One Pulse signal generation in interrupt mode on the |
| phungductung | 0:e87aa4c49e95 | 1379 | * complementary channel. |
| phungductung | 0:e87aa4c49e95 | 1380 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
| phungductung | 0:e87aa4c49e95 | 1381 | * the configuration information for TIM module. |
| phungductung | 0:e87aa4c49e95 | 1382 | * @param OutputChannel: TIM Channel to be enabled. |
| phungductung | 0:e87aa4c49e95 | 1383 | * This parameter can be one of the following values: |
| phungductung | 0:e87aa4c49e95 | 1384 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| phungductung | 0:e87aa4c49e95 | 1385 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| phungductung | 0:e87aa4c49e95 | 1386 | * @retval HAL status |
| phungductung | 0:e87aa4c49e95 | 1387 | */ |
| phungductung | 0:e87aa4c49e95 | 1388 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel) |
| phungductung | 0:e87aa4c49e95 | 1389 | { |
| phungductung | 0:e87aa4c49e95 | 1390 | /* Check the parameters */ |
| phungductung | 0:e87aa4c49e95 | 1391 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); |
| phungductung | 0:e87aa4c49e95 | 1392 | |
| phungductung | 0:e87aa4c49e95 | 1393 | /* Enable the TIM Capture/Compare 1 interrupt */ |
| phungductung | 0:e87aa4c49e95 | 1394 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); |
| phungductung | 0:e87aa4c49e95 | 1395 | |
| phungductung | 0:e87aa4c49e95 | 1396 | /* Enable the TIM Capture/Compare 2 interrupt */ |
| phungductung | 0:e87aa4c49e95 | 1397 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); |
| phungductung | 0:e87aa4c49e95 | 1398 | |
| phungductung | 0:e87aa4c49e95 | 1399 | /* Enable the complementary One Pulse output */ |
| phungductung | 0:e87aa4c49e95 | 1400 | TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE); |
| phungductung | 0:e87aa4c49e95 | 1401 | |
| phungductung | 0:e87aa4c49e95 | 1402 | /* Enable the Main Output */ |
| phungductung | 0:e87aa4c49e95 | 1403 | __HAL_TIM_MOE_ENABLE(htim); |
| phungductung | 0:e87aa4c49e95 | 1404 | |
| phungductung | 0:e87aa4c49e95 | 1405 | /* Return function status */ |
| phungductung | 0:e87aa4c49e95 | 1406 | return HAL_OK; |
| phungductung | 0:e87aa4c49e95 | 1407 | } |
| phungductung | 0:e87aa4c49e95 | 1408 | |
| phungductung | 0:e87aa4c49e95 | 1409 | /** |
| phungductung | 0:e87aa4c49e95 | 1410 | * @brief Stops the TIM One Pulse signal generation in interrupt mode on the |
| phungductung | 0:e87aa4c49e95 | 1411 | * complementary channel. |
| phungductung | 0:e87aa4c49e95 | 1412 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
| phungductung | 0:e87aa4c49e95 | 1413 | * the configuration information for TIM module. |
| phungductung | 0:e87aa4c49e95 | 1414 | * @param OutputChannel: TIM Channel to be disabled. |
| phungductung | 0:e87aa4c49e95 | 1415 | * This parameter can be one of the following values: |
| phungductung | 0:e87aa4c49e95 | 1416 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| phungductung | 0:e87aa4c49e95 | 1417 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| phungductung | 0:e87aa4c49e95 | 1418 | * @retval HAL status |
| phungductung | 0:e87aa4c49e95 | 1419 | */ |
| phungductung | 0:e87aa4c49e95 | 1420 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel) |
| phungductung | 0:e87aa4c49e95 | 1421 | { |
| phungductung | 0:e87aa4c49e95 | 1422 | /* Check the parameters */ |
| phungductung | 0:e87aa4c49e95 | 1423 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); |
| phungductung | 0:e87aa4c49e95 | 1424 | |
| phungductung | 0:e87aa4c49e95 | 1425 | /* Disable the TIM Capture/Compare 1 interrupt */ |
| phungductung | 0:e87aa4c49e95 | 1426 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); |
| phungductung | 0:e87aa4c49e95 | 1427 | |
| phungductung | 0:e87aa4c49e95 | 1428 | /* Disable the TIM Capture/Compare 2 interrupt */ |
| phungductung | 0:e87aa4c49e95 | 1429 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); |
| phungductung | 0:e87aa4c49e95 | 1430 | |
| phungductung | 0:e87aa4c49e95 | 1431 | /* Disable the complementary One Pulse output */ |
| phungductung | 0:e87aa4c49e95 | 1432 | TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE); |
| phungductung | 0:e87aa4c49e95 | 1433 | |
| phungductung | 0:e87aa4c49e95 | 1434 | /* Disable the Main Output */ |
| phungductung | 0:e87aa4c49e95 | 1435 | __HAL_TIM_MOE_DISABLE(htim); |
| phungductung | 0:e87aa4c49e95 | 1436 | |
| phungductung | 0:e87aa4c49e95 | 1437 | /* Disable the Peripheral */ |
| phungductung | 0:e87aa4c49e95 | 1438 | __HAL_TIM_DISABLE(htim); |
| phungductung | 0:e87aa4c49e95 | 1439 | |
| phungductung | 0:e87aa4c49e95 | 1440 | /* Return function status */ |
| phungductung | 0:e87aa4c49e95 | 1441 | return HAL_OK; |
| phungductung | 0:e87aa4c49e95 | 1442 | } |
| phungductung | 0:e87aa4c49e95 | 1443 | |
| phungductung | 0:e87aa4c49e95 | 1444 | /** |
| phungductung | 0:e87aa4c49e95 | 1445 | * @} |
| phungductung | 0:e87aa4c49e95 | 1446 | */ |
| phungductung | 0:e87aa4c49e95 | 1447 | |
| phungductung | 0:e87aa4c49e95 | 1448 | /** @defgroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions |
| phungductung | 0:e87aa4c49e95 | 1449 | * @brief Peripheral Control functions |
| phungductung | 0:e87aa4c49e95 | 1450 | * |
| phungductung | 0:e87aa4c49e95 | 1451 | @verbatim |
| phungductung | 0:e87aa4c49e95 | 1452 | ============================================================================== |
| phungductung | 0:e87aa4c49e95 | 1453 | ##### Peripheral Control functions ##### |
| phungductung | 0:e87aa4c49e95 | 1454 | ============================================================================== |
| phungductung | 0:e87aa4c49e95 | 1455 | [..] |
| phungductung | 0:e87aa4c49e95 | 1456 | This section provides functions allowing to: |
| phungductung | 0:e87aa4c49e95 | 1457 | (+) Configure The Input Output channels for OC, PWM, IC or One Pulse mode. |
| phungductung | 0:e87aa4c49e95 | 1458 | (+) Configure External Clock source. |
| phungductung | 0:e87aa4c49e95 | 1459 | (+) Configure Complementary channels, break features and dead time. |
| phungductung | 0:e87aa4c49e95 | 1460 | (+) Configure Master and the Slave synchronization. |
| phungductung | 0:e87aa4c49e95 | 1461 | (+) Configure the commutation event in case of use of the Hall sensor interface. |
| phungductung | 0:e87aa4c49e95 | 1462 | (+) Configure the DMA Burst Mode. |
| phungductung | 0:e87aa4c49e95 | 1463 | |
| phungductung | 0:e87aa4c49e95 | 1464 | @endverbatim |
| phungductung | 0:e87aa4c49e95 | 1465 | * @{ |
| phungductung | 0:e87aa4c49e95 | 1466 | */ |
| phungductung | 0:e87aa4c49e95 | 1467 | /** |
| phungductung | 0:e87aa4c49e95 | 1468 | * @brief Configure the TIM commutation event sequence. |
| phungductung | 0:e87aa4c49e95 | 1469 | * @note This function is mandatory to use the commutation event in order to |
| phungductung | 0:e87aa4c49e95 | 1470 | * update the configuration at each commutation detection on the TRGI input of the Timer, |
| phungductung | 0:e87aa4c49e95 | 1471 | * the typical use of this feature is with the use of another Timer(interface Timer) |
| phungductung | 0:e87aa4c49e95 | 1472 | * configured in Hall sensor interface, this interface Timer will generate the |
| phungductung | 0:e87aa4c49e95 | 1473 | * commutation at its TRGO output (connected to Timer used in this function) each time |
| phungductung | 0:e87aa4c49e95 | 1474 | * the TI1 of the Interface Timer detect a commutation at its input TI1. |
| phungductung | 0:e87aa4c49e95 | 1475 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
| phungductung | 0:e87aa4c49e95 | 1476 | * the configuration information for TIM module. |
| phungductung | 0:e87aa4c49e95 | 1477 | * @param InputTrigger: the Internal trigger corresponding to the Timer Interfacing with the Hall sensor. |
| phungductung | 0:e87aa4c49e95 | 1478 | * This parameter can be one of the following values: |
| phungductung | 0:e87aa4c49e95 | 1479 | * @arg TIM_TS_ITR0: Internal trigger 0 selected |
| phungductung | 0:e87aa4c49e95 | 1480 | * @arg TIM_TS_ITR1: Internal trigger 1 selected |
| phungductung | 0:e87aa4c49e95 | 1481 | * @arg TIM_TS_ITR2: Internal trigger 2 selected |
| phungductung | 0:e87aa4c49e95 | 1482 | * @arg TIM_TS_ITR3: Internal trigger 3 selected |
| phungductung | 0:e87aa4c49e95 | 1483 | * @arg TIM_TS_NONE: No trigger is needed |
| phungductung | 0:e87aa4c49e95 | 1484 | * @param CommutationSource: the Commutation Event source. |
| phungductung | 0:e87aa4c49e95 | 1485 | * This parameter can be one of the following values: |
| phungductung | 0:e87aa4c49e95 | 1486 | * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer |
| phungductung | 0:e87aa4c49e95 | 1487 | * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit |
| phungductung | 0:e87aa4c49e95 | 1488 | * @retval HAL status |
| phungductung | 0:e87aa4c49e95 | 1489 | */ |
| phungductung | 0:e87aa4c49e95 | 1490 | HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource) |
| phungductung | 0:e87aa4c49e95 | 1491 | { |
| phungductung | 0:e87aa4c49e95 | 1492 | /* Check the parameters */ |
| phungductung | 0:e87aa4c49e95 | 1493 | assert_param(IS_TIM_ADVANCED_INSTANCE(htim->Instance)); |
| phungductung | 0:e87aa4c49e95 | 1494 | assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); |
| phungductung | 0:e87aa4c49e95 | 1495 | |
| phungductung | 0:e87aa4c49e95 | 1496 | __HAL_LOCK(htim); |
| phungductung | 0:e87aa4c49e95 | 1497 | |
| phungductung | 0:e87aa4c49e95 | 1498 | if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || |
| phungductung | 0:e87aa4c49e95 | 1499 | (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) |
| phungductung | 0:e87aa4c49e95 | 1500 | { |
| phungductung | 0:e87aa4c49e95 | 1501 | /* Select the Input trigger */ |
| phungductung | 0:e87aa4c49e95 | 1502 | htim->Instance->SMCR &= ~TIM_SMCR_TS; |
| phungductung | 0:e87aa4c49e95 | 1503 | htim->Instance->SMCR |= InputTrigger; |
| phungductung | 0:e87aa4c49e95 | 1504 | } |
| phungductung | 0:e87aa4c49e95 | 1505 | |
| phungductung | 0:e87aa4c49e95 | 1506 | /* Select the Capture Compare preload feature */ |
| phungductung | 0:e87aa4c49e95 | 1507 | htim->Instance->CR2 |= TIM_CR2_CCPC; |
| phungductung | 0:e87aa4c49e95 | 1508 | /* Select the Commutation event source */ |
| phungductung | 0:e87aa4c49e95 | 1509 | htim->Instance->CR2 &= ~TIM_CR2_CCUS; |
| phungductung | 0:e87aa4c49e95 | 1510 | htim->Instance->CR2 |= CommutationSource; |
| phungductung | 0:e87aa4c49e95 | 1511 | |
| phungductung | 0:e87aa4c49e95 | 1512 | __HAL_UNLOCK(htim); |
| phungductung | 0:e87aa4c49e95 | 1513 | |
| phungductung | 0:e87aa4c49e95 | 1514 | return HAL_OK; |
| phungductung | 0:e87aa4c49e95 | 1515 | } |
| phungductung | 0:e87aa4c49e95 | 1516 | |
| phungductung | 0:e87aa4c49e95 | 1517 | /** |
| phungductung | 0:e87aa4c49e95 | 1518 | * @brief Configure the TIM commutation event sequence with interrupt. |
| phungductung | 0:e87aa4c49e95 | 1519 | * @note This function is mandatory to use the commutation event in order to |
| phungductung | 0:e87aa4c49e95 | 1520 | * update the configuration at each commutation detection on the TRGI input of the Timer, |
| phungductung | 0:e87aa4c49e95 | 1521 | * the typical use of this feature is with the use of another Timer(interface Timer) |
| phungductung | 0:e87aa4c49e95 | 1522 | * configured in Hall sensor interface, this interface Timer will generate the |
| phungductung | 0:e87aa4c49e95 | 1523 | * commutation at its TRGO output (connected to Timer used in this function) each time |
| phungductung | 0:e87aa4c49e95 | 1524 | * the TI1 of the Interface Timer detect a commutation at its input TI1. |
| phungductung | 0:e87aa4c49e95 | 1525 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
| phungductung | 0:e87aa4c49e95 | 1526 | * the configuration information for TIM module. |
| phungductung | 0:e87aa4c49e95 | 1527 | * @param InputTrigger: the Internal trigger corresponding to the Timer Interfacing with the Hall sensor. |
| phungductung | 0:e87aa4c49e95 | 1528 | * This parameter can be one of the following values: |
| phungductung | 0:e87aa4c49e95 | 1529 | * @arg TIM_TS_ITR0: Internal trigger 0 selected |
| phungductung | 0:e87aa4c49e95 | 1530 | * @arg TIM_TS_ITR1: Internal trigger 1 selected |
| phungductung | 0:e87aa4c49e95 | 1531 | * @arg TIM_TS_ITR2: Internal trigger 2 selected |
| phungductung | 0:e87aa4c49e95 | 1532 | * @arg TIM_TS_ITR3: Internal trigger 3 selected |
| phungductung | 0:e87aa4c49e95 | 1533 | * @arg TIM_TS_NONE: No trigger is needed |
| phungductung | 0:e87aa4c49e95 | 1534 | * @param CommutationSource: the Commutation Event source. |
| phungductung | 0:e87aa4c49e95 | 1535 | * This parameter can be one of the following values: |
| phungductung | 0:e87aa4c49e95 | 1536 | * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer |
| phungductung | 0:e87aa4c49e95 | 1537 | * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit |
| phungductung | 0:e87aa4c49e95 | 1538 | * @retval HAL status |
| phungductung | 0:e87aa4c49e95 | 1539 | */ |
| phungductung | 0:e87aa4c49e95 | 1540 | HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource) |
| phungductung | 0:e87aa4c49e95 | 1541 | { |
| phungductung | 0:e87aa4c49e95 | 1542 | /* Check the parameters */ |
| phungductung | 0:e87aa4c49e95 | 1543 | assert_param(IS_TIM_ADVANCED_INSTANCE(htim->Instance)); |
| phungductung | 0:e87aa4c49e95 | 1544 | assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); |
| phungductung | 0:e87aa4c49e95 | 1545 | |
| phungductung | 0:e87aa4c49e95 | 1546 | __HAL_LOCK(htim); |
| phungductung | 0:e87aa4c49e95 | 1547 | |
| phungductung | 0:e87aa4c49e95 | 1548 | if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || |
| phungductung | 0:e87aa4c49e95 | 1549 | (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) |
| phungductung | 0:e87aa4c49e95 | 1550 | { |
| phungductung | 0:e87aa4c49e95 | 1551 | /* Select the Input trigger */ |
| phungductung | 0:e87aa4c49e95 | 1552 | htim->Instance->SMCR &= ~TIM_SMCR_TS; |
| phungductung | 0:e87aa4c49e95 | 1553 | htim->Instance->SMCR |= InputTrigger; |
| phungductung | 0:e87aa4c49e95 | 1554 | } |
| phungductung | 0:e87aa4c49e95 | 1555 | |
| phungductung | 0:e87aa4c49e95 | 1556 | /* Select the Capture Compare preload feature */ |
| phungductung | 0:e87aa4c49e95 | 1557 | htim->Instance->CR2 |= TIM_CR2_CCPC; |
| phungductung | 0:e87aa4c49e95 | 1558 | /* Select the Commutation event source */ |
| phungductung | 0:e87aa4c49e95 | 1559 | htim->Instance->CR2 &= ~TIM_CR2_CCUS; |
| phungductung | 0:e87aa4c49e95 | 1560 | htim->Instance->CR2 |= CommutationSource; |
| phungductung | 0:e87aa4c49e95 | 1561 | |
| phungductung | 0:e87aa4c49e95 | 1562 | /* Enable the Commutation Interrupt Request */ |
| phungductung | 0:e87aa4c49e95 | 1563 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_COM); |
| phungductung | 0:e87aa4c49e95 | 1564 | |
| phungductung | 0:e87aa4c49e95 | 1565 | __HAL_UNLOCK(htim); |
| phungductung | 0:e87aa4c49e95 | 1566 | |
| phungductung | 0:e87aa4c49e95 | 1567 | return HAL_OK; |
| phungductung | 0:e87aa4c49e95 | 1568 | } |
| phungductung | 0:e87aa4c49e95 | 1569 | |
| phungductung | 0:e87aa4c49e95 | 1570 | /** |
| phungductung | 0:e87aa4c49e95 | 1571 | * @brief Configure the TIM commutation event sequence with DMA. |
| phungductung | 0:e87aa4c49e95 | 1572 | * @note This function is mandatory to use the commutation event in order to |
| phungductung | 0:e87aa4c49e95 | 1573 | * update the configuration at each commutation detection on the TRGI input of the Timer, |
| phungductung | 0:e87aa4c49e95 | 1574 | * the typical use of this feature is with the use of another Timer(interface Timer) |
| phungductung | 0:e87aa4c49e95 | 1575 | * configured in Hall sensor interface, this interface Timer will generate the |
| phungductung | 0:e87aa4c49e95 | 1576 | * commutation at its TRGO output (connected to Timer used in this function) each time |
| phungductung | 0:e87aa4c49e95 | 1577 | * the TI1 of the Interface Timer detect a commutation at its input TI1. |
| phungductung | 0:e87aa4c49e95 | 1578 | * @note: The user should configure the DMA in his own software, in This function only the COMDE bit is set |
| phungductung | 0:e87aa4c49e95 | 1579 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
| phungductung | 0:e87aa4c49e95 | 1580 | * the configuration information for TIM module. |
| phungductung | 0:e87aa4c49e95 | 1581 | * @param InputTrigger: the Internal trigger corresponding to the Timer Interfacing with the Hall sensor. |
| phungductung | 0:e87aa4c49e95 | 1582 | * This parameter can be one of the following values: |
| phungductung | 0:e87aa4c49e95 | 1583 | * @arg TIM_TS_ITR0: Internal trigger 0 selected |
| phungductung | 0:e87aa4c49e95 | 1584 | * @arg TIM_TS_ITR1: Internal trigger 1 selected |
| phungductung | 0:e87aa4c49e95 | 1585 | * @arg TIM_TS_ITR2: Internal trigger 2 selected |
| phungductung | 0:e87aa4c49e95 | 1586 | * @arg TIM_TS_ITR3: Internal trigger 3 selected |
| phungductung | 0:e87aa4c49e95 | 1587 | * @arg TIM_TS_NONE: No trigger is needed |
| phungductung | 0:e87aa4c49e95 | 1588 | * @param CommutationSource: the Commutation Event source. |
| phungductung | 0:e87aa4c49e95 | 1589 | * This parameter can be one of the following values: |
| phungductung | 0:e87aa4c49e95 | 1590 | * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer |
| phungductung | 0:e87aa4c49e95 | 1591 | * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit |
| phungductung | 0:e87aa4c49e95 | 1592 | * @retval HAL status |
| phungductung | 0:e87aa4c49e95 | 1593 | */ |
| phungductung | 0:e87aa4c49e95 | 1594 | HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource) |
| phungductung | 0:e87aa4c49e95 | 1595 | { |
| phungductung | 0:e87aa4c49e95 | 1596 | /* Check the parameters */ |
| phungductung | 0:e87aa4c49e95 | 1597 | assert_param(IS_TIM_ADVANCED_INSTANCE(htim->Instance)); |
| phungductung | 0:e87aa4c49e95 | 1598 | assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); |
| phungductung | 0:e87aa4c49e95 | 1599 | |
| phungductung | 0:e87aa4c49e95 | 1600 | __HAL_LOCK(htim); |
| phungductung | 0:e87aa4c49e95 | 1601 | |
| phungductung | 0:e87aa4c49e95 | 1602 | if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || |
| phungductung | 0:e87aa4c49e95 | 1603 | (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) |
| phungductung | 0:e87aa4c49e95 | 1604 | { |
| phungductung | 0:e87aa4c49e95 | 1605 | /* Select the Input trigger */ |
| phungductung | 0:e87aa4c49e95 | 1606 | htim->Instance->SMCR &= ~TIM_SMCR_TS; |
| phungductung | 0:e87aa4c49e95 | 1607 | htim->Instance->SMCR |= InputTrigger; |
| phungductung | 0:e87aa4c49e95 | 1608 | } |
| phungductung | 0:e87aa4c49e95 | 1609 | |
| phungductung | 0:e87aa4c49e95 | 1610 | /* Select the Capture Compare preload feature */ |
| phungductung | 0:e87aa4c49e95 | 1611 | htim->Instance->CR2 |= TIM_CR2_CCPC; |
| phungductung | 0:e87aa4c49e95 | 1612 | /* Select the Commutation event source */ |
| phungductung | 0:e87aa4c49e95 | 1613 | htim->Instance->CR2 &= ~TIM_CR2_CCUS; |
| phungductung | 0:e87aa4c49e95 | 1614 | htim->Instance->CR2 |= CommutationSource; |
| phungductung | 0:e87aa4c49e95 | 1615 | |
| phungductung | 0:e87aa4c49e95 | 1616 | /* Enable the Commutation DMA Request */ |
| phungductung | 0:e87aa4c49e95 | 1617 | /* Set the DMA Commutation Callback */ |
| phungductung | 0:e87aa4c49e95 | 1618 | htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = HAL_TIMEx_DMACommutationCplt; |
| phungductung | 0:e87aa4c49e95 | 1619 | /* Set the DMA error callback */ |
| phungductung | 0:e87aa4c49e95 | 1620 | htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = HAL_TIM_DMAError; |
| phungductung | 0:e87aa4c49e95 | 1621 | |
| phungductung | 0:e87aa4c49e95 | 1622 | /* Enable the Commutation DMA Request */ |
| phungductung | 0:e87aa4c49e95 | 1623 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_COM); |
| phungductung | 0:e87aa4c49e95 | 1624 | |
| phungductung | 0:e87aa4c49e95 | 1625 | __HAL_UNLOCK(htim); |
| phungductung | 0:e87aa4c49e95 | 1626 | |
| phungductung | 0:e87aa4c49e95 | 1627 | return HAL_OK; |
| phungductung | 0:e87aa4c49e95 | 1628 | } |
| phungductung | 0:e87aa4c49e95 | 1629 | |
| phungductung | 0:e87aa4c49e95 | 1630 | /** |
| phungductung | 0:e87aa4c49e95 | 1631 | * @brief Initializes the TIM Output Compare Channels according to the specified |
| phungductung | 0:e87aa4c49e95 | 1632 | * parameters in the TIM_OC_InitTypeDef. |
| phungductung | 0:e87aa4c49e95 | 1633 | * @param htim: TIM Output Compare handle |
| phungductung | 0:e87aa4c49e95 | 1634 | * @param sConfig: TIM Output Compare configuration structure |
| phungductung | 0:e87aa4c49e95 | 1635 | * @param Channel : TIM Channels to configure |
| phungductung | 0:e87aa4c49e95 | 1636 | * This parameter can be one of the following values: |
| phungductung | 0:e87aa4c49e95 | 1637 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| phungductung | 0:e87aa4c49e95 | 1638 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| phungductung | 0:e87aa4c49e95 | 1639 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
| phungductung | 0:e87aa4c49e95 | 1640 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
| phungductung | 0:e87aa4c49e95 | 1641 | * @arg TIM_CHANNEL_5: TIM Channel 5 selected |
| phungductung | 0:e87aa4c49e95 | 1642 | * @arg TIM_CHANNEL_6: TIM Channel 6 selected |
| phungductung | 0:e87aa4c49e95 | 1643 | * @arg TIM_CHANNEL_ALL: all output channels supported by the timer instance selected |
| phungductung | 0:e87aa4c49e95 | 1644 | * @retval HAL status |
| phungductung | 0:e87aa4c49e95 | 1645 | */ |
| phungductung | 0:e87aa4c49e95 | 1646 | HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OC_InitTypeDef* sConfig, uint32_t Channel) |
| phungductung | 0:e87aa4c49e95 | 1647 | { |
| phungductung | 0:e87aa4c49e95 | 1648 | /* Check the parameters */ |
| phungductung | 0:e87aa4c49e95 | 1649 | assert_param(IS_TIM_CHANNELS(Channel)); |
| phungductung | 0:e87aa4c49e95 | 1650 | assert_param(IS_TIM_OC_MODE(sConfig->OCMode)); |
| phungductung | 0:e87aa4c49e95 | 1651 | assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity)); |
| phungductung | 0:e87aa4c49e95 | 1652 | |
| phungductung | 0:e87aa4c49e95 | 1653 | /* Check input state */ |
| phungductung | 0:e87aa4c49e95 | 1654 | __HAL_LOCK(htim); |
| phungductung | 0:e87aa4c49e95 | 1655 | |
| phungductung | 0:e87aa4c49e95 | 1656 | htim->State = HAL_TIM_STATE_BUSY; |
| phungductung | 0:e87aa4c49e95 | 1657 | |
| phungductung | 0:e87aa4c49e95 | 1658 | switch (Channel) |
| phungductung | 0:e87aa4c49e95 | 1659 | { |
| phungductung | 0:e87aa4c49e95 | 1660 | case TIM_CHANNEL_1: |
| phungductung | 0:e87aa4c49e95 | 1661 | { |
| phungductung | 0:e87aa4c49e95 | 1662 | /* Check the parameters */ |
| phungductung | 0:e87aa4c49e95 | 1663 | assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); |
| phungductung | 0:e87aa4c49e95 | 1664 | |
| phungductung | 0:e87aa4c49e95 | 1665 | /* Configure the TIM Channel 1 in Output Compare */ |
| phungductung | 0:e87aa4c49e95 | 1666 | TIM_OC1_SetConfig(htim->Instance, sConfig); |
| phungductung | 0:e87aa4c49e95 | 1667 | } |
| phungductung | 0:e87aa4c49e95 | 1668 | break; |
| phungductung | 0:e87aa4c49e95 | 1669 | |
| phungductung | 0:e87aa4c49e95 | 1670 | case TIM_CHANNEL_2: |
| phungductung | 0:e87aa4c49e95 | 1671 | { |
| phungductung | 0:e87aa4c49e95 | 1672 | /* Check the parameters */ |
| phungductung | 0:e87aa4c49e95 | 1673 | assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); |
| phungductung | 0:e87aa4c49e95 | 1674 | |
| phungductung | 0:e87aa4c49e95 | 1675 | /* Configure the TIM Channel 2 in Output Compare */ |
| phungductung | 0:e87aa4c49e95 | 1676 | TIM_OC2_SetConfig(htim->Instance, sConfig); |
| phungductung | 0:e87aa4c49e95 | 1677 | } |
| phungductung | 0:e87aa4c49e95 | 1678 | break; |
| phungductung | 0:e87aa4c49e95 | 1679 | |
| phungductung | 0:e87aa4c49e95 | 1680 | case TIM_CHANNEL_3: |
| phungductung | 0:e87aa4c49e95 | 1681 | { |
| phungductung | 0:e87aa4c49e95 | 1682 | /* Check the parameters */ |
| phungductung | 0:e87aa4c49e95 | 1683 | assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); |
| phungductung | 0:e87aa4c49e95 | 1684 | |
| phungductung | 0:e87aa4c49e95 | 1685 | /* Configure the TIM Channel 3 in Output Compare */ |
| phungductung | 0:e87aa4c49e95 | 1686 | TIM_OC3_SetConfig(htim->Instance, sConfig); |
| phungductung | 0:e87aa4c49e95 | 1687 | } |
| phungductung | 0:e87aa4c49e95 | 1688 | break; |
| phungductung | 0:e87aa4c49e95 | 1689 | |
| phungductung | 0:e87aa4c49e95 | 1690 | case TIM_CHANNEL_4: |
| phungductung | 0:e87aa4c49e95 | 1691 | { |
| phungductung | 0:e87aa4c49e95 | 1692 | /* Check the parameters */ |
| phungductung | 0:e87aa4c49e95 | 1693 | assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); |
| phungductung | 0:e87aa4c49e95 | 1694 | |
| phungductung | 0:e87aa4c49e95 | 1695 | /* Configure the TIM Channel 4 in Output Compare */ |
| phungductung | 0:e87aa4c49e95 | 1696 | TIM_OC4_SetConfig(htim->Instance, sConfig); |
| phungductung | 0:e87aa4c49e95 | 1697 | } |
| phungductung | 0:e87aa4c49e95 | 1698 | break; |
| phungductung | 0:e87aa4c49e95 | 1699 | |
| phungductung | 0:e87aa4c49e95 | 1700 | case TIM_CHANNEL_5: |
| phungductung | 0:e87aa4c49e95 | 1701 | { |
| phungductung | 0:e87aa4c49e95 | 1702 | /* Check the parameters */ |
| phungductung | 0:e87aa4c49e95 | 1703 | assert_param(IS_TIM_CC5_INSTANCE(htim->Instance)); |
| phungductung | 0:e87aa4c49e95 | 1704 | |
| phungductung | 0:e87aa4c49e95 | 1705 | /* Configure the TIM Channel 5 in Output Compare */ |
| phungductung | 0:e87aa4c49e95 | 1706 | TIM_OC5_SetConfig(htim->Instance, sConfig); |
| phungductung | 0:e87aa4c49e95 | 1707 | } |
| phungductung | 0:e87aa4c49e95 | 1708 | break; |
| phungductung | 0:e87aa4c49e95 | 1709 | |
| phungductung | 0:e87aa4c49e95 | 1710 | case TIM_CHANNEL_6: |
| phungductung | 0:e87aa4c49e95 | 1711 | { |
| phungductung | 0:e87aa4c49e95 | 1712 | /* Check the parameters */ |
| phungductung | 0:e87aa4c49e95 | 1713 | assert_param(IS_TIM_CC6_INSTANCE(htim->Instance)); |
| phungductung | 0:e87aa4c49e95 | 1714 | |
| phungductung | 0:e87aa4c49e95 | 1715 | /* Configure the TIM Channel 6 in Output Compare */ |
| phungductung | 0:e87aa4c49e95 | 1716 | TIM_OC6_SetConfig(htim->Instance, sConfig); |
| phungductung | 0:e87aa4c49e95 | 1717 | } |
| phungductung | 0:e87aa4c49e95 | 1718 | break; |
| phungductung | 0:e87aa4c49e95 | 1719 | |
| phungductung | 0:e87aa4c49e95 | 1720 | default: |
| phungductung | 0:e87aa4c49e95 | 1721 | break; |
| phungductung | 0:e87aa4c49e95 | 1722 | } |
| phungductung | 0:e87aa4c49e95 | 1723 | |
| phungductung | 0:e87aa4c49e95 | 1724 | htim->State = HAL_TIM_STATE_READY; |
| phungductung | 0:e87aa4c49e95 | 1725 | |
| phungductung | 0:e87aa4c49e95 | 1726 | __HAL_UNLOCK(htim); |
| phungductung | 0:e87aa4c49e95 | 1727 | |
| phungductung | 0:e87aa4c49e95 | 1728 | return HAL_OK; |
| phungductung | 0:e87aa4c49e95 | 1729 | } |
| phungductung | 0:e87aa4c49e95 | 1730 | |
| phungductung | 0:e87aa4c49e95 | 1731 | /** |
| phungductung | 0:e87aa4c49e95 | 1732 | * @brief Initializes the TIM PWM channels according to the specified |
| phungductung | 0:e87aa4c49e95 | 1733 | * parameters in the TIM_OC_InitTypeDef. |
| phungductung | 0:e87aa4c49e95 | 1734 | * @param htim: TIM PWM handle |
| phungductung | 0:e87aa4c49e95 | 1735 | * @param sConfig: TIM PWM configuration structure |
| phungductung | 0:e87aa4c49e95 | 1736 | * @param Channel : TIM Channels to be configured |
| phungductung | 0:e87aa4c49e95 | 1737 | * This parameter can be one of the following values: |
| phungductung | 0:e87aa4c49e95 | 1738 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
| phungductung | 0:e87aa4c49e95 | 1739 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
| phungductung | 0:e87aa4c49e95 | 1740 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
| phungductung | 0:e87aa4c49e95 | 1741 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
| phungductung | 0:e87aa4c49e95 | 1742 | * @arg TIM_CHANNEL_5: TIM Channel 5 selected |
| phungductung | 0:e87aa4c49e95 | 1743 | * @arg TIM_CHANNEL_6: TIM Channel 6 selected |
| phungductung | 0:e87aa4c49e95 | 1744 | * @arg TIM_CHANNEL_ALL: all PWM channels supported by the timer instance selected |
| phungductung | 0:e87aa4c49e95 | 1745 | * @retval HAL status |
| phungductung | 0:e87aa4c49e95 | 1746 | */ |
| phungductung | 0:e87aa4c49e95 | 1747 | HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim, |
| phungductung | 0:e87aa4c49e95 | 1748 | TIM_OC_InitTypeDef* sConfig, |
| phungductung | 0:e87aa4c49e95 | 1749 | uint32_t Channel) |
| phungductung | 0:e87aa4c49e95 | 1750 | { |
| phungductung | 0:e87aa4c49e95 | 1751 | /* Check the parameters */ |
| phungductung | 0:e87aa4c49e95 | 1752 | assert_param(IS_TIM_CHANNELS(Channel)); |
| phungductung | 0:e87aa4c49e95 | 1753 | assert_param(IS_TIM_PWM_MODE(sConfig->OCMode)); |
| phungductung | 0:e87aa4c49e95 | 1754 | assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity)); |
| phungductung | 0:e87aa4c49e95 | 1755 | assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode)); |
| phungductung | 0:e87aa4c49e95 | 1756 | |
| phungductung | 0:e87aa4c49e95 | 1757 | /* Check input state */ |
| phungductung | 0:e87aa4c49e95 | 1758 | __HAL_LOCK(htim); |
| phungductung | 0:e87aa4c49e95 | 1759 | |
| phungductung | 0:e87aa4c49e95 | 1760 | htim->State = HAL_TIM_STATE_BUSY; |
| phungductung | 0:e87aa4c49e95 | 1761 | |
| phungductung | 0:e87aa4c49e95 | 1762 | switch (Channel) |
| phungductung | 0:e87aa4c49e95 | 1763 | { |
| phungductung | 0:e87aa4c49e95 | 1764 | case TIM_CHANNEL_1: |
| phungductung | 0:e87aa4c49e95 | 1765 | { |
| phungductung | 0:e87aa4c49e95 | 1766 | /* Check the parameters */ |
| phungductung | 0:e87aa4c49e95 | 1767 | assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); |
| phungductung | 0:e87aa4c49e95 | 1768 | |
| phungductung | 0:e87aa4c49e95 | 1769 | /* Configure the Channel 1 in PWM mode */ |
| phungductung | 0:e87aa4c49e95 | 1770 | TIM_OC1_SetConfig(htim->Instance, sConfig); |
| phungductung | 0:e87aa4c49e95 | 1771 | |
| phungductung | 0:e87aa4c49e95 | 1772 | /* Set the Preload enable bit for channel1 */ |
| phungductung | 0:e87aa4c49e95 | 1773 | htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE; |
| phungductung | 0:e87aa4c49e95 | 1774 | |
| phungductung | 0:e87aa4c49e95 | 1775 | /* Configure the Output Fast mode */ |
| phungductung | 0:e87aa4c49e95 | 1776 | htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE; |
| phungductung | 0:e87aa4c49e95 | 1777 | htim->Instance->CCMR1 |= sConfig->OCFastMode; |
| phungductung | 0:e87aa4c49e95 | 1778 | } |
| phungductung | 0:e87aa4c49e95 | 1779 | break; |
| phungductung | 0:e87aa4c49e95 | 1780 | |
| phungductung | 0:e87aa4c49e95 | 1781 | case TIM_CHANNEL_2: |
| phungductung | 0:e87aa4c49e95 | 1782 | { |
| phungductung | 0:e87aa4c49e95 | 1783 | /* Check the parameters */ |
| phungductung | 0:e87aa4c49e95 | 1784 | assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); |
| phungductung | 0:e87aa4c49e95 | 1785 | |
| phungductung | 0:e87aa4c49e95 | 1786 | /* Configure the Channel 2 in PWM mode */ |
| phungductung | 0:e87aa4c49e95 | 1787 | TIM_OC2_SetConfig(htim->Instance, sConfig); |
| phungductung | 0:e87aa4c49e95 | 1788 | |
| phungductung | 0:e87aa4c49e95 | 1789 | /* Set the Preload enable bit for channel2 */ |
| phungductung | 0:e87aa4c49e95 | 1790 | htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE; |
| phungductung | 0:e87aa4c49e95 | 1791 | |
| phungductung | 0:e87aa4c49e95 | 1792 | /* Configure the Output Fast mode */ |
| phungductung | 0:e87aa4c49e95 | 1793 | htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE; |
| phungductung | 0:e87aa4c49e95 | 1794 | htim->Instance->CCMR1 |= sConfig->OCFastMode << 8; |
| phungductung | 0:e87aa4c49e95 | 1795 | } |
| phungductung | 0:e87aa4c49e95 | 1796 | break; |
| phungductung | 0:e87aa4c49e95 | 1797 | |
| phungductung | 0:e87aa4c49e95 | 1798 | case TIM_CHANNEL_3: |
| phungductung | 0:e87aa4c49e95 | 1799 | { |
| phungductung | 0:e87aa4c49e95 | 1800 | /* Check the parameters */ |
| phungductung | 0:e87aa4c49e95 | 1801 | assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); |
| phungductung | 0:e87aa4c49e95 | 1802 | |
| phungductung | 0:e87aa4c49e95 | 1803 | /* Configure the Channel 3 in PWM mode */ |
| phungductung | 0:e87aa4c49e95 | 1804 | TIM_OC3_SetConfig(htim->Instance, sConfig); |
| phungductung | 0:e87aa4c49e95 | 1805 | |
| phungductung | 0:e87aa4c49e95 | 1806 | /* Set the Preload enable bit for channel3 */ |
| phungductung | 0:e87aa4c49e95 | 1807 | htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE; |
| phungductung | 0:e87aa4c49e95 | 1808 | |
| phungductung | 0:e87aa4c49e95 | 1809 | /* Configure the Output Fast mode */ |
| phungductung | 0:e87aa4c49e95 | 1810 | htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE; |
| phungductung | 0:e87aa4c49e95 | 1811 | htim->Instance->CCMR2 |= sConfig->OCFastMode; |
| phungductung | 0:e87aa4c49e95 | 1812 | } |
| phungductung | 0:e87aa4c49e95 | 1813 | break; |
| phungductung | 0:e87aa4c49e95 | 1814 | |
| phungductung | 0:e87aa4c49e95 | 1815 | case TIM_CHANNEL_4: |
| phungductung | 0:e87aa4c49e95 | 1816 | { |
| phungductung | 0:e87aa4c49e95 | 1817 | /* Check the parameters */ |
| phungductung | 0:e87aa4c49e95 | 1818 | assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); |
| phungductung | 0:e87aa4c49e95 | 1819 | |
| phungductung | 0:e87aa4c49e95 | 1820 | /* Configure the Channel 4 in PWM mode */ |
| phungductung | 0:e87aa4c49e95 | 1821 | TIM_OC4_SetConfig(htim->Instance, sConfig); |
| phungductung | 0:e87aa4c49e95 | 1822 | |
| phungductung | 0:e87aa4c49e95 | 1823 | /* Set the Preload enable bit for channel4 */ |
| phungductung | 0:e87aa4c49e95 | 1824 | htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE; |
| phungductung | 0:e87aa4c49e95 | 1825 | |
| phungductung | 0:e87aa4c49e95 | 1826 | /* Configure the Output Fast mode */ |
| phungductung | 0:e87aa4c49e95 | 1827 | htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE; |
| phungductung | 0:e87aa4c49e95 | 1828 | htim->Instance->CCMR2 |= sConfig->OCFastMode << 8; |
| phungductung | 0:e87aa4c49e95 | 1829 | } |
| phungductung | 0:e87aa4c49e95 | 1830 | break; |
| phungductung | 0:e87aa4c49e95 | 1831 | |
| phungductung | 0:e87aa4c49e95 | 1832 | case TIM_CHANNEL_5: |
| phungductung | 0:e87aa4c49e95 | 1833 | { |
| phungductung | 0:e87aa4c49e95 | 1834 | /* Check the parameters */ |
| phungductung | 0:e87aa4c49e95 | 1835 | assert_param(IS_TIM_CC5_INSTANCE(htim->Instance)); |
| phungductung | 0:e87aa4c49e95 | 1836 | |
| phungductung | 0:e87aa4c49e95 | 1837 | /* Configure the Channel 5 in PWM mode */ |
| phungductung | 0:e87aa4c49e95 | 1838 | TIM_OC5_SetConfig(htim->Instance, sConfig); |
| phungductung | 0:e87aa4c49e95 | 1839 | |
| phungductung | 0:e87aa4c49e95 | 1840 | /* Set the Preload enable bit for channel5*/ |
| phungductung | 0:e87aa4c49e95 | 1841 | htim->Instance->CCMR3 |= TIM_CCMR3_OC5PE; |
| phungductung | 0:e87aa4c49e95 | 1842 | |
| phungductung | 0:e87aa4c49e95 | 1843 | /* Configure the Output Fast mode */ |
| phungductung | 0:e87aa4c49e95 | 1844 | htim->Instance->CCMR3 &= ~TIM_CCMR3_OC5FE; |
| phungductung | 0:e87aa4c49e95 | 1845 | htim->Instance->CCMR3 |= sConfig->OCFastMode; |
| phungductung | 0:e87aa4c49e95 | 1846 | } |
| phungductung | 0:e87aa4c49e95 | 1847 | break; |
| phungductung | 0:e87aa4c49e95 | 1848 | |
| phungductung | 0:e87aa4c49e95 | 1849 | case TIM_CHANNEL_6: |
| phungductung | 0:e87aa4c49e95 | 1850 | { |
| phungductung | 0:e87aa4c49e95 | 1851 | /* Check the parameters */ |
| phungductung | 0:e87aa4c49e95 | 1852 | assert_param(IS_TIM_CC6_INSTANCE(htim->Instance)); |
| phungductung | 0:e87aa4c49e95 | 1853 | |
| phungductung | 0:e87aa4c49e95 | 1854 | /* Configure the Channel 5 in PWM mode */ |
| phungductung | 0:e87aa4c49e95 | 1855 | TIM_OC6_SetConfig(htim->Instance, sConfig); |
| phungductung | 0:e87aa4c49e95 | 1856 | |
| phungductung | 0:e87aa4c49e95 | 1857 | /* Set the Preload enable bit for channel6 */ |
| phungductung | 0:e87aa4c49e95 | 1858 | htim->Instance->CCMR3 |= TIM_CCMR3_OC6PE; |
| phungductung | 0:e87aa4c49e95 | 1859 | |
| phungductung | 0:e87aa4c49e95 | 1860 | /* Configure the Output Fast mode */ |
| phungductung | 0:e87aa4c49e95 | 1861 | htim->Instance->CCMR3 &= ~TIM_CCMR3_OC6FE; |
| phungductung | 0:e87aa4c49e95 | 1862 | htim->Instance->CCMR3 |= sConfig->OCFastMode << 8; |
| phungductung | 0:e87aa4c49e95 | 1863 | } |
| phungductung | 0:e87aa4c49e95 | 1864 | break; |
| phungductung | 0:e87aa4c49e95 | 1865 | |
| phungductung | 0:e87aa4c49e95 | 1866 | default: |
| phungductung | 0:e87aa4c49e95 | 1867 | break; |
| phungductung | 0:e87aa4c49e95 | 1868 | } |
| phungductung | 0:e87aa4c49e95 | 1869 | |
| phungductung | 0:e87aa4c49e95 | 1870 | htim->State = HAL_TIM_STATE_READY; |
| phungductung | 0:e87aa4c49e95 | 1871 | |
| phungductung | 0:e87aa4c49e95 | 1872 | __HAL_UNLOCK(htim); |
| phungductung | 0:e87aa4c49e95 | 1873 | |
| phungductung | 0:e87aa4c49e95 | 1874 | return HAL_OK; |
| phungductung | 0:e87aa4c49e95 | 1875 | } |
| phungductung | 0:e87aa4c49e95 | 1876 | |
| phungductung | 0:e87aa4c49e95 | 1877 | /** |
| phungductung | 0:e87aa4c49e95 | 1878 | * @brief Configures the OCRef clear feature |
| phungductung | 0:e87aa4c49e95 | 1879 | * @param htim: TIM handle |
| phungductung | 0:e87aa4c49e95 | 1880 | * @param sClearInputConfig: pointer to a TIM_ClearInputConfigTypeDef structure that |
| phungductung | 0:e87aa4c49e95 | 1881 | * contains the OCREF clear feature and parameters for the TIM peripheral. |
| phungductung | 0:e87aa4c49e95 | 1882 | * @param Channel: specifies the TIM Channel |
| phungductung | 0:e87aa4c49e95 | 1883 | * This parameter can be one of the following values: |
| phungductung | 0:e87aa4c49e95 | 1884 | * @arg TIM_Channel_1: TIM Channel 1 |
| phungductung | 0:e87aa4c49e95 | 1885 | * @arg TIM_Channel_2: TIM Channel 2 |
| phungductung | 0:e87aa4c49e95 | 1886 | * @arg TIM_Channel_3: TIM Channel 3 |
| phungductung | 0:e87aa4c49e95 | 1887 | * @arg TIM_Channel_4: TIM Channel 4 |
| phungductung | 0:e87aa4c49e95 | 1888 | * @arg TIM_Channel_5: TIM Channel 5 |
| phungductung | 0:e87aa4c49e95 | 1889 | * @arg TIM_Channel_6: TIM Channel 6 |
| phungductung | 0:e87aa4c49e95 | 1890 | * @retval None |
| phungductung | 0:e87aa4c49e95 | 1891 | */ |
| phungductung | 0:e87aa4c49e95 | 1892 | HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef *htim, |
| phungductung | 0:e87aa4c49e95 | 1893 | TIM_ClearInputConfigTypeDef *sClearInputConfig, |
| phungductung | 0:e87aa4c49e95 | 1894 | uint32_t Channel) |
| phungductung | 0:e87aa4c49e95 | 1895 | { |
| phungductung | 0:e87aa4c49e95 | 1896 | uint32_t tmpsmcr = 0; |
| phungductung | 0:e87aa4c49e95 | 1897 | |
| phungductung | 0:e87aa4c49e95 | 1898 | /* Check the parameters */ |
| phungductung | 0:e87aa4c49e95 | 1899 | assert_param(IS_TIM_OCXREF_CLEAR_INSTANCE(htim->Instance)); |
| phungductung | 0:e87aa4c49e95 | 1900 | assert_param(IS_TIM_CLEARINPUT_SOURCE(sClearInputConfig->ClearInputSource)); |
| phungductung | 0:e87aa4c49e95 | 1901 | |
| phungductung | 0:e87aa4c49e95 | 1902 | /* Check input state */ |
| phungductung | 0:e87aa4c49e95 | 1903 | __HAL_LOCK(htim); |
| phungductung | 0:e87aa4c49e95 | 1904 | |
| phungductung | 0:e87aa4c49e95 | 1905 | switch (sClearInputConfig->ClearInputSource) |
| phungductung | 0:e87aa4c49e95 | 1906 | { |
| phungductung | 0:e87aa4c49e95 | 1907 | case TIM_CLEARINPUTSOURCE_NONE: |
| phungductung | 0:e87aa4c49e95 | 1908 | { |
| phungductung | 0:e87aa4c49e95 | 1909 | /* Clear the OCREF clear selection bit */ |
| phungductung | 0:e87aa4c49e95 | 1910 | tmpsmcr &= ~TIM_SMCR_OCCS; |
| phungductung | 0:e87aa4c49e95 | 1911 | |
| phungductung | 0:e87aa4c49e95 | 1912 | /* Clear the ETR Bits */ |
| phungductung | 0:e87aa4c49e95 | 1913 | tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); |
| phungductung | 0:e87aa4c49e95 | 1914 | |
| phungductung | 0:e87aa4c49e95 | 1915 | /* Set TIMx_SMCR */ |
| phungductung | 0:e87aa4c49e95 | 1916 | htim->Instance->SMCR = tmpsmcr; |
| phungductung | 0:e87aa4c49e95 | 1917 | } |
| phungductung | 0:e87aa4c49e95 | 1918 | break; |
| phungductung | 0:e87aa4c49e95 | 1919 | |
| phungductung | 0:e87aa4c49e95 | 1920 | case TIM_CLEARINPUTSOURCE_OCREFCLR: |
| phungductung | 0:e87aa4c49e95 | 1921 | { |
| phungductung | 0:e87aa4c49e95 | 1922 | /* Clear the OCREF clear selection bit */ |
| phungductung | 0:e87aa4c49e95 | 1923 | htim->Instance->SMCR &= ~TIM_SMCR_OCCS; |
| phungductung | 0:e87aa4c49e95 | 1924 | } |
| phungductung | 0:e87aa4c49e95 | 1925 | break; |
| phungductung | 0:e87aa4c49e95 | 1926 | |
| phungductung | 0:e87aa4c49e95 | 1927 | case TIM_CLEARINPUTSOURCE_ETR: |
| phungductung | 0:e87aa4c49e95 | 1928 | { |
| phungductung | 0:e87aa4c49e95 | 1929 | /* Check the parameters */ |
| phungductung | 0:e87aa4c49e95 | 1930 | assert_param(IS_TIM_CLEARINPUT_POLARITY(sClearInputConfig->ClearInputPolarity)); |
| phungductung | 0:e87aa4c49e95 | 1931 | assert_param(IS_TIM_CLEARINPUT_PRESCALER(sClearInputConfig->ClearInputPrescaler)); |
| phungductung | 0:e87aa4c49e95 | 1932 | assert_param(IS_TIM_CLEARINPUT_FILTER(sClearInputConfig->ClearInputFilter)); |
| phungductung | 0:e87aa4c49e95 | 1933 | |
| phungductung | 0:e87aa4c49e95 | 1934 | TIM_ETR_SetConfig(htim->Instance, |
| phungductung | 0:e87aa4c49e95 | 1935 | sClearInputConfig->ClearInputPrescaler, |
| phungductung | 0:e87aa4c49e95 | 1936 | sClearInputConfig->ClearInputPolarity, |
| phungductung | 0:e87aa4c49e95 | 1937 | sClearInputConfig->ClearInputFilter); |
| phungductung | 0:e87aa4c49e95 | 1938 | |
| phungductung | 0:e87aa4c49e95 | 1939 | /* Set the OCREF clear selection bit */ |
| phungductung | 0:e87aa4c49e95 | 1940 | htim->Instance->SMCR |= TIM_SMCR_OCCS; |
| phungductung | 0:e87aa4c49e95 | 1941 | } |
| phungductung | 0:e87aa4c49e95 | 1942 | break; |
| phungductung | 0:e87aa4c49e95 | 1943 | default: |
| phungductung | 0:e87aa4c49e95 | 1944 | break; |
| phungductung | 0:e87aa4c49e95 | 1945 | } |
| phungductung | 0:e87aa4c49e95 | 1946 | |
| phungductung | 0:e87aa4c49e95 | 1947 | switch (Channel) |
| phungductung | 0:e87aa4c49e95 | 1948 | { |
| phungductung | 0:e87aa4c49e95 | 1949 | case TIM_CHANNEL_1: |
| phungductung | 0:e87aa4c49e95 | 1950 | { |
| phungductung | 0:e87aa4c49e95 | 1951 | if(sClearInputConfig->ClearInputState != RESET) |
| phungductung | 0:e87aa4c49e95 | 1952 | { |
| phungductung | 0:e87aa4c49e95 | 1953 | /* Enable the Ocref clear feature for Channel 1 */ |
| phungductung | 0:e87aa4c49e95 | 1954 | htim->Instance->CCMR1 |= TIM_CCMR1_OC1CE; |
| phungductung | 0:e87aa4c49e95 | 1955 | } |
| phungductung | 0:e87aa4c49e95 | 1956 | else |
| phungductung | 0:e87aa4c49e95 | 1957 | { |
| phungductung | 0:e87aa4c49e95 | 1958 | /* Disable the Ocref clear feature for Channel 1 */ |
| phungductung | 0:e87aa4c49e95 | 1959 | htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1CE; |
| phungductung | 0:e87aa4c49e95 | 1960 | } |
| phungductung | 0:e87aa4c49e95 | 1961 | } |
| phungductung | 0:e87aa4c49e95 | 1962 | break; |
| phungductung | 0:e87aa4c49e95 | 1963 | case TIM_CHANNEL_2: |
| phungductung | 0:e87aa4c49e95 | 1964 | { |
| phungductung | 0:e87aa4c49e95 | 1965 | if(sClearInputConfig->ClearInputState != RESET) |
| phungductung | 0:e87aa4c49e95 | 1966 | { |
| phungductung | 0:e87aa4c49e95 | 1967 | /* Enable the Ocref clear feature for Channel 2 */ |
| phungductung | 0:e87aa4c49e95 | 1968 | htim->Instance->CCMR1 |= TIM_CCMR1_OC2CE; |
| phungductung | 0:e87aa4c49e95 | 1969 | } |
| phungductung | 0:e87aa4c49e95 | 1970 | else |
| phungductung | 0:e87aa4c49e95 | 1971 | { |
| phungductung | 0:e87aa4c49e95 | 1972 | /* Disable the Ocref clear feature for Channel 2 */ |
| phungductung | 0:e87aa4c49e95 | 1973 | htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2CE; |
| phungductung | 0:e87aa4c49e95 | 1974 | } |
| phungductung | 0:e87aa4c49e95 | 1975 | } |
| phungductung | 0:e87aa4c49e95 | 1976 | break; |
| phungductung | 0:e87aa4c49e95 | 1977 | case TIM_CHANNEL_3: |
| phungductung | 0:e87aa4c49e95 | 1978 | { |
| phungductung | 0:e87aa4c49e95 | 1979 | if(sClearInputConfig->ClearInputState != RESET) |
| phungductung | 0:e87aa4c49e95 | 1980 | { |
| phungductung | 0:e87aa4c49e95 | 1981 | /* Enable the Ocref clear feature for Channel 3 */ |
| phungductung | 0:e87aa4c49e95 | 1982 | htim->Instance->CCMR2 |= TIM_CCMR2_OC3CE; |
| phungductung | 0:e87aa4c49e95 | 1983 | } |
| phungductung | 0:e87aa4c49e95 | 1984 | else |
| phungductung | 0:e87aa4c49e95 | 1985 | { |
| phungductung | 0:e87aa4c49e95 | 1986 | /* Disable the Ocref clear feature for Channel 3 */ |
| phungductung | 0:e87aa4c49e95 | 1987 | htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3CE; |
| phungductung | 0:e87aa4c49e95 | 1988 | } |
| phungductung | 0:e87aa4c49e95 | 1989 | } |
| phungductung | 0:e87aa4c49e95 | 1990 | break; |
| phungductung | 0:e87aa4c49e95 | 1991 | case TIM_CHANNEL_4: |
| phungductung | 0:e87aa4c49e95 | 1992 | { |
| phungductung | 0:e87aa4c49e95 | 1993 | if(sClearInputConfig->ClearInputState != RESET) |
| phungductung | 0:e87aa4c49e95 | 1994 | { |
| phungductung | 0:e87aa4c49e95 | 1995 | /* Enable the Ocref clear feature for Channel 4 */ |
| phungductung | 0:e87aa4c49e95 | 1996 | htim->Instance->CCMR2 |= TIM_CCMR2_OC4CE; |
| phungductung | 0:e87aa4c49e95 | 1997 | } |
| phungductung | 0:e87aa4c49e95 | 1998 | else |
| phungductung | 0:e87aa4c49e95 | 1999 | { |
| phungductung | 0:e87aa4c49e95 | 2000 | /* Disable the Ocref clear feature for Channel 4 */ |
| phungductung | 0:e87aa4c49e95 | 2001 | htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4CE; |
| phungductung | 0:e87aa4c49e95 | 2002 | } |
| phungductung | 0:e87aa4c49e95 | 2003 | } |
| phungductung | 0:e87aa4c49e95 | 2004 | break; |
| phungductung | 0:e87aa4c49e95 | 2005 | case TIM_CHANNEL_5: |
| phungductung | 0:e87aa4c49e95 | 2006 | { |
| phungductung | 0:e87aa4c49e95 | 2007 | if(sClearInputConfig->ClearInputState != RESET) |
| phungductung | 0:e87aa4c49e95 | 2008 | { |
| phungductung | 0:e87aa4c49e95 | 2009 | /* Enable the Ocref clear feature for Channel 1 */ |
| phungductung | 0:e87aa4c49e95 | 2010 | htim->Instance->CCMR3 |= TIM_CCMR3_OC5CE; |
| phungductung | 0:e87aa4c49e95 | 2011 | } |
| phungductung | 0:e87aa4c49e95 | 2012 | else |
| phungductung | 0:e87aa4c49e95 | 2013 | { |
| phungductung | 0:e87aa4c49e95 | 2014 | /* Disable the Ocref clear feature for Channel 1 */ |
| phungductung | 0:e87aa4c49e95 | 2015 | htim->Instance->CCMR3 &= ~TIM_CCMR3_OC5CE; |
| phungductung | 0:e87aa4c49e95 | 2016 | } |
| phungductung | 0:e87aa4c49e95 | 2017 | } |
| phungductung | 0:e87aa4c49e95 | 2018 | break; |
| phungductung | 0:e87aa4c49e95 | 2019 | case TIM_CHANNEL_6: |
| phungductung | 0:e87aa4c49e95 | 2020 | { |
| phungductung | 0:e87aa4c49e95 | 2021 | if(sClearInputConfig->ClearInputState != RESET) |
| phungductung | 0:e87aa4c49e95 | 2022 | { |
| phungductung | 0:e87aa4c49e95 | 2023 | /* Enable the Ocref clear feature for Channel 1 */ |
| phungductung | 0:e87aa4c49e95 | 2024 | htim->Instance->CCMR3 |= TIM_CCMR3_OC6CE; |
| phungductung | 0:e87aa4c49e95 | 2025 | } |
| phungductung | 0:e87aa4c49e95 | 2026 | else |
| phungductung | 0:e87aa4c49e95 | 2027 | { |
| phungductung | 0:e87aa4c49e95 | 2028 | /* Disable the Ocref clear feature for Channel 1 */ |
| phungductung | 0:e87aa4c49e95 | 2029 | htim->Instance->CCMR3 &= ~TIM_CCMR3_OC6CE; |
| phungductung | 0:e87aa4c49e95 | 2030 | } |
| phungductung | 0:e87aa4c49e95 | 2031 | } |
| phungductung | 0:e87aa4c49e95 | 2032 | break; |
| phungductung | 0:e87aa4c49e95 | 2033 | default: |
| phungductung | 0:e87aa4c49e95 | 2034 | break; |
| phungductung | 0:e87aa4c49e95 | 2035 | } |
| phungductung | 0:e87aa4c49e95 | 2036 | |
| phungductung | 0:e87aa4c49e95 | 2037 | __HAL_UNLOCK(htim); |
| phungductung | 0:e87aa4c49e95 | 2038 | |
| phungductung | 0:e87aa4c49e95 | 2039 | return HAL_OK; |
| phungductung | 0:e87aa4c49e95 | 2040 | } |
| phungductung | 0:e87aa4c49e95 | 2041 | |
| phungductung | 0:e87aa4c49e95 | 2042 | /** |
| phungductung | 0:e87aa4c49e95 | 2043 | * @brief Configures the TIM in master mode. |
| phungductung | 0:e87aa4c49e95 | 2044 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
| phungductung | 0:e87aa4c49e95 | 2045 | * the configuration information for TIM module. |
| phungductung | 0:e87aa4c49e95 | 2046 | * @param sMasterConfig: pointer to a TIM_MasterConfigTypeDef structure that |
| phungductung | 0:e87aa4c49e95 | 2047 | * contains the selected trigger output (TRGO) and the Master/Slave |
| phungductung | 0:e87aa4c49e95 | 2048 | * mode. |
| phungductung | 0:e87aa4c49e95 | 2049 | * @retval HAL status |
| phungductung | 0:e87aa4c49e95 | 2050 | */ |
| phungductung | 0:e87aa4c49e95 | 2051 | HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef * sMasterConfig) |
| phungductung | 0:e87aa4c49e95 | 2052 | { |
| phungductung | 0:e87aa4c49e95 | 2053 | uint32_t tmpcr2; |
| phungductung | 0:e87aa4c49e95 | 2054 | uint32_t tmpsmcr; |
| phungductung | 0:e87aa4c49e95 | 2055 | |
| phungductung | 0:e87aa4c49e95 | 2056 | /* Check the parameters */ |
| phungductung | 0:e87aa4c49e95 | 2057 | assert_param(IS_TIM_SYNCHRO_INSTANCE(htim->Instance)); |
| phungductung | 0:e87aa4c49e95 | 2058 | assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); |
| phungductung | 0:e87aa4c49e95 | 2059 | assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); |
| phungductung | 0:e87aa4c49e95 | 2060 | |
| phungductung | 0:e87aa4c49e95 | 2061 | /* Check input state */ |
| phungductung | 0:e87aa4c49e95 | 2062 | __HAL_LOCK(htim); |
| phungductung | 0:e87aa4c49e95 | 2063 | |
| phungductung | 0:e87aa4c49e95 | 2064 | /* Get the TIMx CR2 register value */ |
| phungductung | 0:e87aa4c49e95 | 2065 | tmpcr2 = htim->Instance->CR2; |
| phungductung | 0:e87aa4c49e95 | 2066 | |
| phungductung | 0:e87aa4c49e95 | 2067 | /* Get the TIMx SMCR register value */ |
| phungductung | 0:e87aa4c49e95 | 2068 | tmpsmcr = htim->Instance->SMCR; |
| phungductung | 0:e87aa4c49e95 | 2069 | |
| phungductung | 0:e87aa4c49e95 | 2070 | /* If the timer supports ADC synchronization through TRGO2, set the master mode selection 2 */ |
| phungductung | 0:e87aa4c49e95 | 2071 | if (IS_TIM_TRGO2_INSTANCE(htim->Instance)) |
| phungductung | 0:e87aa4c49e95 | 2072 | { |
| phungductung | 0:e87aa4c49e95 | 2073 | /* Check the parameters */ |
| phungductung | 0:e87aa4c49e95 | 2074 | assert_param(IS_TIM_TRGO2_SOURCE(sMasterConfig->MasterOutputTrigger2)); |
| phungductung | 0:e87aa4c49e95 | 2075 | |
| phungductung | 0:e87aa4c49e95 | 2076 | /* Clear the MMS2 bits */ |
| phungductung | 0:e87aa4c49e95 | 2077 | tmpcr2 &= ~TIM_CR2_MMS2; |
| phungductung | 0:e87aa4c49e95 | 2078 | /* Select the TRGO2 source*/ |
| phungductung | 0:e87aa4c49e95 | 2079 | tmpcr2 |= sMasterConfig->MasterOutputTrigger2; |
| phungductung | 0:e87aa4c49e95 | 2080 | } |
| phungductung | 0:e87aa4c49e95 | 2081 | |
| phungductung | 0:e87aa4c49e95 | 2082 | /* Reset the MMS Bits */ |
| phungductung | 0:e87aa4c49e95 | 2083 | tmpcr2 &= ~TIM_CR2_MMS; |
| phungductung | 0:e87aa4c49e95 | 2084 | /* Select the TRGO source */ |
| phungductung | 0:e87aa4c49e95 | 2085 | tmpcr2 |= sMasterConfig->MasterOutputTrigger; |
| phungductung | 0:e87aa4c49e95 | 2086 | |
| phungductung | 0:e87aa4c49e95 | 2087 | /* Reset the MSM Bit */ |
| phungductung | 0:e87aa4c49e95 | 2088 | tmpsmcr &= ~TIM_SMCR_MSM; |
| phungductung | 0:e87aa4c49e95 | 2089 | /* Set master mode */ |
| phungductung | 0:e87aa4c49e95 | 2090 | tmpsmcr |= sMasterConfig->MasterSlaveMode; |
| phungductung | 0:e87aa4c49e95 | 2091 | |
| phungductung | 0:e87aa4c49e95 | 2092 | /* Update TIMx CR2 */ |
| phungductung | 0:e87aa4c49e95 | 2093 | htim->Instance->CR2 = tmpcr2; |
| phungductung | 0:e87aa4c49e95 | 2094 | |
| phungductung | 0:e87aa4c49e95 | 2095 | /* Update TIMx SMCR */ |
| phungductung | 0:e87aa4c49e95 | 2096 | htim->Instance->SMCR = tmpsmcr; |
| phungductung | 0:e87aa4c49e95 | 2097 | |
| phungductung | 0:e87aa4c49e95 | 2098 | __HAL_UNLOCK(htim); |
| phungductung | 0:e87aa4c49e95 | 2099 | |
| phungductung | 0:e87aa4c49e95 | 2100 | return HAL_OK; |
| phungductung | 0:e87aa4c49e95 | 2101 | } |
| phungductung | 0:e87aa4c49e95 | 2102 | |
| phungductung | 0:e87aa4c49e95 | 2103 | /** |
| phungductung | 0:e87aa4c49e95 | 2104 | * @brief Configures the Break feature, dead time, Lock level, OSSI/OSSR State |
| phungductung | 0:e87aa4c49e95 | 2105 | * and the AOE(automatic output enable). |
| phungductung | 0:e87aa4c49e95 | 2106 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
| phungductung | 0:e87aa4c49e95 | 2107 | * the configuration information for TIM module. |
| phungductung | 0:e87aa4c49e95 | 2108 | * @param sBreakDeadTimeConfig: pointer to a TIM_ConfigBreakDeadConfig_TypeDef structure that |
| phungductung | 0:e87aa4c49e95 | 2109 | * contains the BDTR Register configuration information for the TIM peripheral. |
| phungductung | 0:e87aa4c49e95 | 2110 | * @retval HAL status |
| phungductung | 0:e87aa4c49e95 | 2111 | */ |
| phungductung | 0:e87aa4c49e95 | 2112 | HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, |
| phungductung | 0:e87aa4c49e95 | 2113 | TIM_BreakDeadTimeConfigTypeDef * sBreakDeadTimeConfig) |
| phungductung | 0:e87aa4c49e95 | 2114 | { |
| phungductung | 0:e87aa4c49e95 | 2115 | uint32_t tmpbdtr = 0; |
| phungductung | 0:e87aa4c49e95 | 2116 | |
| phungductung | 0:e87aa4c49e95 | 2117 | /* Check the parameters */ |
| phungductung | 0:e87aa4c49e95 | 2118 | assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance)); |
| phungductung | 0:e87aa4c49e95 | 2119 | assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode)); |
| phungductung | 0:e87aa4c49e95 | 2120 | assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode)); |
| phungductung | 0:e87aa4c49e95 | 2121 | assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel)); |
| phungductung | 0:e87aa4c49e95 | 2122 | assert_param(IS_TIM_DEADTIME(sBreakDeadTimeConfig->DeadTime)); |
| phungductung | 0:e87aa4c49e95 | 2123 | assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState)); |
| phungductung | 0:e87aa4c49e95 | 2124 | assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity)); |
| phungductung | 0:e87aa4c49e95 | 2125 | assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->BreakFilter)); |
| phungductung | 0:e87aa4c49e95 | 2126 | assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput)); |
| phungductung | 0:e87aa4c49e95 | 2127 | assert_param(IS_TIM_BREAK2_STATE(sBreakDeadTimeConfig->Break2State)); |
| phungductung | 0:e87aa4c49e95 | 2128 | assert_param(IS_TIM_BREAK2_POLARITY(sBreakDeadTimeConfig->Break2Polarity)); |
| phungductung | 0:e87aa4c49e95 | 2129 | assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->Break2Filter)); |
| phungductung | 0:e87aa4c49e95 | 2130 | |
| phungductung | 0:e87aa4c49e95 | 2131 | /* Check input state */ |
| phungductung | 0:e87aa4c49e95 | 2132 | __HAL_LOCK(htim); |
| phungductung | 0:e87aa4c49e95 | 2133 | |
| phungductung | 0:e87aa4c49e95 | 2134 | htim->State = HAL_TIM_STATE_BUSY; |
| phungductung | 0:e87aa4c49e95 | 2135 | |
| phungductung | 0:e87aa4c49e95 | 2136 | /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State, |
| phungductung | 0:e87aa4c49e95 | 2137 | the OSSI State, the dead time value and the Automatic Output Enable Bit */ |
| phungductung | 0:e87aa4c49e95 | 2138 | |
| phungductung | 0:e87aa4c49e95 | 2139 | /* Clear the BDTR bits */ |
| phungductung | 0:e87aa4c49e95 | 2140 | tmpbdtr &= ~(TIM_BDTR_DTG | TIM_BDTR_LOCK | TIM_BDTR_OSSI | |
| phungductung | 0:e87aa4c49e95 | 2141 | TIM_BDTR_OSSR | TIM_BDTR_BKE | TIM_BDTR_BKP | |
| phungductung | 0:e87aa4c49e95 | 2142 | TIM_BDTR_AOE | TIM_BDTR_MOE | TIM_BDTR_BKF | |
| phungductung | 0:e87aa4c49e95 | 2143 | TIM_BDTR_BK2F | TIM_BDTR_BK2E | TIM_BDTR_BK2P); |
| phungductung | 0:e87aa4c49e95 | 2144 | |
| phungductung | 0:e87aa4c49e95 | 2145 | /* Set the BDTR bits */ |
| phungductung | 0:e87aa4c49e95 | 2146 | tmpbdtr |= sBreakDeadTimeConfig->DeadTime; |
| phungductung | 0:e87aa4c49e95 | 2147 | tmpbdtr |= sBreakDeadTimeConfig->LockLevel; |
| phungductung | 0:e87aa4c49e95 | 2148 | tmpbdtr |= sBreakDeadTimeConfig->OffStateIDLEMode; |
| phungductung | 0:e87aa4c49e95 | 2149 | tmpbdtr |= sBreakDeadTimeConfig->OffStateRunMode; |
| phungductung | 0:e87aa4c49e95 | 2150 | tmpbdtr |= sBreakDeadTimeConfig->BreakState; |
| phungductung | 0:e87aa4c49e95 | 2151 | tmpbdtr |= sBreakDeadTimeConfig->BreakPolarity; |
| phungductung | 0:e87aa4c49e95 | 2152 | tmpbdtr |= sBreakDeadTimeConfig->AutomaticOutput; |
| phungductung | 0:e87aa4c49e95 | 2153 | tmpbdtr |= (sBreakDeadTimeConfig->BreakFilter << BDTR_BKF_SHIFT); |
| phungductung | 0:e87aa4c49e95 | 2154 | tmpbdtr |= (sBreakDeadTimeConfig->Break2Filter << BDTR_BK2F_SHIFT); |
| phungductung | 0:e87aa4c49e95 | 2155 | tmpbdtr |= sBreakDeadTimeConfig->Break2State; |
| phungductung | 0:e87aa4c49e95 | 2156 | tmpbdtr |= sBreakDeadTimeConfig->Break2Polarity; |
| phungductung | 0:e87aa4c49e95 | 2157 | |
| phungductung | 0:e87aa4c49e95 | 2158 | /* Set TIMx_BDTR */ |
| phungductung | 0:e87aa4c49e95 | 2159 | htim->Instance->BDTR = tmpbdtr; |
| phungductung | 0:e87aa4c49e95 | 2160 | |
| phungductung | 0:e87aa4c49e95 | 2161 | __HAL_UNLOCK(htim); |
| phungductung | 0:e87aa4c49e95 | 2162 | |
| phungductung | 0:e87aa4c49e95 | 2163 | return HAL_OK; |
| phungductung | 0:e87aa4c49e95 | 2164 | } |
| phungductung | 0:e87aa4c49e95 | 2165 | |
| phungductung | 0:e87aa4c49e95 | 2166 | /** |
| phungductung | 0:e87aa4c49e95 | 2167 | * @brief Configures the TIM2, TIM5 and TIM11 Remapping input capabilities. |
| phungductung | 0:e87aa4c49e95 | 2168 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
| phungductung | 0:e87aa4c49e95 | 2169 | * the configuration information for TIM module. |
| phungductung | 0:e87aa4c49e95 | 2170 | * @param Remap: specifies the TIM input remapping source. |
| phungductung | 0:e87aa4c49e95 | 2171 | * This parameter can be one of the following values: |
| phungductung | 0:e87aa4c49e95 | 2172 | * @arg TIM_TIM2_TIM8_TRGO: TIM2 ITR1 input is connected to TIM8 Trigger output(default) |
| phungductung | 0:e87aa4c49e95 | 2173 | * @arg TIM_TIM2_ETH_PTP: TIM2 ITR1 input is connected to ETH PTP trigger output. |
| phungductung | 0:e87aa4c49e95 | 2174 | * @arg TIM_TIM2_USBFS_SOF: TIM2 ITR1 input is connected to USB FS SOF. |
| phungductung | 0:e87aa4c49e95 | 2175 | * @arg TIM_TIM2_USBHS_SOF: TIM2 ITR1 input is connected to USB HS SOF. |
| phungductung | 0:e87aa4c49e95 | 2176 | * @arg TIM_TIM5_GPIO: TIM5 CH4 input is connected to dedicated Timer pin(default) |
| phungductung | 0:e87aa4c49e95 | 2177 | * @arg TIM_TIM5_LSI: TIM5 CH4 input is connected to LSI clock. |
| phungductung | 0:e87aa4c49e95 | 2178 | * @arg TIM_TIM5_LSE: TIM5 CH4 input is connected to LSE clock. |
| phungductung | 0:e87aa4c49e95 | 2179 | * @arg TIM_TIM5_RTC: TIM5 CH4 input is connected to RTC Output event. |
| phungductung | 0:e87aa4c49e95 | 2180 | * @arg TIM_TIM11_GPIO: TIM11 CH4 input is connected to dedicated Timer pin(default) |
| phungductung | 0:e87aa4c49e95 | 2181 | * @arg TIM_TIM11_SPDIF: SPDIF Frame synchronous |
| phungductung | 0:e87aa4c49e95 | 2182 | * @arg TIM_TIM11_HSE: TIM11 CH4 input is connected to HSE_RTC clock |
| phungductung | 0:e87aa4c49e95 | 2183 | * (HSE divided by a programmable prescaler) |
| phungductung | 0:e87aa4c49e95 | 2184 | * @arg TIM_TIM11_MCO1: TIM11 CH1 input is connected to MCO1 |
| phungductung | 0:e87aa4c49e95 | 2185 | * @retval HAL status |
| phungductung | 0:e87aa4c49e95 | 2186 | */ |
| phungductung | 0:e87aa4c49e95 | 2187 | HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap) |
| phungductung | 0:e87aa4c49e95 | 2188 | { |
| phungductung | 0:e87aa4c49e95 | 2189 | __HAL_LOCK(htim); |
| phungductung | 0:e87aa4c49e95 | 2190 | |
| phungductung | 0:e87aa4c49e95 | 2191 | /* Check parameters */ |
| phungductung | 0:e87aa4c49e95 | 2192 | assert_param(IS_TIM_REMAP_INSTANCE(htim->Instance)); |
| phungductung | 0:e87aa4c49e95 | 2193 | assert_param(IS_TIM_REMAP(Remap)); |
| phungductung | 0:e87aa4c49e95 | 2194 | |
| phungductung | 0:e87aa4c49e95 | 2195 | /* Set the Timer remapping configuration */ |
| phungductung | 0:e87aa4c49e95 | 2196 | htim->Instance->OR = Remap; |
| phungductung | 0:e87aa4c49e95 | 2197 | |
| phungductung | 0:e87aa4c49e95 | 2198 | htim->State = HAL_TIM_STATE_READY; |
| phungductung | 0:e87aa4c49e95 | 2199 | |
| phungductung | 0:e87aa4c49e95 | 2200 | __HAL_UNLOCK(htim); |
| phungductung | 0:e87aa4c49e95 | 2201 | |
| phungductung | 0:e87aa4c49e95 | 2202 | return HAL_OK; |
| phungductung | 0:e87aa4c49e95 | 2203 | } |
| phungductung | 0:e87aa4c49e95 | 2204 | |
| phungductung | 0:e87aa4c49e95 | 2205 | /** |
| phungductung | 0:e87aa4c49e95 | 2206 | * @brief Group channel 5 and channel 1, 2 or 3 |
| phungductung | 0:e87aa4c49e95 | 2207 | * @param htim: TIM handle. |
| phungductung | 0:e87aa4c49e95 | 2208 | * @param OCRef: specifies the reference signal(s) the OC5REF is combined with. |
| phungductung | 0:e87aa4c49e95 | 2209 | * This parameter can be any combination of the following values: |
| phungductung | 0:e87aa4c49e95 | 2210 | * TIM_GROUPCH5_NONE: No effect of OC5REF on OC1REFC, OC2REFC and OC3REFC |
| phungductung | 0:e87aa4c49e95 | 2211 | * TIM_GROUPCH5_OC1REFC: OC1REFC is the logical AND of OC1REFC and OC5REF |
| phungductung | 0:e87aa4c49e95 | 2212 | * TIM_GROUPCH5_OC2REFC: OC2REFC is the logical AND of OC2REFC and OC5REF |
| phungductung | 0:e87aa4c49e95 | 2213 | * TIM_GROUPCH5_OC3REFC: OC3REFC is the logical AND of OC3REFC and OC5REF |
| phungductung | 0:e87aa4c49e95 | 2214 | * @retval HAL status |
| phungductung | 0:e87aa4c49e95 | 2215 | */ |
| phungductung | 0:e87aa4c49e95 | 2216 | HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t OCRef) |
| phungductung | 0:e87aa4c49e95 | 2217 | { |
| phungductung | 0:e87aa4c49e95 | 2218 | /* Check parameters */ |
| phungductung | 0:e87aa4c49e95 | 2219 | assert_param(IS_TIM_COMBINED3PHASEPWM_INSTANCE(htim->Instance)); |
| phungductung | 0:e87aa4c49e95 | 2220 | assert_param(IS_TIM_GROUPCH5(OCRef)); |
| phungductung | 0:e87aa4c49e95 | 2221 | |
| phungductung | 0:e87aa4c49e95 | 2222 | /* Process Locked */ |
| phungductung | 0:e87aa4c49e95 | 2223 | __HAL_LOCK(htim); |
| phungductung | 0:e87aa4c49e95 | 2224 | |
| phungductung | 0:e87aa4c49e95 | 2225 | htim->State = HAL_TIM_STATE_BUSY; |
| phungductung | 0:e87aa4c49e95 | 2226 | |
| phungductung | 0:e87aa4c49e95 | 2227 | /* Clear GC5Cx bit fields */ |
| phungductung | 0:e87aa4c49e95 | 2228 | htim->Instance->CCR5 &= ~(TIM_CCR5_GC5C3|TIM_CCR5_GC5C2|TIM_CCR5_GC5C1); |
| phungductung | 0:e87aa4c49e95 | 2229 | |
| phungductung | 0:e87aa4c49e95 | 2230 | /* Set GC5Cx bit fields */ |
| phungductung | 0:e87aa4c49e95 | 2231 | htim->Instance->CCR5 |= OCRef; |
| phungductung | 0:e87aa4c49e95 | 2232 | |
| phungductung | 0:e87aa4c49e95 | 2233 | htim->State = HAL_TIM_STATE_READY; |
| phungductung | 0:e87aa4c49e95 | 2234 | |
| phungductung | 0:e87aa4c49e95 | 2235 | __HAL_UNLOCK(htim); |
| phungductung | 0:e87aa4c49e95 | 2236 | |
| phungductung | 0:e87aa4c49e95 | 2237 | return HAL_OK; |
| phungductung | 0:e87aa4c49e95 | 2238 | } |
| phungductung | 0:e87aa4c49e95 | 2239 | |
| phungductung | 0:e87aa4c49e95 | 2240 | /** |
| phungductung | 0:e87aa4c49e95 | 2241 | * @} |
| phungductung | 0:e87aa4c49e95 | 2242 | */ |
| phungductung | 0:e87aa4c49e95 | 2243 | |
| phungductung | 0:e87aa4c49e95 | 2244 | /** @defgroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions |
| phungductung | 0:e87aa4c49e95 | 2245 | * @brief Extended Callbacks functions |
| phungductung | 0:e87aa4c49e95 | 2246 | * |
| phungductung | 0:e87aa4c49e95 | 2247 | @verbatim |
| phungductung | 0:e87aa4c49e95 | 2248 | ============================================================================== |
| phungductung | 0:e87aa4c49e95 | 2249 | ##### Extension Callbacks functions ##### |
| phungductung | 0:e87aa4c49e95 | 2250 | ============================================================================== |
| phungductung | 0:e87aa4c49e95 | 2251 | [..] |
| phungductung | 0:e87aa4c49e95 | 2252 | This section provides Extension TIM callback functions: |
| phungductung | 0:e87aa4c49e95 | 2253 | (+) Timer Commutation callback |
| phungductung | 0:e87aa4c49e95 | 2254 | (+) Timer Break callback |
| phungductung | 0:e87aa4c49e95 | 2255 | |
| phungductung | 0:e87aa4c49e95 | 2256 | @endverbatim |
| phungductung | 0:e87aa4c49e95 | 2257 | * @{ |
| phungductung | 0:e87aa4c49e95 | 2258 | */ |
| phungductung | 0:e87aa4c49e95 | 2259 | |
| phungductung | 0:e87aa4c49e95 | 2260 | /** |
| phungductung | 0:e87aa4c49e95 | 2261 | * @brief Hall commutation changed callback in non blocking mode |
| phungductung | 0:e87aa4c49e95 | 2262 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
| phungductung | 0:e87aa4c49e95 | 2263 | * the configuration information for TIM module. |
| phungductung | 0:e87aa4c49e95 | 2264 | * @retval None |
| phungductung | 0:e87aa4c49e95 | 2265 | */ |
| phungductung | 0:e87aa4c49e95 | 2266 | __weak void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef *htim) |
| phungductung | 0:e87aa4c49e95 | 2267 | { |
| phungductung | 0:e87aa4c49e95 | 2268 | /* Prevent unused argument(s) compilation warning */ |
| phungductung | 0:e87aa4c49e95 | 2269 | UNUSED(htim); |
| phungductung | 0:e87aa4c49e95 | 2270 | |
| phungductung | 0:e87aa4c49e95 | 2271 | /* NOTE : This function Should not be modified, when the callback is needed, |
| phungductung | 0:e87aa4c49e95 | 2272 | the HAL_TIMEx_CommutationCallback could be implemented in the user file |
| phungductung | 0:e87aa4c49e95 | 2273 | */ |
| phungductung | 0:e87aa4c49e95 | 2274 | } |
| phungductung | 0:e87aa4c49e95 | 2275 | |
| phungductung | 0:e87aa4c49e95 | 2276 | /** |
| phungductung | 0:e87aa4c49e95 | 2277 | * @brief Hall Break detection callback in non blocking mode |
| phungductung | 0:e87aa4c49e95 | 2278 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
| phungductung | 0:e87aa4c49e95 | 2279 | * the configuration information for TIM module. |
| phungductung | 0:e87aa4c49e95 | 2280 | * @retval None |
| phungductung | 0:e87aa4c49e95 | 2281 | */ |
| phungductung | 0:e87aa4c49e95 | 2282 | __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) |
| phungductung | 0:e87aa4c49e95 | 2283 | { |
| phungductung | 0:e87aa4c49e95 | 2284 | /* Prevent unused argument(s) compilation warning */ |
| phungductung | 0:e87aa4c49e95 | 2285 | UNUSED(htim); |
| phungductung | 0:e87aa4c49e95 | 2286 | |
| phungductung | 0:e87aa4c49e95 | 2287 | /* NOTE : This function Should not be modified, when the callback is needed, |
| phungductung | 0:e87aa4c49e95 | 2288 | the HAL_TIMEx_BreakCallback could be implemented in the user file |
| phungductung | 0:e87aa4c49e95 | 2289 | */ |
| phungductung | 0:e87aa4c49e95 | 2290 | } |
| phungductung | 0:e87aa4c49e95 | 2291 | |
| phungductung | 0:e87aa4c49e95 | 2292 | /** |
| phungductung | 0:e87aa4c49e95 | 2293 | * @} |
| phungductung | 0:e87aa4c49e95 | 2294 | */ |
| phungductung | 0:e87aa4c49e95 | 2295 | |
| phungductung | 0:e87aa4c49e95 | 2296 | /** @defgroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions |
| phungductung | 0:e87aa4c49e95 | 2297 | * @brief Extended Peripheral State functions |
| phungductung | 0:e87aa4c49e95 | 2298 | * |
| phungductung | 0:e87aa4c49e95 | 2299 | @verbatim |
| phungductung | 0:e87aa4c49e95 | 2300 | ============================================================================== |
| phungductung | 0:e87aa4c49e95 | 2301 | ##### Extension Peripheral State functions ##### |
| phungductung | 0:e87aa4c49e95 | 2302 | ============================================================================== |
| phungductung | 0:e87aa4c49e95 | 2303 | [..] |
| phungductung | 0:e87aa4c49e95 | 2304 | This subsection permits to get in run-time the status of the peripheral |
| phungductung | 0:e87aa4c49e95 | 2305 | and the data flow. |
| phungductung | 0:e87aa4c49e95 | 2306 | |
| phungductung | 0:e87aa4c49e95 | 2307 | @endverbatim |
| phungductung | 0:e87aa4c49e95 | 2308 | * @{ |
| phungductung | 0:e87aa4c49e95 | 2309 | */ |
| phungductung | 0:e87aa4c49e95 | 2310 | |
| phungductung | 0:e87aa4c49e95 | 2311 | /** |
| phungductung | 0:e87aa4c49e95 | 2312 | * @brief Return the TIM Hall Sensor interface state |
| phungductung | 0:e87aa4c49e95 | 2313 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
| phungductung | 0:e87aa4c49e95 | 2314 | * the configuration information for TIM module. |
| phungductung | 0:e87aa4c49e95 | 2315 | * @retval HAL state |
| phungductung | 0:e87aa4c49e95 | 2316 | */ |
| phungductung | 0:e87aa4c49e95 | 2317 | HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim) |
| phungductung | 0:e87aa4c49e95 | 2318 | { |
| phungductung | 0:e87aa4c49e95 | 2319 | return htim->State; |
| phungductung | 0:e87aa4c49e95 | 2320 | } |
| phungductung | 0:e87aa4c49e95 | 2321 | |
| phungductung | 0:e87aa4c49e95 | 2322 | /** |
| phungductung | 0:e87aa4c49e95 | 2323 | * @} |
| phungductung | 0:e87aa4c49e95 | 2324 | */ |
| phungductung | 0:e87aa4c49e95 | 2325 | |
| phungductung | 0:e87aa4c49e95 | 2326 | /** |
| phungductung | 0:e87aa4c49e95 | 2327 | * @brief TIM DMA Commutation callback. |
| phungductung | 0:e87aa4c49e95 | 2328 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
| phungductung | 0:e87aa4c49e95 | 2329 | * the configuration information for the specified DMA module. |
| phungductung | 0:e87aa4c49e95 | 2330 | * @retval None |
| phungductung | 0:e87aa4c49e95 | 2331 | */ |
| phungductung | 0:e87aa4c49e95 | 2332 | void HAL_TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma) |
| phungductung | 0:e87aa4c49e95 | 2333 | { |
| phungductung | 0:e87aa4c49e95 | 2334 | TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
| phungductung | 0:e87aa4c49e95 | 2335 | |
| phungductung | 0:e87aa4c49e95 | 2336 | htim->State= HAL_TIM_STATE_READY; |
| phungductung | 0:e87aa4c49e95 | 2337 | |
| phungductung | 0:e87aa4c49e95 | 2338 | HAL_TIMEx_CommutationCallback(htim); |
| phungductung | 0:e87aa4c49e95 | 2339 | } |
| phungductung | 0:e87aa4c49e95 | 2340 | |
| phungductung | 0:e87aa4c49e95 | 2341 | /** |
| phungductung | 0:e87aa4c49e95 | 2342 | * @brief Enables or disables the TIM Capture Compare Channel xN. |
| phungductung | 0:e87aa4c49e95 | 2343 | * @param TIMx to select the TIM peripheral |
| phungductung | 0:e87aa4c49e95 | 2344 | * @param Channel: specifies the TIM Channel |
| phungductung | 0:e87aa4c49e95 | 2345 | * This parameter can be one of the following values: |
| phungductung | 0:e87aa4c49e95 | 2346 | * @arg TIM_Channel_1: TIM Channel 1 |
| phungductung | 0:e87aa4c49e95 | 2347 | * @arg TIM_Channel_2: TIM Channel 2 |
| phungductung | 0:e87aa4c49e95 | 2348 | * @arg TIM_Channel_3: TIM Channel 3 |
| phungductung | 0:e87aa4c49e95 | 2349 | * @param ChannelNState: specifies the TIM Channel CCxNE bit new state. |
| phungductung | 0:e87aa4c49e95 | 2350 | * This parameter can be: TIM_CCxN_ENABLE or TIM_CCxN_Disable. |
| phungductung | 0:e87aa4c49e95 | 2351 | * @retval None |
| phungductung | 0:e87aa4c49e95 | 2352 | */ |
| phungductung | 0:e87aa4c49e95 | 2353 | static void TIM_CCxNChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelNState) |
| phungductung | 0:e87aa4c49e95 | 2354 | { |
| phungductung | 0:e87aa4c49e95 | 2355 | uint32_t tmp = 0; |
| phungductung | 0:e87aa4c49e95 | 2356 | |
| phungductung | 0:e87aa4c49e95 | 2357 | /* Check the parameters */ |
| phungductung | 0:e87aa4c49e95 | 2358 | assert_param(IS_TIM_ADVANCED_INSTANCE(TIMx)); |
| phungductung | 0:e87aa4c49e95 | 2359 | assert_param(IS_TIM_COMPLEMENTARY_CHANNELS(Channel)); |
| phungductung | 0:e87aa4c49e95 | 2360 | |
| phungductung | 0:e87aa4c49e95 | 2361 | tmp = TIM_CCER_CC1NE << Channel; |
| phungductung | 0:e87aa4c49e95 | 2362 | |
| phungductung | 0:e87aa4c49e95 | 2363 | /* Reset the CCxNE Bit */ |
| phungductung | 0:e87aa4c49e95 | 2364 | TIMx->CCER &= ~tmp; |
| phungductung | 0:e87aa4c49e95 | 2365 | |
| phungductung | 0:e87aa4c49e95 | 2366 | /* Set or reset the CCxNE Bit */ |
| phungductung | 0:e87aa4c49e95 | 2367 | TIMx->CCER |= (uint32_t)(ChannelNState << Channel); |
| phungductung | 0:e87aa4c49e95 | 2368 | } |
| phungductung | 0:e87aa4c49e95 | 2369 | |
| phungductung | 0:e87aa4c49e95 | 2370 | /** |
| phungductung | 0:e87aa4c49e95 | 2371 | * @brief Timer Output Compare 5 configuration |
| phungductung | 0:e87aa4c49e95 | 2372 | * @param TIMx to select the TIM peripheral |
| phungductung | 0:e87aa4c49e95 | 2373 | * @param OC_Config: The output configuration structure |
| phungductung | 0:e87aa4c49e95 | 2374 | * @retval None |
| phungductung | 0:e87aa4c49e95 | 2375 | */ |
| phungductung | 0:e87aa4c49e95 | 2376 | static void TIM_OC5_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config) |
| phungductung | 0:e87aa4c49e95 | 2377 | { |
| phungductung | 0:e87aa4c49e95 | 2378 | uint32_t tmpccmrx = 0; |
| phungductung | 0:e87aa4c49e95 | 2379 | uint32_t tmpccer = 0; |
| phungductung | 0:e87aa4c49e95 | 2380 | uint32_t tmpcr2 = 0; |
| phungductung | 0:e87aa4c49e95 | 2381 | |
| phungductung | 0:e87aa4c49e95 | 2382 | /* Disable the output: Reset the CCxE Bit */ |
| phungductung | 0:e87aa4c49e95 | 2383 | TIMx->CCER &= ~TIM_CCER_CC5E; |
| phungductung | 0:e87aa4c49e95 | 2384 | |
| phungductung | 0:e87aa4c49e95 | 2385 | /* Get the TIMx CCER register value */ |
| phungductung | 0:e87aa4c49e95 | 2386 | tmpccer = TIMx->CCER; |
| phungductung | 0:e87aa4c49e95 | 2387 | /* Get the TIMx CR2 register value */ |
| phungductung | 0:e87aa4c49e95 | 2388 | tmpcr2 = TIMx->CR2; |
| phungductung | 0:e87aa4c49e95 | 2389 | /* Get the TIMx CCMR1 register value */ |
| phungductung | 0:e87aa4c49e95 | 2390 | tmpccmrx = TIMx->CCMR3; |
| phungductung | 0:e87aa4c49e95 | 2391 | |
| phungductung | 0:e87aa4c49e95 | 2392 | /* Reset the Output Compare Mode Bits */ |
| phungductung | 0:e87aa4c49e95 | 2393 | tmpccmrx &= ~(TIM_CCMR3_OC5M); |
| phungductung | 0:e87aa4c49e95 | 2394 | /* Select the Output Compare Mode */ |
| phungductung | 0:e87aa4c49e95 | 2395 | tmpccmrx |= OC_Config->OCMode; |
| phungductung | 0:e87aa4c49e95 | 2396 | |
| phungductung | 0:e87aa4c49e95 | 2397 | /* Reset the Output Polarity level */ |
| phungductung | 0:e87aa4c49e95 | 2398 | tmpccer &= ~TIM_CCER_CC5P; |
| phungductung | 0:e87aa4c49e95 | 2399 | /* Set the Output Compare Polarity */ |
| phungductung | 0:e87aa4c49e95 | 2400 | tmpccer |= (OC_Config->OCPolarity << 16); |
| phungductung | 0:e87aa4c49e95 | 2401 | |
| phungductung | 0:e87aa4c49e95 | 2402 | if(IS_TIM_BREAK_INSTANCE(TIMx)) |
| phungductung | 0:e87aa4c49e95 | 2403 | { |
| phungductung | 0:e87aa4c49e95 | 2404 | /* Reset the Output Compare IDLE State */ |
| phungductung | 0:e87aa4c49e95 | 2405 | tmpcr2 &= ~TIM_CR2_OIS5; |
| phungductung | 0:e87aa4c49e95 | 2406 | /* Set the Output Idle state */ |
| phungductung | 0:e87aa4c49e95 | 2407 | tmpcr2 |= (OC_Config->OCIdleState << 8); |
| phungductung | 0:e87aa4c49e95 | 2408 | } |
| phungductung | 0:e87aa4c49e95 | 2409 | /* Write to TIMx CR2 */ |
| phungductung | 0:e87aa4c49e95 | 2410 | TIMx->CR2 = tmpcr2; |
| phungductung | 0:e87aa4c49e95 | 2411 | |
| phungductung | 0:e87aa4c49e95 | 2412 | /* Write to TIMx CCMR3 */ |
| phungductung | 0:e87aa4c49e95 | 2413 | TIMx->CCMR3 = tmpccmrx; |
| phungductung | 0:e87aa4c49e95 | 2414 | |
| phungductung | 0:e87aa4c49e95 | 2415 | /* Set the Capture Compare Register value */ |
| phungductung | 0:e87aa4c49e95 | 2416 | TIMx->CCR5 = OC_Config->Pulse; |
| phungductung | 0:e87aa4c49e95 | 2417 | |
| phungductung | 0:e87aa4c49e95 | 2418 | /* Write to TIMx CCER */ |
| phungductung | 0:e87aa4c49e95 | 2419 | TIMx->CCER = tmpccer; |
| phungductung | 0:e87aa4c49e95 | 2420 | } |
| phungductung | 0:e87aa4c49e95 | 2421 | |
| phungductung | 0:e87aa4c49e95 | 2422 | /** |
| phungductung | 0:e87aa4c49e95 | 2423 | * @brief Timer Output Compare 6 configuration |
| phungductung | 0:e87aa4c49e95 | 2424 | * @param TIMx to select the TIM peripheral |
| phungductung | 0:e87aa4c49e95 | 2425 | * @param OC_Config: The output configuration structure |
| phungductung | 0:e87aa4c49e95 | 2426 | * @retval None |
| phungductung | 0:e87aa4c49e95 | 2427 | */ |
| phungductung | 0:e87aa4c49e95 | 2428 | static void TIM_OC6_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config) |
| phungductung | 0:e87aa4c49e95 | 2429 | { |
| phungductung | 0:e87aa4c49e95 | 2430 | uint32_t tmpccmrx = 0; |
| phungductung | 0:e87aa4c49e95 | 2431 | uint32_t tmpccer = 0; |
| phungductung | 0:e87aa4c49e95 | 2432 | uint32_t tmpcr2 = 0; |
| phungductung | 0:e87aa4c49e95 | 2433 | |
| phungductung | 0:e87aa4c49e95 | 2434 | /* Disable the output: Reset the CCxE Bit */ |
| phungductung | 0:e87aa4c49e95 | 2435 | TIMx->CCER &= ~TIM_CCER_CC6E; |
| phungductung | 0:e87aa4c49e95 | 2436 | |
| phungductung | 0:e87aa4c49e95 | 2437 | /* Get the TIMx CCER register value */ |
| phungductung | 0:e87aa4c49e95 | 2438 | tmpccer = TIMx->CCER; |
| phungductung | 0:e87aa4c49e95 | 2439 | /* Get the TIMx CR2 register value */ |
| phungductung | 0:e87aa4c49e95 | 2440 | tmpcr2 = TIMx->CR2; |
| phungductung | 0:e87aa4c49e95 | 2441 | /* Get the TIMx CCMR1 register value */ |
| phungductung | 0:e87aa4c49e95 | 2442 | tmpccmrx = TIMx->CCMR3; |
| phungductung | 0:e87aa4c49e95 | 2443 | |
| phungductung | 0:e87aa4c49e95 | 2444 | /* Reset the Output Compare Mode Bits */ |
| phungductung | 0:e87aa4c49e95 | 2445 | tmpccmrx &= ~(TIM_CCMR3_OC6M); |
| phungductung | 0:e87aa4c49e95 | 2446 | /* Select the Output Compare Mode */ |
| phungductung | 0:e87aa4c49e95 | 2447 | tmpccmrx |= (OC_Config->OCMode << 8); |
| phungductung | 0:e87aa4c49e95 | 2448 | |
| phungductung | 0:e87aa4c49e95 | 2449 | /* Reset the Output Polarity level */ |
| phungductung | 0:e87aa4c49e95 | 2450 | tmpccer &= (uint32_t)~TIM_CCER_CC6P; |
| phungductung | 0:e87aa4c49e95 | 2451 | /* Set the Output Compare Polarity */ |
| phungductung | 0:e87aa4c49e95 | 2452 | tmpccer |= (OC_Config->OCPolarity << 20); |
| phungductung | 0:e87aa4c49e95 | 2453 | |
| phungductung | 0:e87aa4c49e95 | 2454 | if(IS_TIM_BREAK_INSTANCE(TIMx)) |
| phungductung | 0:e87aa4c49e95 | 2455 | { |
| phungductung | 0:e87aa4c49e95 | 2456 | /* Reset the Output Compare IDLE State */ |
| phungductung | 0:e87aa4c49e95 | 2457 | tmpcr2 &= ~TIM_CR2_OIS6; |
| phungductung | 0:e87aa4c49e95 | 2458 | /* Set the Output Idle state */ |
| phungductung | 0:e87aa4c49e95 | 2459 | tmpcr2 |= (OC_Config->OCIdleState << 10); |
| phungductung | 0:e87aa4c49e95 | 2460 | } |
| phungductung | 0:e87aa4c49e95 | 2461 | |
| phungductung | 0:e87aa4c49e95 | 2462 | /* Write to TIMx CR2 */ |
| phungductung | 0:e87aa4c49e95 | 2463 | TIMx->CR2 = tmpcr2; |
| phungductung | 0:e87aa4c49e95 | 2464 | |
| phungductung | 0:e87aa4c49e95 | 2465 | /* Write to TIMx CCMR3 */ |
| phungductung | 0:e87aa4c49e95 | 2466 | TIMx->CCMR3 = tmpccmrx; |
| phungductung | 0:e87aa4c49e95 | 2467 | |
| phungductung | 0:e87aa4c49e95 | 2468 | /* Set the Capture Compare Register value */ |
| phungductung | 0:e87aa4c49e95 | 2469 | TIMx->CCR6 = OC_Config->Pulse; |
| phungductung | 0:e87aa4c49e95 | 2470 | |
| phungductung | 0:e87aa4c49e95 | 2471 | /* Write to TIMx CCER */ |
| phungductung | 0:e87aa4c49e95 | 2472 | TIMx->CCER = tmpccer; |
| phungductung | 0:e87aa4c49e95 | 2473 | } |
| phungductung | 0:e87aa4c49e95 | 2474 | |
| phungductung | 0:e87aa4c49e95 | 2475 | /** |
| phungductung | 0:e87aa4c49e95 | 2476 | * @} |
| phungductung | 0:e87aa4c49e95 | 2477 | */ |
| phungductung | 0:e87aa4c49e95 | 2478 | |
| phungductung | 0:e87aa4c49e95 | 2479 | #endif /* HAL_TIM_MODULE_ENABLED */ |
| phungductung | 0:e87aa4c49e95 | 2480 | /** |
| phungductung | 0:e87aa4c49e95 | 2481 | * @} |
| phungductung | 0:e87aa4c49e95 | 2482 | */ |
| phungductung | 0:e87aa4c49e95 | 2483 | |
| phungductung | 0:e87aa4c49e95 | 2484 | /** |
| phungductung | 0:e87aa4c49e95 | 2485 | * @} |
| phungductung | 0:e87aa4c49e95 | 2486 | */ |
| phungductung | 0:e87aa4c49e95 | 2487 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |