PHung Tung
SPKT
targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_pwr.h@0:e87aa4c49e95, 2019-06-04 (annotated)
- Committer:
- phungductung
- Date:
- Tue Jun 04 21:51:46 2019 +0000
- Revision:
- 0:e87aa4c49e95
libray
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| phungductung | 0:e87aa4c49e95 | 1 | /** |
| phungductung | 0:e87aa4c49e95 | 2 | ****************************************************************************** |
| phungductung | 0:e87aa4c49e95 | 3 | * @file stm32f7xx_hal_pwr.h |
| phungductung | 0:e87aa4c49e95 | 4 | * @author MCD Application Team |
| phungductung | 0:e87aa4c49e95 | 5 | * @version V1.0.4 |
| phungductung | 0:e87aa4c49e95 | 6 | * @date 09-December-2015 |
| phungductung | 0:e87aa4c49e95 | 7 | * @brief Header file of PWR HAL module. |
| phungductung | 0:e87aa4c49e95 | 8 | ****************************************************************************** |
| phungductung | 0:e87aa4c49e95 | 9 | * @attention |
| phungductung | 0:e87aa4c49e95 | 10 | * |
| phungductung | 0:e87aa4c49e95 | 11 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
| phungductung | 0:e87aa4c49e95 | 12 | * |
| phungductung | 0:e87aa4c49e95 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| phungductung | 0:e87aa4c49e95 | 14 | * are permitted provided that the following conditions are met: |
| phungductung | 0:e87aa4c49e95 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| phungductung | 0:e87aa4c49e95 | 16 | * this list of conditions and the following disclaimer. |
| phungductung | 0:e87aa4c49e95 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| phungductung | 0:e87aa4c49e95 | 18 | * this list of conditions and the following disclaimer in the documentation |
| phungductung | 0:e87aa4c49e95 | 19 | * and/or other materials provided with the distribution. |
| phungductung | 0:e87aa4c49e95 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| phungductung | 0:e87aa4c49e95 | 21 | * may be used to endorse or promote products derived from this software |
| phungductung | 0:e87aa4c49e95 | 22 | * without specific prior written permission. |
| phungductung | 0:e87aa4c49e95 | 23 | * |
| phungductung | 0:e87aa4c49e95 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| phungductung | 0:e87aa4c49e95 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| phungductung | 0:e87aa4c49e95 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| phungductung | 0:e87aa4c49e95 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| phungductung | 0:e87aa4c49e95 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| phungductung | 0:e87aa4c49e95 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| phungductung | 0:e87aa4c49e95 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| phungductung | 0:e87aa4c49e95 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| phungductung | 0:e87aa4c49e95 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| phungductung | 0:e87aa4c49e95 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| phungductung | 0:e87aa4c49e95 | 34 | * |
| phungductung | 0:e87aa4c49e95 | 35 | ****************************************************************************** |
| phungductung | 0:e87aa4c49e95 | 36 | */ |
| phungductung | 0:e87aa4c49e95 | 37 | |
| phungductung | 0:e87aa4c49e95 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| phungductung | 0:e87aa4c49e95 | 39 | #ifndef __STM32F7xx_HAL_PWR_H |
| phungductung | 0:e87aa4c49e95 | 40 | #define __STM32F7xx_HAL_PWR_H |
| phungductung | 0:e87aa4c49e95 | 41 | |
| phungductung | 0:e87aa4c49e95 | 42 | #ifdef __cplusplus |
| phungductung | 0:e87aa4c49e95 | 43 | extern "C" { |
| phungductung | 0:e87aa4c49e95 | 44 | #endif |
| phungductung | 0:e87aa4c49e95 | 45 | |
| phungductung | 0:e87aa4c49e95 | 46 | /* Includes ------------------------------------------------------------------*/ |
| phungductung | 0:e87aa4c49e95 | 47 | #include "stm32f7xx_hal_def.h" |
| phungductung | 0:e87aa4c49e95 | 48 | |
| phungductung | 0:e87aa4c49e95 | 49 | /** @addtogroup STM32F7xx_HAL_Driver |
| phungductung | 0:e87aa4c49e95 | 50 | * @{ |
| phungductung | 0:e87aa4c49e95 | 51 | */ |
| phungductung | 0:e87aa4c49e95 | 52 | |
| phungductung | 0:e87aa4c49e95 | 53 | /** @addtogroup PWR |
| phungductung | 0:e87aa4c49e95 | 54 | * @{ |
| phungductung | 0:e87aa4c49e95 | 55 | */ |
| phungductung | 0:e87aa4c49e95 | 56 | |
| phungductung | 0:e87aa4c49e95 | 57 | /* Exported types ------------------------------------------------------------*/ |
| phungductung | 0:e87aa4c49e95 | 58 | |
| phungductung | 0:e87aa4c49e95 | 59 | /** @defgroup PWR_Exported_Types PWR Exported Types |
| phungductung | 0:e87aa4c49e95 | 60 | * @{ |
| phungductung | 0:e87aa4c49e95 | 61 | */ |
| phungductung | 0:e87aa4c49e95 | 62 | |
| phungductung | 0:e87aa4c49e95 | 63 | /** |
| phungductung | 0:e87aa4c49e95 | 64 | * @brief PWR PVD configuration structure definition |
| phungductung | 0:e87aa4c49e95 | 65 | */ |
| phungductung | 0:e87aa4c49e95 | 66 | typedef struct |
| phungductung | 0:e87aa4c49e95 | 67 | { |
| phungductung | 0:e87aa4c49e95 | 68 | uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level. |
| phungductung | 0:e87aa4c49e95 | 69 | This parameter can be a value of @ref PWR_PVD_detection_level */ |
| phungductung | 0:e87aa4c49e95 | 70 | |
| phungductung | 0:e87aa4c49e95 | 71 | uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins. |
| phungductung | 0:e87aa4c49e95 | 72 | This parameter can be a value of @ref PWR_PVD_Mode */ |
| phungductung | 0:e87aa4c49e95 | 73 | }PWR_PVDTypeDef; |
| phungductung | 0:e87aa4c49e95 | 74 | |
| phungductung | 0:e87aa4c49e95 | 75 | /** |
| phungductung | 0:e87aa4c49e95 | 76 | * @} |
| phungductung | 0:e87aa4c49e95 | 77 | */ |
| phungductung | 0:e87aa4c49e95 | 78 | |
| phungductung | 0:e87aa4c49e95 | 79 | /* Exported constants --------------------------------------------------------*/ |
| phungductung | 0:e87aa4c49e95 | 80 | /** @defgroup PWR_Exported_Constants PWR Exported Constants |
| phungductung | 0:e87aa4c49e95 | 81 | * @{ |
| phungductung | 0:e87aa4c49e95 | 82 | */ |
| phungductung | 0:e87aa4c49e95 | 83 | |
| phungductung | 0:e87aa4c49e95 | 84 | /** @defgroup PWR_PVD_detection_level PWR PVD detection level |
| phungductung | 0:e87aa4c49e95 | 85 | * @{ |
| phungductung | 0:e87aa4c49e95 | 86 | */ |
| phungductung | 0:e87aa4c49e95 | 87 | #define PWR_PVDLEVEL_0 PWR_CR1_PLS_LEV0 |
| phungductung | 0:e87aa4c49e95 | 88 | #define PWR_PVDLEVEL_1 PWR_CR1_PLS_LEV1 |
| phungductung | 0:e87aa4c49e95 | 89 | #define PWR_PVDLEVEL_2 PWR_CR1_PLS_LEV2 |
| phungductung | 0:e87aa4c49e95 | 90 | #define PWR_PVDLEVEL_3 PWR_CR1_PLS_LEV3 |
| phungductung | 0:e87aa4c49e95 | 91 | #define PWR_PVDLEVEL_4 PWR_CR1_PLS_LEV4 |
| phungductung | 0:e87aa4c49e95 | 92 | #define PWR_PVDLEVEL_5 PWR_CR1_PLS_LEV5 |
| phungductung | 0:e87aa4c49e95 | 93 | #define PWR_PVDLEVEL_6 PWR_CR1_PLS_LEV6 |
| phungductung | 0:e87aa4c49e95 | 94 | #define PWR_PVDLEVEL_7 PWR_CR1_PLS_LEV7/* External input analog voltage |
| phungductung | 0:e87aa4c49e95 | 95 | (Compare internally to VREFINT) */ |
| phungductung | 0:e87aa4c49e95 | 96 | |
| phungductung | 0:e87aa4c49e95 | 97 | /** |
| phungductung | 0:e87aa4c49e95 | 98 | * @} |
| phungductung | 0:e87aa4c49e95 | 99 | */ |
| phungductung | 0:e87aa4c49e95 | 100 | |
| phungductung | 0:e87aa4c49e95 | 101 | /** @defgroup PWR_PVD_Mode PWR PVD Mode |
| phungductung | 0:e87aa4c49e95 | 102 | * @{ |
| phungductung | 0:e87aa4c49e95 | 103 | */ |
| phungductung | 0:e87aa4c49e95 | 104 | #define PWR_PVD_MODE_NORMAL ((uint32_t)0x00000000) /*!< basic mode is used */ |
| phungductung | 0:e87aa4c49e95 | 105 | #define PWR_PVD_MODE_IT_RISING ((uint32_t)0x00010001) /*!< External Interrupt Mode with Rising edge trigger detection */ |
| phungductung | 0:e87aa4c49e95 | 106 | #define PWR_PVD_MODE_IT_FALLING ((uint32_t)0x00010002) /*!< External Interrupt Mode with Falling edge trigger detection */ |
| phungductung | 0:e87aa4c49e95 | 107 | #define PWR_PVD_MODE_IT_RISING_FALLING ((uint32_t)0x00010003) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */ |
| phungductung | 0:e87aa4c49e95 | 108 | #define PWR_PVD_MODE_EVENT_RISING ((uint32_t)0x00020001) /*!< Event Mode with Rising edge trigger detection */ |
| phungductung | 0:e87aa4c49e95 | 109 | #define PWR_PVD_MODE_EVENT_FALLING ((uint32_t)0x00020002) /*!< Event Mode with Falling edge trigger detection */ |
| phungductung | 0:e87aa4c49e95 | 110 | #define PWR_PVD_MODE_EVENT_RISING_FALLING ((uint32_t)0x00020003) /*!< Event Mode with Rising/Falling edge trigger detection */ |
| phungductung | 0:e87aa4c49e95 | 111 | /** |
| phungductung | 0:e87aa4c49e95 | 112 | * @} |
| phungductung | 0:e87aa4c49e95 | 113 | */ |
| phungductung | 0:e87aa4c49e95 | 114 | |
| phungductung | 0:e87aa4c49e95 | 115 | /** @defgroup PWR_Regulator_state_in_STOP_mode PWR Regulator state in SLEEP/STOP mode |
| phungductung | 0:e87aa4c49e95 | 116 | * @{ |
| phungductung | 0:e87aa4c49e95 | 117 | */ |
| phungductung | 0:e87aa4c49e95 | 118 | #define PWR_MAINREGULATOR_ON ((uint32_t)0x00000000) |
| phungductung | 0:e87aa4c49e95 | 119 | #define PWR_LOWPOWERREGULATOR_ON PWR_CR1_LPDS |
| phungductung | 0:e87aa4c49e95 | 120 | /** |
| phungductung | 0:e87aa4c49e95 | 121 | * @} |
| phungductung | 0:e87aa4c49e95 | 122 | */ |
| phungductung | 0:e87aa4c49e95 | 123 | |
| phungductung | 0:e87aa4c49e95 | 124 | /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry |
| phungductung | 0:e87aa4c49e95 | 125 | * @{ |
| phungductung | 0:e87aa4c49e95 | 126 | */ |
| phungductung | 0:e87aa4c49e95 | 127 | #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01) |
| phungductung | 0:e87aa4c49e95 | 128 | #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02) |
| phungductung | 0:e87aa4c49e95 | 129 | /** |
| phungductung | 0:e87aa4c49e95 | 130 | * @} |
| phungductung | 0:e87aa4c49e95 | 131 | */ |
| phungductung | 0:e87aa4c49e95 | 132 | |
| phungductung | 0:e87aa4c49e95 | 133 | /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry |
| phungductung | 0:e87aa4c49e95 | 134 | * @{ |
| phungductung | 0:e87aa4c49e95 | 135 | */ |
| phungductung | 0:e87aa4c49e95 | 136 | #define PWR_STOPENTRY_WFI ((uint8_t)0x01) |
| phungductung | 0:e87aa4c49e95 | 137 | #define PWR_STOPENTRY_WFE ((uint8_t)0x02) |
| phungductung | 0:e87aa4c49e95 | 138 | /** |
| phungductung | 0:e87aa4c49e95 | 139 | * @} |
| phungductung | 0:e87aa4c49e95 | 140 | */ |
| phungductung | 0:e87aa4c49e95 | 141 | |
| phungductung | 0:e87aa4c49e95 | 142 | /** @defgroup PWR_Regulator_Voltage_Scale PWR Regulator Voltage Scale |
| phungductung | 0:e87aa4c49e95 | 143 | * @{ |
| phungductung | 0:e87aa4c49e95 | 144 | */ |
| phungductung | 0:e87aa4c49e95 | 145 | #define PWR_REGULATOR_VOLTAGE_SCALE1 PWR_CR1_VOS |
| phungductung | 0:e87aa4c49e95 | 146 | #define PWR_REGULATOR_VOLTAGE_SCALE2 PWR_CR1_VOS_1 |
| phungductung | 0:e87aa4c49e95 | 147 | #define PWR_REGULATOR_VOLTAGE_SCALE3 PWR_CR1_VOS_0 |
| phungductung | 0:e87aa4c49e95 | 148 | /** |
| phungductung | 0:e87aa4c49e95 | 149 | * @} |
| phungductung | 0:e87aa4c49e95 | 150 | */ |
| phungductung | 0:e87aa4c49e95 | 151 | |
| phungductung | 0:e87aa4c49e95 | 152 | /** @defgroup PWR_Flag PWR Flag |
| phungductung | 0:e87aa4c49e95 | 153 | * @{ |
| phungductung | 0:e87aa4c49e95 | 154 | */ |
| phungductung | 0:e87aa4c49e95 | 155 | #define PWR_FLAG_WU PWR_CSR1_WUIF |
| phungductung | 0:e87aa4c49e95 | 156 | #define PWR_FLAG_SB PWR_CSR1_SBF |
| phungductung | 0:e87aa4c49e95 | 157 | #define PWR_FLAG_PVDO PWR_CSR1_PVDO |
| phungductung | 0:e87aa4c49e95 | 158 | #define PWR_FLAG_BRR PWR_CSR1_BRR |
| phungductung | 0:e87aa4c49e95 | 159 | #define PWR_FLAG_VOSRDY PWR_CSR1_VOSRDY |
| phungductung | 0:e87aa4c49e95 | 160 | /** |
| phungductung | 0:e87aa4c49e95 | 161 | * @} |
| phungductung | 0:e87aa4c49e95 | 162 | */ |
| phungductung | 0:e87aa4c49e95 | 163 | |
| phungductung | 0:e87aa4c49e95 | 164 | /** |
| phungductung | 0:e87aa4c49e95 | 165 | * @} |
| phungductung | 0:e87aa4c49e95 | 166 | */ |
| phungductung | 0:e87aa4c49e95 | 167 | |
| phungductung | 0:e87aa4c49e95 | 168 | /* Exported macro ------------------------------------------------------------*/ |
| phungductung | 0:e87aa4c49e95 | 169 | /** @defgroup PWR_Exported_Macro PWR Exported Macro |
| phungductung | 0:e87aa4c49e95 | 170 | * @{ |
| phungductung | 0:e87aa4c49e95 | 171 | */ |
| phungductung | 0:e87aa4c49e95 | 172 | |
| phungductung | 0:e87aa4c49e95 | 173 | /** @brief macros configure the main internal regulator output voltage. |
| phungductung | 0:e87aa4c49e95 | 174 | * @param __REGULATOR__: specifies the regulator output voltage to achieve |
| phungductung | 0:e87aa4c49e95 | 175 | * a tradeoff between performance and power consumption when the device does |
| phungductung | 0:e87aa4c49e95 | 176 | * not operate at the maximum frequency (refer to the datasheets for more details). |
| phungductung | 0:e87aa4c49e95 | 177 | * This parameter can be one of the following values: |
| phungductung | 0:e87aa4c49e95 | 178 | * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode |
| phungductung | 0:e87aa4c49e95 | 179 | * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode |
| phungductung | 0:e87aa4c49e95 | 180 | * @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output Scale 3 mode |
| phungductung | 0:e87aa4c49e95 | 181 | * @retval None |
| phungductung | 0:e87aa4c49e95 | 182 | */ |
| phungductung | 0:e87aa4c49e95 | 183 | #define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) do { \ |
| phungductung | 0:e87aa4c49e95 | 184 | __IO uint32_t tmpreg = 0x00; \ |
| phungductung | 0:e87aa4c49e95 | 185 | MODIFY_REG(PWR->CR1, PWR_CR1_VOS, (__REGULATOR__)); \ |
| phungductung | 0:e87aa4c49e95 | 186 | /* Delay after an RCC peripheral clock enabling */ \ |
| phungductung | 0:e87aa4c49e95 | 187 | tmpreg = READ_BIT(PWR->CR1, PWR_CR1_VOS); \ |
| phungductung | 0:e87aa4c49e95 | 188 | UNUSED(tmpreg); \ |
| phungductung | 0:e87aa4c49e95 | 189 | } while(0) |
| phungductung | 0:e87aa4c49e95 | 190 | |
| phungductung | 0:e87aa4c49e95 | 191 | /** @brief Check PWR flag is set or not. |
| phungductung | 0:e87aa4c49e95 | 192 | * @param __FLAG__: specifies the flag to check. |
| phungductung | 0:e87aa4c49e95 | 193 | * This parameter can be one of the following values: |
| phungductung | 0:e87aa4c49e95 | 194 | * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event |
| phungductung | 0:e87aa4c49e95 | 195 | * was received on the internal wakeup line in standby mode (RTC alarm (Alarm A or Alarm B), |
| phungductung | 0:e87aa4c49e95 | 196 | * RTC Tamper event, RTC TimeStamp event or RTC Wakeup)). |
| phungductung | 0:e87aa4c49e95 | 197 | * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was |
| phungductung | 0:e87aa4c49e95 | 198 | * resumed from StandBy mode. |
| phungductung | 0:e87aa4c49e95 | 199 | * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled |
| phungductung | 0:e87aa4c49e95 | 200 | * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode |
| phungductung | 0:e87aa4c49e95 | 201 | * For this reason, this bit is equal to 0 after Standby or reset |
| phungductung | 0:e87aa4c49e95 | 202 | * until the PVDE bit is set. |
| phungductung | 0:e87aa4c49e95 | 203 | * @arg PWR_FLAG_BRR: Backup regulator ready flag. This bit is not reset |
| phungductung | 0:e87aa4c49e95 | 204 | * when the device wakes up from Standby mode or by a system reset |
| phungductung | 0:e87aa4c49e95 | 205 | * or power reset. |
| phungductung | 0:e87aa4c49e95 | 206 | * @arg PWR_FLAG_VOSRDY: This flag indicates that the Regulator voltage |
| phungductung | 0:e87aa4c49e95 | 207 | * scaling output selection is ready. |
| phungductung | 0:e87aa4c49e95 | 208 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
| phungductung | 0:e87aa4c49e95 | 209 | */ |
| phungductung | 0:e87aa4c49e95 | 210 | #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR1 & (__FLAG__)) == (__FLAG__)) |
| phungductung | 0:e87aa4c49e95 | 211 | |
| phungductung | 0:e87aa4c49e95 | 212 | /** @brief Clear the PWR's pending flags. |
| phungductung | 0:e87aa4c49e95 | 213 | * @param __FLAG__: specifies the flag to clear. |
| phungductung | 0:e87aa4c49e95 | 214 | * This parameter can be one of the following values: |
| phungductung | 0:e87aa4c49e95 | 215 | * @arg PWR_FLAG_SB: StandBy flag |
| phungductung | 0:e87aa4c49e95 | 216 | */ |
| phungductung | 0:e87aa4c49e95 | 217 | #define __HAL_PWR_CLEAR_FLAG(__FLAG__) (PWR->CR1 |= (__FLAG__) << 2) |
| phungductung | 0:e87aa4c49e95 | 218 | |
| phungductung | 0:e87aa4c49e95 | 219 | /** |
| phungductung | 0:e87aa4c49e95 | 220 | * @brief Enable the PVD Exti Line 16. |
| phungductung | 0:e87aa4c49e95 | 221 | * @retval None. |
| phungductung | 0:e87aa4c49e95 | 222 | */ |
| phungductung | 0:e87aa4c49e95 | 223 | #define __HAL_PWR_PVD_EXTI_ENABLE_IT() (EXTI->IMR |= (PWR_EXTI_LINE_PVD)) |
| phungductung | 0:e87aa4c49e95 | 224 | |
| phungductung | 0:e87aa4c49e95 | 225 | /** |
| phungductung | 0:e87aa4c49e95 | 226 | * @brief Disable the PVD EXTI Line 16. |
| phungductung | 0:e87aa4c49e95 | 227 | * @retval None. |
| phungductung | 0:e87aa4c49e95 | 228 | */ |
| phungductung | 0:e87aa4c49e95 | 229 | #define __HAL_PWR_PVD_EXTI_DISABLE_IT() (EXTI->IMR &= ~(PWR_EXTI_LINE_PVD)) |
| phungductung | 0:e87aa4c49e95 | 230 | |
| phungductung | 0:e87aa4c49e95 | 231 | /** |
| phungductung | 0:e87aa4c49e95 | 232 | * @brief Enable event on PVD Exti Line 16. |
| phungductung | 0:e87aa4c49e95 | 233 | * @retval None. |
| phungductung | 0:e87aa4c49e95 | 234 | */ |
| phungductung | 0:e87aa4c49e95 | 235 | #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() (EXTI->EMR |= (PWR_EXTI_LINE_PVD)) |
| phungductung | 0:e87aa4c49e95 | 236 | |
| phungductung | 0:e87aa4c49e95 | 237 | /** |
| phungductung | 0:e87aa4c49e95 | 238 | * @brief Disable event on PVD Exti Line 16. |
| phungductung | 0:e87aa4c49e95 | 239 | * @retval None. |
| phungductung | 0:e87aa4c49e95 | 240 | */ |
| phungductung | 0:e87aa4c49e95 | 241 | #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(PWR_EXTI_LINE_PVD)) |
| phungductung | 0:e87aa4c49e95 | 242 | |
| phungductung | 0:e87aa4c49e95 | 243 | /** |
| phungductung | 0:e87aa4c49e95 | 244 | * @brief Enable the PVD Extended Interrupt Rising Trigger. |
| phungductung | 0:e87aa4c49e95 | 245 | * @retval None. |
| phungductung | 0:e87aa4c49e95 | 246 | */ |
| phungductung | 0:e87aa4c49e95 | 247 | #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD) |
| phungductung | 0:e87aa4c49e95 | 248 | |
| phungductung | 0:e87aa4c49e95 | 249 | /** |
| phungductung | 0:e87aa4c49e95 | 250 | * @brief Disable the PVD Extended Interrupt Rising Trigger. |
| phungductung | 0:e87aa4c49e95 | 251 | * @retval None. |
| phungductung | 0:e87aa4c49e95 | 252 | */ |
| phungductung | 0:e87aa4c49e95 | 253 | #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD) |
| phungductung | 0:e87aa4c49e95 | 254 | |
| phungductung | 0:e87aa4c49e95 | 255 | /** |
| phungductung | 0:e87aa4c49e95 | 256 | * @brief Enable the PVD Extended Interrupt Falling Trigger. |
| phungductung | 0:e87aa4c49e95 | 257 | * @retval None. |
| phungductung | 0:e87aa4c49e95 | 258 | */ |
| phungductung | 0:e87aa4c49e95 | 259 | #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD) |
| phungductung | 0:e87aa4c49e95 | 260 | |
| phungductung | 0:e87aa4c49e95 | 261 | |
| phungductung | 0:e87aa4c49e95 | 262 | /** |
| phungductung | 0:e87aa4c49e95 | 263 | * @brief Disable the PVD Extended Interrupt Falling Trigger. |
| phungductung | 0:e87aa4c49e95 | 264 | * @retval None. |
| phungductung | 0:e87aa4c49e95 | 265 | */ |
| phungductung | 0:e87aa4c49e95 | 266 | #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD) |
| phungductung | 0:e87aa4c49e95 | 267 | |
| phungductung | 0:e87aa4c49e95 | 268 | |
| phungductung | 0:e87aa4c49e95 | 269 | /** |
| phungductung | 0:e87aa4c49e95 | 270 | * @brief PVD EXTI line configuration: set rising & falling edge trigger. |
| phungductung | 0:e87aa4c49e95 | 271 | * @retval None. |
| phungductung | 0:e87aa4c49e95 | 272 | */ |
| phungductung | 0:e87aa4c49e95 | 273 | #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); |
| phungductung | 0:e87aa4c49e95 | 274 | |
| phungductung | 0:e87aa4c49e95 | 275 | /** |
| phungductung | 0:e87aa4c49e95 | 276 | * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger. |
| phungductung | 0:e87aa4c49e95 | 277 | * @retval None. |
| phungductung | 0:e87aa4c49e95 | 278 | */ |
| phungductung | 0:e87aa4c49e95 | 279 | #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); |
| phungductung | 0:e87aa4c49e95 | 280 | |
| phungductung | 0:e87aa4c49e95 | 281 | /** |
| phungductung | 0:e87aa4c49e95 | 282 | * @brief checks whether the specified PVD Exti interrupt flag is set or not. |
| phungductung | 0:e87aa4c49e95 | 283 | * @retval EXTI PVD Line Status. |
| phungductung | 0:e87aa4c49e95 | 284 | */ |
| phungductung | 0:e87aa4c49e95 | 285 | #define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD)) |
| phungductung | 0:e87aa4c49e95 | 286 | |
| phungductung | 0:e87aa4c49e95 | 287 | /** |
| phungductung | 0:e87aa4c49e95 | 288 | * @brief Clear the PVD Exti flag. |
| phungductung | 0:e87aa4c49e95 | 289 | * @retval None. |
| phungductung | 0:e87aa4c49e95 | 290 | */ |
| phungductung | 0:e87aa4c49e95 | 291 | #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD)) |
| phungductung | 0:e87aa4c49e95 | 292 | |
| phungductung | 0:e87aa4c49e95 | 293 | /** |
| phungductung | 0:e87aa4c49e95 | 294 | * @brief Generates a Software interrupt on PVD EXTI line. |
| phungductung | 0:e87aa4c49e95 | 295 | * @retval None |
| phungductung | 0:e87aa4c49e95 | 296 | */ |
| phungductung | 0:e87aa4c49e95 | 297 | #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() (EXTI->SWIER |= (PWR_EXTI_LINE_PVD)) |
| phungductung | 0:e87aa4c49e95 | 298 | |
| phungductung | 0:e87aa4c49e95 | 299 | /** |
| phungductung | 0:e87aa4c49e95 | 300 | * @} |
| phungductung | 0:e87aa4c49e95 | 301 | */ |
| phungductung | 0:e87aa4c49e95 | 302 | |
| phungductung | 0:e87aa4c49e95 | 303 | /* Include PWR HAL Extension module */ |
| phungductung | 0:e87aa4c49e95 | 304 | #include "stm32f7xx_hal_pwr_ex.h" |
| phungductung | 0:e87aa4c49e95 | 305 | |
| phungductung | 0:e87aa4c49e95 | 306 | /* Exported functions --------------------------------------------------------*/ |
| phungductung | 0:e87aa4c49e95 | 307 | /** @addtogroup PWR_Exported_Functions PWR Exported Functions |
| phungductung | 0:e87aa4c49e95 | 308 | * @{ |
| phungductung | 0:e87aa4c49e95 | 309 | */ |
| phungductung | 0:e87aa4c49e95 | 310 | |
| phungductung | 0:e87aa4c49e95 | 311 | /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions |
| phungductung | 0:e87aa4c49e95 | 312 | * @{ |
| phungductung | 0:e87aa4c49e95 | 313 | */ |
| phungductung | 0:e87aa4c49e95 | 314 | /* Initialization and de-initialization functions *****************************/ |
| phungductung | 0:e87aa4c49e95 | 315 | void HAL_PWR_DeInit(void); |
| phungductung | 0:e87aa4c49e95 | 316 | void HAL_PWR_EnableBkUpAccess(void); |
| phungductung | 0:e87aa4c49e95 | 317 | void HAL_PWR_DisableBkUpAccess(void); |
| phungductung | 0:e87aa4c49e95 | 318 | /** |
| phungductung | 0:e87aa4c49e95 | 319 | * @} |
| phungductung | 0:e87aa4c49e95 | 320 | */ |
| phungductung | 0:e87aa4c49e95 | 321 | |
| phungductung | 0:e87aa4c49e95 | 322 | /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions |
| phungductung | 0:e87aa4c49e95 | 323 | * @{ |
| phungductung | 0:e87aa4c49e95 | 324 | */ |
| phungductung | 0:e87aa4c49e95 | 325 | /* Peripheral Control functions **********************************************/ |
| phungductung | 0:e87aa4c49e95 | 326 | /* PVD configuration */ |
| phungductung | 0:e87aa4c49e95 | 327 | void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD); |
| phungductung | 0:e87aa4c49e95 | 328 | void HAL_PWR_EnablePVD(void); |
| phungductung | 0:e87aa4c49e95 | 329 | void HAL_PWR_DisablePVD(void); |
| phungductung | 0:e87aa4c49e95 | 330 | |
| phungductung | 0:e87aa4c49e95 | 331 | /* WakeUp pins configuration */ |
| phungductung | 0:e87aa4c49e95 | 332 | void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinPolarity); |
| phungductung | 0:e87aa4c49e95 | 333 | void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx); |
| phungductung | 0:e87aa4c49e95 | 334 | |
| phungductung | 0:e87aa4c49e95 | 335 | /* Low Power modes entry */ |
| phungductung | 0:e87aa4c49e95 | 336 | void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry); |
| phungductung | 0:e87aa4c49e95 | 337 | void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry); |
| phungductung | 0:e87aa4c49e95 | 338 | void HAL_PWR_EnterSTANDBYMode(void); |
| phungductung | 0:e87aa4c49e95 | 339 | |
| phungductung | 0:e87aa4c49e95 | 340 | /* Power PVD IRQ Handler */ |
| phungductung | 0:e87aa4c49e95 | 341 | void HAL_PWR_PVD_IRQHandler(void); |
| phungductung | 0:e87aa4c49e95 | 342 | void HAL_PWR_PVDCallback(void); |
| phungductung | 0:e87aa4c49e95 | 343 | |
| phungductung | 0:e87aa4c49e95 | 344 | /* Cortex System Control functions *******************************************/ |
| phungductung | 0:e87aa4c49e95 | 345 | void HAL_PWR_EnableSleepOnExit(void); |
| phungductung | 0:e87aa4c49e95 | 346 | void HAL_PWR_DisableSleepOnExit(void); |
| phungductung | 0:e87aa4c49e95 | 347 | void HAL_PWR_EnableSEVOnPend(void); |
| phungductung | 0:e87aa4c49e95 | 348 | void HAL_PWR_DisableSEVOnPend(void); |
| phungductung | 0:e87aa4c49e95 | 349 | /** |
| phungductung | 0:e87aa4c49e95 | 350 | * @} |
| phungductung | 0:e87aa4c49e95 | 351 | */ |
| phungductung | 0:e87aa4c49e95 | 352 | |
| phungductung | 0:e87aa4c49e95 | 353 | /** |
| phungductung | 0:e87aa4c49e95 | 354 | * @} |
| phungductung | 0:e87aa4c49e95 | 355 | */ |
| phungductung | 0:e87aa4c49e95 | 356 | |
| phungductung | 0:e87aa4c49e95 | 357 | /* Private types -------------------------------------------------------------*/ |
| phungductung | 0:e87aa4c49e95 | 358 | /* Private variables ---------------------------------------------------------*/ |
| phungductung | 0:e87aa4c49e95 | 359 | /* Private constants ---------------------------------------------------------*/ |
| phungductung | 0:e87aa4c49e95 | 360 | /** @defgroup PWR_Private_Constants PWR Private Constants |
| phungductung | 0:e87aa4c49e95 | 361 | * @{ |
| phungductung | 0:e87aa4c49e95 | 362 | */ |
| phungductung | 0:e87aa4c49e95 | 363 | |
| phungductung | 0:e87aa4c49e95 | 364 | /** @defgroup PWR_PVD_EXTI_Line PWR PVD EXTI Line |
| phungductung | 0:e87aa4c49e95 | 365 | * @{ |
| phungductung | 0:e87aa4c49e95 | 366 | */ |
| phungductung | 0:e87aa4c49e95 | 367 | #define PWR_EXTI_LINE_PVD ((uint32_t)EXTI_IMR_MR16) /*!< External interrupt line 16 Connected to the PVD EXTI Line */ |
| phungductung | 0:e87aa4c49e95 | 368 | /** |
| phungductung | 0:e87aa4c49e95 | 369 | * @} |
| phungductung | 0:e87aa4c49e95 | 370 | */ |
| phungductung | 0:e87aa4c49e95 | 371 | |
| phungductung | 0:e87aa4c49e95 | 372 | /** |
| phungductung | 0:e87aa4c49e95 | 373 | * @} |
| phungductung | 0:e87aa4c49e95 | 374 | */ |
| phungductung | 0:e87aa4c49e95 | 375 | /* Private macros ------------------------------------------------------------*/ |
| phungductung | 0:e87aa4c49e95 | 376 | /** @defgroup PWR_Private_Macros PWR Private Macros |
| phungductung | 0:e87aa4c49e95 | 377 | * @{ |
| phungductung | 0:e87aa4c49e95 | 378 | */ |
| phungductung | 0:e87aa4c49e95 | 379 | |
| phungductung | 0:e87aa4c49e95 | 380 | /** @defgroup PWR_IS_PWR_Definitions PWR Private macros to check input parameters |
| phungductung | 0:e87aa4c49e95 | 381 | * @{ |
| phungductung | 0:e87aa4c49e95 | 382 | */ |
| phungductung | 0:e87aa4c49e95 | 383 | #define IS_PWR_WAKEUP_POLARITY(POLARITY) (((POLARITY) == PWR_POLARITY_RISINGEDGE) || \ |
| phungductung | 0:e87aa4c49e95 | 384 | ((POLARITY) == PWR_POLARITY_FALLINGEDGE)) |
| phungductung | 0:e87aa4c49e95 | 385 | #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \ |
| phungductung | 0:e87aa4c49e95 | 386 | ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \ |
| phungductung | 0:e87aa4c49e95 | 387 | ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \ |
| phungductung | 0:e87aa4c49e95 | 388 | ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7)) |
| phungductung | 0:e87aa4c49e95 | 389 | #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \ |
| phungductung | 0:e87aa4c49e95 | 390 | ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \ |
| phungductung | 0:e87aa4c49e95 | 391 | ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \ |
| phungductung | 0:e87aa4c49e95 | 392 | ((MODE) == PWR_PVD_MODE_NORMAL)) |
| phungductung | 0:e87aa4c49e95 | 393 | #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \ |
| phungductung | 0:e87aa4c49e95 | 394 | ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON)) |
| phungductung | 0:e87aa4c49e95 | 395 | #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE)) |
| phungductung | 0:e87aa4c49e95 | 396 | #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE)) |
| phungductung | 0:e87aa4c49e95 | 397 | #define IS_PWR_REGULATOR_VOLTAGE(VOLTAGE) (((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \ |
| phungductung | 0:e87aa4c49e95 | 398 | ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE2) || \ |
| phungductung | 0:e87aa4c49e95 | 399 | ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE3)) |
| phungductung | 0:e87aa4c49e95 | 400 | |
| phungductung | 0:e87aa4c49e95 | 401 | /** |
| phungductung | 0:e87aa4c49e95 | 402 | * @} |
| phungductung | 0:e87aa4c49e95 | 403 | */ |
| phungductung | 0:e87aa4c49e95 | 404 | |
| phungductung | 0:e87aa4c49e95 | 405 | /** |
| phungductung | 0:e87aa4c49e95 | 406 | * @} |
| phungductung | 0:e87aa4c49e95 | 407 | */ |
| phungductung | 0:e87aa4c49e95 | 408 | |
| phungductung | 0:e87aa4c49e95 | 409 | /** |
| phungductung | 0:e87aa4c49e95 | 410 | * @} |
| phungductung | 0:e87aa4c49e95 | 411 | */ |
| phungductung | 0:e87aa4c49e95 | 412 | |
| phungductung | 0:e87aa4c49e95 | 413 | /** |
| phungductung | 0:e87aa4c49e95 | 414 | * @} |
| phungductung | 0:e87aa4c49e95 | 415 | */ |
| phungductung | 0:e87aa4c49e95 | 416 | |
| phungductung | 0:e87aa4c49e95 | 417 | #ifdef __cplusplus |
| phungductung | 0:e87aa4c49e95 | 418 | } |
| phungductung | 0:e87aa4c49e95 | 419 | #endif |
| phungductung | 0:e87aa4c49e95 | 420 | |
| phungductung | 0:e87aa4c49e95 | 421 | |
| phungductung | 0:e87aa4c49e95 | 422 | #endif /* __STM32F7xx_HAL_PWR_H */ |
| phungductung | 0:e87aa4c49e95 | 423 | |
| phungductung | 0:e87aa4c49e95 | 424 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |