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targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_nor.h@0:e87aa4c49e95, 2019-06-04 (annotated)

Committer:
phungductung
Date:
Tue Jun 04 21:51:46 2019 +0000
Revision:
0:e87aa4c49e95
libray

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phungductung 0:e87aa4c49e95 1 /**
phungductung 0:e87aa4c49e95 2 ******************************************************************************
phungductung 0:e87aa4c49e95 3 * @file stm32f7xx_hal_nor.h
phungductung 0:e87aa4c49e95 4 * @author MCD Application Team
phungductung 0:e87aa4c49e95 5 * @version V1.0.4
phungductung 0:e87aa4c49e95 6 * @date 09-December-2015
phungductung 0:e87aa4c49e95 7 * @brief Header file of NOR HAL module.
phungductung 0:e87aa4c49e95 8 ******************************************************************************
phungductung 0:e87aa4c49e95 9 * @attention
phungductung 0:e87aa4c49e95 10 *
phungductung 0:e87aa4c49e95 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
phungductung 0:e87aa4c49e95 12 *
phungductung 0:e87aa4c49e95 13 * Redistribution and use in source and binary forms, with or without modification,
phungductung 0:e87aa4c49e95 14 * are permitted provided that the following conditions are met:
phungductung 0:e87aa4c49e95 15 * 1. Redistributions of source code must retain the above copyright notice,
phungductung 0:e87aa4c49e95 16 * this list of conditions and the following disclaimer.
phungductung 0:e87aa4c49e95 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
phungductung 0:e87aa4c49e95 18 * this list of conditions and the following disclaimer in the documentation
phungductung 0:e87aa4c49e95 19 * and/or other materials provided with the distribution.
phungductung 0:e87aa4c49e95 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
phungductung 0:e87aa4c49e95 21 * may be used to endorse or promote products derived from this software
phungductung 0:e87aa4c49e95 22 * without specific prior written permission.
phungductung 0:e87aa4c49e95 23 *
phungductung 0:e87aa4c49e95 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
phungductung 0:e87aa4c49e95 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
phungductung 0:e87aa4c49e95 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
phungductung 0:e87aa4c49e95 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
phungductung 0:e87aa4c49e95 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
phungductung 0:e87aa4c49e95 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
phungductung 0:e87aa4c49e95 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
phungductung 0:e87aa4c49e95 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
phungductung 0:e87aa4c49e95 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
phungductung 0:e87aa4c49e95 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
phungductung 0:e87aa4c49e95 34 *
phungductung 0:e87aa4c49e95 35 ******************************************************************************
phungductung 0:e87aa4c49e95 36 */
phungductung 0:e87aa4c49e95 37
phungductung 0:e87aa4c49e95 38 /* Define to prevent recursive inclusion -------------------------------------*/
phungductung 0:e87aa4c49e95 39 #ifndef __STM32F7xx_HAL_NOR_H
phungductung 0:e87aa4c49e95 40 #define __STM32F7xx_HAL_NOR_H
phungductung 0:e87aa4c49e95 41
phungductung 0:e87aa4c49e95 42 #ifdef __cplusplus
phungductung 0:e87aa4c49e95 43 extern "C" {
phungductung 0:e87aa4c49e95 44 #endif
phungductung 0:e87aa4c49e95 45
phungductung 0:e87aa4c49e95 46 /* Includes ------------------------------------------------------------------*/
phungductung 0:e87aa4c49e95 47 #include "stm32f7xx_ll_fmc.h"
phungductung 0:e87aa4c49e95 48
phungductung 0:e87aa4c49e95 49
phungductung 0:e87aa4c49e95 50 /** @addtogroup STM32F7xx_HAL_Driver
phungductung 0:e87aa4c49e95 51 * @{
phungductung 0:e87aa4c49e95 52 */
phungductung 0:e87aa4c49e95 53
phungductung 0:e87aa4c49e95 54 /** @addtogroup NOR
phungductung 0:e87aa4c49e95 55 * @{
phungductung 0:e87aa4c49e95 56 */
phungductung 0:e87aa4c49e95 57
phungductung 0:e87aa4c49e95 58 /* Exported typedef ----------------------------------------------------------*/
phungductung 0:e87aa4c49e95 59 /** @defgroup NOR_Exported_Types NOR Exported Types
phungductung 0:e87aa4c49e95 60 * @{
phungductung 0:e87aa4c49e95 61 */
phungductung 0:e87aa4c49e95 62
phungductung 0:e87aa4c49e95 63 /**
phungductung 0:e87aa4c49e95 64 * @brief HAL SRAM State structures definition
phungductung 0:e87aa4c49e95 65 */
phungductung 0:e87aa4c49e95 66 typedef enum
phungductung 0:e87aa4c49e95 67 {
phungductung 0:e87aa4c49e95 68 HAL_NOR_STATE_RESET = 0x00, /*!< NOR not yet initialized or disabled */
phungductung 0:e87aa4c49e95 69 HAL_NOR_STATE_READY = 0x01, /*!< NOR initialized and ready for use */
phungductung 0:e87aa4c49e95 70 HAL_NOR_STATE_BUSY = 0x02, /*!< NOR internal processing is ongoing */
phungductung 0:e87aa4c49e95 71 HAL_NOR_STATE_ERROR = 0x03, /*!< NOR error state */
phungductung 0:e87aa4c49e95 72 HAL_NOR_STATE_PROTECTED = 0x04 /*!< NOR NORSRAM device write protected */
phungductung 0:e87aa4c49e95 73 }HAL_NOR_StateTypeDef;
phungductung 0:e87aa4c49e95 74
phungductung 0:e87aa4c49e95 75 /**
phungductung 0:e87aa4c49e95 76 * @brief FMC NOR Status typedef
phungductung 0:e87aa4c49e95 77 */
phungductung 0:e87aa4c49e95 78 typedef enum
phungductung 0:e87aa4c49e95 79 {
phungductung 0:e87aa4c49e95 80 HAL_NOR_STATUS_SUCCESS = 0,
phungductung 0:e87aa4c49e95 81 HAL_NOR_STATUS_ONGOING,
phungductung 0:e87aa4c49e95 82 HAL_NOR_STATUS_ERROR,
phungductung 0:e87aa4c49e95 83 HAL_NOR_STATUS_TIMEOUT
phungductung 0:e87aa4c49e95 84 }HAL_NOR_StatusTypeDef;
phungductung 0:e87aa4c49e95 85
phungductung 0:e87aa4c49e95 86 /**
phungductung 0:e87aa4c49e95 87 * @brief FMC NOR ID typedef
phungductung 0:e87aa4c49e95 88 */
phungductung 0:e87aa4c49e95 89 typedef struct
phungductung 0:e87aa4c49e95 90 {
phungductung 0:e87aa4c49e95 91 uint16_t Manufacturer_Code; /*!< Defines the device's manufacturer code used to identify the memory */
phungductung 0:e87aa4c49e95 92
phungductung 0:e87aa4c49e95 93 uint16_t Device_Code1;
phungductung 0:e87aa4c49e95 94
phungductung 0:e87aa4c49e95 95 uint16_t Device_Code2;
phungductung 0:e87aa4c49e95 96
phungductung 0:e87aa4c49e95 97 uint16_t Device_Code3; /*!< Defines the device's codes used to identify the memory.
phungductung 0:e87aa4c49e95 98 These codes can be accessed by performing read operations with specific
phungductung 0:e87aa4c49e95 99 control signals and addresses set.They can also be accessed by issuing
phungductung 0:e87aa4c49e95 100 an Auto Select command */
phungductung 0:e87aa4c49e95 101 }NOR_IDTypeDef;
phungductung 0:e87aa4c49e95 102
phungductung 0:e87aa4c49e95 103 /**
phungductung 0:e87aa4c49e95 104 * @brief FMC NOR CFI typedef
phungductung 0:e87aa4c49e95 105 */
phungductung 0:e87aa4c49e95 106 typedef struct
phungductung 0:e87aa4c49e95 107 {
phungductung 0:e87aa4c49e95 108 /*!< Defines the information stored in the memory's Common flash interface
phungductung 0:e87aa4c49e95 109 which contains a description of various electrical and timing parameters,
phungductung 0:e87aa4c49e95 110 density information and functions supported by the memory */
phungductung 0:e87aa4c49e95 111
phungductung 0:e87aa4c49e95 112 uint16_t CFI_1;
phungductung 0:e87aa4c49e95 113
phungductung 0:e87aa4c49e95 114 uint16_t CFI_2;
phungductung 0:e87aa4c49e95 115
phungductung 0:e87aa4c49e95 116 uint16_t CFI_3;
phungductung 0:e87aa4c49e95 117
phungductung 0:e87aa4c49e95 118 uint16_t CFI_4;
phungductung 0:e87aa4c49e95 119 }NOR_CFITypeDef;
phungductung 0:e87aa4c49e95 120
phungductung 0:e87aa4c49e95 121 /**
phungductung 0:e87aa4c49e95 122 * @brief NOR handle Structure definition
phungductung 0:e87aa4c49e95 123 */
phungductung 0:e87aa4c49e95 124 typedef struct
phungductung 0:e87aa4c49e95 125 {
phungductung 0:e87aa4c49e95 126 FMC_NORSRAM_TypeDef *Instance; /*!< Register base address */
phungductung 0:e87aa4c49e95 127
phungductung 0:e87aa4c49e95 128 FMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */
phungductung 0:e87aa4c49e95 129
phungductung 0:e87aa4c49e95 130 FMC_NORSRAM_InitTypeDef Init; /*!< NOR device control configuration parameters */
phungductung 0:e87aa4c49e95 131
phungductung 0:e87aa4c49e95 132 HAL_LockTypeDef Lock; /*!< NOR locking object */
phungductung 0:e87aa4c49e95 133
phungductung 0:e87aa4c49e95 134 __IO HAL_NOR_StateTypeDef State; /*!< NOR device access state */
phungductung 0:e87aa4c49e95 135
phungductung 0:e87aa4c49e95 136 }NOR_HandleTypeDef;
phungductung 0:e87aa4c49e95 137 /**
phungductung 0:e87aa4c49e95 138 * @}
phungductung 0:e87aa4c49e95 139 */
phungductung 0:e87aa4c49e95 140
phungductung 0:e87aa4c49e95 141 /* Exported constants --------------------------------------------------------*/
phungductung 0:e87aa4c49e95 142 /* Exported macro ------------------------------------------------------------*/
phungductung 0:e87aa4c49e95 143 /** @defgroup NOR_Exported_Macros NOR Exported Macros
phungductung 0:e87aa4c49e95 144 * @{
phungductung 0:e87aa4c49e95 145 */
phungductung 0:e87aa4c49e95 146 /** @brief Reset NOR handle state
phungductung 0:e87aa4c49e95 147 * @param __HANDLE__: specifies the NOR handle.
phungductung 0:e87aa4c49e95 148 * @retval None
phungductung 0:e87aa4c49e95 149 */
phungductung 0:e87aa4c49e95 150 #define __HAL_NOR_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NOR_STATE_RESET)
phungductung 0:e87aa4c49e95 151 /**
phungductung 0:e87aa4c49e95 152 * @}
phungductung 0:e87aa4c49e95 153 */
phungductung 0:e87aa4c49e95 154
phungductung 0:e87aa4c49e95 155 /* Exported functions --------------------------------------------------------*/
phungductung 0:e87aa4c49e95 156 /** @addtogroup NOR_Exported_Functions NOR Exported Functions
phungductung 0:e87aa4c49e95 157 * @{
phungductung 0:e87aa4c49e95 158 */
phungductung 0:e87aa4c49e95 159
phungductung 0:e87aa4c49e95 160 /** @addtogroup NOR_Exported_Functions_Group1 Initialization and de-initialization functions
phungductung 0:e87aa4c49e95 161 * @{
phungductung 0:e87aa4c49e95 162 */
phungductung 0:e87aa4c49e95 163
phungductung 0:e87aa4c49e95 164 /* Initialization/de-initialization functions ********************************/
phungductung 0:e87aa4c49e95 165 HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming);
phungductung 0:e87aa4c49e95 166 HAL_StatusTypeDef HAL_NOR_DeInit(NOR_HandleTypeDef *hnor);
phungductung 0:e87aa4c49e95 167 void HAL_NOR_MspInit(NOR_HandleTypeDef *hnor);
phungductung 0:e87aa4c49e95 168 void HAL_NOR_MspDeInit(NOR_HandleTypeDef *hnor);
phungductung 0:e87aa4c49e95 169 void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout);
phungductung 0:e87aa4c49e95 170 /**
phungductung 0:e87aa4c49e95 171 * @}
phungductung 0:e87aa4c49e95 172 */
phungductung 0:e87aa4c49e95 173
phungductung 0:e87aa4c49e95 174 /** @addtogroup NOR_Exported_Functions_Group2 Input and Output functions
phungductung 0:e87aa4c49e95 175 * @{
phungductung 0:e87aa4c49e95 176 */
phungductung 0:e87aa4c49e95 177
phungductung 0:e87aa4c49e95 178 /* I/O operation functions ***************************************************/
phungductung 0:e87aa4c49e95 179 HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_ID);
phungductung 0:e87aa4c49e95 180 HAL_StatusTypeDef HAL_NOR_ReturnToReadMode(NOR_HandleTypeDef *hnor);
phungductung 0:e87aa4c49e95 181 HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData);
phungductung 0:e87aa4c49e95 182 HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData);
phungductung 0:e87aa4c49e95 183
phungductung 0:e87aa4c49e95 184 HAL_StatusTypeDef HAL_NOR_ReadBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize);
phungductung 0:e87aa4c49e95 185 HAL_StatusTypeDef HAL_NOR_ProgramBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize);
phungductung 0:e87aa4c49e95 186
phungductung 0:e87aa4c49e95 187 HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAddress, uint32_t Address);
phungductung 0:e87aa4c49e95 188 HAL_StatusTypeDef HAL_NOR_Erase_Chip(NOR_HandleTypeDef *hnor, uint32_t Address);
phungductung 0:e87aa4c49e95 189 HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR_CFI);
phungductung 0:e87aa4c49e95 190 /**
phungductung 0:e87aa4c49e95 191 * @}
phungductung 0:e87aa4c49e95 192 */
phungductung 0:e87aa4c49e95 193
phungductung 0:e87aa4c49e95 194 /** @addtogroup NOR_Exported_Functions_Group3 NOR Control functions
phungductung 0:e87aa4c49e95 195 * @{
phungductung 0:e87aa4c49e95 196 */
phungductung 0:e87aa4c49e95 197
phungductung 0:e87aa4c49e95 198 /* NOR Control functions *****************************************************/
phungductung 0:e87aa4c49e95 199 HAL_StatusTypeDef HAL_NOR_WriteOperation_Enable(NOR_HandleTypeDef *hnor);
phungductung 0:e87aa4c49e95 200 HAL_StatusTypeDef HAL_NOR_WriteOperation_Disable(NOR_HandleTypeDef *hnor);
phungductung 0:e87aa4c49e95 201 /**
phungductung 0:e87aa4c49e95 202 * @}
phungductung 0:e87aa4c49e95 203 */
phungductung 0:e87aa4c49e95 204
phungductung 0:e87aa4c49e95 205 /** @addtogroup NOR_Exported_Functions_Group4 NOR State functions
phungductung 0:e87aa4c49e95 206 * @{
phungductung 0:e87aa4c49e95 207 */
phungductung 0:e87aa4c49e95 208
phungductung 0:e87aa4c49e95 209 /* NOR State functions ********************************************************/
phungductung 0:e87aa4c49e95 210 HAL_NOR_StateTypeDef HAL_NOR_GetState(NOR_HandleTypeDef *hnor);
phungductung 0:e87aa4c49e95 211 HAL_NOR_StatusTypeDef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Address, uint32_t Timeout);
phungductung 0:e87aa4c49e95 212 /**
phungductung 0:e87aa4c49e95 213 * @}
phungductung 0:e87aa4c49e95 214 */
phungductung 0:e87aa4c49e95 215
phungductung 0:e87aa4c49e95 216 /**
phungductung 0:e87aa4c49e95 217 * @}
phungductung 0:e87aa4c49e95 218 */
phungductung 0:e87aa4c49e95 219
phungductung 0:e87aa4c49e95 220 /* Private types -------------------------------------------------------------*/
phungductung 0:e87aa4c49e95 221 /* Private variables ---------------------------------------------------------*/
phungductung 0:e87aa4c49e95 222 /* Private constants ---------------------------------------------------------*/
phungductung 0:e87aa4c49e95 223 /** @defgroup NOR_Private_Constants NOR Private Constants
phungductung 0:e87aa4c49e95 224 * @{
phungductung 0:e87aa4c49e95 225 */
phungductung 0:e87aa4c49e95 226 /* NOR device IDs addresses */
phungductung 0:e87aa4c49e95 227 #define MC_ADDRESS ((uint16_t)0x0000)
phungductung 0:e87aa4c49e95 228 #define DEVICE_CODE1_ADDR ((uint16_t)0x0001)
phungductung 0:e87aa4c49e95 229 #define DEVICE_CODE2_ADDR ((uint16_t)0x000E)
phungductung 0:e87aa4c49e95 230 #define DEVICE_CODE3_ADDR ((uint16_t)0x000F)
phungductung 0:e87aa4c49e95 231
phungductung 0:e87aa4c49e95 232 /* NOR CFI IDs addresses */
phungductung 0:e87aa4c49e95 233 #define CFI1_ADDRESS ((uint16_t)0x61)
phungductung 0:e87aa4c49e95 234 #define CFI2_ADDRESS ((uint16_t)0x62)
phungductung 0:e87aa4c49e95 235 #define CFI3_ADDRESS ((uint16_t)0x63)
phungductung 0:e87aa4c49e95 236 #define CFI4_ADDRESS ((uint16_t)0x64)
phungductung 0:e87aa4c49e95 237
phungductung 0:e87aa4c49e95 238 /* NOR operation wait timeout */
phungductung 0:e87aa4c49e95 239 #define NOR_TMEOUT ((uint16_t)0xFFFF)
phungductung 0:e87aa4c49e95 240
phungductung 0:e87aa4c49e95 241 /* NOR memory data width */
phungductung 0:e87aa4c49e95 242 #define NOR_MEMORY_8B ((uint8_t)0x0)
phungductung 0:e87aa4c49e95 243 #define NOR_MEMORY_16B ((uint8_t)0x1)
phungductung 0:e87aa4c49e95 244
phungductung 0:e87aa4c49e95 245 /* NOR memory device read/write start address */
phungductung 0:e87aa4c49e95 246 #define NOR_MEMORY_ADRESS1 ((uint32_t)0x60000000)
phungductung 0:e87aa4c49e95 247 #define NOR_MEMORY_ADRESS2 ((uint32_t)0x64000000)
phungductung 0:e87aa4c49e95 248 #define NOR_MEMORY_ADRESS3 ((uint32_t)0x68000000)
phungductung 0:e87aa4c49e95 249 #define NOR_MEMORY_ADRESS4 ((uint32_t)0x6C000000)
phungductung 0:e87aa4c49e95 250 /**
phungductung 0:e87aa4c49e95 251 * @}
phungductung 0:e87aa4c49e95 252 */
phungductung 0:e87aa4c49e95 253
phungductung 0:e87aa4c49e95 254 /* Private macros ------------------------------------------------------------*/
phungductung 0:e87aa4c49e95 255 /** @defgroup NOR_Private_Macros NOR Private Macros
phungductung 0:e87aa4c49e95 256 * @{
phungductung 0:e87aa4c49e95 257 */
phungductung 0:e87aa4c49e95 258 /**
phungductung 0:e87aa4c49e95 259 * @brief NOR memory address shifting.
phungductung 0:e87aa4c49e95 260 * @param __NOR_ADDRESS: NOR base address
phungductung 0:e87aa4c49e95 261 * @param __NOR_MEMORY_WIDTH_: NOR memory width
phungductung 0:e87aa4c49e95 262 * @param __ADDRESS__: NOR memory address
phungductung 0:e87aa4c49e95 263 * @retval NOR shifted address value
phungductung 0:e87aa4c49e95 264 */
phungductung 0:e87aa4c49e95 265 #define NOR_ADDR_SHIFT(__NOR_ADDRESS, __NOR_MEMORY_WIDTH_, __ADDRESS__) \
phungductung 0:e87aa4c49e95 266 ((uint32_t)(((__NOR_MEMORY_WIDTH_) == NOR_MEMORY_8B)? \
phungductung 0:e87aa4c49e95 267 ((uint32_t)((__NOR_ADDRESS) + (2 * (__ADDRESS__)))): \
phungductung 0:e87aa4c49e95 268 ((uint32_t)((__NOR_ADDRESS) + (__ADDRESS__)))))
phungductung 0:e87aa4c49e95 269
phungductung 0:e87aa4c49e95 270 /**
phungductung 0:e87aa4c49e95 271 * @brief NOR memory write data to specified address.
phungductung 0:e87aa4c49e95 272 * @param __ADDRESS__: NOR memory address
phungductung 0:e87aa4c49e95 273 * @param __DATA__: Data to write
phungductung 0:e87aa4c49e95 274 * @retval None
phungductung 0:e87aa4c49e95 275 */
phungductung 0:e87aa4c49e95 276 #define NOR_WRITE(__ADDRESS__, __DATA__) do{ \
phungductung 0:e87aa4c49e95 277 (*(__IO uint16_t *)((uint32_t)(__ADDRESS__)) = (__DATA__)); \
phungductung 0:e87aa4c49e95 278 __DSB(); \
phungductung 0:e87aa4c49e95 279 } while(0)
phungductung 0:e87aa4c49e95 280
phungductung 0:e87aa4c49e95 281 /**
phungductung 0:e87aa4c49e95 282 * @}
phungductung 0:e87aa4c49e95 283 */
phungductung 0:e87aa4c49e95 284
phungductung 0:e87aa4c49e95 285 /**
phungductung 0:e87aa4c49e95 286 * @}
phungductung 0:e87aa4c49e95 287 */
phungductung 0:e87aa4c49e95 288
phungductung 0:e87aa4c49e95 289 /**
phungductung 0:e87aa4c49e95 290 * @}
phungductung 0:e87aa4c49e95 291 */
phungductung 0:e87aa4c49e95 292
phungductung 0:e87aa4c49e95 293 #ifdef __cplusplus
phungductung 0:e87aa4c49e95 294 }
phungductung 0:e87aa4c49e95 295 #endif
phungductung 0:e87aa4c49e95 296
phungductung 0:e87aa4c49e95 297 #endif /* __STM32F7xx_HAL_NOR_H */
phungductung 0:e87aa4c49e95 298
phungductung 0:e87aa4c49e95 299 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/