PHung Tung / SRC_STM32F7

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targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_gpio.c@0:e87aa4c49e95, 2019-06-04 (annotated)

Committer:
phungductung
Date:
Tue Jun 04 21:51:46 2019 +0000
Revision:
0:e87aa4c49e95
libray

Who changed what in which revision?

UserRevisionLine numberNew contents of line
phungductung 0:e87aa4c49e95 1 /**
phungductung 0:e87aa4c49e95 2 ******************************************************************************
phungductung 0:e87aa4c49e95 3 * @file stm32f7xx_hal_gpio.c
phungductung 0:e87aa4c49e95 4 * @author MCD Application Team
phungductung 0:e87aa4c49e95 5 * @version V1.0.4
phungductung 0:e87aa4c49e95 6 * @date 09-December-2015
phungductung 0:e87aa4c49e95 7 * @brief GPIO HAL module driver.
phungductung 0:e87aa4c49e95 8 * This file provides firmware functions to manage the following
phungductung 0:e87aa4c49e95 9 * functionalities of the General Purpose Input/Output (GPIO) peripheral:
phungductung 0:e87aa4c49e95 10 * + Initialization and de-initialization functions
phungductung 0:e87aa4c49e95 11 * + IO operation functions
phungductung 0:e87aa4c49e95 12 *
phungductung 0:e87aa4c49e95 13 @verbatim
phungductung 0:e87aa4c49e95 14 ==============================================================================
phungductung 0:e87aa4c49e95 15 ##### GPIO Peripheral features #####
phungductung 0:e87aa4c49e95 16 ==============================================================================
phungductung 0:e87aa4c49e95 17 [..]
phungductung 0:e87aa4c49e95 18 Subject to the specific hardware characteristics of each I/O port listed in the datasheet, each
phungductung 0:e87aa4c49e95 19 port bit of the General Purpose IO (GPIO) Ports, can be individually configured by software
phungductung 0:e87aa4c49e95 20 in several modes:
phungductung 0:e87aa4c49e95 21 (+) Input mode
phungductung 0:e87aa4c49e95 22 (+) Analog mode
phungductung 0:e87aa4c49e95 23 (+) Output mode
phungductung 0:e87aa4c49e95 24 (+) Alternate function mode
phungductung 0:e87aa4c49e95 25 (+) External interrupt/event lines
phungductung 0:e87aa4c49e95 26
phungductung 0:e87aa4c49e95 27 [..]
phungductung 0:e87aa4c49e95 28 During and just after reset, the alternate functions and external interrupt
phungductung 0:e87aa4c49e95 29 lines are not active and the I/O ports are configured in input floating mode.
phungductung 0:e87aa4c49e95 30
phungductung 0:e87aa4c49e95 31 [..]
phungductung 0:e87aa4c49e95 32 All GPIO pins have weak internal pull-up and pull-down resistors, which can be
phungductung 0:e87aa4c49e95 33 activated or not.
phungductung 0:e87aa4c49e95 34
phungductung 0:e87aa4c49e95 35 [..]
phungductung 0:e87aa4c49e95 36 In Output or Alternate mode, each IO can be configured on open-drain or push-pull
phungductung 0:e87aa4c49e95 37 type and the IO speed can be selected depending on the VDD value.
phungductung 0:e87aa4c49e95 38
phungductung 0:e87aa4c49e95 39 [..]
phungductung 0:e87aa4c49e95 40 All ports have external interrupt/event capability. To use external interrupt
phungductung 0:e87aa4c49e95 41 lines, the port must be configured in input mode. All available GPIO pins are
phungductung 0:e87aa4c49e95 42 connected to the 16 external interrupt/event lines from EXTI0 to EXTI15.
phungductung 0:e87aa4c49e95 43
phungductung 0:e87aa4c49e95 44 [..]
phungductung 0:e87aa4c49e95 45 The external interrupt/event controller consists of up to 23 edge detectors
phungductung 0:e87aa4c49e95 46 (16 lines are connected to GPIO) for generating event/interrupt requests (each
phungductung 0:e87aa4c49e95 47 input line can be independently configured to select the type (interrupt or event)
phungductung 0:e87aa4c49e95 48 and the corresponding trigger event (rising or falling or both). Each line can
phungductung 0:e87aa4c49e95 49 also be masked independently.
phungductung 0:e87aa4c49e95 50
phungductung 0:e87aa4c49e95 51 ##### How to use this driver #####
phungductung 0:e87aa4c49e95 52 ==============================================================================
phungductung 0:e87aa4c49e95 53 [..]
phungductung 0:e87aa4c49e95 54 (#) Enable the GPIO AHB clock using the following function: __HAL_RCC_GPIOx_CLK_ENABLE().
phungductung 0:e87aa4c49e95 55
phungductung 0:e87aa4c49e95 56 (#) Configure the GPIO pin(s) using HAL_GPIO_Init().
phungductung 0:e87aa4c49e95 57 (++) Configure the IO mode using "Mode" member from GPIO_InitTypeDef structure
phungductung 0:e87aa4c49e95 58 (++) Activate Pull-up, Pull-down resistor using "Pull" member from GPIO_InitTypeDef
phungductung 0:e87aa4c49e95 59 structure.
phungductung 0:e87aa4c49e95 60 (++) In case of Output or alternate function mode selection: the speed is
phungductung 0:e87aa4c49e95 61 configured through "Speed" member from GPIO_InitTypeDef structure.
phungductung 0:e87aa4c49e95 62 (++) In alternate mode is selection, the alternate function connected to the IO
phungductung 0:e87aa4c49e95 63 is configured through "Alternate" member from GPIO_InitTypeDef structure.
phungductung 0:e87aa4c49e95 64 (++) Analog mode is required when a pin is to be used as ADC channel
phungductung 0:e87aa4c49e95 65 or DAC output.
phungductung 0:e87aa4c49e95 66 (++) In case of external interrupt/event selection the "Mode" member from
phungductung 0:e87aa4c49e95 67 GPIO_InitTypeDef structure select the type (interrupt or event) and
phungductung 0:e87aa4c49e95 68 the corresponding trigger event (rising or falling or both).
phungductung 0:e87aa4c49e95 69
phungductung 0:e87aa4c49e95 70 (#) In case of external interrupt/event mode selection, configure NVIC IRQ priority
phungductung 0:e87aa4c49e95 71 mapped to the EXTI line using HAL_NVIC_SetPriority() and enable it using
phungductung 0:e87aa4c49e95 72 HAL_NVIC_EnableIRQ().
phungductung 0:e87aa4c49e95 73
phungductung 0:e87aa4c49e95 74 (#) To get the level of a pin configured in input mode use HAL_GPIO_ReadPin().
phungductung 0:e87aa4c49e95 75
phungductung 0:e87aa4c49e95 76 (#) To set/reset the level of a pin configured in output mode use
phungductung 0:e87aa4c49e95 77 HAL_GPIO_WritePin()/HAL_GPIO_TogglePin().
phungductung 0:e87aa4c49e95 78
phungductung 0:e87aa4c49e95 79 (#) To lock pin configuration until next reset use HAL_GPIO_LockPin().
phungductung 0:e87aa4c49e95 80
phungductung 0:e87aa4c49e95 81
phungductung 0:e87aa4c49e95 82 (#) During and just after reset, the alternate functions are not
phungductung 0:e87aa4c49e95 83 active and the GPIO pins are configured in input floating mode (except JTAG
phungductung 0:e87aa4c49e95 84 pins).
phungductung 0:e87aa4c49e95 85
phungductung 0:e87aa4c49e95 86 (#) The LSE oscillator pins OSC32_IN and OSC32_OUT can be used as general purpose
phungductung 0:e87aa4c49e95 87 (PC14 and PC15, respectively) when the LSE oscillator is off. The LSE has
phungductung 0:e87aa4c49e95 88 priority over the GPIO function.
phungductung 0:e87aa4c49e95 89
phungductung 0:e87aa4c49e95 90 (#) The HSE oscillator pins OSC_IN/OSC_OUT can be used as
phungductung 0:e87aa4c49e95 91 general purpose PH0 and PH1, respectively, when the HSE oscillator is off.
phungductung 0:e87aa4c49e95 92 The HSE has priority over the GPIO function.
phungductung 0:e87aa4c49e95 93
phungductung 0:e87aa4c49e95 94 @endverbatim
phungductung 0:e87aa4c49e95 95 ******************************************************************************
phungductung 0:e87aa4c49e95 96 * @attention
phungductung 0:e87aa4c49e95 97 *
phungductung 0:e87aa4c49e95 98 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
phungductung 0:e87aa4c49e95 99 *
phungductung 0:e87aa4c49e95 100 * Redistribution and use in source and binary forms, with or without modification,
phungductung 0:e87aa4c49e95 101 * are permitted provided that the following conditions are met:
phungductung 0:e87aa4c49e95 102 * 1. Redistributions of source code must retain the above copyright notice,
phungductung 0:e87aa4c49e95 103 * this list of conditions and the following disclaimer.
phungductung 0:e87aa4c49e95 104 * 2. Redistributions in binary form must reproduce the above copyright notice,
phungductung 0:e87aa4c49e95 105 * this list of conditions and the following disclaimer in the documentation
phungductung 0:e87aa4c49e95 106 * and/or other materials provided with the distribution.
phungductung 0:e87aa4c49e95 107 * 3. Neither the name of STMicroelectronics nor the names of its contributors
phungductung 0:e87aa4c49e95 108 * may be used to endorse or promote products derived from this software
phungductung 0:e87aa4c49e95 109 * without specific prior written permission.
phungductung 0:e87aa4c49e95 110 *
phungductung 0:e87aa4c49e95 111 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
phungductung 0:e87aa4c49e95 112 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
phungductung 0:e87aa4c49e95 113 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
phungductung 0:e87aa4c49e95 114 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
phungductung 0:e87aa4c49e95 115 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
phungductung 0:e87aa4c49e95 116 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
phungductung 0:e87aa4c49e95 117 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
phungductung 0:e87aa4c49e95 118 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
phungductung 0:e87aa4c49e95 119 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
phungductung 0:e87aa4c49e95 120 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
phungductung 0:e87aa4c49e95 121 *
phungductung 0:e87aa4c49e95 122 ******************************************************************************
phungductung 0:e87aa4c49e95 123 */
phungductung 0:e87aa4c49e95 124
phungductung 0:e87aa4c49e95 125 /* Includes ------------------------------------------------------------------*/
phungductung 0:e87aa4c49e95 126 #include "stm32f7xx_hal.h"
phungductung 0:e87aa4c49e95 127
phungductung 0:e87aa4c49e95 128 /** @addtogroup STM32F7xx_HAL_Driver
phungductung 0:e87aa4c49e95 129 * @{
phungductung 0:e87aa4c49e95 130 */
phungductung 0:e87aa4c49e95 131
phungductung 0:e87aa4c49e95 132 /** @defgroup GPIO GPIO
phungductung 0:e87aa4c49e95 133 * @brief GPIO HAL module driver
phungductung 0:e87aa4c49e95 134 * @{
phungductung 0:e87aa4c49e95 135 */
phungductung 0:e87aa4c49e95 136
phungductung 0:e87aa4c49e95 137 #ifdef HAL_GPIO_MODULE_ENABLED
phungductung 0:e87aa4c49e95 138
phungductung 0:e87aa4c49e95 139 /* Private typedef -----------------------------------------------------------*/
phungductung 0:e87aa4c49e95 140 /* Private define ------------------------------------------------------------*/
phungductung 0:e87aa4c49e95 141 /** @addtogroup GPIO_Private_Constants GPIO Private Constants
phungductung 0:e87aa4c49e95 142 * @{
phungductung 0:e87aa4c49e95 143 */
phungductung 0:e87aa4c49e95 144 #define GPIO_MODE ((uint32_t)0x00000003)
phungductung 0:e87aa4c49e95 145 #define EXTI_MODE ((uint32_t)0x10000000)
phungductung 0:e87aa4c49e95 146 #define GPIO_MODE_IT ((uint32_t)0x00010000)
phungductung 0:e87aa4c49e95 147 #define GPIO_MODE_EVT ((uint32_t)0x00020000)
phungductung 0:e87aa4c49e95 148 #define RISING_EDGE ((uint32_t)0x00100000)
phungductung 0:e87aa4c49e95 149 #define FALLING_EDGE ((uint32_t)0x00200000)
phungductung 0:e87aa4c49e95 150 #define GPIO_OUTPUT_TYPE ((uint32_t)0x00000010)
phungductung 0:e87aa4c49e95 151
phungductung 0:e87aa4c49e95 152 #define GPIO_NUMBER ((uint32_t)16)
phungductung 0:e87aa4c49e95 153 /**
phungductung 0:e87aa4c49e95 154 * @}
phungductung 0:e87aa4c49e95 155 */
phungductung 0:e87aa4c49e95 156 /* Private macro -------------------------------------------------------------*/
phungductung 0:e87aa4c49e95 157 /* Private variables ---------------------------------------------------------*/
phungductung 0:e87aa4c49e95 158 /* Private function prototypes -----------------------------------------------*/
phungductung 0:e87aa4c49e95 159 /* Private functions ---------------------------------------------------------*/
phungductung 0:e87aa4c49e95 160 /* Exported functions --------------------------------------------------------*/
phungductung 0:e87aa4c49e95 161 /** @defgroup GPIO_Exported_Functions GPIO Exported Functions
phungductung 0:e87aa4c49e95 162 * @{
phungductung 0:e87aa4c49e95 163 */
phungductung 0:e87aa4c49e95 164
phungductung 0:e87aa4c49e95 165 /** @defgroup GPIO_Exported_Functions_Group1 Initialization and de-initialization functions
phungductung 0:e87aa4c49e95 166 * @brief Initialization and Configuration functions
phungductung 0:e87aa4c49e95 167 *
phungductung 0:e87aa4c49e95 168 @verbatim
phungductung 0:e87aa4c49e95 169 ===============================================================================
phungductung 0:e87aa4c49e95 170 ##### Initialization and de-initialization functions #####
phungductung 0:e87aa4c49e95 171 ===============================================================================
phungductung 0:e87aa4c49e95 172 [..]
phungductung 0:e87aa4c49e95 173 This section provides functions allowing to initialize and de-initialize the GPIOs
phungductung 0:e87aa4c49e95 174 to be ready for use.
phungductung 0:e87aa4c49e95 175
phungductung 0:e87aa4c49e95 176 @endverbatim
phungductung 0:e87aa4c49e95 177 * @{
phungductung 0:e87aa4c49e95 178 */
phungductung 0:e87aa4c49e95 179
phungductung 0:e87aa4c49e95 180 /**
phungductung 0:e87aa4c49e95 181 * @brief Initializes the GPIOx peripheral according to the specified parameters in the GPIO_Init.
phungductung 0:e87aa4c49e95 182 * @param GPIOx: where x can be (A..K) to select the GPIO peripheral.
phungductung 0:e87aa4c49e95 183 * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
phungductung 0:e87aa4c49e95 184 * the configuration information for the specified GPIO peripheral.
phungductung 0:e87aa4c49e95 185 * @retval None
phungductung 0:e87aa4c49e95 186 */
phungductung 0:e87aa4c49e95 187 void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
phungductung 0:e87aa4c49e95 188 {
phungductung 0:e87aa4c49e95 189 uint32_t position = 0x00;
phungductung 0:e87aa4c49e95 190 uint32_t ioposition = 0x00;
phungductung 0:e87aa4c49e95 191 uint32_t iocurrent = 0x00;
phungductung 0:e87aa4c49e95 192 uint32_t temp = 0x00;
phungductung 0:e87aa4c49e95 193
phungductung 0:e87aa4c49e95 194 /* Check the parameters */
phungductung 0:e87aa4c49e95 195 assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
phungductung 0:e87aa4c49e95 196 assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
phungductung 0:e87aa4c49e95 197 assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
phungductung 0:e87aa4c49e95 198 assert_param(IS_GPIO_PULL(GPIO_Init->Pull));
phungductung 0:e87aa4c49e95 199
phungductung 0:e87aa4c49e95 200 /* Configure the port pins */
phungductung 0:e87aa4c49e95 201 for(position = 0; position < GPIO_NUMBER; position++)
phungductung 0:e87aa4c49e95 202 {
phungductung 0:e87aa4c49e95 203 /* Get the IO position */
phungductung 0:e87aa4c49e95 204 ioposition = ((uint32_t)0x01) << position;
phungductung 0:e87aa4c49e95 205 /* Get the current IO position */
phungductung 0:e87aa4c49e95 206 iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
phungductung 0:e87aa4c49e95 207
phungductung 0:e87aa4c49e95 208 if(iocurrent == ioposition)
phungductung 0:e87aa4c49e95 209 {
phungductung 0:e87aa4c49e95 210 /*--------------------- GPIO Mode Configuration ------------------------*/
phungductung 0:e87aa4c49e95 211 /* In case of Alternate function mode selection */
phungductung 0:e87aa4c49e95 212 if((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
phungductung 0:e87aa4c49e95 213 {
phungductung 0:e87aa4c49e95 214 /* Check the Alternate function parameter */
phungductung 0:e87aa4c49e95 215 assert_param(IS_GPIO_AF(GPIO_Init->Alternate));
phungductung 0:e87aa4c49e95 216
phungductung 0:e87aa4c49e95 217 /* Configure Alternate function mapped with the current IO */
phungductung 0:e87aa4c49e95 218 temp = GPIOx->AFR[position >> 3];
phungductung 0:e87aa4c49e95 219 temp &= ~((uint32_t)0xF << ((uint32_t)(position & (uint32_t)0x07) * 4)) ;
phungductung 0:e87aa4c49e95 220 temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & (uint32_t)0x07) * 4));
phungductung 0:e87aa4c49e95 221 GPIOx->AFR[position >> 3] = temp;
phungductung 0:e87aa4c49e95 222 }
phungductung 0:e87aa4c49e95 223
phungductung 0:e87aa4c49e95 224 /* Configure IO Direction mode (Input, Output, Alternate or Analog) */
phungductung 0:e87aa4c49e95 225 temp = GPIOx->MODER;
phungductung 0:e87aa4c49e95 226 temp &= ~(GPIO_MODER_MODER0 << (position * 2));
phungductung 0:e87aa4c49e95 227 temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2));
phungductung 0:e87aa4c49e95 228 GPIOx->MODER = temp;
phungductung 0:e87aa4c49e95 229
phungductung 0:e87aa4c49e95 230 /* In case of Output or Alternate function mode selection */
phungductung 0:e87aa4c49e95 231 if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) ||
phungductung 0:e87aa4c49e95 232 (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
phungductung 0:e87aa4c49e95 233 {
phungductung 0:e87aa4c49e95 234 /* Check the Speed parameter */
phungductung 0:e87aa4c49e95 235 assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
phungductung 0:e87aa4c49e95 236 /* Configure the IO Speed */
phungductung 0:e87aa4c49e95 237 temp = GPIOx->OSPEEDR;
phungductung 0:e87aa4c49e95 238 temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2));
phungductung 0:e87aa4c49e95 239 temp |= (GPIO_Init->Speed << (position * 2));
phungductung 0:e87aa4c49e95 240 GPIOx->OSPEEDR = temp;
phungductung 0:e87aa4c49e95 241
phungductung 0:e87aa4c49e95 242 /* Configure the IO Output Type */
phungductung 0:e87aa4c49e95 243 temp = GPIOx->OTYPER;
phungductung 0:e87aa4c49e95 244 temp &= ~(GPIO_OTYPER_OT_0 << position) ;
phungductung 0:e87aa4c49e95 245 temp |= (((GPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4) << position);
phungductung 0:e87aa4c49e95 246 GPIOx->OTYPER = temp;
phungductung 0:e87aa4c49e95 247 }
phungductung 0:e87aa4c49e95 248
phungductung 0:e87aa4c49e95 249 /* Activate the Pull-up or Pull down resistor for the current IO */
phungductung 0:e87aa4c49e95 250 temp = GPIOx->PUPDR;
phungductung 0:e87aa4c49e95 251 temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2));
phungductung 0:e87aa4c49e95 252 temp |= ((GPIO_Init->Pull) << (position * 2));
phungductung 0:e87aa4c49e95 253 GPIOx->PUPDR = temp;
phungductung 0:e87aa4c49e95 254
phungductung 0:e87aa4c49e95 255 /*--------------------- EXTI Mode Configuration ------------------------*/
phungductung 0:e87aa4c49e95 256 /* Configure the External Interrupt or event for the current IO */
phungductung 0:e87aa4c49e95 257 if((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
phungductung 0:e87aa4c49e95 258 {
phungductung 0:e87aa4c49e95 259 /* Enable SYSCFG Clock */
phungductung 0:e87aa4c49e95 260 __HAL_RCC_SYSCFG_CLK_ENABLE();
phungductung 0:e87aa4c49e95 261
phungductung 0:e87aa4c49e95 262 temp = SYSCFG->EXTICR[position >> 2];
phungductung 0:e87aa4c49e95 263 temp &= ~(((uint32_t)0x0F) << (4 * (position & 0x03)));
phungductung 0:e87aa4c49e95 264 temp |= ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4 * (position & 0x03)));
phungductung 0:e87aa4c49e95 265 SYSCFG->EXTICR[position >> 2] = temp;
phungductung 0:e87aa4c49e95 266
phungductung 0:e87aa4c49e95 267 /* Clear EXTI line configuration */
phungductung 0:e87aa4c49e95 268 temp = EXTI->IMR;
phungductung 0:e87aa4c49e95 269 temp &= ~((uint32_t)iocurrent);
phungductung 0:e87aa4c49e95 270 if((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
phungductung 0:e87aa4c49e95 271 {
phungductung 0:e87aa4c49e95 272 temp |= iocurrent;
phungductung 0:e87aa4c49e95 273 }
phungductung 0:e87aa4c49e95 274 EXTI->IMR = temp;
phungductung 0:e87aa4c49e95 275
phungductung 0:e87aa4c49e95 276 temp = EXTI->EMR;
phungductung 0:e87aa4c49e95 277 temp &= ~((uint32_t)iocurrent);
phungductung 0:e87aa4c49e95 278 if((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
phungductung 0:e87aa4c49e95 279 {
phungductung 0:e87aa4c49e95 280 temp |= iocurrent;
phungductung 0:e87aa4c49e95 281 }
phungductung 0:e87aa4c49e95 282 EXTI->EMR = temp;
phungductung 0:e87aa4c49e95 283
phungductung 0:e87aa4c49e95 284 /* Clear Rising Falling edge configuration */
phungductung 0:e87aa4c49e95 285 temp = EXTI->RTSR;
phungductung 0:e87aa4c49e95 286 temp &= ~((uint32_t)iocurrent);
phungductung 0:e87aa4c49e95 287 if((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
phungductung 0:e87aa4c49e95 288 {
phungductung 0:e87aa4c49e95 289 temp |= iocurrent;
phungductung 0:e87aa4c49e95 290 }
phungductung 0:e87aa4c49e95 291 EXTI->RTSR = temp;
phungductung 0:e87aa4c49e95 292
phungductung 0:e87aa4c49e95 293 temp = EXTI->FTSR;
phungductung 0:e87aa4c49e95 294 temp &= ~((uint32_t)iocurrent);
phungductung 0:e87aa4c49e95 295 if((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
phungductung 0:e87aa4c49e95 296 {
phungductung 0:e87aa4c49e95 297 temp |= iocurrent;
phungductung 0:e87aa4c49e95 298 }
phungductung 0:e87aa4c49e95 299 EXTI->FTSR = temp;
phungductung 0:e87aa4c49e95 300 }
phungductung 0:e87aa4c49e95 301 }
phungductung 0:e87aa4c49e95 302 }
phungductung 0:e87aa4c49e95 303 }
phungductung 0:e87aa4c49e95 304
phungductung 0:e87aa4c49e95 305 /**
phungductung 0:e87aa4c49e95 306 * @brief De-initializes the GPIOx peripheral registers to their default reset values.
phungductung 0:e87aa4c49e95 307 * @param GPIOx: where x can be (A..K) to select the GPIO peripheral.
phungductung 0:e87aa4c49e95 308 * @param GPIO_Pin: specifies the port bit to be written.
phungductung 0:e87aa4c49e95 309 * This parameter can be one of GPIO_PIN_x where x can be (0..15).
phungductung 0:e87aa4c49e95 310 * @retval None
phungductung 0:e87aa4c49e95 311 */
phungductung 0:e87aa4c49e95 312 void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin)
phungductung 0:e87aa4c49e95 313 {
phungductung 0:e87aa4c49e95 314 uint32_t position;
phungductung 0:e87aa4c49e95 315 uint32_t ioposition = 0x00;
phungductung 0:e87aa4c49e95 316 uint32_t iocurrent = 0x00;
phungductung 0:e87aa4c49e95 317 uint32_t tmp = 0x00;
phungductung 0:e87aa4c49e95 318
phungductung 0:e87aa4c49e95 319 /* Check the parameters */
phungductung 0:e87aa4c49e95 320 assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
phungductung 0:e87aa4c49e95 321
phungductung 0:e87aa4c49e95 322 /* Configure the port pins */
phungductung 0:e87aa4c49e95 323 for(position = 0; position < GPIO_NUMBER; position++)
phungductung 0:e87aa4c49e95 324 {
phungductung 0:e87aa4c49e95 325 /* Get the IO position */
phungductung 0:e87aa4c49e95 326 ioposition = ((uint32_t)0x01) << position;
phungductung 0:e87aa4c49e95 327 /* Get the current IO position */
phungductung 0:e87aa4c49e95 328 iocurrent = (GPIO_Pin) & ioposition;
phungductung 0:e87aa4c49e95 329
phungductung 0:e87aa4c49e95 330 if(iocurrent == ioposition)
phungductung 0:e87aa4c49e95 331 {
phungductung 0:e87aa4c49e95 332 /*------------------------- GPIO Mode Configuration --------------------*/
phungductung 0:e87aa4c49e95 333 /* Configure IO Direction in Input Floating Mode */
phungductung 0:e87aa4c49e95 334 GPIOx->MODER &= ~(GPIO_MODER_MODER0 << (position * 2));
phungductung 0:e87aa4c49e95 335
phungductung 0:e87aa4c49e95 336 /* Configure the default Alternate Function in current IO */
phungductung 0:e87aa4c49e95 337 GPIOx->AFR[position >> 3] &= ~((uint32_t)0xF << ((uint32_t)(position & (uint32_t)0x07) * 4)) ;
phungductung 0:e87aa4c49e95 338
phungductung 0:e87aa4c49e95 339 /* Configure the default value for IO Speed */
phungductung 0:e87aa4c49e95 340 GPIOx->OSPEEDR &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2));
phungductung 0:e87aa4c49e95 341
phungductung 0:e87aa4c49e95 342 /* Configure the default value IO Output Type */
phungductung 0:e87aa4c49e95 343 GPIOx->OTYPER &= ~(GPIO_OTYPER_OT_0 << position) ;
phungductung 0:e87aa4c49e95 344
phungductung 0:e87aa4c49e95 345 /* Deactivate the Pull-up and Pull-down resistor for the current IO */
phungductung 0:e87aa4c49e95 346 GPIOx->PUPDR &= ~(GPIO_PUPDR_PUPDR0 << (position * 2));
phungductung 0:e87aa4c49e95 347
phungductung 0:e87aa4c49e95 348 /*------------------------- EXTI Mode Configuration --------------------*/
phungductung 0:e87aa4c49e95 349 tmp = SYSCFG->EXTICR[position >> 2];
phungductung 0:e87aa4c49e95 350 tmp &= (((uint32_t)0x0F) << (4 * (position & 0x03)));
phungductung 0:e87aa4c49e95 351 if(tmp == ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4 * (position & 0x03))))
phungductung 0:e87aa4c49e95 352 {
phungductung 0:e87aa4c49e95 353 /* Configure the External Interrupt or event for the current IO */
phungductung 0:e87aa4c49e95 354 tmp = ((uint32_t)0x0F) << (4 * (position & 0x03));
phungductung 0:e87aa4c49e95 355 SYSCFG->EXTICR[position >> 2] &= ~tmp;
phungductung 0:e87aa4c49e95 356
phungductung 0:e87aa4c49e95 357 /* Clear EXTI line configuration */
phungductung 0:e87aa4c49e95 358 EXTI->IMR &= ~((uint32_t)iocurrent);
phungductung 0:e87aa4c49e95 359 EXTI->EMR &= ~((uint32_t)iocurrent);
phungductung 0:e87aa4c49e95 360
phungductung 0:e87aa4c49e95 361 /* Clear Rising Falling edge configuration */
phungductung 0:e87aa4c49e95 362 EXTI->RTSR &= ~((uint32_t)iocurrent);
phungductung 0:e87aa4c49e95 363 EXTI->FTSR &= ~((uint32_t)iocurrent);
phungductung 0:e87aa4c49e95 364 }
phungductung 0:e87aa4c49e95 365 }
phungductung 0:e87aa4c49e95 366 }
phungductung 0:e87aa4c49e95 367 }
phungductung 0:e87aa4c49e95 368
phungductung 0:e87aa4c49e95 369 /**
phungductung 0:e87aa4c49e95 370 * @}
phungductung 0:e87aa4c49e95 371 */
phungductung 0:e87aa4c49e95 372
phungductung 0:e87aa4c49e95 373 /** @defgroup GPIO_Exported_Functions_Group2 IO operation functions
phungductung 0:e87aa4c49e95 374 * @brief GPIO Read and Write
phungductung 0:e87aa4c49e95 375 *
phungductung 0:e87aa4c49e95 376 @verbatim
phungductung 0:e87aa4c49e95 377 ===============================================================================
phungductung 0:e87aa4c49e95 378 ##### IO operation functions #####
phungductung 0:e87aa4c49e95 379 ===============================================================================
phungductung 0:e87aa4c49e95 380
phungductung 0:e87aa4c49e95 381 @endverbatim
phungductung 0:e87aa4c49e95 382 * @{
phungductung 0:e87aa4c49e95 383 */
phungductung 0:e87aa4c49e95 384
phungductung 0:e87aa4c49e95 385 /**
phungductung 0:e87aa4c49e95 386 * @brief Reads the specified input port pin.
phungductung 0:e87aa4c49e95 387 * @param GPIOx: where x can be (A..K) to select the GPIO peripheral.
phungductung 0:e87aa4c49e95 388 * @param GPIO_Pin: specifies the port bit to read.
phungductung 0:e87aa4c49e95 389 * This parameter can be GPIO_PIN_x where x can be (0..15).
phungductung 0:e87aa4c49e95 390 * @retval The input port pin value.
phungductung 0:e87aa4c49e95 391 */
phungductung 0:e87aa4c49e95 392 GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
phungductung 0:e87aa4c49e95 393 {
phungductung 0:e87aa4c49e95 394 GPIO_PinState bitstatus;
phungductung 0:e87aa4c49e95 395
phungductung 0:e87aa4c49e95 396 /* Check the parameters */
phungductung 0:e87aa4c49e95 397 assert_param(IS_GPIO_PIN(GPIO_Pin));
phungductung 0:e87aa4c49e95 398
phungductung 0:e87aa4c49e95 399 if((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET)
phungductung 0:e87aa4c49e95 400 {
phungductung 0:e87aa4c49e95 401 bitstatus = GPIO_PIN_SET;
phungductung 0:e87aa4c49e95 402 }
phungductung 0:e87aa4c49e95 403 else
phungductung 0:e87aa4c49e95 404 {
phungductung 0:e87aa4c49e95 405 bitstatus = GPIO_PIN_RESET;
phungductung 0:e87aa4c49e95 406 }
phungductung 0:e87aa4c49e95 407 return bitstatus;
phungductung 0:e87aa4c49e95 408 }
phungductung 0:e87aa4c49e95 409
phungductung 0:e87aa4c49e95 410 /**
phungductung 0:e87aa4c49e95 411 * @brief Sets or clears the selected data port bit.
phungductung 0:e87aa4c49e95 412 *
phungductung 0:e87aa4c49e95 413 * @note This function uses GPIOx_BSRR register to allow atomic read/modify
phungductung 0:e87aa4c49e95 414 * accesses. In this way, there is no risk of an IRQ occurring between
phungductung 0:e87aa4c49e95 415 * the read and the modify access.
phungductung 0:e87aa4c49e95 416 *
phungductung 0:e87aa4c49e95 417 * @param GPIOx: where x can be (A..K) to select the GPIO peripheral.
phungductung 0:e87aa4c49e95 418 * @param GPIO_Pin: specifies the port bit to be written.
phungductung 0:e87aa4c49e95 419 * This parameter can be one of GPIO_PIN_x where x can be (0..15).
phungductung 0:e87aa4c49e95 420 * @param PinState: specifies the value to be written to the selected bit.
phungductung 0:e87aa4c49e95 421 * This parameter can be one of the GPIO_PinState enum values:
phungductung 0:e87aa4c49e95 422 * @arg GPIO_PIN_RESET: to clear the port pin
phungductung 0:e87aa4c49e95 423 * @arg GPIO_PIN_SET: to set the port pin
phungductung 0:e87aa4c49e95 424 * @retval None
phungductung 0:e87aa4c49e95 425 */
phungductung 0:e87aa4c49e95 426 void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
phungductung 0:e87aa4c49e95 427 {
phungductung 0:e87aa4c49e95 428 /* Check the parameters */
phungductung 0:e87aa4c49e95 429 assert_param(IS_GPIO_PIN(GPIO_Pin));
phungductung 0:e87aa4c49e95 430 assert_param(IS_GPIO_PIN_ACTION(PinState));
phungductung 0:e87aa4c49e95 431
phungductung 0:e87aa4c49e95 432 if(PinState != GPIO_PIN_RESET)
phungductung 0:e87aa4c49e95 433 {
phungductung 0:e87aa4c49e95 434 GPIOx->BSRR = GPIO_Pin;
phungductung 0:e87aa4c49e95 435 }
phungductung 0:e87aa4c49e95 436 else
phungductung 0:e87aa4c49e95 437 {
phungductung 0:e87aa4c49e95 438 GPIOx->BSRR = (uint32_t)GPIO_Pin << 16;
phungductung 0:e87aa4c49e95 439 }
phungductung 0:e87aa4c49e95 440 }
phungductung 0:e87aa4c49e95 441
phungductung 0:e87aa4c49e95 442 /**
phungductung 0:e87aa4c49e95 443 * @brief Toggles the specified GPIO pins.
phungductung 0:e87aa4c49e95 444 * @param GPIOx: Where x can be (A..I) to select the GPIO peripheral.
phungductung 0:e87aa4c49e95 445 * @param GPIO_Pin: Specifies the pins to be toggled.
phungductung 0:e87aa4c49e95 446 * @retval None
phungductung 0:e87aa4c49e95 447 */
phungductung 0:e87aa4c49e95 448 void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
phungductung 0:e87aa4c49e95 449 {
phungductung 0:e87aa4c49e95 450 /* Check the parameters */
phungductung 0:e87aa4c49e95 451 assert_param(IS_GPIO_PIN(GPIO_Pin));
phungductung 0:e87aa4c49e95 452
phungductung 0:e87aa4c49e95 453 GPIOx->ODR ^= GPIO_Pin;
phungductung 0:e87aa4c49e95 454 }
phungductung 0:e87aa4c49e95 455
phungductung 0:e87aa4c49e95 456 /**
phungductung 0:e87aa4c49e95 457 * @brief Locks GPIO Pins configuration registers.
phungductung 0:e87aa4c49e95 458 * @note The locked registers are GPIOx_MODER, GPIOx_OTYPER, GPIOx_OSPEEDR,
phungductung 0:e87aa4c49e95 459 * GPIOx_PUPDR, GPIOx_AFRL and GPIOx_AFRH.
phungductung 0:e87aa4c49e95 460 * @note The configuration of the locked GPIO pins can no longer be modified
phungductung 0:e87aa4c49e95 461 * until the next reset.
phungductung 0:e87aa4c49e95 462 * @param GPIOx: where x can be (A..F) to select the GPIO peripheral for STM32F7 family
phungductung 0:e87aa4c49e95 463 * @param GPIO_Pin: specifies the port bit to be locked.
phungductung 0:e87aa4c49e95 464 * This parameter can be any combination of GPIO_PIN_x where x can be (0..15).
phungductung 0:e87aa4c49e95 465 * @retval None
phungductung 0:e87aa4c49e95 466 */
phungductung 0:e87aa4c49e95 467 HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
phungductung 0:e87aa4c49e95 468 {
phungductung 0:e87aa4c49e95 469 __IO uint32_t tmp = GPIO_LCKR_LCKK;
phungductung 0:e87aa4c49e95 470
phungductung 0:e87aa4c49e95 471 /* Check the parameters */
phungductung 0:e87aa4c49e95 472 assert_param(IS_GPIO_PIN(GPIO_Pin));
phungductung 0:e87aa4c49e95 473
phungductung 0:e87aa4c49e95 474 /* Apply lock key write sequence */
phungductung 0:e87aa4c49e95 475 tmp |= GPIO_Pin;
phungductung 0:e87aa4c49e95 476 /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */
phungductung 0:e87aa4c49e95 477 GPIOx->LCKR = tmp;
phungductung 0:e87aa4c49e95 478 /* Reset LCKx bit(s): LCKK='0' + LCK[15-0] */
phungductung 0:e87aa4c49e95 479 GPIOx->LCKR = GPIO_Pin;
phungductung 0:e87aa4c49e95 480 /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */
phungductung 0:e87aa4c49e95 481 GPIOx->LCKR = tmp;
phungductung 0:e87aa4c49e95 482 /* Read LCKK bit*/
phungductung 0:e87aa4c49e95 483 tmp = GPIOx->LCKR;
phungductung 0:e87aa4c49e95 484
phungductung 0:e87aa4c49e95 485 if((GPIOx->LCKR & GPIO_LCKR_LCKK) != RESET)
phungductung 0:e87aa4c49e95 486 {
phungductung 0:e87aa4c49e95 487 return HAL_OK;
phungductung 0:e87aa4c49e95 488 }
phungductung 0:e87aa4c49e95 489 else
phungductung 0:e87aa4c49e95 490 {
phungductung 0:e87aa4c49e95 491 return HAL_ERROR;
phungductung 0:e87aa4c49e95 492 }
phungductung 0:e87aa4c49e95 493 }
phungductung 0:e87aa4c49e95 494
phungductung 0:e87aa4c49e95 495 /**
phungductung 0:e87aa4c49e95 496 * @brief This function handles EXTI interrupt request.
phungductung 0:e87aa4c49e95 497 * @param GPIO_Pin: Specifies the pins connected EXTI line
phungductung 0:e87aa4c49e95 498 * @retval None
phungductung 0:e87aa4c49e95 499 */
phungductung 0:e87aa4c49e95 500 void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin)
phungductung 0:e87aa4c49e95 501 {
phungductung 0:e87aa4c49e95 502 /* EXTI line interrupt detected */
phungductung 0:e87aa4c49e95 503 if(__HAL_GPIO_EXTI_GET_IT(GPIO_Pin) != RESET)
phungductung 0:e87aa4c49e95 504 {
phungductung 0:e87aa4c49e95 505 __HAL_GPIO_EXTI_CLEAR_IT(GPIO_Pin);
phungductung 0:e87aa4c49e95 506 HAL_GPIO_EXTI_Callback(GPIO_Pin);
phungductung 0:e87aa4c49e95 507 }
phungductung 0:e87aa4c49e95 508 }
phungductung 0:e87aa4c49e95 509
phungductung 0:e87aa4c49e95 510 /**
phungductung 0:e87aa4c49e95 511 * @brief EXTI line detection callbacks.
phungductung 0:e87aa4c49e95 512 * @param GPIO_Pin: Specifies the pins connected EXTI line
phungductung 0:e87aa4c49e95 513 * @retval None
phungductung 0:e87aa4c49e95 514 */
phungductung 0:e87aa4c49e95 515 __weak void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
phungductung 0:e87aa4c49e95 516 {
phungductung 0:e87aa4c49e95 517 /* Prevent unused argument(s) compilation warning */
phungductung 0:e87aa4c49e95 518 UNUSED(GPIO_Pin);
phungductung 0:e87aa4c49e95 519
phungductung 0:e87aa4c49e95 520 /* NOTE: This function Should not be modified, when the callback is needed,
phungductung 0:e87aa4c49e95 521 the HAL_GPIO_EXTI_Callback could be implemented in the user file
phungductung 0:e87aa4c49e95 522 */
phungductung 0:e87aa4c49e95 523 }
phungductung 0:e87aa4c49e95 524
phungductung 0:e87aa4c49e95 525 /**
phungductung 0:e87aa4c49e95 526 * @}
phungductung 0:e87aa4c49e95 527 */
phungductung 0:e87aa4c49e95 528
phungductung 0:e87aa4c49e95 529
phungductung 0:e87aa4c49e95 530 /**
phungductung 0:e87aa4c49e95 531 * @}
phungductung 0:e87aa4c49e95 532 */
phungductung 0:e87aa4c49e95 533
phungductung 0:e87aa4c49e95 534 #endif /* HAL_GPIO_MODULE_ENABLED */
phungductung 0:e87aa4c49e95 535 /**
phungductung 0:e87aa4c49e95 536 * @}
phungductung 0:e87aa4c49e95 537 */
phungductung 0:e87aa4c49e95 538
phungductung 0:e87aa4c49e95 539 /**
phungductung 0:e87aa4c49e95 540 * @}
phungductung 0:e87aa4c49e95 541 */
phungductung 0:e87aa4c49e95 542
phungductung 0:e87aa4c49e95 543 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/