SPKT

Dependencies:   F746_GUI SD_PlayerSkeleton F746_SAI_IO

Committer:
phungductung
Date:
Tue Jun 04 21:37:21 2019 +0000
Revision:
0:8ede47d38d10
SPKT

Who changed what in which revision?

UserRevisionLine numberNew contents of line
phungductung 0:8ede47d38d10 1 /**
phungductung 0:8ede47d38d10 2 ******************************************************************************
phungductung 0:8ede47d38d10 3 * @file stm32_hal_legacy.h
phungductung 0:8ede47d38d10 4 * @author MCD Application Team
phungductung 0:8ede47d38d10 5 * @version V1.0.4
phungductung 0:8ede47d38d10 6 * @date 09-December-2015
phungductung 0:8ede47d38d10 7 * @brief This file contains aliases definition for the STM32Cube HAL constants
phungductung 0:8ede47d38d10 8 * macros and functions maintained for legacy purpose.
phungductung 0:8ede47d38d10 9 ******************************************************************************
phungductung 0:8ede47d38d10 10 * @attention
phungductung 0:8ede47d38d10 11 *
phungductung 0:8ede47d38d10 12 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
phungductung 0:8ede47d38d10 13 *
phungductung 0:8ede47d38d10 14 * Redistribution and use in source and binary forms, with or without modification,
phungductung 0:8ede47d38d10 15 * are permitted provided that the following conditions are met:
phungductung 0:8ede47d38d10 16 * 1. Redistributions of source code must retain the above copyright notice,
phungductung 0:8ede47d38d10 17 * this list of conditions and the following disclaimer.
phungductung 0:8ede47d38d10 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
phungductung 0:8ede47d38d10 19 * this list of conditions and the following disclaimer in the documentation
phungductung 0:8ede47d38d10 20 * and/or other materials provided with the distribution.
phungductung 0:8ede47d38d10 21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
phungductung 0:8ede47d38d10 22 * may be used to endorse or promote products derived from this software
phungductung 0:8ede47d38d10 23 * without specific prior written permission.
phungductung 0:8ede47d38d10 24 *
phungductung 0:8ede47d38d10 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
phungductung 0:8ede47d38d10 26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
phungductung 0:8ede47d38d10 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
phungductung 0:8ede47d38d10 28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
phungductung 0:8ede47d38d10 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
phungductung 0:8ede47d38d10 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
phungductung 0:8ede47d38d10 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
phungductung 0:8ede47d38d10 32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
phungductung 0:8ede47d38d10 33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
phungductung 0:8ede47d38d10 34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
phungductung 0:8ede47d38d10 35 *
phungductung 0:8ede47d38d10 36 ******************************************************************************
phungductung 0:8ede47d38d10 37 */
phungductung 0:8ede47d38d10 38
phungductung 0:8ede47d38d10 39 /* Define to prevent recursive inclusion -------------------------------------*/
phungductung 0:8ede47d38d10 40 #ifndef __STM32_HAL_LEGACY
phungductung 0:8ede47d38d10 41 #define __STM32_HAL_LEGACY
phungductung 0:8ede47d38d10 42
phungductung 0:8ede47d38d10 43 #ifdef __cplusplus
phungductung 0:8ede47d38d10 44 extern "C" {
phungductung 0:8ede47d38d10 45 #endif
phungductung 0:8ede47d38d10 46
phungductung 0:8ede47d38d10 47 /* Includes ------------------------------------------------------------------*/
phungductung 0:8ede47d38d10 48 /* Exported types ------------------------------------------------------------*/
phungductung 0:8ede47d38d10 49 /* Exported constants --------------------------------------------------------*/
phungductung 0:8ede47d38d10 50
phungductung 0:8ede47d38d10 51 /** @defgroup HAL_AES_Aliased_Defines HAL CRYP Aliased Defines maintained for legacy purpose
phungductung 0:8ede47d38d10 52 * @{
phungductung 0:8ede47d38d10 53 */
phungductung 0:8ede47d38d10 54 #define AES_FLAG_RDERR CRYP_FLAG_RDERR
phungductung 0:8ede47d38d10 55 #define AES_FLAG_WRERR CRYP_FLAG_WRERR
phungductung 0:8ede47d38d10 56 #define AES_CLEARFLAG_CCF CRYP_CLEARFLAG_CCF
phungductung 0:8ede47d38d10 57 #define AES_CLEARFLAG_RDERR CRYP_CLEARFLAG_RDERR
phungductung 0:8ede47d38d10 58 #define AES_CLEARFLAG_WRERR CRYP_CLEARFLAG_WRERR
phungductung 0:8ede47d38d10 59
phungductung 0:8ede47d38d10 60 /**
phungductung 0:8ede47d38d10 61 * @}
phungductung 0:8ede47d38d10 62 */
phungductung 0:8ede47d38d10 63
phungductung 0:8ede47d38d10 64 /** @defgroup HAL_ADC_Aliased_Defines HAL ADC Aliased Defines maintained for legacy purpose
phungductung 0:8ede47d38d10 65 * @{
phungductung 0:8ede47d38d10 66 */
phungductung 0:8ede47d38d10 67 #define ADC_RESOLUTION12b ADC_RESOLUTION_12B
phungductung 0:8ede47d38d10 68 #define ADC_RESOLUTION10b ADC_RESOLUTION_10B
phungductung 0:8ede47d38d10 69 #define ADC_RESOLUTION8b ADC_RESOLUTION_8B
phungductung 0:8ede47d38d10 70 #define ADC_RESOLUTION6b ADC_RESOLUTION_6B
phungductung 0:8ede47d38d10 71 #define OVR_DATA_OVERWRITTEN ADC_OVR_DATA_OVERWRITTEN
phungductung 0:8ede47d38d10 72 #define OVR_DATA_PRESERVED ADC_OVR_DATA_PRESERVED
phungductung 0:8ede47d38d10 73 #define EOC_SINGLE_CONV ADC_EOC_SINGLE_CONV
phungductung 0:8ede47d38d10 74 #define EOC_SEQ_CONV ADC_EOC_SEQ_CONV
phungductung 0:8ede47d38d10 75 #define EOC_SINGLE_SEQ_CONV ADC_EOC_SINGLE_SEQ_CONV
phungductung 0:8ede47d38d10 76 #define REGULAR_GROUP ADC_REGULAR_GROUP
phungductung 0:8ede47d38d10 77 #define INJECTED_GROUP ADC_INJECTED_GROUP
phungductung 0:8ede47d38d10 78 #define REGULAR_INJECTED_GROUP ADC_REGULAR_INJECTED_GROUP
phungductung 0:8ede47d38d10 79 #define AWD_EVENT ADC_AWD_EVENT
phungductung 0:8ede47d38d10 80 #define AWD1_EVENT ADC_AWD1_EVENT
phungductung 0:8ede47d38d10 81 #define AWD2_EVENT ADC_AWD2_EVENT
phungductung 0:8ede47d38d10 82 #define AWD3_EVENT ADC_AWD3_EVENT
phungductung 0:8ede47d38d10 83 #define OVR_EVENT ADC_OVR_EVENT
phungductung 0:8ede47d38d10 84 #define JQOVF_EVENT ADC_JQOVF_EVENT
phungductung 0:8ede47d38d10 85 #define ALL_CHANNELS ADC_ALL_CHANNELS
phungductung 0:8ede47d38d10 86 #define REGULAR_CHANNELS ADC_REGULAR_CHANNELS
phungductung 0:8ede47d38d10 87 #define INJECTED_CHANNELS ADC_INJECTED_CHANNELS
phungductung 0:8ede47d38d10 88 #define SYSCFG_FLAG_SENSOR_ADC ADC_FLAG_SENSOR
phungductung 0:8ede47d38d10 89 #define SYSCFG_FLAG_VREF_ADC ADC_FLAG_VREFINT
phungductung 0:8ede47d38d10 90 #define ADC_CLOCKPRESCALER_PCLK_DIV1 ADC_CLOCK_SYNC_PCLK_DIV1
phungductung 0:8ede47d38d10 91 #define ADC_CLOCKPRESCALER_PCLK_DIV2 ADC_CLOCK_SYNC_PCLK_DIV2
phungductung 0:8ede47d38d10 92 #define ADC_CLOCKPRESCALER_PCLK_DIV4 ADC_CLOCK_SYNC_PCLK_DIV4
phungductung 0:8ede47d38d10 93 #define ADC_CLOCKPRESCALER_PCLK_DIV6 ADC_CLOCK_SYNC_PCLK_DIV6
phungductung 0:8ede47d38d10 94 #define ADC_CLOCKPRESCALER_PCLK_DIV8 ADC_CLOCK_SYNC_PCLK_DIV8
phungductung 0:8ede47d38d10 95 #define ADC_EXTERNALTRIG0_T6_TRGO ADC_EXTERNALTRIGCONV_T6_TRGO
phungductung 0:8ede47d38d10 96 #define ADC_EXTERNALTRIG1_T21_CC2 ADC_EXTERNALTRIGCONV_T21_CC2
phungductung 0:8ede47d38d10 97 #define ADC_EXTERNALTRIG2_T2_TRGO ADC_EXTERNALTRIGCONV_T2_TRGO
phungductung 0:8ede47d38d10 98 #define ADC_EXTERNALTRIG3_T2_CC4 ADC_EXTERNALTRIGCONV_T2_CC4
phungductung 0:8ede47d38d10 99 #define ADC_EXTERNALTRIG4_T22_TRGO ADC_EXTERNALTRIGCONV_T22_TRGO
phungductung 0:8ede47d38d10 100 #define ADC_EXTERNALTRIG7_EXT_IT11 ADC_EXTERNALTRIGCONV_EXT_IT11
phungductung 0:8ede47d38d10 101 #define ADC_CLOCK_ASYNC ADC_CLOCK_ASYNC_DIV1
phungductung 0:8ede47d38d10 102 #define ADC_EXTERNALTRIG_EDGE_NONE ADC_EXTERNALTRIGCONVEDGE_NONE
phungductung 0:8ede47d38d10 103 #define ADC_EXTERNALTRIG_EDGE_RISING ADC_EXTERNALTRIGCONVEDGE_RISING
phungductung 0:8ede47d38d10 104 #define ADC_EXTERNALTRIG_EDGE_FALLING ADC_EXTERNALTRIGCONVEDGE_FALLING
phungductung 0:8ede47d38d10 105 #define ADC_EXTERNALTRIG_EDGE_RISINGFALLING ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING
phungductung 0:8ede47d38d10 106
phungductung 0:8ede47d38d10 107 #define HAL_ADC_STATE_BUSY_REG HAL_ADC_STATE_REG_BUSY
phungductung 0:8ede47d38d10 108 #define HAL_ADC_STATE_BUSY_INJ HAL_ADC_STATE_INJ_BUSY
phungductung 0:8ede47d38d10 109 #define HAL_ADC_STATE_EOC_REG HAL_ADC_STATE_REG_EOC
phungductung 0:8ede47d38d10 110 #define HAL_ADC_STATE_EOC_INJ HAL_ADC_STATE_INJ_EOC
phungductung 0:8ede47d38d10 111 #define HAL_ADC_STATE_ERROR HAL_ADC_STATE_ERROR_INTERNAL
phungductung 0:8ede47d38d10 112 #define HAL_ADC_STATE_BUSY HAL_ADC_STATE_BUSY_INTERNAL
phungductung 0:8ede47d38d10 113 #define HAL_ADC_STATE_AWD HAL_ADC_STATE_AWD1
phungductung 0:8ede47d38d10 114 /**
phungductung 0:8ede47d38d10 115 * @}
phungductung 0:8ede47d38d10 116 */
phungductung 0:8ede47d38d10 117
phungductung 0:8ede47d38d10 118 /** @defgroup HAL_CEC_Aliased_Defines HAL CEC Aliased Defines maintained for legacy purpose
phungductung 0:8ede47d38d10 119 * @{
phungductung 0:8ede47d38d10 120 */
phungductung 0:8ede47d38d10 121
phungductung 0:8ede47d38d10 122 #define __HAL_CEC_GET_IT __HAL_CEC_GET_FLAG
phungductung 0:8ede47d38d10 123
phungductung 0:8ede47d38d10 124 /**
phungductung 0:8ede47d38d10 125 * @}
phungductung 0:8ede47d38d10 126 */
phungductung 0:8ede47d38d10 127
phungductung 0:8ede47d38d10 128 /** @defgroup HAL_COMP_Aliased_Defines HAL COMP Aliased Defines maintained for legacy purpose
phungductung 0:8ede47d38d10 129 * @{
phungductung 0:8ede47d38d10 130 */
phungductung 0:8ede47d38d10 131
phungductung 0:8ede47d38d10 132 #define COMP_WINDOWMODE_DISABLED COMP_WINDOWMODE_DISABLE
phungductung 0:8ede47d38d10 133 #define COMP_WINDOWMODE_ENABLED COMP_WINDOWMODE_ENABLE
phungductung 0:8ede47d38d10 134 #define COMP_EXTI_LINE_COMP1_EVENT COMP_EXTI_LINE_COMP1
phungductung 0:8ede47d38d10 135 #define COMP_EXTI_LINE_COMP2_EVENT COMP_EXTI_LINE_COMP2
phungductung 0:8ede47d38d10 136 #define COMP_EXTI_LINE_COMP3_EVENT COMP_EXTI_LINE_COMP3
phungductung 0:8ede47d38d10 137 #define COMP_EXTI_LINE_COMP4_EVENT COMP_EXTI_LINE_COMP4
phungductung 0:8ede47d38d10 138 #define COMP_EXTI_LINE_COMP5_EVENT COMP_EXTI_LINE_COMP5
phungductung 0:8ede47d38d10 139 #define COMP_EXTI_LINE_COMP6_EVENT COMP_EXTI_LINE_COMP6
phungductung 0:8ede47d38d10 140 #define COMP_EXTI_LINE_COMP7_EVENT COMP_EXTI_LINE_COMP7
phungductung 0:8ede47d38d10 141 #define COMP_OUTPUT_COMP6TIM2OCREFCLR COMP_OUTPUT_COMP6_TIM2OCREFCLR
phungductung 0:8ede47d38d10 142 #if defined(STM32F373xC) || defined(STM32F378xx)
phungductung 0:8ede47d38d10 143 #define COMP_OUTPUT_TIM3IC1 COMP_OUTPUT_COMP1_TIM3IC1
phungductung 0:8ede47d38d10 144 #define COMP_OUTPUT_TIM3OCREFCLR COMP_OUTPUT_COMP1_TIM3OCREFCLR
phungductung 0:8ede47d38d10 145 #endif /* STM32F373xC || STM32F378xx */
phungductung 0:8ede47d38d10 146 /**
phungductung 0:8ede47d38d10 147 * @}
phungductung 0:8ede47d38d10 148 */
phungductung 0:8ede47d38d10 149
phungductung 0:8ede47d38d10 150 /** @defgroup HAL_CORTEX_Aliased_Defines HAL CORTEX Aliased Defines maintained for legacy purpose
phungductung 0:8ede47d38d10 151 * @{
phungductung 0:8ede47d38d10 152 */
phungductung 0:8ede47d38d10 153 #define __HAL_CORTEX_SYSTICKCLK_CONFIG HAL_SYSTICK_CLKSourceConfig
phungductung 0:8ede47d38d10 154 /**
phungductung 0:8ede47d38d10 155 * @}
phungductung 0:8ede47d38d10 156 */
phungductung 0:8ede47d38d10 157
phungductung 0:8ede47d38d10 158 /** @defgroup HAL_CRC_Aliased_Defines HAL CRC Aliased Defines maintained for legacy purpose
phungductung 0:8ede47d38d10 159 * @{
phungductung 0:8ede47d38d10 160 */
phungductung 0:8ede47d38d10 161
phungductung 0:8ede47d38d10 162 #define CRC_OUTPUTDATA_INVERSION_DISABLED CRC_OUTPUTDATA_INVERSION_DISABLE
phungductung 0:8ede47d38d10 163 #define CRC_OUTPUTDATA_INVERSION_ENABLED CRC_OUTPUTDATA_INVERSION_ENABLE
phungductung 0:8ede47d38d10 164
phungductung 0:8ede47d38d10 165 /**
phungductung 0:8ede47d38d10 166 * @}
phungductung 0:8ede47d38d10 167 */
phungductung 0:8ede47d38d10 168
phungductung 0:8ede47d38d10 169 /** @defgroup HAL_DAC_Aliased_Defines HAL DAC Aliased Defines maintained for legacy purpose
phungductung 0:8ede47d38d10 170 * @{
phungductung 0:8ede47d38d10 171 */
phungductung 0:8ede47d38d10 172
phungductung 0:8ede47d38d10 173 #define DAC1_CHANNEL_1 DAC_CHANNEL_1
phungductung 0:8ede47d38d10 174 #define DAC1_CHANNEL_2 DAC_CHANNEL_2
phungductung 0:8ede47d38d10 175 #define DAC2_CHANNEL_1 DAC_CHANNEL_1
phungductung 0:8ede47d38d10 176 #define DAC_WAVE_NONE ((uint32_t)0x00000000)
phungductung 0:8ede47d38d10 177 #define DAC_WAVE_NOISE ((uint32_t)DAC_CR_WAVE1_0)
phungductung 0:8ede47d38d10 178 #define DAC_WAVE_TRIANGLE ((uint32_t)DAC_CR_WAVE1_1)
phungductung 0:8ede47d38d10 179 #define DAC_WAVEGENERATION_NONE DAC_WAVE_NONE
phungductung 0:8ede47d38d10 180 #define DAC_WAVEGENERATION_NOISE DAC_WAVE_NOISE
phungductung 0:8ede47d38d10 181 #define DAC_WAVEGENERATION_TRIANGLE DAC_WAVE_TRIANGLE
phungductung 0:8ede47d38d10 182
phungductung 0:8ede47d38d10 183 /**
phungductung 0:8ede47d38d10 184 * @}
phungductung 0:8ede47d38d10 185 */
phungductung 0:8ede47d38d10 186
phungductung 0:8ede47d38d10 187 /** @defgroup HAL_DMA_Aliased_Defines HAL DMA Aliased Defines maintained for legacy purpose
phungductung 0:8ede47d38d10 188 * @{
phungductung 0:8ede47d38d10 189 */
phungductung 0:8ede47d38d10 190 #define HAL_REMAPDMA_ADC_DMA_CH2 DMA_REMAP_ADC_DMA_CH2
phungductung 0:8ede47d38d10 191 #define HAL_REMAPDMA_USART1_TX_DMA_CH4 DMA_REMAP_USART1_TX_DMA_CH4
phungductung 0:8ede47d38d10 192 #define HAL_REMAPDMA_USART1_RX_DMA_CH5 DMA_REMAP_USART1_RX_DMA_CH5
phungductung 0:8ede47d38d10 193 #define HAL_REMAPDMA_TIM16_DMA_CH4 DMA_REMAP_TIM16_DMA_CH4
phungductung 0:8ede47d38d10 194 #define HAL_REMAPDMA_TIM17_DMA_CH2 DMA_REMAP_TIM17_DMA_CH2
phungductung 0:8ede47d38d10 195 #define HAL_REMAPDMA_USART3_DMA_CH32 DMA_REMAP_USART3_DMA_CH32
phungductung 0:8ede47d38d10 196 #define HAL_REMAPDMA_TIM16_DMA_CH6 DMA_REMAP_TIM16_DMA_CH6
phungductung 0:8ede47d38d10 197 #define HAL_REMAPDMA_TIM17_DMA_CH7 DMA_REMAP_TIM17_DMA_CH7
phungductung 0:8ede47d38d10 198 #define HAL_REMAPDMA_SPI2_DMA_CH67 DMA_REMAP_SPI2_DMA_CH67
phungductung 0:8ede47d38d10 199 #define HAL_REMAPDMA_USART2_DMA_CH67 DMA_REMAP_USART2_DMA_CH67
phungductung 0:8ede47d38d10 200 #define HAL_REMAPDMA_USART3_DMA_CH32 DMA_REMAP_USART3_DMA_CH32
phungductung 0:8ede47d38d10 201 #define HAL_REMAPDMA_I2C1_DMA_CH76 DMA_REMAP_I2C1_DMA_CH76
phungductung 0:8ede47d38d10 202 #define HAL_REMAPDMA_TIM1_DMA_CH6 DMA_REMAP_TIM1_DMA_CH6
phungductung 0:8ede47d38d10 203 #define HAL_REMAPDMA_TIM2_DMA_CH7 DMA_REMAP_TIM2_DMA_CH7
phungductung 0:8ede47d38d10 204 #define HAL_REMAPDMA_TIM3_DMA_CH6 DMA_REMAP_TIM3_DMA_CH6
phungductung 0:8ede47d38d10 205
phungductung 0:8ede47d38d10 206 #define IS_HAL_REMAPDMA IS_DMA_REMAP
phungductung 0:8ede47d38d10 207 #define __HAL_REMAPDMA_CHANNEL_ENABLE __HAL_DMA_REMAP_CHANNEL_ENABLE
phungductung 0:8ede47d38d10 208 #define __HAL_REMAPDMA_CHANNEL_DISABLE __HAL_DMA_REMAP_CHANNEL_DISABLE
phungductung 0:8ede47d38d10 209
phungductung 0:8ede47d38d10 210
phungductung 0:8ede47d38d10 211
phungductung 0:8ede47d38d10 212 /**
phungductung 0:8ede47d38d10 213 * @}
phungductung 0:8ede47d38d10 214 */
phungductung 0:8ede47d38d10 215
phungductung 0:8ede47d38d10 216 /** @defgroup HAL_FLASH_Aliased_Defines HAL FLASH Aliased Defines maintained for legacy purpose
phungductung 0:8ede47d38d10 217 * @{
phungductung 0:8ede47d38d10 218 */
phungductung 0:8ede47d38d10 219
phungductung 0:8ede47d38d10 220 #define TYPEPROGRAM_BYTE FLASH_TYPEPROGRAM_BYTE
phungductung 0:8ede47d38d10 221 #define TYPEPROGRAM_HALFWORD FLASH_TYPEPROGRAM_HALFWORD
phungductung 0:8ede47d38d10 222 #define TYPEPROGRAM_WORD FLASH_TYPEPROGRAM_WORD
phungductung 0:8ede47d38d10 223 #define TYPEPROGRAM_DOUBLEWORD FLASH_TYPEPROGRAM_DOUBLEWORD
phungductung 0:8ede47d38d10 224 #define TYPEERASE_SECTORS FLASH_TYPEERASE_SECTORS
phungductung 0:8ede47d38d10 225 #define TYPEERASE_PAGES FLASH_TYPEERASE_PAGES
phungductung 0:8ede47d38d10 226 #define TYPEERASE_PAGEERASE FLASH_TYPEERASE_PAGES
phungductung 0:8ede47d38d10 227 #define TYPEERASE_MASSERASE FLASH_TYPEERASE_MASSERASE
phungductung 0:8ede47d38d10 228 #define WRPSTATE_DISABLE OB_WRPSTATE_DISABLE
phungductung 0:8ede47d38d10 229 #define WRPSTATE_ENABLE OB_WRPSTATE_ENABLE
phungductung 0:8ede47d38d10 230 #define HAL_FLASH_TIMEOUT_VALUE FLASH_TIMEOUT_VALUE
phungductung 0:8ede47d38d10 231 #define OBEX_PCROP OPTIONBYTE_PCROP
phungductung 0:8ede47d38d10 232 #define OBEX_BOOTCONFIG OPTIONBYTE_BOOTCONFIG
phungductung 0:8ede47d38d10 233 #define PCROPSTATE_DISABLE OB_PCROP_STATE_DISABLE
phungductung 0:8ede47d38d10 234 #define PCROPSTATE_ENABLE OB_PCROP_STATE_ENABLE
phungductung 0:8ede47d38d10 235 #define TYPEERASEDATA_BYTE FLASH_TYPEERASEDATA_BYTE
phungductung 0:8ede47d38d10 236 #define TYPEERASEDATA_HALFWORD FLASH_TYPEERASEDATA_HALFWORD
phungductung 0:8ede47d38d10 237 #define TYPEERASEDATA_WORD FLASH_TYPEERASEDATA_WORD
phungductung 0:8ede47d38d10 238 #define TYPEPROGRAMDATA_BYTE FLASH_TYPEPROGRAMDATA_BYTE
phungductung 0:8ede47d38d10 239 #define TYPEPROGRAMDATA_HALFWORD FLASH_TYPEPROGRAMDATA_HALFWORD
phungductung 0:8ede47d38d10 240 #define TYPEPROGRAMDATA_WORD FLASH_TYPEPROGRAMDATA_WORD
phungductung 0:8ede47d38d10 241 #define TYPEPROGRAMDATA_FASTBYTE FLASH_TYPEPROGRAMDATA_FASTBYTE
phungductung 0:8ede47d38d10 242 #define TYPEPROGRAMDATA_FASTHALFWORD FLASH_TYPEPROGRAMDATA_FASTHALFWORD
phungductung 0:8ede47d38d10 243 #define TYPEPROGRAMDATA_FASTWORD FLASH_TYPEPROGRAMDATA_FASTWORD
phungductung 0:8ede47d38d10 244 #define PAGESIZE FLASH_PAGE_SIZE
phungductung 0:8ede47d38d10 245 #define TYPEPROGRAM_FASTBYTE FLASH_TYPEPROGRAM_BYTE
phungductung 0:8ede47d38d10 246 #define TYPEPROGRAM_FASTHALFWORD FLASH_TYPEPROGRAM_HALFWORD
phungductung 0:8ede47d38d10 247 #define TYPEPROGRAM_FASTWORD FLASH_TYPEPROGRAM_WORD
phungductung 0:8ede47d38d10 248 #define VOLTAGE_RANGE_1 FLASH_VOLTAGE_RANGE_1
phungductung 0:8ede47d38d10 249 #define VOLTAGE_RANGE_2 FLASH_VOLTAGE_RANGE_2
phungductung 0:8ede47d38d10 250 #define VOLTAGE_RANGE_3 FLASH_VOLTAGE_RANGE_3
phungductung 0:8ede47d38d10 251 #define VOLTAGE_RANGE_4 FLASH_VOLTAGE_RANGE_4
phungductung 0:8ede47d38d10 252 #define TYPEPROGRAM_FAST FLASH_TYPEPROGRAM_FAST
phungductung 0:8ede47d38d10 253 #define TYPEPROGRAM_FAST_AND_LAST FLASH_TYPEPROGRAM_FAST_AND_LAST
phungductung 0:8ede47d38d10 254 #define WRPAREA_BANK1_AREAA OB_WRPAREA_BANK1_AREAA
phungductung 0:8ede47d38d10 255 #define WRPAREA_BANK1_AREAB OB_WRPAREA_BANK1_AREAB
phungductung 0:8ede47d38d10 256 #define WRPAREA_BANK2_AREAA OB_WRPAREA_BANK2_AREAA
phungductung 0:8ede47d38d10 257 #define WRPAREA_BANK2_AREAB OB_WRPAREA_BANK2_AREAB
phungductung 0:8ede47d38d10 258 #define IWDG_STDBY_FREEZE OB_IWDG_STDBY_FREEZE
phungductung 0:8ede47d38d10 259 #define IWDG_STDBY_ACTIVE OB_IWDG_STDBY_RUN
phungductung 0:8ede47d38d10 260 #define IWDG_STOP_FREEZE OB_IWDG_STOP_FREEZE
phungductung 0:8ede47d38d10 261 #define IWDG_STOP_ACTIVE OB_IWDG_STOP_RUN
phungductung 0:8ede47d38d10 262 #define FLASH_ERROR_NONE HAL_FLASH_ERROR_NONE
phungductung 0:8ede47d38d10 263 #define FLASH_ERROR_RD HAL_FLASH_ERROR_RD
phungductung 0:8ede47d38d10 264 #define FLASH_ERROR_PG HAL_FLASH_ERROR_PROG
phungductung 0:8ede47d38d10 265 #define FLASH_ERROR_PGP HAL_FLASH_ERROR_PGS
phungductung 0:8ede47d38d10 266 #define FLASH_ERROR_WRP HAL_FLASH_ERROR_WRP
phungductung 0:8ede47d38d10 267 #define FLASH_ERROR_OPTV HAL_FLASH_ERROR_OPTV
phungductung 0:8ede47d38d10 268 #define FLASH_ERROR_OPTVUSR HAL_FLASH_ERROR_OPTVUSR
phungductung 0:8ede47d38d10 269 #define FLASH_ERROR_PROG HAL_FLASH_ERROR_PROG
phungductung 0:8ede47d38d10 270 #define FLASH_ERROR_OP HAL_FLASH_ERROR_OPERATION
phungductung 0:8ede47d38d10 271 #define FLASH_ERROR_PGA HAL_FLASH_ERROR_PGA
phungductung 0:8ede47d38d10 272 #define FLASH_ERROR_SIZE HAL_FLASH_ERROR_SIZE
phungductung 0:8ede47d38d10 273 #define FLASH_ERROR_SIZ HAL_FLASH_ERROR_SIZE
phungductung 0:8ede47d38d10 274 #define FLASH_ERROR_PGS HAL_FLASH_ERROR_PGS
phungductung 0:8ede47d38d10 275 #define FLASH_ERROR_MIS HAL_FLASH_ERROR_MIS
phungductung 0:8ede47d38d10 276 #define FLASH_ERROR_FAST HAL_FLASH_ERROR_FAST
phungductung 0:8ede47d38d10 277 #define FLASH_ERROR_FWWERR HAL_FLASH_ERROR_FWWERR
phungductung 0:8ede47d38d10 278 #define FLASH_ERROR_NOTZERO HAL_FLASH_ERROR_NOTZERO
phungductung 0:8ede47d38d10 279 #define FLASH_ERROR_OPERATION HAL_FLASH_ERROR_OPERATION
phungductung 0:8ede47d38d10 280 #define FLASH_ERROR_ERS HAL_FLASH_ERROR_ERS
phungductung 0:8ede47d38d10 281 #define OB_WDG_SW OB_IWDG_SW
phungductung 0:8ede47d38d10 282 #define OB_WDG_HW OB_IWDG_HW
phungductung 0:8ede47d38d10 283 #define OB_SDADC12_VDD_MONITOR_SET OB_SDACD_VDD_MONITOR_SET
phungductung 0:8ede47d38d10 284 #define OB_SDADC12_VDD_MONITOR_RESET OB_SDACD_VDD_MONITOR_RESET
phungductung 0:8ede47d38d10 285 #define OB_RAM_PARITY_CHECK_SET OB_SRAM_PARITY_SET
phungductung 0:8ede47d38d10 286 #define OB_RAM_PARITY_CHECK_RESET OB_SRAM_PARITY_RESET
phungductung 0:8ede47d38d10 287 #define IS_OB_SDADC12_VDD_MONITOR IS_OB_SDACD_VDD_MONITOR
phungductung 0:8ede47d38d10 288 #define OB_RDP_LEVEL0 OB_RDP_LEVEL_0
phungductung 0:8ede47d38d10 289 #define OB_RDP_LEVEL1 OB_RDP_LEVEL_1
phungductung 0:8ede47d38d10 290 #define OB_RDP_LEVEL2 OB_RDP_LEVEL_2
phungductung 0:8ede47d38d10 291 /**
phungductung 0:8ede47d38d10 292 * @}
phungductung 0:8ede47d38d10 293 */
phungductung 0:8ede47d38d10 294
phungductung 0:8ede47d38d10 295 /** @defgroup HAL_SYSCFG_Aliased_Defines HAL SYSCFG Aliased Defines maintained for legacy purpose
phungductung 0:8ede47d38d10 296 * @{
phungductung 0:8ede47d38d10 297 */
phungductung 0:8ede47d38d10 298
phungductung 0:8ede47d38d10 299 #define HAL_SYSCFG_FASTMODEPLUS_I2C_PA9 I2C_FASTMODEPLUS_PA9
phungductung 0:8ede47d38d10 300 #define HAL_SYSCFG_FASTMODEPLUS_I2C_PA10 I2C_FASTMODEPLUS_PA10
phungductung 0:8ede47d38d10 301 #define HAL_SYSCFG_FASTMODEPLUS_I2C_PB6 I2C_FASTMODEPLUS_PB6
phungductung 0:8ede47d38d10 302 #define HAL_SYSCFG_FASTMODEPLUS_I2C_PB7 I2C_FASTMODEPLUS_PB7
phungductung 0:8ede47d38d10 303 #define HAL_SYSCFG_FASTMODEPLUS_I2C_PB8 I2C_FASTMODEPLUS_PB8
phungductung 0:8ede47d38d10 304 #define HAL_SYSCFG_FASTMODEPLUS_I2C_PB9 I2C_FASTMODEPLUS_PB9
phungductung 0:8ede47d38d10 305 #define HAL_SYSCFG_FASTMODEPLUS_I2C1 I2C_FASTMODEPLUS_I2C1
phungductung 0:8ede47d38d10 306 #define HAL_SYSCFG_FASTMODEPLUS_I2C2 I2C_FASTMODEPLUS_I2C2
phungductung 0:8ede47d38d10 307 #define HAL_SYSCFG_FASTMODEPLUS_I2C3 I2C_FASTMODEPLUS_I2C3
phungductung 0:8ede47d38d10 308 /**
phungductung 0:8ede47d38d10 309 * @}
phungductung 0:8ede47d38d10 310 */
phungductung 0:8ede47d38d10 311
phungductung 0:8ede47d38d10 312
phungductung 0:8ede47d38d10 313 /** @defgroup LL_FMC_Aliased_Defines LL FMC Aliased Defines maintained for compatibility purpose
phungductung 0:8ede47d38d10 314 * @{
phungductung 0:8ede47d38d10 315 */
phungductung 0:8ede47d38d10 316 #if defined(STM32L4) || defined(STM32F7)
phungductung 0:8ede47d38d10 317 #define FMC_NAND_PCC_WAIT_FEATURE_DISABLE FMC_NAND_WAIT_FEATURE_DISABLE
phungductung 0:8ede47d38d10 318 #define FMC_NAND_PCC_WAIT_FEATURE_ENABLE FMC_NAND_WAIT_FEATURE_ENABLE
phungductung 0:8ede47d38d10 319 #define FMC_NAND_PCC_MEM_BUS_WIDTH_8 FMC_NAND_MEM_BUS_WIDTH_8
phungductung 0:8ede47d38d10 320 #define FMC_NAND_PCC_MEM_BUS_WIDTH_16 FMC_NAND_MEM_BUS_WIDTH_16
phungductung 0:8ede47d38d10 321 #else
phungductung 0:8ede47d38d10 322 #define FMC_NAND_WAIT_FEATURE_DISABLE FMC_NAND_PCC_WAIT_FEATURE_DISABLE
phungductung 0:8ede47d38d10 323 #define FMC_NAND_WAIT_FEATURE_ENABLE FMC_NAND_PCC_WAIT_FEATURE_ENABLE
phungductung 0:8ede47d38d10 324 #define FMC_NAND_MEM_BUS_WIDTH_8 FMC_NAND_PCC_MEM_BUS_WIDTH_8
phungductung 0:8ede47d38d10 325 #define FMC_NAND_MEM_BUS_WIDTH_16 FMC_NAND_PCC_MEM_BUS_WIDTH_16
phungductung 0:8ede47d38d10 326 #endif
phungductung 0:8ede47d38d10 327 /**
phungductung 0:8ede47d38d10 328 * @}
phungductung 0:8ede47d38d10 329 */
phungductung 0:8ede47d38d10 330
phungductung 0:8ede47d38d10 331 /** @defgroup LL_FSMC_Aliased_Defines LL FSMC Aliased Defines maintained for legacy purpose
phungductung 0:8ede47d38d10 332 * @{
phungductung 0:8ede47d38d10 333 */
phungductung 0:8ede47d38d10 334
phungductung 0:8ede47d38d10 335 #define FSMC_NORSRAM_TYPEDEF FSMC_NORSRAM_TypeDef
phungductung 0:8ede47d38d10 336 #define FSMC_NORSRAM_EXTENDED_TYPEDEF FSMC_NORSRAM_EXTENDED_TypeDef
phungductung 0:8ede47d38d10 337 /**
phungductung 0:8ede47d38d10 338 * @}
phungductung 0:8ede47d38d10 339 */
phungductung 0:8ede47d38d10 340
phungductung 0:8ede47d38d10 341 /** @defgroup HAL_GPIO_Aliased_Macros HAL GPIO Aliased Macros maintained for legacy purpose
phungductung 0:8ede47d38d10 342 * @{
phungductung 0:8ede47d38d10 343 */
phungductung 0:8ede47d38d10 344 #define GET_GPIO_SOURCE GPIO_GET_INDEX
phungductung 0:8ede47d38d10 345 #define GET_GPIO_INDEX GPIO_GET_INDEX
phungductung 0:8ede47d38d10 346
phungductung 0:8ede47d38d10 347 #if defined(STM32F4)
phungductung 0:8ede47d38d10 348 #define GPIO_AF12_SDMMC GPIO_AF12_SDIO
phungductung 0:8ede47d38d10 349 #define GPIO_AF12_SDMMC1 GPIO_AF12_SDIO
phungductung 0:8ede47d38d10 350 #endif
phungductung 0:8ede47d38d10 351
phungductung 0:8ede47d38d10 352 #if defined(STM32F7)
phungductung 0:8ede47d38d10 353 #define GPIO_AF12_SDIO GPIO_AF12_SDMMC1
phungductung 0:8ede47d38d10 354 #define GPIO_AF12_SDMMC GPIO_AF12_SDMMC1
phungductung 0:8ede47d38d10 355 #endif
phungductung 0:8ede47d38d10 356
phungductung 0:8ede47d38d10 357 #if defined(STM32L4)
phungductung 0:8ede47d38d10 358 #define GPIO_AF12_SDIO GPIO_AF12_SDMMC1
phungductung 0:8ede47d38d10 359 #define GPIO_AF12_SDMMC GPIO_AF12_SDMMC1
phungductung 0:8ede47d38d10 360 #endif
phungductung 0:8ede47d38d10 361
phungductung 0:8ede47d38d10 362 #define GPIO_AF0_LPTIM GPIO_AF0_LPTIM1
phungductung 0:8ede47d38d10 363 #define GPIO_AF1_LPTIM GPIO_AF1_LPTIM1
phungductung 0:8ede47d38d10 364 #define GPIO_AF2_LPTIM GPIO_AF2_LPTIM1
phungductung 0:8ede47d38d10 365
phungductung 0:8ede47d38d10 366 #if defined(STM32L0) || defined(STM32L4) || defined(STM32F4) || defined(STM32F2) || defined(STM32F7)
phungductung 0:8ede47d38d10 367 #define GPIO_SPEED_LOW GPIO_SPEED_FREQ_LOW
phungductung 0:8ede47d38d10 368 #define GPIO_SPEED_MEDIUM GPIO_SPEED_FREQ_MEDIUM
phungductung 0:8ede47d38d10 369 #define GPIO_SPEED_FAST GPIO_SPEED_FREQ_HIGH
phungductung 0:8ede47d38d10 370 #define GPIO_SPEED_HIGH GPIO_SPEED_FREQ_VERY_HIGH
phungductung 0:8ede47d38d10 371 #endif /* STM32L0 || STM32L4 || STM32F4 || STM32F2 || STM32F7 */
phungductung 0:8ede47d38d10 372
phungductung 0:8ede47d38d10 373 #if defined(STM32L1)
phungductung 0:8ede47d38d10 374 #define GPIO_SPEED_VERY_LOW GPIO_SPEED_FREQ_LOW
phungductung 0:8ede47d38d10 375 #define GPIO_SPEED_LOW GPIO_SPEED_FREQ_MEDIUM
phungductung 0:8ede47d38d10 376 #define GPIO_SPEED_MEDIUM GPIO_SPEED_FREQ_HIGH
phungductung 0:8ede47d38d10 377 #define GPIO_SPEED_HIGH GPIO_SPEED_FREQ_VERY_HIGH
phungductung 0:8ede47d38d10 378 #endif /* STM32L1 */
phungductung 0:8ede47d38d10 379
phungductung 0:8ede47d38d10 380 #if defined(STM32F3) || defined(STM32F1)
phungductung 0:8ede47d38d10 381 #define GPIO_SPEED_LOW GPIO_SPEED_FREQ_LOW
phungductung 0:8ede47d38d10 382 #define GPIO_SPEED_MEDIUM GPIO_SPEED_FREQ_MEDIUM
phungductung 0:8ede47d38d10 383 #define GPIO_SPEED_HIGH GPIO_SPEED_FREQ_HIGH
phungductung 0:8ede47d38d10 384 #endif /* STM32F3 */
phungductung 0:8ede47d38d10 385
phungductung 0:8ede47d38d10 386 /**
phungductung 0:8ede47d38d10 387 * @}
phungductung 0:8ede47d38d10 388 */
phungductung 0:8ede47d38d10 389
phungductung 0:8ede47d38d10 390 /** @defgroup HAL_HRTIM_Aliased_Macros HAL HRTIM Aliased Macros maintained for legacy purpose
phungductung 0:8ede47d38d10 391 * @{
phungductung 0:8ede47d38d10 392 */
phungductung 0:8ede47d38d10 393 #define HRTIM_TIMDELAYEDPROTECTION_DISABLED HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DISABLED
phungductung 0:8ede47d38d10 394 #define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT1_EEV68 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT1_EEV6
phungductung 0:8ede47d38d10 395 #define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT2_EEV68 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT2_EEV6
phungductung 0:8ede47d38d10 396 #define HRTIM_TIMDELAYEDPROTECTION_DELAYEDBOTH_EEV68 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDBOTH_EEV6
phungductung 0:8ede47d38d10 397 #define HRTIM_TIMDELAYEDPROTECTION_BALANCED_EEV68 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_BALANCED_EEV6
phungductung 0:8ede47d38d10 398 #define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT1_DEEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT1_DEEV7
phungductung 0:8ede47d38d10 399 #define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT2_DEEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT2_DEEV7
phungductung 0:8ede47d38d10 400 #define HRTIM_TIMDELAYEDPROTECTION_DELAYEDBOTH_EEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDBOTH_EEV7
phungductung 0:8ede47d38d10 401 #define HRTIM_TIMDELAYEDPROTECTION_BALANCED_EEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_BALANCED_EEV7
phungductung 0:8ede47d38d10 402
phungductung 0:8ede47d38d10 403 #define __HAL_HRTIM_SetCounter __HAL_HRTIM_SETCOUNTER
phungductung 0:8ede47d38d10 404 #define __HAL_HRTIM_GetCounter __HAL_HRTIM_GETCOUNTER
phungductung 0:8ede47d38d10 405 #define __HAL_HRTIM_SetPeriod __HAL_HRTIM_SETPERIOD
phungductung 0:8ede47d38d10 406 #define __HAL_HRTIM_GetPeriod __HAL_HRTIM_GETPERIOD
phungductung 0:8ede47d38d10 407 #define __HAL_HRTIM_SetClockPrescaler __HAL_HRTIM_SETCLOCKPRESCALER
phungductung 0:8ede47d38d10 408 #define __HAL_HRTIM_GetClockPrescaler __HAL_HRTIM_GETCLOCKPRESCALER
phungductung 0:8ede47d38d10 409 #define __HAL_HRTIM_SetCompare __HAL_HRTIM_SETCOMPARE
phungductung 0:8ede47d38d10 410 #define __HAL_HRTIM_GetCompare __HAL_HRTIM_GETCOMPARE
phungductung 0:8ede47d38d10 411 /**
phungductung 0:8ede47d38d10 412 * @}
phungductung 0:8ede47d38d10 413 */
phungductung 0:8ede47d38d10 414
phungductung 0:8ede47d38d10 415 /** @defgroup HAL_I2C_Aliased_Defines HAL I2C Aliased Defines maintained for legacy purpose
phungductung 0:8ede47d38d10 416 * @{
phungductung 0:8ede47d38d10 417 */
phungductung 0:8ede47d38d10 418 #define I2C_DUALADDRESS_DISABLED I2C_DUALADDRESS_DISABLE
phungductung 0:8ede47d38d10 419 #define I2C_DUALADDRESS_ENABLED I2C_DUALADDRESS_ENABLE
phungductung 0:8ede47d38d10 420 #define I2C_GENERALCALL_DISABLED I2C_GENERALCALL_DISABLE
phungductung 0:8ede47d38d10 421 #define I2C_GENERALCALL_ENABLED I2C_GENERALCALL_ENABLE
phungductung 0:8ede47d38d10 422 #define I2C_NOSTRETCH_DISABLED I2C_NOSTRETCH_DISABLE
phungductung 0:8ede47d38d10 423 #define I2C_NOSTRETCH_ENABLED I2C_NOSTRETCH_ENABLE
phungductung 0:8ede47d38d10 424 #define I2C_ANALOGFILTER_ENABLED I2C_ANALOGFILTER_ENABLE
phungductung 0:8ede47d38d10 425 #define I2C_ANALOGFILTER_DISABLED I2C_ANALOGFILTER_DISABLE
phungductung 0:8ede47d38d10 426 /**
phungductung 0:8ede47d38d10 427 * @}
phungductung 0:8ede47d38d10 428 */
phungductung 0:8ede47d38d10 429
phungductung 0:8ede47d38d10 430 /** @defgroup HAL_IRDA_Aliased_Defines HAL IRDA Aliased Defines maintained for legacy purpose
phungductung 0:8ede47d38d10 431 * @{
phungductung 0:8ede47d38d10 432 */
phungductung 0:8ede47d38d10 433 #define IRDA_ONE_BIT_SAMPLE_DISABLED IRDA_ONE_BIT_SAMPLE_DISABLE
phungductung 0:8ede47d38d10 434 #define IRDA_ONE_BIT_SAMPLE_ENABLED IRDA_ONE_BIT_SAMPLE_ENABLE
phungductung 0:8ede47d38d10 435
phungductung 0:8ede47d38d10 436 /**
phungductung 0:8ede47d38d10 437 * @}
phungductung 0:8ede47d38d10 438 */
phungductung 0:8ede47d38d10 439
phungductung 0:8ede47d38d10 440 /** @defgroup HAL_IWDG_Aliased_Defines HAL IWDG Aliased Defines maintained for legacy purpose
phungductung 0:8ede47d38d10 441 * @{
phungductung 0:8ede47d38d10 442 */
phungductung 0:8ede47d38d10 443 #define KR_KEY_RELOAD IWDG_KEY_RELOAD
phungductung 0:8ede47d38d10 444 #define KR_KEY_ENABLE IWDG_KEY_ENABLE
phungductung 0:8ede47d38d10 445 #define KR_KEY_EWA IWDG_KEY_WRITE_ACCESS_ENABLE
phungductung 0:8ede47d38d10 446 #define KR_KEY_DWA IWDG_KEY_WRITE_ACCESS_DISABLE
phungductung 0:8ede47d38d10 447 /**
phungductung 0:8ede47d38d10 448 * @}
phungductung 0:8ede47d38d10 449 */
phungductung 0:8ede47d38d10 450
phungductung 0:8ede47d38d10 451 /** @defgroup HAL_LPTIM_Aliased_Defines HAL LPTIM Aliased Defines maintained for legacy purpose
phungductung 0:8ede47d38d10 452 * @{
phungductung 0:8ede47d38d10 453 */
phungductung 0:8ede47d38d10 454
phungductung 0:8ede47d38d10 455 #define LPTIM_CLOCKSAMPLETIME_DIRECTTRANSISTION LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION
phungductung 0:8ede47d38d10 456 #define LPTIM_CLOCKSAMPLETIME_2TRANSISTIONS LPTIM_CLOCKSAMPLETIME_2TRANSITIONS
phungductung 0:8ede47d38d10 457 #define LPTIM_CLOCKSAMPLETIME_4TRANSISTIONS LPTIM_CLOCKSAMPLETIME_4TRANSITIONS
phungductung 0:8ede47d38d10 458 #define LPTIM_CLOCKSAMPLETIME_8TRANSISTIONS LPTIM_CLOCKSAMPLETIME_8TRANSITIONS
phungductung 0:8ede47d38d10 459
phungductung 0:8ede47d38d10 460 #define LPTIM_CLOCKPOLARITY_RISINGEDGE LPTIM_CLOCKPOLARITY_RISING
phungductung 0:8ede47d38d10 461 #define LPTIM_CLOCKPOLARITY_FALLINGEDGE LPTIM_CLOCKPOLARITY_FALLING
phungductung 0:8ede47d38d10 462 #define LPTIM_CLOCKPOLARITY_BOTHEDGES LPTIM_CLOCKPOLARITY_RISING_FALLING
phungductung 0:8ede47d38d10 463
phungductung 0:8ede47d38d10 464 #define LPTIM_TRIGSAMPLETIME_DIRECTTRANSISTION LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION
phungductung 0:8ede47d38d10 465 #define LPTIM_TRIGSAMPLETIME_2TRANSISTIONS LPTIM_TRIGSAMPLETIME_2TRANSITIONS
phungductung 0:8ede47d38d10 466 #define LPTIM_TRIGSAMPLETIME_4TRANSISTIONS LPTIM_TRIGSAMPLETIME_4TRANSITIONS
phungductung 0:8ede47d38d10 467 #define LPTIM_TRIGSAMPLETIME_8TRANSISTIONS LPTIM_TRIGSAMPLETIME_8TRANSITIONS
phungductung 0:8ede47d38d10 468
phungductung 0:8ede47d38d10 469 /* The following 3 definition have also been present in a temporary version of lptim.h */
phungductung 0:8ede47d38d10 470 /* They need to be renamed also to the right name, just in case */
phungductung 0:8ede47d38d10 471 #define LPTIM_TRIGSAMPLETIME_2TRANSITION LPTIM_TRIGSAMPLETIME_2TRANSITIONS
phungductung 0:8ede47d38d10 472 #define LPTIM_TRIGSAMPLETIME_4TRANSITION LPTIM_TRIGSAMPLETIME_4TRANSITIONS
phungductung 0:8ede47d38d10 473 #define LPTIM_TRIGSAMPLETIME_8TRANSITION LPTIM_TRIGSAMPLETIME_8TRANSITIONS
phungductung 0:8ede47d38d10 474
phungductung 0:8ede47d38d10 475 /**
phungductung 0:8ede47d38d10 476 * @}
phungductung 0:8ede47d38d10 477 */
phungductung 0:8ede47d38d10 478
phungductung 0:8ede47d38d10 479 /** @defgroup HAL_NAND_Aliased_Defines HAL NAND Aliased Defines maintained for legacy purpose
phungductung 0:8ede47d38d10 480 * @{
phungductung 0:8ede47d38d10 481 */
phungductung 0:8ede47d38d10 482 #define NAND_AddressTypedef NAND_AddressTypeDef
phungductung 0:8ede47d38d10 483
phungductung 0:8ede47d38d10 484 #define __ARRAY_ADDRESS ARRAY_ADDRESS
phungductung 0:8ede47d38d10 485 #define __ADDR_1st_CYCLE ADDR_1ST_CYCLE
phungductung 0:8ede47d38d10 486 #define __ADDR_2nd_CYCLE ADDR_2ND_CYCLE
phungductung 0:8ede47d38d10 487 #define __ADDR_3rd_CYCLE ADDR_3RD_CYCLE
phungductung 0:8ede47d38d10 488 #define __ADDR_4th_CYCLE ADDR_4TH_CYCLE
phungductung 0:8ede47d38d10 489 /**
phungductung 0:8ede47d38d10 490 * @}
phungductung 0:8ede47d38d10 491 */
phungductung 0:8ede47d38d10 492
phungductung 0:8ede47d38d10 493 /** @defgroup HAL_NOR_Aliased_Defines HAL NOR Aliased Defines maintained for legacy purpose
phungductung 0:8ede47d38d10 494 * @{
phungductung 0:8ede47d38d10 495 */
phungductung 0:8ede47d38d10 496 #define NOR_StatusTypedef HAL_NOR_StatusTypeDef
phungductung 0:8ede47d38d10 497 #define NOR_SUCCESS HAL_NOR_STATUS_SUCCESS
phungductung 0:8ede47d38d10 498 #define NOR_ONGOING HAL_NOR_STATUS_ONGOING
phungductung 0:8ede47d38d10 499 #define NOR_ERROR HAL_NOR_STATUS_ERROR
phungductung 0:8ede47d38d10 500 #define NOR_TIMEOUT HAL_NOR_STATUS_TIMEOUT
phungductung 0:8ede47d38d10 501
phungductung 0:8ede47d38d10 502 #define __NOR_WRITE NOR_WRITE
phungductung 0:8ede47d38d10 503 #define __NOR_ADDR_SHIFT NOR_ADDR_SHIFT
phungductung 0:8ede47d38d10 504 /**
phungductung 0:8ede47d38d10 505 * @}
phungductung 0:8ede47d38d10 506 */
phungductung 0:8ede47d38d10 507
phungductung 0:8ede47d38d10 508 /** @defgroup HAL_OPAMP_Aliased_Defines HAL OPAMP Aliased Defines maintained for legacy purpose
phungductung 0:8ede47d38d10 509 * @{
phungductung 0:8ede47d38d10 510 */
phungductung 0:8ede47d38d10 511
phungductung 0:8ede47d38d10 512 #define OPAMP_NONINVERTINGINPUT_VP0 OPAMP_NONINVERTINGINPUT_IO0
phungductung 0:8ede47d38d10 513 #define OPAMP_NONINVERTINGINPUT_VP1 OPAMP_NONINVERTINGINPUT_IO1
phungductung 0:8ede47d38d10 514 #define OPAMP_NONINVERTINGINPUT_VP2 OPAMP_NONINVERTINGINPUT_IO2
phungductung 0:8ede47d38d10 515 #define OPAMP_NONINVERTINGINPUT_VP3 OPAMP_NONINVERTINGINPUT_IO3
phungductung 0:8ede47d38d10 516
phungductung 0:8ede47d38d10 517 #define OPAMP_SEC_NONINVERTINGINPUT_VP0 OPAMP_SEC_NONINVERTINGINPUT_IO0
phungductung 0:8ede47d38d10 518 #define OPAMP_SEC_NONINVERTINGINPUT_VP1 OPAMP_SEC_NONINVERTINGINPUT_IO1
phungductung 0:8ede47d38d10 519 #define OPAMP_SEC_NONINVERTINGINPUT_VP2 OPAMP_SEC_NONINVERTINGINPUT_IO2
phungductung 0:8ede47d38d10 520 #define OPAMP_SEC_NONINVERTINGINPUT_VP3 OPAMP_SEC_NONINVERTINGINPUT_IO3
phungductung 0:8ede47d38d10 521
phungductung 0:8ede47d38d10 522 #define OPAMP_INVERTINGINPUT_VM0 OPAMP_INVERTINGINPUT_IO0
phungductung 0:8ede47d38d10 523 #define OPAMP_INVERTINGINPUT_VM1 OPAMP_INVERTINGINPUT_IO1
phungductung 0:8ede47d38d10 524
phungductung 0:8ede47d38d10 525 #define IOPAMP_INVERTINGINPUT_VM0 OPAMP_INVERTINGINPUT_IO0
phungductung 0:8ede47d38d10 526 #define IOPAMP_INVERTINGINPUT_VM1 OPAMP_INVERTINGINPUT_IO1
phungductung 0:8ede47d38d10 527
phungductung 0:8ede47d38d10 528 #define OPAMP_SEC_INVERTINGINPUT_VM0 OPAMP_SEC_INVERTINGINPUT_IO0
phungductung 0:8ede47d38d10 529 #define OPAMP_SEC_INVERTINGINPUT_VM1 OPAMP_SEC_INVERTINGINPUT_IO1
phungductung 0:8ede47d38d10 530
phungductung 0:8ede47d38d10 531 #define OPAMP_INVERTINGINPUT_VINM OPAMP_SEC_INVERTINGINPUT_IO1
phungductung 0:8ede47d38d10 532
phungductung 0:8ede47d38d10 533 #define OPAMP_PGACONNECT_NO OPAMP_PGA_CONNECT_INVERTINGINPUT_NO
phungductung 0:8ede47d38d10 534 #define OPAMP_PGACONNECT_VM0 OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0
phungductung 0:8ede47d38d10 535 #define OPAMP_PGACONNECT_VM1 OPAMP_PGA_CONNECT_INVERTINGINPUT_IO1
phungductung 0:8ede47d38d10 536
phungductung 0:8ede47d38d10 537 /**
phungductung 0:8ede47d38d10 538 * @}
phungductung 0:8ede47d38d10 539 */
phungductung 0:8ede47d38d10 540
phungductung 0:8ede47d38d10 541 /** @defgroup HAL_I2S_Aliased_Defines HAL I2S Aliased Defines maintained for legacy purpose
phungductung 0:8ede47d38d10 542 * @{
phungductung 0:8ede47d38d10 543 */
phungductung 0:8ede47d38d10 544 #define I2S_STANDARD_PHILLIPS I2S_STANDARD_PHILIPS
phungductung 0:8ede47d38d10 545 /**
phungductung 0:8ede47d38d10 546 * @}
phungductung 0:8ede47d38d10 547 */
phungductung 0:8ede47d38d10 548
phungductung 0:8ede47d38d10 549 /** @defgroup HAL_PCCARD_Aliased_Defines HAL PCCARD Aliased Defines maintained for legacy purpose
phungductung 0:8ede47d38d10 550 * @{
phungductung 0:8ede47d38d10 551 */
phungductung 0:8ede47d38d10 552
phungductung 0:8ede47d38d10 553 /* Compact Flash-ATA registers description */
phungductung 0:8ede47d38d10 554 #define CF_DATA ATA_DATA
phungductung 0:8ede47d38d10 555 #define CF_SECTOR_COUNT ATA_SECTOR_COUNT
phungductung 0:8ede47d38d10 556 #define CF_SECTOR_NUMBER ATA_SECTOR_NUMBER
phungductung 0:8ede47d38d10 557 #define CF_CYLINDER_LOW ATA_CYLINDER_LOW
phungductung 0:8ede47d38d10 558 #define CF_CYLINDER_HIGH ATA_CYLINDER_HIGH
phungductung 0:8ede47d38d10 559 #define CF_CARD_HEAD ATA_CARD_HEAD
phungductung 0:8ede47d38d10 560 #define CF_STATUS_CMD ATA_STATUS_CMD
phungductung 0:8ede47d38d10 561 #define CF_STATUS_CMD_ALTERNATE ATA_STATUS_CMD_ALTERNATE
phungductung 0:8ede47d38d10 562 #define CF_COMMON_DATA_AREA ATA_COMMON_DATA_AREA
phungductung 0:8ede47d38d10 563
phungductung 0:8ede47d38d10 564 /* Compact Flash-ATA commands */
phungductung 0:8ede47d38d10 565 #define CF_READ_SECTOR_CMD ATA_READ_SECTOR_CMD
phungductung 0:8ede47d38d10 566 #define CF_WRITE_SECTOR_CMD ATA_WRITE_SECTOR_CMD
phungductung 0:8ede47d38d10 567 #define CF_ERASE_SECTOR_CMD ATA_ERASE_SECTOR_CMD
phungductung 0:8ede47d38d10 568 #define CF_IDENTIFY_CMD ATA_IDENTIFY_CMD
phungductung 0:8ede47d38d10 569
phungductung 0:8ede47d38d10 570 #define PCCARD_StatusTypedef HAL_PCCARD_StatusTypeDef
phungductung 0:8ede47d38d10 571 #define PCCARD_SUCCESS HAL_PCCARD_STATUS_SUCCESS
phungductung 0:8ede47d38d10 572 #define PCCARD_ONGOING HAL_PCCARD_STATUS_ONGOING
phungductung 0:8ede47d38d10 573 #define PCCARD_ERROR HAL_PCCARD_STATUS_ERROR
phungductung 0:8ede47d38d10 574 #define PCCARD_TIMEOUT HAL_PCCARD_STATUS_TIMEOUT
phungductung 0:8ede47d38d10 575 /**
phungductung 0:8ede47d38d10 576 * @}
phungductung 0:8ede47d38d10 577 */
phungductung 0:8ede47d38d10 578
phungductung 0:8ede47d38d10 579 /** @defgroup HAL_RTC_Aliased_Defines HAL RTC Aliased Defines maintained for legacy purpose
phungductung 0:8ede47d38d10 580 * @{
phungductung 0:8ede47d38d10 581 */
phungductung 0:8ede47d38d10 582
phungductung 0:8ede47d38d10 583 #define FORMAT_BIN RTC_FORMAT_BIN
phungductung 0:8ede47d38d10 584 #define FORMAT_BCD RTC_FORMAT_BCD
phungductung 0:8ede47d38d10 585
phungductung 0:8ede47d38d10 586 #define RTC_ALARMSUBSECONDMASK_None RTC_ALARMSUBSECONDMASK_NONE
phungductung 0:8ede47d38d10 587 #define RTC_TAMPERERASEBACKUP_ENABLED RTC_TAMPER_ERASE_BACKUP_ENABLE
phungductung 0:8ede47d38d10 588 #define RTC_TAMPERERASEBACKUP_DISABLED RTC_TAMPER_ERASE_BACKUP_DISABLE
phungductung 0:8ede47d38d10 589 #define RTC_TAMPERMASK_FLAG_DISABLED RTC_TAMPERMASK_FLAG_DISABLE
phungductung 0:8ede47d38d10 590 #define RTC_TAMPERMASK_FLAG_ENABLED RTC_TAMPERMASK_FLAG_ENABLE
phungductung 0:8ede47d38d10 591
phungductung 0:8ede47d38d10 592 #define RTC_MASKTAMPERFLAG_DISABLED RTC_TAMPERMASK_FLAG_DISABLE
phungductung 0:8ede47d38d10 593 #define RTC_MASKTAMPERFLAG_ENABLED RTC_TAMPERMASK_FLAG_ENABLE
phungductung 0:8ede47d38d10 594 #define RTC_TAMPERERASEBACKUP_ENABLED RTC_TAMPER_ERASE_BACKUP_ENABLE
phungductung 0:8ede47d38d10 595 #define RTC_TAMPERERASEBACKUP_DISABLED RTC_TAMPER_ERASE_BACKUP_DISABLE
phungductung 0:8ede47d38d10 596 #define RTC_MASKTAMPERFLAG_DISABLED RTC_TAMPERMASK_FLAG_DISABLE
phungductung 0:8ede47d38d10 597 #define RTC_MASKTAMPERFLAG_ENABLED RTC_TAMPERMASK_FLAG_ENABLE
phungductung 0:8ede47d38d10 598 #define RTC_TAMPER1_2_INTERRUPT RTC_ALL_TAMPER_INTERRUPT
phungductung 0:8ede47d38d10 599 #define RTC_TAMPER1_2_3_INTERRUPT RTC_ALL_TAMPER_INTERRUPT
phungductung 0:8ede47d38d10 600
phungductung 0:8ede47d38d10 601 #define RTC_TIMESTAMPPIN_PC13 RTC_TIMESTAMPPIN_DEFAULT
phungductung 0:8ede47d38d10 602 #define RTC_TIMESTAMPPIN_PA0 RTC_TIMESTAMPPIN_POS1
phungductung 0:8ede47d38d10 603 #define RTC_TIMESTAMPPIN_PI8 RTC_TIMESTAMPPIN_POS1
phungductung 0:8ede47d38d10 604 #define RTC_TIMESTAMPPIN_PC1 RTC_TIMESTAMPPIN_POS2
phungductung 0:8ede47d38d10 605
phungductung 0:8ede47d38d10 606 #define RTC_OUTPUT_REMAP_PC13 RTC_OUTPUT_REMAP_NONE
phungductung 0:8ede47d38d10 607 #define RTC_OUTPUT_REMAP_PB14 RTC_OUTPUT_REMAP_POS1
phungductung 0:8ede47d38d10 608 #define RTC_OUTPUT_REMAP_PB2 RTC_OUTPUT_REMAP_POS1
phungductung 0:8ede47d38d10 609
phungductung 0:8ede47d38d10 610 #define RTC_TAMPERPIN_PC13 RTC_TAMPERPIN_DEFAULT
phungductung 0:8ede47d38d10 611 #define RTC_TAMPERPIN_PA0 RTC_TAMPERPIN_POS1
phungductung 0:8ede47d38d10 612 #define RTC_TAMPERPIN_PI8 RTC_TAMPERPIN_POS1
phungductung 0:8ede47d38d10 613
phungductung 0:8ede47d38d10 614 /**
phungductung 0:8ede47d38d10 615 * @}
phungductung 0:8ede47d38d10 616 */
phungductung 0:8ede47d38d10 617
phungductung 0:8ede47d38d10 618
phungductung 0:8ede47d38d10 619 /** @defgroup HAL_SMARTCARD_Aliased_Defines HAL SMARTCARD Aliased Defines maintained for legacy purpose
phungductung 0:8ede47d38d10 620 * @{
phungductung 0:8ede47d38d10 621 */
phungductung 0:8ede47d38d10 622 #define SMARTCARD_NACK_ENABLED SMARTCARD_NACK_ENABLE
phungductung 0:8ede47d38d10 623 #define SMARTCARD_NACK_DISABLED SMARTCARD_NACK_DISABLE
phungductung 0:8ede47d38d10 624
phungductung 0:8ede47d38d10 625 #define SMARTCARD_ONEBIT_SAMPLING_DISABLED SMARTCARD_ONE_BIT_SAMPLE_DISABLE
phungductung 0:8ede47d38d10 626 #define SMARTCARD_ONEBIT_SAMPLING_ENABLED SMARTCARD_ONE_BIT_SAMPLE_ENABLE
phungductung 0:8ede47d38d10 627 #define SMARTCARD_ONEBIT_SAMPLING_DISABLE SMARTCARD_ONE_BIT_SAMPLE_DISABLE
phungductung 0:8ede47d38d10 628 #define SMARTCARD_ONEBIT_SAMPLING_ENABLE SMARTCARD_ONE_BIT_SAMPLE_ENABLE
phungductung 0:8ede47d38d10 629
phungductung 0:8ede47d38d10 630 #define SMARTCARD_TIMEOUT_DISABLED SMARTCARD_TIMEOUT_DISABLE
phungductung 0:8ede47d38d10 631 #define SMARTCARD_TIMEOUT_ENABLED SMARTCARD_TIMEOUT_ENABLE
phungductung 0:8ede47d38d10 632
phungductung 0:8ede47d38d10 633 #define SMARTCARD_LASTBIT_DISABLED SMARTCARD_LASTBIT_DISABLE
phungductung 0:8ede47d38d10 634 #define SMARTCARD_LASTBIT_ENABLED SMARTCARD_LASTBIT_ENABLE
phungductung 0:8ede47d38d10 635 /**
phungductung 0:8ede47d38d10 636 * @}
phungductung 0:8ede47d38d10 637 */
phungductung 0:8ede47d38d10 638
phungductung 0:8ede47d38d10 639
phungductung 0:8ede47d38d10 640 /** @defgroup HAL_SMBUS_Aliased_Defines HAL SMBUS Aliased Defines maintained for legacy purpose
phungductung 0:8ede47d38d10 641 * @{
phungductung 0:8ede47d38d10 642 */
phungductung 0:8ede47d38d10 643 #define SMBUS_DUALADDRESS_DISABLED SMBUS_DUALADDRESS_DISABLE
phungductung 0:8ede47d38d10 644 #define SMBUS_DUALADDRESS_ENABLED SMBUS_DUALADDRESS_ENABLE
phungductung 0:8ede47d38d10 645 #define SMBUS_GENERALCALL_DISABLED SMBUS_GENERALCALL_DISABLE
phungductung 0:8ede47d38d10 646 #define SMBUS_GENERALCALL_ENABLED SMBUS_GENERALCALL_ENABLE
phungductung 0:8ede47d38d10 647 #define SMBUS_NOSTRETCH_DISABLED SMBUS_NOSTRETCH_DISABLE
phungductung 0:8ede47d38d10 648 #define SMBUS_NOSTRETCH_ENABLED SMBUS_NOSTRETCH_ENABLE
phungductung 0:8ede47d38d10 649 #define SMBUS_ANALOGFILTER_ENABLED SMBUS_ANALOGFILTER_ENABLE
phungductung 0:8ede47d38d10 650 #define SMBUS_ANALOGFILTER_DISABLED SMBUS_ANALOGFILTER_DISABLE
phungductung 0:8ede47d38d10 651 #define SMBUS_PEC_DISABLED SMBUS_PEC_DISABLE
phungductung 0:8ede47d38d10 652 #define SMBUS_PEC_ENABLED SMBUS_PEC_ENABLE
phungductung 0:8ede47d38d10 653 #define HAL_SMBUS_STATE_SLAVE_LISTEN HAL_SMBUS_STATE_LISTEN
phungductung 0:8ede47d38d10 654 /**
phungductung 0:8ede47d38d10 655 * @}
phungductung 0:8ede47d38d10 656 */
phungductung 0:8ede47d38d10 657
phungductung 0:8ede47d38d10 658 /** @defgroup HAL_SPI_Aliased_Defines HAL SPI Aliased Defines maintained for legacy purpose
phungductung 0:8ede47d38d10 659 * @{
phungductung 0:8ede47d38d10 660 */
phungductung 0:8ede47d38d10 661 #define SPI_TIMODE_DISABLED SPI_TIMODE_DISABLE
phungductung 0:8ede47d38d10 662 #define SPI_TIMODE_ENABLED SPI_TIMODE_ENABLE
phungductung 0:8ede47d38d10 663
phungductung 0:8ede47d38d10 664 #define SPI_CRCCALCULATION_DISABLED SPI_CRCCALCULATION_DISABLE
phungductung 0:8ede47d38d10 665 #define SPI_CRCCALCULATION_ENABLED SPI_CRCCALCULATION_ENABLE
phungductung 0:8ede47d38d10 666
phungductung 0:8ede47d38d10 667 #define SPI_NSS_PULSE_DISABLED SPI_NSS_PULSE_DISABLE
phungductung 0:8ede47d38d10 668 #define SPI_NSS_PULSE_ENABLED SPI_NSS_PULSE_ENABLE
phungductung 0:8ede47d38d10 669
phungductung 0:8ede47d38d10 670 /**
phungductung 0:8ede47d38d10 671 * @}
phungductung 0:8ede47d38d10 672 */
phungductung 0:8ede47d38d10 673
phungductung 0:8ede47d38d10 674 /** @defgroup HAL_TIM_Aliased_Defines HAL TIM Aliased Defines maintained for legacy purpose
phungductung 0:8ede47d38d10 675 * @{
phungductung 0:8ede47d38d10 676 */
phungductung 0:8ede47d38d10 677 #define CCER_CCxE_MASK TIM_CCER_CCxE_MASK
phungductung 0:8ede47d38d10 678 #define CCER_CCxNE_MASK TIM_CCER_CCxNE_MASK
phungductung 0:8ede47d38d10 679
phungductung 0:8ede47d38d10 680 #define TIM_DMABase_CR1 TIM_DMABASE_CR1
phungductung 0:8ede47d38d10 681 #define TIM_DMABase_CR2 TIM_DMABASE_CR2
phungductung 0:8ede47d38d10 682 #define TIM_DMABase_SMCR TIM_DMABASE_SMCR
phungductung 0:8ede47d38d10 683 #define TIM_DMABase_DIER TIM_DMABASE_DIER
phungductung 0:8ede47d38d10 684 #define TIM_DMABase_SR TIM_DMABASE_SR
phungductung 0:8ede47d38d10 685 #define TIM_DMABase_EGR TIM_DMABASE_EGR
phungductung 0:8ede47d38d10 686 #define TIM_DMABase_CCMR1 TIM_DMABASE_CCMR1
phungductung 0:8ede47d38d10 687 #define TIM_DMABase_CCMR2 TIM_DMABASE_CCMR2
phungductung 0:8ede47d38d10 688 #define TIM_DMABase_CCER TIM_DMABASE_CCER
phungductung 0:8ede47d38d10 689 #define TIM_DMABase_CNT TIM_DMABASE_CNT
phungductung 0:8ede47d38d10 690 #define TIM_DMABase_PSC TIM_DMABASE_PSC
phungductung 0:8ede47d38d10 691 #define TIM_DMABase_ARR TIM_DMABASE_ARR
phungductung 0:8ede47d38d10 692 #define TIM_DMABase_RCR TIM_DMABASE_RCR
phungductung 0:8ede47d38d10 693 #define TIM_DMABase_CCR1 TIM_DMABASE_CCR1
phungductung 0:8ede47d38d10 694 #define TIM_DMABase_CCR2 TIM_DMABASE_CCR2
phungductung 0:8ede47d38d10 695 #define TIM_DMABase_CCR3 TIM_DMABASE_CCR3
phungductung 0:8ede47d38d10 696 #define TIM_DMABase_CCR4 TIM_DMABASE_CCR4
phungductung 0:8ede47d38d10 697 #define TIM_DMABase_BDTR TIM_DMABASE_BDTR
phungductung 0:8ede47d38d10 698 #define TIM_DMABase_DCR TIM_DMABASE_DCR
phungductung 0:8ede47d38d10 699 #define TIM_DMABase_DMAR TIM_DMABASE_DMAR
phungductung 0:8ede47d38d10 700 #define TIM_DMABase_OR1 TIM_DMABASE_OR1
phungductung 0:8ede47d38d10 701 #define TIM_DMABase_CCMR3 TIM_DMABASE_CCMR3
phungductung 0:8ede47d38d10 702 #define TIM_DMABase_CCR5 TIM_DMABASE_CCR5
phungductung 0:8ede47d38d10 703 #define TIM_DMABase_CCR6 TIM_DMABASE_CCR6
phungductung 0:8ede47d38d10 704 #define TIM_DMABase_OR2 TIM_DMABASE_OR2
phungductung 0:8ede47d38d10 705 #define TIM_DMABase_OR3 TIM_DMABASE_OR3
phungductung 0:8ede47d38d10 706 #define TIM_DMABase_OR TIM_DMABASE_OR
phungductung 0:8ede47d38d10 707
phungductung 0:8ede47d38d10 708 #define TIM_EventSource_Update TIM_EVENTSOURCE_UPDATE
phungductung 0:8ede47d38d10 709 #define TIM_EventSource_CC1 TIM_EVENTSOURCE_CC1
phungductung 0:8ede47d38d10 710 #define TIM_EventSource_CC2 TIM_EVENTSOURCE_CC2
phungductung 0:8ede47d38d10 711 #define TIM_EventSource_CC3 TIM_EVENTSOURCE_CC3
phungductung 0:8ede47d38d10 712 #define TIM_EventSource_CC4 TIM_EVENTSOURCE_CC4
phungductung 0:8ede47d38d10 713 #define TIM_EventSource_COM TIM_EVENTSOURCE_COM
phungductung 0:8ede47d38d10 714 #define TIM_EventSource_Trigger TIM_EVENTSOURCE_TRIGGER
phungductung 0:8ede47d38d10 715 #define TIM_EventSource_Break TIM_EVENTSOURCE_BREAK
phungductung 0:8ede47d38d10 716 #define TIM_EventSource_Break2 TIM_EVENTSOURCE_BREAK2
phungductung 0:8ede47d38d10 717
phungductung 0:8ede47d38d10 718 #define TIM_DMABurstLength_1Transfer TIM_DMABURSTLENGTH_1TRANSFER
phungductung 0:8ede47d38d10 719 #define TIM_DMABurstLength_2Transfers TIM_DMABURSTLENGTH_2TRANSFERS
phungductung 0:8ede47d38d10 720 #define TIM_DMABurstLength_3Transfers TIM_DMABURSTLENGTH_3TRANSFERS
phungductung 0:8ede47d38d10 721 #define TIM_DMABurstLength_4Transfers TIM_DMABURSTLENGTH_4TRANSFERS
phungductung 0:8ede47d38d10 722 #define TIM_DMABurstLength_5Transfers TIM_DMABURSTLENGTH_5TRANSFERS
phungductung 0:8ede47d38d10 723 #define TIM_DMABurstLength_6Transfers TIM_DMABURSTLENGTH_6TRANSFERS
phungductung 0:8ede47d38d10 724 #define TIM_DMABurstLength_7Transfers TIM_DMABURSTLENGTH_7TRANSFERS
phungductung 0:8ede47d38d10 725 #define TIM_DMABurstLength_8Transfers TIM_DMABURSTLENGTH_8TRANSFERS
phungductung 0:8ede47d38d10 726 #define TIM_DMABurstLength_9Transfers TIM_DMABURSTLENGTH_9TRANSFERS
phungductung 0:8ede47d38d10 727 #define TIM_DMABurstLength_10Transfers TIM_DMABURSTLENGTH_10TRANSFERS
phungductung 0:8ede47d38d10 728 #define TIM_DMABurstLength_11Transfers TIM_DMABURSTLENGTH_11TRANSFERS
phungductung 0:8ede47d38d10 729 #define TIM_DMABurstLength_12Transfers TIM_DMABURSTLENGTH_12TRANSFERS
phungductung 0:8ede47d38d10 730 #define TIM_DMABurstLength_13Transfers TIM_DMABURSTLENGTH_13TRANSFERS
phungductung 0:8ede47d38d10 731 #define TIM_DMABurstLength_14Transfers TIM_DMABURSTLENGTH_14TRANSFERS
phungductung 0:8ede47d38d10 732 #define TIM_DMABurstLength_15Transfers TIM_DMABURSTLENGTH_15TRANSFERS
phungductung 0:8ede47d38d10 733 #define TIM_DMABurstLength_16Transfers TIM_DMABURSTLENGTH_16TRANSFERS
phungductung 0:8ede47d38d10 734 #define TIM_DMABurstLength_17Transfers TIM_DMABURSTLENGTH_17TRANSFERS
phungductung 0:8ede47d38d10 735 #define TIM_DMABurstLength_18Transfers TIM_DMABURSTLENGTH_18TRANSFERS
phungductung 0:8ede47d38d10 736
phungductung 0:8ede47d38d10 737 /**
phungductung 0:8ede47d38d10 738 * @}
phungductung 0:8ede47d38d10 739 */
phungductung 0:8ede47d38d10 740
phungductung 0:8ede47d38d10 741 /** @defgroup HAL_TSC_Aliased_Defines HAL TSC Aliased Defines maintained for legacy purpose
phungductung 0:8ede47d38d10 742 * @{
phungductung 0:8ede47d38d10 743 */
phungductung 0:8ede47d38d10 744 #define TSC_SYNC_POL_FALL TSC_SYNC_POLARITY_FALLING
phungductung 0:8ede47d38d10 745 #define TSC_SYNC_POL_RISE_HIGH TSC_SYNC_POLARITY_RISING
phungductung 0:8ede47d38d10 746 /**
phungductung 0:8ede47d38d10 747 * @}
phungductung 0:8ede47d38d10 748 */
phungductung 0:8ede47d38d10 749
phungductung 0:8ede47d38d10 750 /** @defgroup HAL_UART_Aliased_Defines HAL UART Aliased Defines maintained for legacy purpose
phungductung 0:8ede47d38d10 751 * @{
phungductung 0:8ede47d38d10 752 */
phungductung 0:8ede47d38d10 753 #define UART_ONEBIT_SAMPLING_DISABLED UART_ONE_BIT_SAMPLE_DISABLE
phungductung 0:8ede47d38d10 754 #define UART_ONEBIT_SAMPLING_ENABLED UART_ONE_BIT_SAMPLE_ENABLE
phungductung 0:8ede47d38d10 755 #define UART_ONE_BIT_SAMPLE_DISABLED UART_ONE_BIT_SAMPLE_DISABLE
phungductung 0:8ede47d38d10 756 #define UART_ONE_BIT_SAMPLE_ENABLED UART_ONE_BIT_SAMPLE_ENABLE
phungductung 0:8ede47d38d10 757
phungductung 0:8ede47d38d10 758 #define __HAL_UART_ONEBIT_ENABLE __HAL_UART_ONE_BIT_SAMPLE_ENABLE
phungductung 0:8ede47d38d10 759 #define __HAL_UART_ONEBIT_DISABLE __HAL_UART_ONE_BIT_SAMPLE_DISABLE
phungductung 0:8ede47d38d10 760
phungductung 0:8ede47d38d10 761 #define __DIV_SAMPLING16 UART_DIV_SAMPLING16
phungductung 0:8ede47d38d10 762 #define __DIVMANT_SAMPLING16 UART_DIVMANT_SAMPLING16
phungductung 0:8ede47d38d10 763 #define __DIVFRAQ_SAMPLING16 UART_DIVFRAQ_SAMPLING16
phungductung 0:8ede47d38d10 764 #define __UART_BRR_SAMPLING16 UART_BRR_SAMPLING16
phungductung 0:8ede47d38d10 765
phungductung 0:8ede47d38d10 766 #define __DIV_SAMPLING8 UART_DIV_SAMPLING8
phungductung 0:8ede47d38d10 767 #define __DIVMANT_SAMPLING8 UART_DIVMANT_SAMPLING8
phungductung 0:8ede47d38d10 768 #define __DIVFRAQ_SAMPLING8 UART_DIVFRAQ_SAMPLING8
phungductung 0:8ede47d38d10 769 #define __UART_BRR_SAMPLING8 UART_BRR_SAMPLING8
phungductung 0:8ede47d38d10 770
phungductung 0:8ede47d38d10 771 #define UART_WAKEUPMETHODE_IDLELINE UART_WAKEUPMETHOD_IDLELINE
phungductung 0:8ede47d38d10 772 #define UART_WAKEUPMETHODE_ADDRESSMARK UART_WAKEUPMETHOD_ADDRESSMARK
phungductung 0:8ede47d38d10 773
phungductung 0:8ede47d38d10 774 /**
phungductung 0:8ede47d38d10 775 * @}
phungductung 0:8ede47d38d10 776 */
phungductung 0:8ede47d38d10 777
phungductung 0:8ede47d38d10 778
phungductung 0:8ede47d38d10 779 /** @defgroup HAL_USART_Aliased_Defines HAL USART Aliased Defines maintained for legacy purpose
phungductung 0:8ede47d38d10 780 * @{
phungductung 0:8ede47d38d10 781 */
phungductung 0:8ede47d38d10 782
phungductung 0:8ede47d38d10 783 #define USART_CLOCK_DISABLED USART_CLOCK_DISABLE
phungductung 0:8ede47d38d10 784 #define USART_CLOCK_ENABLED USART_CLOCK_ENABLE
phungductung 0:8ede47d38d10 785
phungductung 0:8ede47d38d10 786 #define USARTNACK_ENABLED USART_NACK_ENABLE
phungductung 0:8ede47d38d10 787 #define USARTNACK_DISABLED USART_NACK_DISABLE
phungductung 0:8ede47d38d10 788 /**
phungductung 0:8ede47d38d10 789 * @}
phungductung 0:8ede47d38d10 790 */
phungductung 0:8ede47d38d10 791
phungductung 0:8ede47d38d10 792 /** @defgroup HAL_WWDG_Aliased_Defines HAL WWDG Aliased Defines maintained for legacy purpose
phungductung 0:8ede47d38d10 793 * @{
phungductung 0:8ede47d38d10 794 */
phungductung 0:8ede47d38d10 795 #define CFR_BASE WWDG_CFR_BASE
phungductung 0:8ede47d38d10 796
phungductung 0:8ede47d38d10 797 /**
phungductung 0:8ede47d38d10 798 * @}
phungductung 0:8ede47d38d10 799 */
phungductung 0:8ede47d38d10 800
phungductung 0:8ede47d38d10 801 /** @defgroup HAL_CAN_Aliased_Defines HAL CAN Aliased Defines maintained for legacy purpose
phungductung 0:8ede47d38d10 802 * @{
phungductung 0:8ede47d38d10 803 */
phungductung 0:8ede47d38d10 804 #define CAN_FilterFIFO0 CAN_FILTER_FIFO0
phungductung 0:8ede47d38d10 805 #define CAN_FilterFIFO1 CAN_FILTER_FIFO1
phungductung 0:8ede47d38d10 806 #define CAN_IT_RQCP0 CAN_IT_TME
phungductung 0:8ede47d38d10 807 #define CAN_IT_RQCP1 CAN_IT_TME
phungductung 0:8ede47d38d10 808 #define CAN_IT_RQCP2 CAN_IT_TME
phungductung 0:8ede47d38d10 809 #define INAK_TIMEOUT CAN_TIMEOUT_VALUE
phungductung 0:8ede47d38d10 810 #define SLAK_TIMEOUT CAN_TIMEOUT_VALUE
phungductung 0:8ede47d38d10 811 #define CAN_TXSTATUS_FAILED ((uint8_t)0x00)
phungductung 0:8ede47d38d10 812 #define CAN_TXSTATUS_OK ((uint8_t)0x01)
phungductung 0:8ede47d38d10 813 #define CAN_TXSTATUS_PENDING ((uint8_t)0x02)
phungductung 0:8ede47d38d10 814
phungductung 0:8ede47d38d10 815 /**
phungductung 0:8ede47d38d10 816 * @}
phungductung 0:8ede47d38d10 817 */
phungductung 0:8ede47d38d10 818
phungductung 0:8ede47d38d10 819 /** @defgroup HAL_ETH_Aliased_Defines HAL ETH Aliased Defines maintained for legacy purpose
phungductung 0:8ede47d38d10 820 * @{
phungductung 0:8ede47d38d10 821 */
phungductung 0:8ede47d38d10 822
phungductung 0:8ede47d38d10 823 #define VLAN_TAG ETH_VLAN_TAG
phungductung 0:8ede47d38d10 824 #define MIN_ETH_PAYLOAD ETH_MIN_ETH_PAYLOAD
phungductung 0:8ede47d38d10 825 #define MAX_ETH_PAYLOAD ETH_MAX_ETH_PAYLOAD
phungductung 0:8ede47d38d10 826 #define JUMBO_FRAME_PAYLOAD ETH_JUMBO_FRAME_PAYLOAD
phungductung 0:8ede47d38d10 827 #define MACMIIAR_CR_MASK ETH_MACMIIAR_CR_MASK
phungductung 0:8ede47d38d10 828 #define MACCR_CLEAR_MASK ETH_MACCR_CLEAR_MASK
phungductung 0:8ede47d38d10 829 #define MACFCR_CLEAR_MASK ETH_MACFCR_CLEAR_MASK
phungductung 0:8ede47d38d10 830 #define DMAOMR_CLEAR_MASK ETH_DMAOMR_CLEAR_MASK
phungductung 0:8ede47d38d10 831
phungductung 0:8ede47d38d10 832 #define ETH_MMCCR ((uint32_t)0x00000100)
phungductung 0:8ede47d38d10 833 #define ETH_MMCRIR ((uint32_t)0x00000104)
phungductung 0:8ede47d38d10 834 #define ETH_MMCTIR ((uint32_t)0x00000108)
phungductung 0:8ede47d38d10 835 #define ETH_MMCRIMR ((uint32_t)0x0000010C)
phungductung 0:8ede47d38d10 836 #define ETH_MMCTIMR ((uint32_t)0x00000110)
phungductung 0:8ede47d38d10 837 #define ETH_MMCTGFSCCR ((uint32_t)0x0000014C)
phungductung 0:8ede47d38d10 838 #define ETH_MMCTGFMSCCR ((uint32_t)0x00000150)
phungductung 0:8ede47d38d10 839 #define ETH_MMCTGFCR ((uint32_t)0x00000168)
phungductung 0:8ede47d38d10 840 #define ETH_MMCRFCECR ((uint32_t)0x00000194)
phungductung 0:8ede47d38d10 841 #define ETH_MMCRFAECR ((uint32_t)0x00000198)
phungductung 0:8ede47d38d10 842 #define ETH_MMCRGUFCR ((uint32_t)0x000001C4)
phungductung 0:8ede47d38d10 843
phungductung 0:8ede47d38d10 844 /**
phungductung 0:8ede47d38d10 845 * @}
phungductung 0:8ede47d38d10 846 */
phungductung 0:8ede47d38d10 847
phungductung 0:8ede47d38d10 848 /** @defgroup HAL_PPP_Aliased_Defines HAL PPP Aliased Defines maintained for legacy purpose
phungductung 0:8ede47d38d10 849 * @{
phungductung 0:8ede47d38d10 850 */
phungductung 0:8ede47d38d10 851
phungductung 0:8ede47d38d10 852 /**
phungductung 0:8ede47d38d10 853 * @}
phungductung 0:8ede47d38d10 854 */
phungductung 0:8ede47d38d10 855
phungductung 0:8ede47d38d10 856 /* Exported functions --------------------------------------------------------*/
phungductung 0:8ede47d38d10 857
phungductung 0:8ede47d38d10 858 /** @defgroup HAL_CRYP_Aliased_Functions HAL CRYP Aliased Functions maintained for legacy purpose
phungductung 0:8ede47d38d10 859 * @{
phungductung 0:8ede47d38d10 860 */
phungductung 0:8ede47d38d10 861 #define HAL_CRYP_ComputationCpltCallback HAL_CRYPEx_ComputationCpltCallback
phungductung 0:8ede47d38d10 862 /**
phungductung 0:8ede47d38d10 863 * @}
phungductung 0:8ede47d38d10 864 */
phungductung 0:8ede47d38d10 865
phungductung 0:8ede47d38d10 866 /** @defgroup HAL_HASH_Aliased_Functions HAL HASH Aliased Functions maintained for legacy purpose
phungductung 0:8ede47d38d10 867 * @{
phungductung 0:8ede47d38d10 868 */
phungductung 0:8ede47d38d10 869 #define HAL_HASH_STATETypeDef HAL_HASH_StateTypeDef
phungductung 0:8ede47d38d10 870 #define HAL_HASHPhaseTypeDef HAL_HASH_PhaseTypeDef
phungductung 0:8ede47d38d10 871 #define HAL_HMAC_MD5_Finish HAL_HASH_MD5_Finish
phungductung 0:8ede47d38d10 872 #define HAL_HMAC_SHA1_Finish HAL_HASH_SHA1_Finish
phungductung 0:8ede47d38d10 873 #define HAL_HMAC_SHA224_Finish HAL_HASH_SHA224_Finish
phungductung 0:8ede47d38d10 874 #define HAL_HMAC_SHA256_Finish HAL_HASH_SHA256_Finish
phungductung 0:8ede47d38d10 875
phungductung 0:8ede47d38d10 876 /*HASH Algorithm Selection*/
phungductung 0:8ede47d38d10 877
phungductung 0:8ede47d38d10 878 #define HASH_AlgoSelection_SHA1 HASH_ALGOSELECTION_SHA1
phungductung 0:8ede47d38d10 879 #define HASH_AlgoSelection_SHA224 HASH_ALGOSELECTION_SHA224
phungductung 0:8ede47d38d10 880 #define HASH_AlgoSelection_SHA256 HASH_ALGOSELECTION_SHA256
phungductung 0:8ede47d38d10 881 #define HASH_AlgoSelection_MD5 HASH_ALGOSELECTION_MD5
phungductung 0:8ede47d38d10 882
phungductung 0:8ede47d38d10 883 #define HASH_AlgoMode_HASH HASH_ALGOMODE_HASH
phungductung 0:8ede47d38d10 884 #define HASH_AlgoMode_HMAC HASH_ALGOMODE_HMAC
phungductung 0:8ede47d38d10 885
phungductung 0:8ede47d38d10 886 #define HASH_HMACKeyType_ShortKey HASH_HMAC_KEYTYPE_SHORTKEY
phungductung 0:8ede47d38d10 887 #define HASH_HMACKeyType_LongKey HASH_HMAC_KEYTYPE_LONGKEY
phungductung 0:8ede47d38d10 888 /**
phungductung 0:8ede47d38d10 889 * @}
phungductung 0:8ede47d38d10 890 */
phungductung 0:8ede47d38d10 891
phungductung 0:8ede47d38d10 892 /** @defgroup HAL_Aliased_Functions HAL Generic Aliased Functions maintained for legacy purpose
phungductung 0:8ede47d38d10 893 * @{
phungductung 0:8ede47d38d10 894 */
phungductung 0:8ede47d38d10 895 #define HAL_EnableDBGSleepMode HAL_DBGMCU_EnableDBGSleepMode
phungductung 0:8ede47d38d10 896 #define HAL_DisableDBGSleepMode HAL_DBGMCU_DisableDBGSleepMode
phungductung 0:8ede47d38d10 897 #define HAL_EnableDBGStopMode HAL_DBGMCU_EnableDBGStopMode
phungductung 0:8ede47d38d10 898 #define HAL_DisableDBGStopMode HAL_DBGMCU_DisableDBGStopMode
phungductung 0:8ede47d38d10 899 #define HAL_EnableDBGStandbyMode HAL_DBGMCU_EnableDBGStandbyMode
phungductung 0:8ede47d38d10 900 #define HAL_DisableDBGStandbyMode HAL_DBGMCU_DisableDBGStandbyMode
phungductung 0:8ede47d38d10 901 #define HAL_DBG_LowPowerConfig(Periph, cmd) (((cmd)==ENABLE)? HAL_DBGMCU_DBG_EnableLowPowerConfig(Periph) : HAL_DBGMCU_DBG_DisableLowPowerConfig(Periph))
phungductung 0:8ede47d38d10 902 #define HAL_VREFINT_OutputSelect HAL_SYSCFG_VREFINT_OutputSelect
phungductung 0:8ede47d38d10 903 #define HAL_Lock_Cmd(cmd) (((cmd)==ENABLE) ? HAL_SYSCFG_Enable_Lock_VREFINT() : HAL_SYSCFG_Disable_Lock_VREFINT())
phungductung 0:8ede47d38d10 904 #define HAL_VREFINT_Cmd(cmd) (((cmd)==ENABLE)? HAL_SYSCFG_EnableVREFINT() : HAL_SYSCFG_DisableVREFINT())
phungductung 0:8ede47d38d10 905 #define HAL_ADC_EnableBuffer_Cmd(cmd) (((cmd)==ENABLE) ? HAL_ADCEx_EnableVREFINT() : HAL_ADCEx_DisableVREFINT())
phungductung 0:8ede47d38d10 906 #define HAL_ADC_EnableBufferSensor_Cmd(cmd) (((cmd)==ENABLE) ? HAL_ADCEx_EnableVREFINTTempSensor() : HAL_ADCEx_DisableVREFINTTempSensor())
phungductung 0:8ede47d38d10 907 /**
phungductung 0:8ede47d38d10 908 * @}
phungductung 0:8ede47d38d10 909 */
phungductung 0:8ede47d38d10 910
phungductung 0:8ede47d38d10 911 /** @defgroup HAL_FLASH_Aliased_Functions HAL FLASH Aliased Functions maintained for legacy purpose
phungductung 0:8ede47d38d10 912 * @{
phungductung 0:8ede47d38d10 913 */
phungductung 0:8ede47d38d10 914 #define FLASH_HalfPageProgram HAL_FLASHEx_HalfPageProgram
phungductung 0:8ede47d38d10 915 #define FLASH_EnableRunPowerDown HAL_FLASHEx_EnableRunPowerDown
phungductung 0:8ede47d38d10 916 #define FLASH_DisableRunPowerDown HAL_FLASHEx_DisableRunPowerDown
phungductung 0:8ede47d38d10 917 #define HAL_DATA_EEPROMEx_Unlock HAL_FLASHEx_DATAEEPROM_Unlock
phungductung 0:8ede47d38d10 918 #define HAL_DATA_EEPROMEx_Lock HAL_FLASHEx_DATAEEPROM_Lock
phungductung 0:8ede47d38d10 919 #define HAL_DATA_EEPROMEx_Erase HAL_FLASHEx_DATAEEPROM_Erase
phungductung 0:8ede47d38d10 920 #define HAL_DATA_EEPROMEx_Program HAL_FLASHEx_DATAEEPROM_Program
phungductung 0:8ede47d38d10 921
phungductung 0:8ede47d38d10 922 /**
phungductung 0:8ede47d38d10 923 * @}
phungductung 0:8ede47d38d10 924 */
phungductung 0:8ede47d38d10 925
phungductung 0:8ede47d38d10 926 /** @defgroup HAL_I2C_Aliased_Functions HAL I2C Aliased Functions maintained for legacy purpose
phungductung 0:8ede47d38d10 927 * @{
phungductung 0:8ede47d38d10 928 */
phungductung 0:8ede47d38d10 929 #define HAL_I2CEx_AnalogFilter_Config HAL_I2CEx_ConfigAnalogFilter
phungductung 0:8ede47d38d10 930 #define HAL_I2CEx_DigitalFilter_Config HAL_I2CEx_ConfigDigitalFilter
phungductung 0:8ede47d38d10 931
phungductung 0:8ede47d38d10 932 #define HAL_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus, cmd) (((cmd)==ENABLE)? HAL_I2CEx_EnableFastModePlus(SYSCFG_I2CFastModePlus): HAL_I2CEx_DisableFastModePlus(SYSCFG_I2CFastModePlus))
phungductung 0:8ede47d38d10 933 /**
phungductung 0:8ede47d38d10 934 * @}
phungductung 0:8ede47d38d10 935 */
phungductung 0:8ede47d38d10 936
phungductung 0:8ede47d38d10 937 /** @defgroup HAL_PWR_Aliased HAL PWR Aliased maintained for legacy purpose
phungductung 0:8ede47d38d10 938 * @{
phungductung 0:8ede47d38d10 939 */
phungductung 0:8ede47d38d10 940 #define HAL_PWR_PVDConfig HAL_PWR_ConfigPVD
phungductung 0:8ede47d38d10 941 #define HAL_PWR_DisableBkUpReg HAL_PWREx_DisableBkUpReg
phungductung 0:8ede47d38d10 942 #define HAL_PWR_DisableFlashPowerDown HAL_PWREx_DisableFlashPowerDown
phungductung 0:8ede47d38d10 943 #define HAL_PWR_DisableVddio2Monitor HAL_PWREx_DisableVddio2Monitor
phungductung 0:8ede47d38d10 944 #define HAL_PWR_EnableBkUpReg HAL_PWREx_EnableBkUpReg
phungductung 0:8ede47d38d10 945 #define HAL_PWR_EnableFlashPowerDown HAL_PWREx_EnableFlashPowerDown
phungductung 0:8ede47d38d10 946 #define HAL_PWR_EnableVddio2Monitor HAL_PWREx_EnableVddio2Monitor
phungductung 0:8ede47d38d10 947 #define HAL_PWR_PVD_PVM_IRQHandler HAL_PWREx_PVD_PVM_IRQHandler
phungductung 0:8ede47d38d10 948 #define HAL_PWR_PVDLevelConfig HAL_PWR_ConfigPVD
phungductung 0:8ede47d38d10 949 #define HAL_PWR_Vddio2Monitor_IRQHandler HAL_PWREx_Vddio2Monitor_IRQHandler
phungductung 0:8ede47d38d10 950 #define HAL_PWR_Vddio2MonitorCallback HAL_PWREx_Vddio2MonitorCallback
phungductung 0:8ede47d38d10 951 #define HAL_PWREx_ActivateOverDrive HAL_PWREx_EnableOverDrive
phungductung 0:8ede47d38d10 952 #define HAL_PWREx_DeactivateOverDrive HAL_PWREx_DisableOverDrive
phungductung 0:8ede47d38d10 953 #define HAL_PWREx_DisableSDADCAnalog HAL_PWREx_DisableSDADC
phungductung 0:8ede47d38d10 954 #define HAL_PWREx_EnableSDADCAnalog HAL_PWREx_EnableSDADC
phungductung 0:8ede47d38d10 955 #define HAL_PWREx_PVMConfig HAL_PWREx_ConfigPVM
phungductung 0:8ede47d38d10 956
phungductung 0:8ede47d38d10 957 #define PWR_MODE_NORMAL PWR_PVD_MODE_NORMAL
phungductung 0:8ede47d38d10 958 #define PWR_MODE_IT_RISING PWR_PVD_MODE_IT_RISING
phungductung 0:8ede47d38d10 959 #define PWR_MODE_IT_FALLING PWR_PVD_MODE_IT_FALLING
phungductung 0:8ede47d38d10 960 #define PWR_MODE_IT_RISING_FALLING PWR_PVD_MODE_IT_RISING_FALLING
phungductung 0:8ede47d38d10 961 #define PWR_MODE_EVENT_RISING PWR_PVD_MODE_EVENT_RISING
phungductung 0:8ede47d38d10 962 #define PWR_MODE_EVENT_FALLING PWR_PVD_MODE_EVENT_FALLING
phungductung 0:8ede47d38d10 963 #define PWR_MODE_EVENT_RISING_FALLING PWR_PVD_MODE_EVENT_RISING_FALLING
phungductung 0:8ede47d38d10 964
phungductung 0:8ede47d38d10 965 #define CR_OFFSET_BB PWR_CR_OFFSET_BB
phungductung 0:8ede47d38d10 966 #define CSR_OFFSET_BB PWR_CSR_OFFSET_BB
phungductung 0:8ede47d38d10 967
phungductung 0:8ede47d38d10 968 #define DBP_BitNumber DBP_BIT_NUMBER
phungductung 0:8ede47d38d10 969 #define PVDE_BitNumber PVDE_BIT_NUMBER
phungductung 0:8ede47d38d10 970 #define PMODE_BitNumber PMODE_BIT_NUMBER
phungductung 0:8ede47d38d10 971 #define EWUP_BitNumber EWUP_BIT_NUMBER
phungductung 0:8ede47d38d10 972 #define FPDS_BitNumber FPDS_BIT_NUMBER
phungductung 0:8ede47d38d10 973 #define ODEN_BitNumber ODEN_BIT_NUMBER
phungductung 0:8ede47d38d10 974 #define ODSWEN_BitNumber ODSWEN_BIT_NUMBER
phungductung 0:8ede47d38d10 975 #define MRLVDS_BitNumber MRLVDS_BIT_NUMBER
phungductung 0:8ede47d38d10 976 #define LPLVDS_BitNumber LPLVDS_BIT_NUMBER
phungductung 0:8ede47d38d10 977 #define BRE_BitNumber BRE_BIT_NUMBER
phungductung 0:8ede47d38d10 978
phungductung 0:8ede47d38d10 979 #define PWR_MODE_EVT PWR_PVD_MODE_NORMAL
phungductung 0:8ede47d38d10 980
phungductung 0:8ede47d38d10 981 /**
phungductung 0:8ede47d38d10 982 * @}
phungductung 0:8ede47d38d10 983 */
phungductung 0:8ede47d38d10 984
phungductung 0:8ede47d38d10 985 /** @defgroup HAL_SMBUS_Aliased_Functions HAL SMBUS Aliased Functions maintained for legacy purpose
phungductung 0:8ede47d38d10 986 * @{
phungductung 0:8ede47d38d10 987 */
phungductung 0:8ede47d38d10 988 #define HAL_SMBUS_Slave_Listen_IT HAL_SMBUS_EnableListen_IT
phungductung 0:8ede47d38d10 989 #define HAL_SMBUS_SlaveAddrCallback HAL_SMBUS_AddrCallback
phungductung 0:8ede47d38d10 990 #define HAL_SMBUS_SlaveListenCpltCallback HAL_SMBUS_ListenCpltCallback
phungductung 0:8ede47d38d10 991 /**
phungductung 0:8ede47d38d10 992 * @}
phungductung 0:8ede47d38d10 993 */
phungductung 0:8ede47d38d10 994
phungductung 0:8ede47d38d10 995 /** @defgroup HAL_SPI_Aliased_Functions HAL SPI Aliased Functions maintained for legacy purpose
phungductung 0:8ede47d38d10 996 * @{
phungductung 0:8ede47d38d10 997 */
phungductung 0:8ede47d38d10 998 #define HAL_SPI_FlushRxFifo HAL_SPIEx_FlushRxFifo
phungductung 0:8ede47d38d10 999 /**
phungductung 0:8ede47d38d10 1000 * @}
phungductung 0:8ede47d38d10 1001 */
phungductung 0:8ede47d38d10 1002
phungductung 0:8ede47d38d10 1003 /** @defgroup HAL_TIM_Aliased_Functions HAL TIM Aliased Functions maintained for legacy purpose
phungductung 0:8ede47d38d10 1004 * @{
phungductung 0:8ede47d38d10 1005 */
phungductung 0:8ede47d38d10 1006 #define HAL_TIM_DMADelayPulseCplt TIM_DMADelayPulseCplt
phungductung 0:8ede47d38d10 1007 #define HAL_TIM_DMAError TIM_DMAError
phungductung 0:8ede47d38d10 1008 #define HAL_TIM_DMACaptureCplt TIM_DMACaptureCplt
phungductung 0:8ede47d38d10 1009 #define HAL_TIMEx_DMACommutationCplt TIMEx_DMACommutationCplt
phungductung 0:8ede47d38d10 1010 /**
phungductung 0:8ede47d38d10 1011 * @}
phungductung 0:8ede47d38d10 1012 */
phungductung 0:8ede47d38d10 1013
phungductung 0:8ede47d38d10 1014 /** @defgroup HAL_UART_Aliased_Functions HAL UART Aliased Functions maintained for legacy purpose
phungductung 0:8ede47d38d10 1015 * @{
phungductung 0:8ede47d38d10 1016 */
phungductung 0:8ede47d38d10 1017 #define HAL_UART_WakeupCallback HAL_UARTEx_WakeupCallback
phungductung 0:8ede47d38d10 1018 /**
phungductung 0:8ede47d38d10 1019 * @}
phungductung 0:8ede47d38d10 1020 */
phungductung 0:8ede47d38d10 1021
phungductung 0:8ede47d38d10 1022 /** @defgroup HAL_LTDC_Aliased_Functions HAL LTDC Aliased Functions maintained for legacy purpose
phungductung 0:8ede47d38d10 1023 * @{
phungductung 0:8ede47d38d10 1024 */
phungductung 0:8ede47d38d10 1025 #define HAL_LTDC_LineEvenCallback HAL_LTDC_LineEventCallback
phungductung 0:8ede47d38d10 1026 /**
phungductung 0:8ede47d38d10 1027 * @}
phungductung 0:8ede47d38d10 1028 */
phungductung 0:8ede47d38d10 1029
phungductung 0:8ede47d38d10 1030
phungductung 0:8ede47d38d10 1031 /** @defgroup HAL_PPP_Aliased_Functions HAL PPP Aliased Functions maintained for legacy purpose
phungductung 0:8ede47d38d10 1032 * @{
phungductung 0:8ede47d38d10 1033 */
phungductung 0:8ede47d38d10 1034
phungductung 0:8ede47d38d10 1035 /**
phungductung 0:8ede47d38d10 1036 * @}
phungductung 0:8ede47d38d10 1037 */
phungductung 0:8ede47d38d10 1038
phungductung 0:8ede47d38d10 1039 /* Exported macros ------------------------------------------------------------*/
phungductung 0:8ede47d38d10 1040
phungductung 0:8ede47d38d10 1041 /** @defgroup HAL_AES_Aliased_Macros HAL CRYP Aliased Macros maintained for legacy purpose
phungductung 0:8ede47d38d10 1042 * @{
phungductung 0:8ede47d38d10 1043 */
phungductung 0:8ede47d38d10 1044 #define AES_IT_CC CRYP_IT_CC
phungductung 0:8ede47d38d10 1045 #define AES_IT_ERR CRYP_IT_ERR
phungductung 0:8ede47d38d10 1046 #define AES_FLAG_CCF CRYP_FLAG_CCF
phungductung 0:8ede47d38d10 1047 /**
phungductung 0:8ede47d38d10 1048 * @}
phungductung 0:8ede47d38d10 1049 */
phungductung 0:8ede47d38d10 1050
phungductung 0:8ede47d38d10 1051 /** @defgroup HAL_Aliased_Macros HAL Generic Aliased Macros maintained for legacy purpose
phungductung 0:8ede47d38d10 1052 * @{
phungductung 0:8ede47d38d10 1053 */
phungductung 0:8ede47d38d10 1054 #define __HAL_GET_BOOT_MODE __HAL_SYSCFG_GET_BOOT_MODE
phungductung 0:8ede47d38d10 1055 #define __HAL_REMAPMEMORY_FLASH __HAL_SYSCFG_REMAPMEMORY_FLASH
phungductung 0:8ede47d38d10 1056 #define __HAL_REMAPMEMORY_SYSTEMFLASH __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH
phungductung 0:8ede47d38d10 1057 #define __HAL_REMAPMEMORY_SRAM __HAL_SYSCFG_REMAPMEMORY_SRAM
phungductung 0:8ede47d38d10 1058 #define __HAL_REMAPMEMORY_FMC __HAL_SYSCFG_REMAPMEMORY_FMC
phungductung 0:8ede47d38d10 1059 #define __HAL_REMAPMEMORY_FMC_SDRAM __HAL_SYSCFG_REMAPMEMORY_FMC_SDRAM
phungductung 0:8ede47d38d10 1060 #define __HAL_REMAPMEMORY_FSMC __HAL_SYSCFG_REMAPMEMORY_FSMC
phungductung 0:8ede47d38d10 1061 #define __HAL_REMAPMEMORY_QUADSPI __HAL_SYSCFG_REMAPMEMORY_QUADSPI
phungductung 0:8ede47d38d10 1062 #define __HAL_FMC_BANK __HAL_SYSCFG_FMC_BANK
phungductung 0:8ede47d38d10 1063 #define __HAL_GET_FLAG __HAL_SYSCFG_GET_FLAG
phungductung 0:8ede47d38d10 1064 #define __HAL_CLEAR_FLAG __HAL_SYSCFG_CLEAR_FLAG
phungductung 0:8ede47d38d10 1065 #define __HAL_VREFINT_OUT_ENABLE __HAL_SYSCFG_VREFINT_OUT_ENABLE
phungductung 0:8ede47d38d10 1066 #define __HAL_VREFINT_OUT_DISABLE __HAL_SYSCFG_VREFINT_OUT_DISABLE
phungductung 0:8ede47d38d10 1067
phungductung 0:8ede47d38d10 1068 #define SYSCFG_FLAG_VREF_READY SYSCFG_FLAG_VREFINT_READY
phungductung 0:8ede47d38d10 1069 #define SYSCFG_FLAG_RC48 RCC_FLAG_HSI48
phungductung 0:8ede47d38d10 1070 #define IS_SYSCFG_FASTMODEPLUS_CONFIG IS_I2C_FASTMODEPLUS
phungductung 0:8ede47d38d10 1071 #define UFB_MODE_BitNumber UFB_MODE_BIT_NUMBER
phungductung 0:8ede47d38d10 1072 #define CMP_PD_BitNumber CMP_PD_BIT_NUMBER
phungductung 0:8ede47d38d10 1073
phungductung 0:8ede47d38d10 1074 /**
phungductung 0:8ede47d38d10 1075 * @}
phungductung 0:8ede47d38d10 1076 */
phungductung 0:8ede47d38d10 1077
phungductung 0:8ede47d38d10 1078
phungductung 0:8ede47d38d10 1079 /** @defgroup HAL_ADC_Aliased_Macros HAL ADC Aliased Macros maintained for legacy purpose
phungductung 0:8ede47d38d10 1080 * @{
phungductung 0:8ede47d38d10 1081 */
phungductung 0:8ede47d38d10 1082 #define __ADC_ENABLE __HAL_ADC_ENABLE
phungductung 0:8ede47d38d10 1083 #define __ADC_DISABLE __HAL_ADC_DISABLE
phungductung 0:8ede47d38d10 1084 #define __HAL_ADC_ENABLING_CONDITIONS ADC_ENABLING_CONDITIONS
phungductung 0:8ede47d38d10 1085 #define __HAL_ADC_DISABLING_CONDITIONS ADC_DISABLING_CONDITIONS
phungductung 0:8ede47d38d10 1086 #define __HAL_ADC_IS_ENABLED ADC_IS_ENABLE
phungductung 0:8ede47d38d10 1087 #define __ADC_IS_ENABLED ADC_IS_ENABLE
phungductung 0:8ede47d38d10 1088 #define __HAL_ADC_IS_SOFTWARE_START_REGULAR ADC_IS_SOFTWARE_START_REGULAR
phungductung 0:8ede47d38d10 1089 #define __HAL_ADC_IS_SOFTWARE_START_INJECTED ADC_IS_SOFTWARE_START_INJECTED
phungductung 0:8ede47d38d10 1090 #define __HAL_ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED
phungductung 0:8ede47d38d10 1091 #define __HAL_ADC_IS_CONVERSION_ONGOING_REGULAR ADC_IS_CONVERSION_ONGOING_REGULAR
phungductung 0:8ede47d38d10 1092 #define __HAL_ADC_IS_CONVERSION_ONGOING_INJECTED ADC_IS_CONVERSION_ONGOING_INJECTED
phungductung 0:8ede47d38d10 1093 #define __HAL_ADC_IS_CONVERSION_ONGOING ADC_IS_CONVERSION_ONGOING
phungductung 0:8ede47d38d10 1094 #define __HAL_ADC_CLEAR_ERRORCODE ADC_CLEAR_ERRORCODE
phungductung 0:8ede47d38d10 1095
phungductung 0:8ede47d38d10 1096 #define __HAL_ADC_GET_RESOLUTION ADC_GET_RESOLUTION
phungductung 0:8ede47d38d10 1097 #define __HAL_ADC_JSQR_RK ADC_JSQR_RK
phungductung 0:8ede47d38d10 1098 #define __HAL_ADC_CFGR_AWD1CH ADC_CFGR_AWD1CH_SHIFT
phungductung 0:8ede47d38d10 1099 #define __HAL_ADC_CFGR_AWD23CR ADC_CFGR_AWD23CR
phungductung 0:8ede47d38d10 1100 #define __HAL_ADC_CFGR_INJECT_AUTO_CONVERSION ADC_CFGR_INJECT_AUTO_CONVERSION
phungductung 0:8ede47d38d10 1101 #define __HAL_ADC_CFGR_INJECT_CONTEXT_QUEUE ADC_CFGR_INJECT_CONTEXT_QUEUE
phungductung 0:8ede47d38d10 1102 #define __HAL_ADC_CFGR_INJECT_DISCCONTINUOUS ADC_CFGR_INJECT_DISCCONTINUOUS
phungductung 0:8ede47d38d10 1103 #define __HAL_ADC_CFGR_REG_DISCCONTINUOUS ADC_CFGR_REG_DISCCONTINUOUS
phungductung 0:8ede47d38d10 1104 #define __HAL_ADC_CFGR_DISCONTINUOUS_NUM ADC_CFGR_DISCONTINUOUS_NUM
phungductung 0:8ede47d38d10 1105 #define __HAL_ADC_CFGR_AUTOWAIT ADC_CFGR_AUTOWAIT
phungductung 0:8ede47d38d10 1106 #define __HAL_ADC_CFGR_CONTINUOUS ADC_CFGR_CONTINUOUS
phungductung 0:8ede47d38d10 1107 #define __HAL_ADC_CFGR_OVERRUN ADC_CFGR_OVERRUN
phungductung 0:8ede47d38d10 1108 #define __HAL_ADC_CFGR_DMACONTREQ ADC_CFGR_DMACONTREQ
phungductung 0:8ede47d38d10 1109 #define __HAL_ADC_CFGR_EXTSEL ADC_CFGR_EXTSEL_SET
phungductung 0:8ede47d38d10 1110 #define __HAL_ADC_JSQR_JEXTSEL ADC_JSQR_JEXTSEL_SET
phungductung 0:8ede47d38d10 1111 #define __HAL_ADC_OFR_CHANNEL ADC_OFR_CHANNEL
phungductung 0:8ede47d38d10 1112 #define __HAL_ADC_DIFSEL_CHANNEL ADC_DIFSEL_CHANNEL
phungductung 0:8ede47d38d10 1113 #define __HAL_ADC_CALFACT_DIFF_SET ADC_CALFACT_DIFF_SET
phungductung 0:8ede47d38d10 1114 #define __HAL_ADC_CALFACT_DIFF_GET ADC_CALFACT_DIFF_GET
phungductung 0:8ede47d38d10 1115 #define __HAL_ADC_TRX_HIGHTHRESHOLD ADC_TRX_HIGHTHRESHOLD
phungductung 0:8ede47d38d10 1116
phungductung 0:8ede47d38d10 1117 #define __HAL_ADC_OFFSET_SHIFT_RESOLUTION ADC_OFFSET_SHIFT_RESOLUTION
phungductung 0:8ede47d38d10 1118 #define __HAL_ADC_AWD1THRESHOLD_SHIFT_RESOLUTION ADC_AWD1THRESHOLD_SHIFT_RESOLUTION
phungductung 0:8ede47d38d10 1119 #define __HAL_ADC_AWD23THRESHOLD_SHIFT_RESOLUTION ADC_AWD23THRESHOLD_SHIFT_RESOLUTION
phungductung 0:8ede47d38d10 1120 #define __HAL_ADC_COMMON_REGISTER ADC_COMMON_REGISTER
phungductung 0:8ede47d38d10 1121 #define __HAL_ADC_COMMON_CCR_MULTI ADC_COMMON_CCR_MULTI
phungductung 0:8ede47d38d10 1122 #define __HAL_ADC_MULTIMODE_IS_ENABLED ADC_MULTIMODE_IS_ENABLE
phungductung 0:8ede47d38d10 1123 #define __ADC_MULTIMODE_IS_ENABLED ADC_MULTIMODE_IS_ENABLE
phungductung 0:8ede47d38d10 1124 #define __HAL_ADC_NONMULTIMODE_OR_MULTIMODEMASTER ADC_NONMULTIMODE_OR_MULTIMODEMASTER
phungductung 0:8ede47d38d10 1125 #define __HAL_ADC_COMMON_ADC_OTHER ADC_COMMON_ADC_OTHER
phungductung 0:8ede47d38d10 1126 #define __HAL_ADC_MULTI_SLAVE ADC_MULTI_SLAVE
phungductung 0:8ede47d38d10 1127
phungductung 0:8ede47d38d10 1128 #define __HAL_ADC_SQR1_L ADC_SQR1_L_SHIFT
phungductung 0:8ede47d38d10 1129 #define __HAL_ADC_JSQR_JL ADC_JSQR_JL_SHIFT
phungductung 0:8ede47d38d10 1130 #define __HAL_ADC_JSQR_RK_JL ADC_JSQR_RK_JL
phungductung 0:8ede47d38d10 1131 #define __HAL_ADC_CR1_DISCONTINUOUS_NUM ADC_CR1_DISCONTINUOUS_NUM
phungductung 0:8ede47d38d10 1132 #define __HAL_ADC_CR1_SCAN ADC_CR1_SCAN_SET
phungductung 0:8ede47d38d10 1133 #define __HAL_ADC_CONVCYCLES_MAX_RANGE ADC_CONVCYCLES_MAX_RANGE
phungductung 0:8ede47d38d10 1134 #define __HAL_ADC_CLOCK_PRESCALER_RANGE ADC_CLOCK_PRESCALER_RANGE
phungductung 0:8ede47d38d10 1135 #define __HAL_ADC_GET_CLOCK_PRESCALER ADC_GET_CLOCK_PRESCALER
phungductung 0:8ede47d38d10 1136
phungductung 0:8ede47d38d10 1137 #define __HAL_ADC_SQR1 ADC_SQR1
phungductung 0:8ede47d38d10 1138 #define __HAL_ADC_SMPR1 ADC_SMPR1
phungductung 0:8ede47d38d10 1139 #define __HAL_ADC_SMPR2 ADC_SMPR2
phungductung 0:8ede47d38d10 1140 #define __HAL_ADC_SQR3_RK ADC_SQR3_RK
phungductung 0:8ede47d38d10 1141 #define __HAL_ADC_SQR2_RK ADC_SQR2_RK
phungductung 0:8ede47d38d10 1142 #define __HAL_ADC_SQR1_RK ADC_SQR1_RK
phungductung 0:8ede47d38d10 1143 #define __HAL_ADC_CR2_CONTINUOUS ADC_CR2_CONTINUOUS
phungductung 0:8ede47d38d10 1144 #define __HAL_ADC_CR1_DISCONTINUOUS ADC_CR1_DISCONTINUOUS
phungductung 0:8ede47d38d10 1145 #define __HAL_ADC_CR1_SCANCONV ADC_CR1_SCANCONV
phungductung 0:8ede47d38d10 1146 #define __HAL_ADC_CR2_EOCSelection ADC_CR2_EOCSelection
phungductung 0:8ede47d38d10 1147 #define __HAL_ADC_CR2_DMAContReq ADC_CR2_DMAContReq
phungductung 0:8ede47d38d10 1148 #define __HAL_ADC_GET_RESOLUTION ADC_GET_RESOLUTION
phungductung 0:8ede47d38d10 1149 #define __HAL_ADC_JSQR ADC_JSQR
phungductung 0:8ede47d38d10 1150
phungductung 0:8ede47d38d10 1151 #define __HAL_ADC_CHSELR_CHANNEL ADC_CHSELR_CHANNEL
phungductung 0:8ede47d38d10 1152 #define __HAL_ADC_CFGR1_REG_DISCCONTINUOUS ADC_CFGR1_REG_DISCCONTINUOUS
phungductung 0:8ede47d38d10 1153 #define __HAL_ADC_CFGR1_AUTOOFF ADC_CFGR1_AUTOOFF
phungductung 0:8ede47d38d10 1154 #define __HAL_ADC_CFGR1_AUTOWAIT ADC_CFGR1_AUTOWAIT
phungductung 0:8ede47d38d10 1155 #define __HAL_ADC_CFGR1_CONTINUOUS ADC_CFGR1_CONTINUOUS
phungductung 0:8ede47d38d10 1156 #define __HAL_ADC_CFGR1_OVERRUN ADC_CFGR1_OVERRUN
phungductung 0:8ede47d38d10 1157 #define __HAL_ADC_CFGR1_SCANDIR ADC_CFGR1_SCANDIR
phungductung 0:8ede47d38d10 1158 #define __HAL_ADC_CFGR1_DMACONTREQ ADC_CFGR1_DMACONTREQ
phungductung 0:8ede47d38d10 1159
phungductung 0:8ede47d38d10 1160 /**
phungductung 0:8ede47d38d10 1161 * @}
phungductung 0:8ede47d38d10 1162 */
phungductung 0:8ede47d38d10 1163
phungductung 0:8ede47d38d10 1164 /** @defgroup HAL_DAC_Aliased_Macros HAL DAC Aliased Macros maintained for legacy purpose
phungductung 0:8ede47d38d10 1165 * @{
phungductung 0:8ede47d38d10 1166 */
phungductung 0:8ede47d38d10 1167 #define __HAL_DHR12R1_ALIGNEMENT DAC_DHR12R1_ALIGNMENT
phungductung 0:8ede47d38d10 1168 #define __HAL_DHR12R2_ALIGNEMENT DAC_DHR12R2_ALIGNMENT
phungductung 0:8ede47d38d10 1169 #define __HAL_DHR12RD_ALIGNEMENT DAC_DHR12RD_ALIGNMENT
phungductung 0:8ede47d38d10 1170 #define IS_DAC_GENERATE_WAVE IS_DAC_WAVE
phungductung 0:8ede47d38d10 1171
phungductung 0:8ede47d38d10 1172 /**
phungductung 0:8ede47d38d10 1173 * @}
phungductung 0:8ede47d38d10 1174 */
phungductung 0:8ede47d38d10 1175
phungductung 0:8ede47d38d10 1176 /** @defgroup HAL_DBGMCU_Aliased_Macros HAL DBGMCU Aliased Macros maintained for legacy purpose
phungductung 0:8ede47d38d10 1177 * @{
phungductung 0:8ede47d38d10 1178 */
phungductung 0:8ede47d38d10 1179 #define __HAL_FREEZE_TIM1_DBGMCU __HAL_DBGMCU_FREEZE_TIM1
phungductung 0:8ede47d38d10 1180 #define __HAL_UNFREEZE_TIM1_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM1
phungductung 0:8ede47d38d10 1181 #define __HAL_FREEZE_TIM2_DBGMCU __HAL_DBGMCU_FREEZE_TIM2
phungductung 0:8ede47d38d10 1182 #define __HAL_UNFREEZE_TIM2_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM2
phungductung 0:8ede47d38d10 1183 #define __HAL_FREEZE_TIM3_DBGMCU __HAL_DBGMCU_FREEZE_TIM3
phungductung 0:8ede47d38d10 1184 #define __HAL_UNFREEZE_TIM3_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM3
phungductung 0:8ede47d38d10 1185 #define __HAL_FREEZE_TIM4_DBGMCU __HAL_DBGMCU_FREEZE_TIM4
phungductung 0:8ede47d38d10 1186 #define __HAL_UNFREEZE_TIM4_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM4
phungductung 0:8ede47d38d10 1187 #define __HAL_FREEZE_TIM5_DBGMCU __HAL_DBGMCU_FREEZE_TIM5
phungductung 0:8ede47d38d10 1188 #define __HAL_UNFREEZE_TIM5_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM5
phungductung 0:8ede47d38d10 1189 #define __HAL_FREEZE_TIM6_DBGMCU __HAL_DBGMCU_FREEZE_TIM6
phungductung 0:8ede47d38d10 1190 #define __HAL_UNFREEZE_TIM6_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM6
phungductung 0:8ede47d38d10 1191 #define __HAL_FREEZE_TIM7_DBGMCU __HAL_DBGMCU_FREEZE_TIM7
phungductung 0:8ede47d38d10 1192 #define __HAL_UNFREEZE_TIM7_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM7
phungductung 0:8ede47d38d10 1193 #define __HAL_FREEZE_TIM8_DBGMCU __HAL_DBGMCU_FREEZE_TIM8
phungductung 0:8ede47d38d10 1194 #define __HAL_UNFREEZE_TIM8_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM8
phungductung 0:8ede47d38d10 1195
phungductung 0:8ede47d38d10 1196 #define __HAL_FREEZE_TIM9_DBGMCU __HAL_DBGMCU_FREEZE_TIM9
phungductung 0:8ede47d38d10 1197 #define __HAL_UNFREEZE_TIM9_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM9
phungductung 0:8ede47d38d10 1198 #define __HAL_FREEZE_TIM10_DBGMCU __HAL_DBGMCU_FREEZE_TIM10
phungductung 0:8ede47d38d10 1199 #define __HAL_UNFREEZE_TIM10_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM10
phungductung 0:8ede47d38d10 1200 #define __HAL_FREEZE_TIM11_DBGMCU __HAL_DBGMCU_FREEZE_TIM11
phungductung 0:8ede47d38d10 1201 #define __HAL_UNFREEZE_TIM11_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM11
phungductung 0:8ede47d38d10 1202 #define __HAL_FREEZE_TIM12_DBGMCU __HAL_DBGMCU_FREEZE_TIM12
phungductung 0:8ede47d38d10 1203 #define __HAL_UNFREEZE_TIM12_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM12
phungductung 0:8ede47d38d10 1204 #define __HAL_FREEZE_TIM13_DBGMCU __HAL_DBGMCU_FREEZE_TIM13
phungductung 0:8ede47d38d10 1205 #define __HAL_UNFREEZE_TIM13_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM13
phungductung 0:8ede47d38d10 1206 #define __HAL_FREEZE_TIM14_DBGMCU __HAL_DBGMCU_FREEZE_TIM14
phungductung 0:8ede47d38d10 1207 #define __HAL_UNFREEZE_TIM14_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM14
phungductung 0:8ede47d38d10 1208 #define __HAL_FREEZE_CAN2_DBGMCU __HAL_DBGMCU_FREEZE_CAN2
phungductung 0:8ede47d38d10 1209 #define __HAL_UNFREEZE_CAN2_DBGMCU __HAL_DBGMCU_UNFREEZE_CAN2
phungductung 0:8ede47d38d10 1210
phungductung 0:8ede47d38d10 1211
phungductung 0:8ede47d38d10 1212 #define __HAL_FREEZE_TIM15_DBGMCU __HAL_DBGMCU_FREEZE_TIM15
phungductung 0:8ede47d38d10 1213 #define __HAL_UNFREEZE_TIM15_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM15
phungductung 0:8ede47d38d10 1214 #define __HAL_FREEZE_TIM16_DBGMCU __HAL_DBGMCU_FREEZE_TIM16
phungductung 0:8ede47d38d10 1215 #define __HAL_UNFREEZE_TIM16_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM16
phungductung 0:8ede47d38d10 1216 #define __HAL_FREEZE_TIM17_DBGMCU __HAL_DBGMCU_FREEZE_TIM17
phungductung 0:8ede47d38d10 1217 #define __HAL_UNFREEZE_TIM17_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM17
phungductung 0:8ede47d38d10 1218 #define __HAL_FREEZE_RTC_DBGMCU __HAL_DBGMCU_FREEZE_RTC
phungductung 0:8ede47d38d10 1219 #define __HAL_UNFREEZE_RTC_DBGMCU __HAL_DBGMCU_UNFREEZE_RTC
phungductung 0:8ede47d38d10 1220 #define __HAL_FREEZE_WWDG_DBGMCU __HAL_DBGMCU_FREEZE_WWDG
phungductung 0:8ede47d38d10 1221 #define __HAL_UNFREEZE_WWDG_DBGMCU __HAL_DBGMCU_UNFREEZE_WWDG
phungductung 0:8ede47d38d10 1222 #define __HAL_FREEZE_IWDG_DBGMCU __HAL_DBGMCU_FREEZE_IWDG
phungductung 0:8ede47d38d10 1223 #define __HAL_UNFREEZE_IWDG_DBGMCU __HAL_DBGMCU_UNFREEZE_IWDG
phungductung 0:8ede47d38d10 1224 #define __HAL_FREEZE_I2C1_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT
phungductung 0:8ede47d38d10 1225 #define __HAL_UNFREEZE_I2C1_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT
phungductung 0:8ede47d38d10 1226 #define __HAL_FREEZE_I2C2_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT
phungductung 0:8ede47d38d10 1227 #define __HAL_UNFREEZE_I2C2_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT
phungductung 0:8ede47d38d10 1228 #define __HAL_FREEZE_I2C3_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT
phungductung 0:8ede47d38d10 1229 #define __HAL_UNFREEZE_I2C3_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT
phungductung 0:8ede47d38d10 1230 #define __HAL_FREEZE_CAN1_DBGMCU __HAL_DBGMCU_FREEZE_CAN1
phungductung 0:8ede47d38d10 1231 #define __HAL_UNFREEZE_CAN1_DBGMCU __HAL_DBGMCU_UNFREEZE_CAN1
phungductung 0:8ede47d38d10 1232 #define __HAL_FREEZE_LPTIM1_DBGMCU __HAL_DBGMCU_FREEZE_LPTIM1
phungductung 0:8ede47d38d10 1233 #define __HAL_UNFREEZE_LPTIM1_DBGMCU __HAL_DBGMCU_UNFREEZE_LPTIM1
phungductung 0:8ede47d38d10 1234 #define __HAL_FREEZE_LPTIM2_DBGMCU __HAL_DBGMCU_FREEZE_LPTIM2
phungductung 0:8ede47d38d10 1235 #define __HAL_UNFREEZE_LPTIM2_DBGMCU __HAL_DBGMCU_UNFREEZE_LPTIM2
phungductung 0:8ede47d38d10 1236
phungductung 0:8ede47d38d10 1237 /**
phungductung 0:8ede47d38d10 1238 * @}
phungductung 0:8ede47d38d10 1239 */
phungductung 0:8ede47d38d10 1240
phungductung 0:8ede47d38d10 1241 /** @defgroup HAL_COMP_Aliased_Macros HAL COMP Aliased Macros maintained for legacy purpose
phungductung 0:8ede47d38d10 1242 * @{
phungductung 0:8ede47d38d10 1243 */
phungductung 0:8ede47d38d10 1244 #if defined(STM32F3)
phungductung 0:8ede47d38d10 1245 #define COMP_START __HAL_COMP_ENABLE
phungductung 0:8ede47d38d10 1246 #define COMP_STOP __HAL_COMP_DISABLE
phungductung 0:8ede47d38d10 1247 #define COMP_LOCK __HAL_COMP_LOCK
phungductung 0:8ede47d38d10 1248
phungductung 0:8ede47d38d10 1249 #if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) || defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx)
phungductung 0:8ede47d38d10 1250 #define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \
phungductung 0:8ede47d38d10 1251 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : \
phungductung 0:8ede47d38d10 1252 __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE())
phungductung 0:8ede47d38d10 1253 #define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() : \
phungductung 0:8ede47d38d10 1254 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() : \
phungductung 0:8ede47d38d10 1255 __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE())
phungductung 0:8ede47d38d10 1256 #define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() : \
phungductung 0:8ede47d38d10 1257 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() : \
phungductung 0:8ede47d38d10 1258 __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE())
phungductung 0:8ede47d38d10 1259 #define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() : \
phungductung 0:8ede47d38d10 1260 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() : \
phungductung 0:8ede47d38d10 1261 __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE())
phungductung 0:8ede47d38d10 1262 #define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_IT() : \
phungductung 0:8ede47d38d10 1263 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_IT() : \
phungductung 0:8ede47d38d10 1264 __HAL_COMP_COMP6_EXTI_ENABLE_IT())
phungductung 0:8ede47d38d10 1265 #define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_IT() : \
phungductung 0:8ede47d38d10 1266 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_IT() : \
phungductung 0:8ede47d38d10 1267 __HAL_COMP_COMP6_EXTI_DISABLE_IT())
phungductung 0:8ede47d38d10 1268 #define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_GET_FLAG() : \
phungductung 0:8ede47d38d10 1269 ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_GET_FLAG() : \
phungductung 0:8ede47d38d10 1270 __HAL_COMP_COMP6_EXTI_GET_FLAG())
phungductung 0:8ede47d38d10 1271 #define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : \
phungductung 0:8ede47d38d10 1272 ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : \
phungductung 0:8ede47d38d10 1273 __HAL_COMP_COMP6_EXTI_CLEAR_FLAG())
phungductung 0:8ede47d38d10 1274 # endif
phungductung 0:8ede47d38d10 1275 # if defined(STM32F302xE) || defined(STM32F302xC)
phungductung 0:8ede47d38d10 1276 #define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
phungductung 0:8ede47d38d10 1277 ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \
phungductung 0:8ede47d38d10 1278 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : \
phungductung 0:8ede47d38d10 1279 __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE())
phungductung 0:8ede47d38d10 1280 #define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() : \
phungductung 0:8ede47d38d10 1281 ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() : \
phungductung 0:8ede47d38d10 1282 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() : \
phungductung 0:8ede47d38d10 1283 __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE())
phungductung 0:8ede47d38d10 1284 #define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() : \
phungductung 0:8ede47d38d10 1285 ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() : \
phungductung 0:8ede47d38d10 1286 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() : \
phungductung 0:8ede47d38d10 1287 __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE())
phungductung 0:8ede47d38d10 1288 #define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() : \
phungductung 0:8ede47d38d10 1289 ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() : \
phungductung 0:8ede47d38d10 1290 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() : \
phungductung 0:8ede47d38d10 1291 __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE())
phungductung 0:8ede47d38d10 1292 #define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() : \
phungductung 0:8ede47d38d10 1293 ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_IT() : \
phungductung 0:8ede47d38d10 1294 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_IT() : \
phungductung 0:8ede47d38d10 1295 __HAL_COMP_COMP6_EXTI_ENABLE_IT())
phungductung 0:8ede47d38d10 1296 #define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() : \
phungductung 0:8ede47d38d10 1297 ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_IT() : \
phungductung 0:8ede47d38d10 1298 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_IT() : \
phungductung 0:8ede47d38d10 1299 __HAL_COMP_COMP6_EXTI_DISABLE_IT())
phungductung 0:8ede47d38d10 1300 #define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() : \
phungductung 0:8ede47d38d10 1301 ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_GET_FLAG() : \
phungductung 0:8ede47d38d10 1302 ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_GET_FLAG() : \
phungductung 0:8ede47d38d10 1303 __HAL_COMP_COMP6_EXTI_GET_FLAG())
phungductung 0:8ede47d38d10 1304 #define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \
phungductung 0:8ede47d38d10 1305 ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : \
phungductung 0:8ede47d38d10 1306 ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : \
phungductung 0:8ede47d38d10 1307 __HAL_COMP_COMP6_EXTI_CLEAR_FLAG())
phungductung 0:8ede47d38d10 1308 # endif
phungductung 0:8ede47d38d10 1309 # if defined(STM32F303xE) || defined(STM32F398xx) || defined(STM32F303xC) || defined(STM32F358xx)
phungductung 0:8ede47d38d10 1310 #define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
phungductung 0:8ede47d38d10 1311 ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \
phungductung 0:8ede47d38d10 1312 ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_RISING_EDGE() : \
phungductung 0:8ede47d38d10 1313 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : \
phungductung 0:8ede47d38d10 1314 ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_RISING_EDGE() : \
phungductung 0:8ede47d38d10 1315 ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE() : \
phungductung 0:8ede47d38d10 1316 __HAL_COMP_COMP7_EXTI_ENABLE_RISING_EDGE())
phungductung 0:8ede47d38d10 1317 #define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() : \
phungductung 0:8ede47d38d10 1318 ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() : \
phungductung 0:8ede47d38d10 1319 ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_DISABLE_RISING_EDGE() : \
phungductung 0:8ede47d38d10 1320 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() : \
phungductung 0:8ede47d38d10 1321 ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_RISING_EDGE() : \
phungductung 0:8ede47d38d10 1322 ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE() : \
phungductung 0:8ede47d38d10 1323 __HAL_COMP_COMP7_EXTI_DISABLE_RISING_EDGE())
phungductung 0:8ede47d38d10 1324 #define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() : \
phungductung 0:8ede47d38d10 1325 ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() : \
phungductung 0:8ede47d38d10 1326 ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_FALLING_EDGE() : \
phungductung 0:8ede47d38d10 1327 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() : \
phungductung 0:8ede47d38d10 1328 ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_FALLING_EDGE() : \
phungductung 0:8ede47d38d10 1329 ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE() : \
phungductung 0:8ede47d38d10 1330 __HAL_COMP_COMP7_EXTI_ENABLE_FALLING_EDGE())
phungductung 0:8ede47d38d10 1331 #define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() : \
phungductung 0:8ede47d38d10 1332 ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() : \
phungductung 0:8ede47d38d10 1333 ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_DISABLE_FALLING_EDGE() : \
phungductung 0:8ede47d38d10 1334 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() : \
phungductung 0:8ede47d38d10 1335 ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_FALLING_EDGE() : \
phungductung 0:8ede47d38d10 1336 ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE() : \
phungductung 0:8ede47d38d10 1337 __HAL_COMP_COMP7_EXTI_DISABLE_FALLING_EDGE())
phungductung 0:8ede47d38d10 1338 #define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() : \
phungductung 0:8ede47d38d10 1339 ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_IT() : \
phungductung 0:8ede47d38d10 1340 ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_IT() : \
phungductung 0:8ede47d38d10 1341 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_IT() : \
phungductung 0:8ede47d38d10 1342 ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_IT() : \
phungductung 0:8ede47d38d10 1343 ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_IT() : \
phungductung 0:8ede47d38d10 1344 __HAL_COMP_COMP7_EXTI_ENABLE_IT())
phungductung 0:8ede47d38d10 1345 #define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() : \
phungductung 0:8ede47d38d10 1346 ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_IT() : \
phungductung 0:8ede47d38d10 1347 ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_DISABLE_IT() : \
phungductung 0:8ede47d38d10 1348 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_IT() : \
phungductung 0:8ede47d38d10 1349 ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_IT() : \
phungductung 0:8ede47d38d10 1350 ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_IT() : \
phungductung 0:8ede47d38d10 1351 __HAL_COMP_COMP7_EXTI_DISABLE_IT())
phungductung 0:8ede47d38d10 1352 #define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() : \
phungductung 0:8ede47d38d10 1353 ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_GET_FLAG() : \
phungductung 0:8ede47d38d10 1354 ((__FLAG__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_GET_FLAG() : \
phungductung 0:8ede47d38d10 1355 ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_GET_FLAG() : \
phungductung 0:8ede47d38d10 1356 ((__FLAG__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_GET_FLAG() : \
phungductung 0:8ede47d38d10 1357 ((__FLAG__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_GET_FLAG() : \
phungductung 0:8ede47d38d10 1358 __HAL_COMP_COMP7_EXTI_GET_FLAG())
phungductung 0:8ede47d38d10 1359 #define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \
phungductung 0:8ede47d38d10 1360 ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : \
phungductung 0:8ede47d38d10 1361 ((__FLAG__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_CLEAR_FLAG() : \
phungductung 0:8ede47d38d10 1362 ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : \
phungductung 0:8ede47d38d10 1363 ((__FLAG__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_CLEAR_FLAG() : \
phungductung 0:8ede47d38d10 1364 ((__FLAG__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_CLEAR_FLAG() : \
phungductung 0:8ede47d38d10 1365 __HAL_COMP_COMP7_EXTI_CLEAR_FLAG())
phungductung 0:8ede47d38d10 1366 # endif
phungductung 0:8ede47d38d10 1367 # if defined(STM32F373xC) ||defined(STM32F378xx)
phungductung 0:8ede47d38d10 1368 #define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
phungductung 0:8ede47d38d10 1369 __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE())
phungductung 0:8ede47d38d10 1370 #define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() : \
phungductung 0:8ede47d38d10 1371 __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE())
phungductung 0:8ede47d38d10 1372 #define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() : \
phungductung 0:8ede47d38d10 1373 __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE())
phungductung 0:8ede47d38d10 1374 #define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() : \
phungductung 0:8ede47d38d10 1375 __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE())
phungductung 0:8ede47d38d10 1376 #define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() : \
phungductung 0:8ede47d38d10 1377 __HAL_COMP_COMP2_EXTI_ENABLE_IT())
phungductung 0:8ede47d38d10 1378 #define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() : \
phungductung 0:8ede47d38d10 1379 __HAL_COMP_COMP2_EXTI_DISABLE_IT())
phungductung 0:8ede47d38d10 1380 #define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() : \
phungductung 0:8ede47d38d10 1381 __HAL_COMP_COMP2_EXTI_GET_FLAG())
phungductung 0:8ede47d38d10 1382 #define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \
phungductung 0:8ede47d38d10 1383 __HAL_COMP_COMP2_EXTI_CLEAR_FLAG())
phungductung 0:8ede47d38d10 1384 # endif
phungductung 0:8ede47d38d10 1385 #else
phungductung 0:8ede47d38d10 1386 #define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
phungductung 0:8ede47d38d10 1387 __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE())
phungductung 0:8ede47d38d10 1388 #define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() : \
phungductung 0:8ede47d38d10 1389 __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE())
phungductung 0:8ede47d38d10 1390 #define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() : \
phungductung 0:8ede47d38d10 1391 __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE())
phungductung 0:8ede47d38d10 1392 #define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() : \
phungductung 0:8ede47d38d10 1393 __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE())
phungductung 0:8ede47d38d10 1394 #define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() : \
phungductung 0:8ede47d38d10 1395 __HAL_COMP_COMP2_EXTI_ENABLE_IT())
phungductung 0:8ede47d38d10 1396 #define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() : \
phungductung 0:8ede47d38d10 1397 __HAL_COMP_COMP2_EXTI_DISABLE_IT())
phungductung 0:8ede47d38d10 1398 #define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() : \
phungductung 0:8ede47d38d10 1399 __HAL_COMP_COMP2_EXTI_GET_FLAG())
phungductung 0:8ede47d38d10 1400 #define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \
phungductung 0:8ede47d38d10 1401 __HAL_COMP_COMP2_EXTI_CLEAR_FLAG())
phungductung 0:8ede47d38d10 1402 #endif
phungductung 0:8ede47d38d10 1403
phungductung 0:8ede47d38d10 1404 #define __HAL_COMP_GET_EXTI_LINE COMP_GET_EXTI_LINE
phungductung 0:8ede47d38d10 1405
phungductung 0:8ede47d38d10 1406 /**
phungductung 0:8ede47d38d10 1407 * @}
phungductung 0:8ede47d38d10 1408 */
phungductung 0:8ede47d38d10 1409
phungductung 0:8ede47d38d10 1410 /** @defgroup HAL_DAC_Aliased_Macros HAL DAC Aliased Macros maintained for legacy purpose
phungductung 0:8ede47d38d10 1411 * @{
phungductung 0:8ede47d38d10 1412 */
phungductung 0:8ede47d38d10 1413
phungductung 0:8ede47d38d10 1414 #define IS_DAC_WAVE(WAVE) (((WAVE) == DAC_WAVE_NONE) || \
phungductung 0:8ede47d38d10 1415 ((WAVE) == DAC_WAVE_NOISE)|| \
phungductung 0:8ede47d38d10 1416 ((WAVE) == DAC_WAVE_TRIANGLE))
phungductung 0:8ede47d38d10 1417
phungductung 0:8ede47d38d10 1418 /**
phungductung 0:8ede47d38d10 1419 * @}
phungductung 0:8ede47d38d10 1420 */
phungductung 0:8ede47d38d10 1421
phungductung 0:8ede47d38d10 1422 /** @defgroup HAL_FLASH_Aliased_Macros HAL FLASH Aliased Macros maintained for legacy purpose
phungductung 0:8ede47d38d10 1423 * @{
phungductung 0:8ede47d38d10 1424 */
phungductung 0:8ede47d38d10 1425
phungductung 0:8ede47d38d10 1426 #define IS_WRPAREA IS_OB_WRPAREA
phungductung 0:8ede47d38d10 1427 #define IS_TYPEPROGRAM IS_FLASH_TYPEPROGRAM
phungductung 0:8ede47d38d10 1428 #define IS_TYPEPROGRAMFLASH IS_FLASH_TYPEPROGRAM
phungductung 0:8ede47d38d10 1429 #define IS_TYPEERASE IS_FLASH_TYPEERASE
phungductung 0:8ede47d38d10 1430 #define IS_NBSECTORS IS_FLASH_NBSECTORS
phungductung 0:8ede47d38d10 1431 #define IS_OB_WDG_SOURCE IS_OB_IWDG_SOURCE
phungductung 0:8ede47d38d10 1432
phungductung 0:8ede47d38d10 1433 /**
phungductung 0:8ede47d38d10 1434 * @}
phungductung 0:8ede47d38d10 1435 */
phungductung 0:8ede47d38d10 1436
phungductung 0:8ede47d38d10 1437 /** @defgroup HAL_I2C_Aliased_Macros HAL I2C Aliased Macros maintained for legacy purpose
phungductung 0:8ede47d38d10 1438 * @{
phungductung 0:8ede47d38d10 1439 */
phungductung 0:8ede47d38d10 1440
phungductung 0:8ede47d38d10 1441 #define __HAL_I2C_RESET_CR2 I2C_RESET_CR2
phungductung 0:8ede47d38d10 1442 #define __HAL_I2C_GENERATE_START I2C_GENERATE_START
phungductung 0:8ede47d38d10 1443 #define __HAL_I2C_FREQ_RANGE I2C_FREQ_RANGE
phungductung 0:8ede47d38d10 1444 #define __HAL_I2C_RISE_TIME I2C_RISE_TIME
phungductung 0:8ede47d38d10 1445 #define __HAL_I2C_SPEED_STANDARD I2C_SPEED_STANDARD
phungductung 0:8ede47d38d10 1446 #define __HAL_I2C_SPEED_FAST I2C_SPEED_FAST
phungductung 0:8ede47d38d10 1447 #define __HAL_I2C_SPEED I2C_SPEED
phungductung 0:8ede47d38d10 1448 #define __HAL_I2C_7BIT_ADD_WRITE I2C_7BIT_ADD_WRITE
phungductung 0:8ede47d38d10 1449 #define __HAL_I2C_7BIT_ADD_READ I2C_7BIT_ADD_READ
phungductung 0:8ede47d38d10 1450 #define __HAL_I2C_10BIT_ADDRESS I2C_10BIT_ADDRESS
phungductung 0:8ede47d38d10 1451 #define __HAL_I2C_10BIT_HEADER_WRITE I2C_10BIT_HEADER_WRITE
phungductung 0:8ede47d38d10 1452 #define __HAL_I2C_10BIT_HEADER_READ I2C_10BIT_HEADER_READ
phungductung 0:8ede47d38d10 1453 #define __HAL_I2C_MEM_ADD_MSB I2C_MEM_ADD_MSB
phungductung 0:8ede47d38d10 1454 #define __HAL_I2C_MEM_ADD_LSB I2C_MEM_ADD_LSB
phungductung 0:8ede47d38d10 1455 #define __HAL_I2C_FREQRANGE I2C_FREQRANGE
phungductung 0:8ede47d38d10 1456 /**
phungductung 0:8ede47d38d10 1457 * @}
phungductung 0:8ede47d38d10 1458 */
phungductung 0:8ede47d38d10 1459
phungductung 0:8ede47d38d10 1460 /** @defgroup HAL_I2S_Aliased_Macros HAL I2S Aliased Macros maintained for legacy purpose
phungductung 0:8ede47d38d10 1461 * @{
phungductung 0:8ede47d38d10 1462 */
phungductung 0:8ede47d38d10 1463
phungductung 0:8ede47d38d10 1464 #define IS_I2S_INSTANCE IS_I2S_ALL_INSTANCE
phungductung 0:8ede47d38d10 1465 #define IS_I2S_INSTANCE_EXT IS_I2S_ALL_INSTANCE_EXT
phungductung 0:8ede47d38d10 1466
phungductung 0:8ede47d38d10 1467 /**
phungductung 0:8ede47d38d10 1468 * @}
phungductung 0:8ede47d38d10 1469 */
phungductung 0:8ede47d38d10 1470
phungductung 0:8ede47d38d10 1471 /** @defgroup HAL_IRDA_Aliased_Macros HAL IRDA Aliased Macros maintained for legacy purpose
phungductung 0:8ede47d38d10 1472 * @{
phungductung 0:8ede47d38d10 1473 */
phungductung 0:8ede47d38d10 1474
phungductung 0:8ede47d38d10 1475 #define __IRDA_DISABLE __HAL_IRDA_DISABLE
phungductung 0:8ede47d38d10 1476 #define __IRDA_ENABLE __HAL_IRDA_ENABLE
phungductung 0:8ede47d38d10 1477
phungductung 0:8ede47d38d10 1478 #define __HAL_IRDA_GETCLOCKSOURCE IRDA_GETCLOCKSOURCE
phungductung 0:8ede47d38d10 1479 #define __HAL_IRDA_MASK_COMPUTATION IRDA_MASK_COMPUTATION
phungductung 0:8ede47d38d10 1480 #define __IRDA_GETCLOCKSOURCE IRDA_GETCLOCKSOURCE
phungductung 0:8ede47d38d10 1481 #define __IRDA_MASK_COMPUTATION IRDA_MASK_COMPUTATION
phungductung 0:8ede47d38d10 1482
phungductung 0:8ede47d38d10 1483 #define IS_IRDA_ONEBIT_SAMPLE IS_IRDA_ONE_BIT_SAMPLE
phungductung 0:8ede47d38d10 1484
phungductung 0:8ede47d38d10 1485
phungductung 0:8ede47d38d10 1486 /**
phungductung 0:8ede47d38d10 1487 * @}
phungductung 0:8ede47d38d10 1488 */
phungductung 0:8ede47d38d10 1489
phungductung 0:8ede47d38d10 1490
phungductung 0:8ede47d38d10 1491 /** @defgroup HAL_IWDG_Aliased_Macros HAL IWDG Aliased Macros maintained for legacy purpose
phungductung 0:8ede47d38d10 1492 * @{
phungductung 0:8ede47d38d10 1493 */
phungductung 0:8ede47d38d10 1494 #define __HAL_IWDG_ENABLE_WRITE_ACCESS IWDG_ENABLE_WRITE_ACCESS
phungductung 0:8ede47d38d10 1495 #define __HAL_IWDG_DISABLE_WRITE_ACCESS IWDG_DISABLE_WRITE_ACCESS
phungductung 0:8ede47d38d10 1496 /**
phungductung 0:8ede47d38d10 1497 * @}
phungductung 0:8ede47d38d10 1498 */
phungductung 0:8ede47d38d10 1499
phungductung 0:8ede47d38d10 1500
phungductung 0:8ede47d38d10 1501 /** @defgroup HAL_LPTIM_Aliased_Macros HAL LPTIM Aliased Macros maintained for legacy purpose
phungductung 0:8ede47d38d10 1502 * @{
phungductung 0:8ede47d38d10 1503 */
phungductung 0:8ede47d38d10 1504
phungductung 0:8ede47d38d10 1505 #define __HAL_LPTIM_ENABLE_INTERRUPT __HAL_LPTIM_ENABLE_IT
phungductung 0:8ede47d38d10 1506 #define __HAL_LPTIM_DISABLE_INTERRUPT __HAL_LPTIM_DISABLE_IT
phungductung 0:8ede47d38d10 1507 #define __HAL_LPTIM_GET_ITSTATUS __HAL_LPTIM_GET_IT_SOURCE
phungductung 0:8ede47d38d10 1508
phungductung 0:8ede47d38d10 1509 /**
phungductung 0:8ede47d38d10 1510 * @}
phungductung 0:8ede47d38d10 1511 */
phungductung 0:8ede47d38d10 1512
phungductung 0:8ede47d38d10 1513
phungductung 0:8ede47d38d10 1514 /** @defgroup HAL_OPAMP_Aliased_Macros HAL OPAMP Aliased Macros maintained for legacy purpose
phungductung 0:8ede47d38d10 1515 * @{
phungductung 0:8ede47d38d10 1516 */
phungductung 0:8ede47d38d10 1517 #define __OPAMP_CSR_OPAXPD OPAMP_CSR_OPAXPD
phungductung 0:8ede47d38d10 1518 #define __OPAMP_CSR_S3SELX OPAMP_CSR_S3SELX
phungductung 0:8ede47d38d10 1519 #define __OPAMP_CSR_S4SELX OPAMP_CSR_S4SELX
phungductung 0:8ede47d38d10 1520 #define __OPAMP_CSR_S5SELX OPAMP_CSR_S5SELX
phungductung 0:8ede47d38d10 1521 #define __OPAMP_CSR_S6SELX OPAMP_CSR_S6SELX
phungductung 0:8ede47d38d10 1522 #define __OPAMP_CSR_OPAXCAL_L OPAMP_CSR_OPAXCAL_L
phungductung 0:8ede47d38d10 1523 #define __OPAMP_CSR_OPAXCAL_H OPAMP_CSR_OPAXCAL_H
phungductung 0:8ede47d38d10 1524 #define __OPAMP_CSR_OPAXLPM OPAMP_CSR_OPAXLPM
phungductung 0:8ede47d38d10 1525 #define __OPAMP_CSR_ALL_SWITCHES OPAMP_CSR_ALL_SWITCHES
phungductung 0:8ede47d38d10 1526 #define __OPAMP_CSR_ANAWSELX OPAMP_CSR_ANAWSELX
phungductung 0:8ede47d38d10 1527 #define __OPAMP_CSR_OPAXCALOUT OPAMP_CSR_OPAXCALOUT
phungductung 0:8ede47d38d10 1528 #define __OPAMP_OFFSET_TRIM_BITSPOSITION OPAMP_OFFSET_TRIM_BITSPOSITION
phungductung 0:8ede47d38d10 1529 #define __OPAMP_OFFSET_TRIM_SET OPAMP_OFFSET_TRIM_SET
phungductung 0:8ede47d38d10 1530
phungductung 0:8ede47d38d10 1531 /**
phungductung 0:8ede47d38d10 1532 * @}
phungductung 0:8ede47d38d10 1533 */
phungductung 0:8ede47d38d10 1534
phungductung 0:8ede47d38d10 1535
phungductung 0:8ede47d38d10 1536 /** @defgroup HAL_PWR_Aliased_Macros HAL PWR Aliased Macros maintained for legacy purpose
phungductung 0:8ede47d38d10 1537 * @{
phungductung 0:8ede47d38d10 1538 */
phungductung 0:8ede47d38d10 1539 #define __HAL_PVD_EVENT_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_EVENT
phungductung 0:8ede47d38d10 1540 #define __HAL_PVD_EVENT_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_EVENT
phungductung 0:8ede47d38d10 1541 #define __HAL_PVD_EXTI_FALLINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE
phungductung 0:8ede47d38d10 1542 #define __HAL_PVD_EXTI_FALLINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE
phungductung 0:8ede47d38d10 1543 #define __HAL_PVD_EXTI_RISINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE
phungductung 0:8ede47d38d10 1544 #define __HAL_PVD_EXTI_RISINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE
phungductung 0:8ede47d38d10 1545 #define __HAL_PVM_EVENT_DISABLE __HAL_PWR_PVM_EVENT_DISABLE
phungductung 0:8ede47d38d10 1546 #define __HAL_PVM_EVENT_ENABLE __HAL_PWR_PVM_EVENT_ENABLE
phungductung 0:8ede47d38d10 1547 #define __HAL_PVM_EXTI_FALLINGTRIGGER_DISABLE __HAL_PWR_PVM_EXTI_FALLINGTRIGGER_DISABLE
phungductung 0:8ede47d38d10 1548 #define __HAL_PVM_EXTI_FALLINGTRIGGER_ENABLE __HAL_PWR_PVM_EXTI_FALLINGTRIGGER_ENABLE
phungductung 0:8ede47d38d10 1549 #define __HAL_PVM_EXTI_RISINGTRIGGER_DISABLE __HAL_PWR_PVM_EXTI_RISINGTRIGGER_DISABLE
phungductung 0:8ede47d38d10 1550 #define __HAL_PVM_EXTI_RISINGTRIGGER_ENABLE __HAL_PWR_PVM_EXTI_RISINGTRIGGER_ENABLE
phungductung 0:8ede47d38d10 1551 #define __HAL_PWR_INTERNALWAKEUP_DISABLE HAL_PWREx_DisableInternalWakeUpLine
phungductung 0:8ede47d38d10 1552 #define __HAL_PWR_INTERNALWAKEUP_ENABLE HAL_PWREx_EnableInternalWakeUpLine
phungductung 0:8ede47d38d10 1553 #define __HAL_PWR_PULL_UP_DOWN_CONFIG_DISABLE HAL_PWREx_DisablePullUpPullDownConfig
phungductung 0:8ede47d38d10 1554 #define __HAL_PWR_PULL_UP_DOWN_CONFIG_ENABLE HAL_PWREx_EnablePullUpPullDownConfig
phungductung 0:8ede47d38d10 1555 #define __HAL_PWR_PVD_EXTI_CLEAR_EGDE_TRIGGER() do { __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); } while(0)
phungductung 0:8ede47d38d10 1556 #define __HAL_PWR_PVD_EXTI_EVENT_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_EVENT
phungductung 0:8ede47d38d10 1557 #define __HAL_PWR_PVD_EXTI_EVENT_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_EVENT
phungductung 0:8ede47d38d10 1558 #define __HAL_PWR_PVD_EXTI_FALLINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE
phungductung 0:8ede47d38d10 1559 #define __HAL_PWR_PVD_EXTI_FALLINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE
phungductung 0:8ede47d38d10 1560 #define __HAL_PWR_PVD_EXTI_RISINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE
phungductung 0:8ede47d38d10 1561 #define __HAL_PWR_PVD_EXTI_RISINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE
phungductung 0:8ede47d38d10 1562 #define __HAL_PWR_PVD_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE
phungductung 0:8ede47d38d10 1563 #define __HAL_PWR_PVD_EXTI_SET_RISING_EDGE_TRIGGER __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE
phungductung 0:8ede47d38d10 1564 #define __HAL_PWR_PVM_DISABLE() do { HAL_PWREx_DisablePVM1();HAL_PWREx_DisablePVM2();HAL_PWREx_DisablePVM3();HAL_PWREx_DisablePVM4(); } while(0)
phungductung 0:8ede47d38d10 1565 #define __HAL_PWR_PVM_ENABLE() do { HAL_PWREx_EnablePVM1();HAL_PWREx_EnablePVM2();HAL_PWREx_EnablePVM3();HAL_PWREx_EnablePVM4(); } while(0)
phungductung 0:8ede47d38d10 1566 #define __HAL_PWR_SRAM2CONTENT_PRESERVE_DISABLE HAL_PWREx_DisableSRAM2ContentRetention
phungductung 0:8ede47d38d10 1567 #define __HAL_PWR_SRAM2CONTENT_PRESERVE_ENABLE HAL_PWREx_EnableSRAM2ContentRetention
phungductung 0:8ede47d38d10 1568 #define __HAL_PWR_VDDIO2_DISABLE HAL_PWREx_DisableVddIO2
phungductung 0:8ede47d38d10 1569 #define __HAL_PWR_VDDIO2_ENABLE HAL_PWREx_EnableVddIO2
phungductung 0:8ede47d38d10 1570 #define __HAL_PWR_VDDIO2_EXTI_CLEAR_EGDE_TRIGGER __HAL_PWR_VDDIO2_EXTI_DISABLE_FALLING_EDGE
phungductung 0:8ede47d38d10 1571 #define __HAL_PWR_VDDIO2_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_PWR_VDDIO2_EXTI_ENABLE_FALLING_EDGE
phungductung 0:8ede47d38d10 1572 #define __HAL_PWR_VDDUSB_DISABLE HAL_PWREx_DisableVddUSB
phungductung 0:8ede47d38d10 1573 #define __HAL_PWR_VDDUSB_ENABLE HAL_PWREx_EnableVddUSB
phungductung 0:8ede47d38d10 1574
phungductung 0:8ede47d38d10 1575 #if defined (STM32F4)
phungductung 0:8ede47d38d10 1576 #define __HAL_PVD_EXTI_ENABLE_IT(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_ENABLE_IT()
phungductung 0:8ede47d38d10 1577 #define __HAL_PVD_EXTI_DISABLE_IT(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_DISABLE_IT()
phungductung 0:8ede47d38d10 1578 #define __HAL_PVD_EXTI_GET_FLAG(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_GET_FLAG()
phungductung 0:8ede47d38d10 1579 #define __HAL_PVD_EXTI_CLEAR_FLAG(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_CLEAR_FLAG()
phungductung 0:8ede47d38d10 1580 #define __HAL_PVD_EXTI_GENERATE_SWIT(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_GENERATE_SWIT()
phungductung 0:8ede47d38d10 1581 #else
phungductung 0:8ede47d38d10 1582 #define __HAL_PVD_EXTI_CLEAR_FLAG __HAL_PWR_PVD_EXTI_CLEAR_FLAG
phungductung 0:8ede47d38d10 1583 #define __HAL_PVD_EXTI_DISABLE_IT __HAL_PWR_PVD_EXTI_DISABLE_IT
phungductung 0:8ede47d38d10 1584 #define __HAL_PVD_EXTI_ENABLE_IT __HAL_PWR_PVD_EXTI_ENABLE_IT
phungductung 0:8ede47d38d10 1585 #define __HAL_PVD_EXTI_GENERATE_SWIT __HAL_PWR_PVD_EXTI_GENERATE_SWIT
phungductung 0:8ede47d38d10 1586 #define __HAL_PVD_EXTI_GET_FLAG __HAL_PWR_PVD_EXTI_GET_FLAG
phungductung 0:8ede47d38d10 1587 #endif /* STM32F4 */
phungductung 0:8ede47d38d10 1588 /**
phungductung 0:8ede47d38d10 1589 * @}
phungductung 0:8ede47d38d10 1590 */
phungductung 0:8ede47d38d10 1591
phungductung 0:8ede47d38d10 1592
phungductung 0:8ede47d38d10 1593 /** @defgroup HAL_RCC_Aliased HAL RCC Aliased maintained for legacy purpose
phungductung 0:8ede47d38d10 1594 * @{
phungductung 0:8ede47d38d10 1595 */
phungductung 0:8ede47d38d10 1596
phungductung 0:8ede47d38d10 1597 #define RCC_StopWakeUpClock_MSI RCC_STOP_WAKEUPCLOCK_MSI
phungductung 0:8ede47d38d10 1598 #define RCC_StopWakeUpClock_HSI RCC_STOP_WAKEUPCLOCK_HSI
phungductung 0:8ede47d38d10 1599
phungductung 0:8ede47d38d10 1600 #define HAL_RCC_CCSCallback HAL_RCC_CSSCallback
phungductung 0:8ede47d38d10 1601 #define HAL_RC48_EnableBuffer_Cmd(cmd) (((cmd)==ENABLE) ? HAL_RCCEx_EnableHSI48_VREFINT() : HAL_RCCEx_DisableHSI48_VREFINT())
phungductung 0:8ede47d38d10 1602
phungductung 0:8ede47d38d10 1603 #define __ADC_CLK_DISABLE __HAL_RCC_ADC_CLK_DISABLE
phungductung 0:8ede47d38d10 1604 #define __ADC_CLK_ENABLE __HAL_RCC_ADC_CLK_ENABLE
phungductung 0:8ede47d38d10 1605 #define __ADC_CLK_SLEEP_DISABLE __HAL_RCC_ADC_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1606 #define __ADC_CLK_SLEEP_ENABLE __HAL_RCC_ADC_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1607 #define __ADC_FORCE_RESET __HAL_RCC_ADC_FORCE_RESET
phungductung 0:8ede47d38d10 1608 #define __ADC_RELEASE_RESET __HAL_RCC_ADC_RELEASE_RESET
phungductung 0:8ede47d38d10 1609 #define __ADC1_CLK_DISABLE __HAL_RCC_ADC1_CLK_DISABLE
phungductung 0:8ede47d38d10 1610 #define __ADC1_CLK_ENABLE __HAL_RCC_ADC1_CLK_ENABLE
phungductung 0:8ede47d38d10 1611 #define __ADC1_FORCE_RESET __HAL_RCC_ADC1_FORCE_RESET
phungductung 0:8ede47d38d10 1612 #define __ADC1_RELEASE_RESET __HAL_RCC_ADC1_RELEASE_RESET
phungductung 0:8ede47d38d10 1613 #define __ADC1_CLK_SLEEP_ENABLE __HAL_RCC_ADC1_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1614 #define __ADC1_CLK_SLEEP_DISABLE __HAL_RCC_ADC1_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1615 #define __ADC2_CLK_DISABLE __HAL_RCC_ADC2_CLK_DISABLE
phungductung 0:8ede47d38d10 1616 #define __ADC2_CLK_ENABLE __HAL_RCC_ADC2_CLK_ENABLE
phungductung 0:8ede47d38d10 1617 #define __ADC2_FORCE_RESET __HAL_RCC_ADC2_FORCE_RESET
phungductung 0:8ede47d38d10 1618 #define __ADC2_RELEASE_RESET __HAL_RCC_ADC2_RELEASE_RESET
phungductung 0:8ede47d38d10 1619 #define __ADC3_CLK_DISABLE __HAL_RCC_ADC3_CLK_DISABLE
phungductung 0:8ede47d38d10 1620 #define __ADC3_CLK_ENABLE __HAL_RCC_ADC3_CLK_ENABLE
phungductung 0:8ede47d38d10 1621 #define __ADC3_FORCE_RESET __HAL_RCC_ADC3_FORCE_RESET
phungductung 0:8ede47d38d10 1622 #define __ADC3_RELEASE_RESET __HAL_RCC_ADC3_RELEASE_RESET
phungductung 0:8ede47d38d10 1623 #define __AES_CLK_DISABLE __HAL_RCC_AES_CLK_DISABLE
phungductung 0:8ede47d38d10 1624 #define __AES_CLK_ENABLE __HAL_RCC_AES_CLK_ENABLE
phungductung 0:8ede47d38d10 1625 #define __AES_CLK_SLEEP_DISABLE __HAL_RCC_AES_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1626 #define __AES_CLK_SLEEP_ENABLE __HAL_RCC_AES_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1627 #define __AES_FORCE_RESET __HAL_RCC_AES_FORCE_RESET
phungductung 0:8ede47d38d10 1628 #define __AES_RELEASE_RESET __HAL_RCC_AES_RELEASE_RESET
phungductung 0:8ede47d38d10 1629 #define __CRYP_CLK_SLEEP_ENABLE __HAL_RCC_CRYP_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1630 #define __CRYP_CLK_SLEEP_DISABLE __HAL_RCC_CRYP_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1631 #define __CRYP_CLK_ENABLE __HAL_RCC_CRYP_CLK_ENABLE
phungductung 0:8ede47d38d10 1632 #define __CRYP_CLK_DISABLE __HAL_RCC_CRYP_CLK_DISABLE
phungductung 0:8ede47d38d10 1633 #define __CRYP_FORCE_RESET __HAL_RCC_CRYP_FORCE_RESET
phungductung 0:8ede47d38d10 1634 #define __CRYP_RELEASE_RESET __HAL_RCC_CRYP_RELEASE_RESET
phungductung 0:8ede47d38d10 1635 #define __AFIO_CLK_DISABLE __HAL_RCC_AFIO_CLK_DISABLE
phungductung 0:8ede47d38d10 1636 #define __AFIO_CLK_ENABLE __HAL_RCC_AFIO_CLK_ENABLE
phungductung 0:8ede47d38d10 1637 #define __AFIO_FORCE_RESET __HAL_RCC_AFIO_FORCE_RESET
phungductung 0:8ede47d38d10 1638 #define __AFIO_RELEASE_RESET __HAL_RCC_AFIO_RELEASE_RESET
phungductung 0:8ede47d38d10 1639 #define __AHB_FORCE_RESET __HAL_RCC_AHB_FORCE_RESET
phungductung 0:8ede47d38d10 1640 #define __AHB_RELEASE_RESET __HAL_RCC_AHB_RELEASE_RESET
phungductung 0:8ede47d38d10 1641 #define __AHB1_FORCE_RESET __HAL_RCC_AHB1_FORCE_RESET
phungductung 0:8ede47d38d10 1642 #define __AHB1_RELEASE_RESET __HAL_RCC_AHB1_RELEASE_RESET
phungductung 0:8ede47d38d10 1643 #define __AHB2_FORCE_RESET __HAL_RCC_AHB2_FORCE_RESET
phungductung 0:8ede47d38d10 1644 #define __AHB2_RELEASE_RESET __HAL_RCC_AHB2_RELEASE_RESET
phungductung 0:8ede47d38d10 1645 #define __AHB3_FORCE_RESET __HAL_RCC_AHB3_FORCE_RESET
phungductung 0:8ede47d38d10 1646 #define __AHB3_RELEASE_RESET __HAL_RCC_AHB3_RELEASE_RESET
phungductung 0:8ede47d38d10 1647 #define __APB1_FORCE_RESET __HAL_RCC_APB1_FORCE_RESET
phungductung 0:8ede47d38d10 1648 #define __APB1_RELEASE_RESET __HAL_RCC_APB1_RELEASE_RESET
phungductung 0:8ede47d38d10 1649 #define __APB2_FORCE_RESET __HAL_RCC_APB2_FORCE_RESET
phungductung 0:8ede47d38d10 1650 #define __APB2_RELEASE_RESET __HAL_RCC_APB2_RELEASE_RESET
phungductung 0:8ede47d38d10 1651 #define __BKP_CLK_DISABLE __HAL_RCC_BKP_CLK_DISABLE
phungductung 0:8ede47d38d10 1652 #define __BKP_CLK_ENABLE __HAL_RCC_BKP_CLK_ENABLE
phungductung 0:8ede47d38d10 1653 #define __BKP_FORCE_RESET __HAL_RCC_BKP_FORCE_RESET
phungductung 0:8ede47d38d10 1654 #define __BKP_RELEASE_RESET __HAL_RCC_BKP_RELEASE_RESET
phungductung 0:8ede47d38d10 1655 #define __CAN1_CLK_DISABLE __HAL_RCC_CAN1_CLK_DISABLE
phungductung 0:8ede47d38d10 1656 #define __CAN1_CLK_ENABLE __HAL_RCC_CAN1_CLK_ENABLE
phungductung 0:8ede47d38d10 1657 #define __CAN1_CLK_SLEEP_DISABLE __HAL_RCC_CAN1_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1658 #define __CAN1_CLK_SLEEP_ENABLE __HAL_RCC_CAN1_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1659 #define __CAN1_FORCE_RESET __HAL_RCC_CAN1_FORCE_RESET
phungductung 0:8ede47d38d10 1660 #define __CAN1_RELEASE_RESET __HAL_RCC_CAN1_RELEASE_RESET
phungductung 0:8ede47d38d10 1661 #define __CAN_CLK_DISABLE __HAL_RCC_CAN1_CLK_DISABLE
phungductung 0:8ede47d38d10 1662 #define __CAN_CLK_ENABLE __HAL_RCC_CAN1_CLK_ENABLE
phungductung 0:8ede47d38d10 1663 #define __CAN_FORCE_RESET __HAL_RCC_CAN1_FORCE_RESET
phungductung 0:8ede47d38d10 1664 #define __CAN_RELEASE_RESET __HAL_RCC_CAN1_RELEASE_RESET
phungductung 0:8ede47d38d10 1665 #define __CAN2_CLK_DISABLE __HAL_RCC_CAN2_CLK_DISABLE
phungductung 0:8ede47d38d10 1666 #define __CAN2_CLK_ENABLE __HAL_RCC_CAN2_CLK_ENABLE
phungductung 0:8ede47d38d10 1667 #define __CAN2_FORCE_RESET __HAL_RCC_CAN2_FORCE_RESET
phungductung 0:8ede47d38d10 1668 #define __CAN2_RELEASE_RESET __HAL_RCC_CAN2_RELEASE_RESET
phungductung 0:8ede47d38d10 1669 #define __CEC_CLK_DISABLE __HAL_RCC_CEC_CLK_DISABLE
phungductung 0:8ede47d38d10 1670 #define __CEC_CLK_ENABLE __HAL_RCC_CEC_CLK_ENABLE
phungductung 0:8ede47d38d10 1671 #define __COMP_CLK_DISABLE __HAL_RCC_COMP_CLK_DISABLE
phungductung 0:8ede47d38d10 1672 #define __COMP_CLK_ENABLE __HAL_RCC_COMP_CLK_ENABLE
phungductung 0:8ede47d38d10 1673 #define __COMP_FORCE_RESET __HAL_RCC_COMP_FORCE_RESET
phungductung 0:8ede47d38d10 1674 #define __COMP_RELEASE_RESET __HAL_RCC_COMP_RELEASE_RESET
phungductung 0:8ede47d38d10 1675 #define __COMP_CLK_SLEEP_ENABLE __HAL_RCC_COMP_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1676 #define __COMP_CLK_SLEEP_DISABLE __HAL_RCC_COMP_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1677 #define __CEC_FORCE_RESET __HAL_RCC_CEC_FORCE_RESET
phungductung 0:8ede47d38d10 1678 #define __CEC_RELEASE_RESET __HAL_RCC_CEC_RELEASE_RESET
phungductung 0:8ede47d38d10 1679 #define __CRC_CLK_DISABLE __HAL_RCC_CRC_CLK_DISABLE
phungductung 0:8ede47d38d10 1680 #define __CRC_CLK_ENABLE __HAL_RCC_CRC_CLK_ENABLE
phungductung 0:8ede47d38d10 1681 #define __CRC_CLK_SLEEP_DISABLE __HAL_RCC_CRC_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1682 #define __CRC_CLK_SLEEP_ENABLE __HAL_RCC_CRC_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1683 #define __CRC_FORCE_RESET __HAL_RCC_CRC_FORCE_RESET
phungductung 0:8ede47d38d10 1684 #define __CRC_RELEASE_RESET __HAL_RCC_CRC_RELEASE_RESET
phungductung 0:8ede47d38d10 1685 #define __DAC_CLK_DISABLE __HAL_RCC_DAC_CLK_DISABLE
phungductung 0:8ede47d38d10 1686 #define __DAC_CLK_ENABLE __HAL_RCC_DAC_CLK_ENABLE
phungductung 0:8ede47d38d10 1687 #define __DAC_FORCE_RESET __HAL_RCC_DAC_FORCE_RESET
phungductung 0:8ede47d38d10 1688 #define __DAC_RELEASE_RESET __HAL_RCC_DAC_RELEASE_RESET
phungductung 0:8ede47d38d10 1689 #define __DAC1_CLK_DISABLE __HAL_RCC_DAC1_CLK_DISABLE
phungductung 0:8ede47d38d10 1690 #define __DAC1_CLK_ENABLE __HAL_RCC_DAC1_CLK_ENABLE
phungductung 0:8ede47d38d10 1691 #define __DAC1_CLK_SLEEP_DISABLE __HAL_RCC_DAC1_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1692 #define __DAC1_CLK_SLEEP_ENABLE __HAL_RCC_DAC1_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1693 #define __DAC1_FORCE_RESET __HAL_RCC_DAC1_FORCE_RESET
phungductung 0:8ede47d38d10 1694 #define __DAC1_RELEASE_RESET __HAL_RCC_DAC1_RELEASE_RESET
phungductung 0:8ede47d38d10 1695 #define __DBGMCU_CLK_ENABLE __HAL_RCC_DBGMCU_CLK_ENABLE
phungductung 0:8ede47d38d10 1696 #define __DBGMCU_CLK_DISABLE __HAL_RCC_DBGMCU_CLK_DISABLE
phungductung 0:8ede47d38d10 1697 #define __DBGMCU_FORCE_RESET __HAL_RCC_DBGMCU_FORCE_RESET
phungductung 0:8ede47d38d10 1698 #define __DBGMCU_RELEASE_RESET __HAL_RCC_DBGMCU_RELEASE_RESET
phungductung 0:8ede47d38d10 1699 #define __DFSDM_CLK_DISABLE __HAL_RCC_DFSDM_CLK_DISABLE
phungductung 0:8ede47d38d10 1700 #define __DFSDM_CLK_ENABLE __HAL_RCC_DFSDM_CLK_ENABLE
phungductung 0:8ede47d38d10 1701 #define __DFSDM_CLK_SLEEP_DISABLE __HAL_RCC_DFSDM_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1702 #define __DFSDM_CLK_SLEEP_ENABLE __HAL_RCC_DFSDM_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1703 #define __DFSDM_FORCE_RESET __HAL_RCC_DFSDM_FORCE_RESET
phungductung 0:8ede47d38d10 1704 #define __DFSDM_RELEASE_RESET __HAL_RCC_DFSDM_RELEASE_RESET
phungductung 0:8ede47d38d10 1705 #define __DMA1_CLK_DISABLE __HAL_RCC_DMA1_CLK_DISABLE
phungductung 0:8ede47d38d10 1706 #define __DMA1_CLK_ENABLE __HAL_RCC_DMA1_CLK_ENABLE
phungductung 0:8ede47d38d10 1707 #define __DMA1_CLK_SLEEP_DISABLE __HAL_RCC_DMA1_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1708 #define __DMA1_CLK_SLEEP_ENABLE __HAL_RCC_DMA1_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1709 #define __DMA1_FORCE_RESET __HAL_RCC_DMA1_FORCE_RESET
phungductung 0:8ede47d38d10 1710 #define __DMA1_RELEASE_RESET __HAL_RCC_DMA1_RELEASE_RESET
phungductung 0:8ede47d38d10 1711 #define __DMA2_CLK_DISABLE __HAL_RCC_DMA2_CLK_DISABLE
phungductung 0:8ede47d38d10 1712 #define __DMA2_CLK_ENABLE __HAL_RCC_DMA2_CLK_ENABLE
phungductung 0:8ede47d38d10 1713 #define __DMA2_CLK_SLEEP_DISABLE __HAL_RCC_DMA2_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1714 #define __DMA2_CLK_SLEEP_ENABLE __HAL_RCC_DMA2_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1715 #define __DMA2_FORCE_RESET __HAL_RCC_DMA2_FORCE_RESET
phungductung 0:8ede47d38d10 1716 #define __DMA2_RELEASE_RESET __HAL_RCC_DMA2_RELEASE_RESET
phungductung 0:8ede47d38d10 1717 #define __ETHMAC_CLK_DISABLE __HAL_RCC_ETHMAC_CLK_DISABLE
phungductung 0:8ede47d38d10 1718 #define __ETHMAC_CLK_ENABLE __HAL_RCC_ETHMAC_CLK_ENABLE
phungductung 0:8ede47d38d10 1719 #define __ETHMAC_FORCE_RESET __HAL_RCC_ETHMAC_FORCE_RESET
phungductung 0:8ede47d38d10 1720 #define __ETHMAC_RELEASE_RESET __HAL_RCC_ETHMAC_RELEASE_RESET
phungductung 0:8ede47d38d10 1721 #define __ETHMACRX_CLK_DISABLE __HAL_RCC_ETHMACRX_CLK_DISABLE
phungductung 0:8ede47d38d10 1722 #define __ETHMACRX_CLK_ENABLE __HAL_RCC_ETHMACRX_CLK_ENABLE
phungductung 0:8ede47d38d10 1723 #define __ETHMACTX_CLK_DISABLE __HAL_RCC_ETHMACTX_CLK_DISABLE
phungductung 0:8ede47d38d10 1724 #define __ETHMACTX_CLK_ENABLE __HAL_RCC_ETHMACTX_CLK_ENABLE
phungductung 0:8ede47d38d10 1725 #define __FIREWALL_CLK_DISABLE __HAL_RCC_FIREWALL_CLK_DISABLE
phungductung 0:8ede47d38d10 1726 #define __FIREWALL_CLK_ENABLE __HAL_RCC_FIREWALL_CLK_ENABLE
phungductung 0:8ede47d38d10 1727 #define __FLASH_CLK_DISABLE __HAL_RCC_FLASH_CLK_DISABLE
phungductung 0:8ede47d38d10 1728 #define __FLASH_CLK_ENABLE __HAL_RCC_FLASH_CLK_ENABLE
phungductung 0:8ede47d38d10 1729 #define __FLASH_CLK_SLEEP_DISABLE __HAL_RCC_FLASH_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1730 #define __FLASH_CLK_SLEEP_ENABLE __HAL_RCC_FLASH_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1731 #define __FLASH_FORCE_RESET __HAL_RCC_FLASH_FORCE_RESET
phungductung 0:8ede47d38d10 1732 #define __FLASH_RELEASE_RESET __HAL_RCC_FLASH_RELEASE_RESET
phungductung 0:8ede47d38d10 1733 #define __FLITF_CLK_DISABLE __HAL_RCC_FLITF_CLK_DISABLE
phungductung 0:8ede47d38d10 1734 #define __FLITF_CLK_ENABLE __HAL_RCC_FLITF_CLK_ENABLE
phungductung 0:8ede47d38d10 1735 #define __FLITF_FORCE_RESET __HAL_RCC_FLITF_FORCE_RESET
phungductung 0:8ede47d38d10 1736 #define __FLITF_RELEASE_RESET __HAL_RCC_FLITF_RELEASE_RESET
phungductung 0:8ede47d38d10 1737 #define __FLITF_CLK_SLEEP_ENABLE __HAL_RCC_FLITF_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1738 #define __FLITF_CLK_SLEEP_DISABLE __HAL_RCC_FLITF_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1739 #define __FMC_CLK_DISABLE __HAL_RCC_FMC_CLK_DISABLE
phungductung 0:8ede47d38d10 1740 #define __FMC_CLK_ENABLE __HAL_RCC_FMC_CLK_ENABLE
phungductung 0:8ede47d38d10 1741 #define __FMC_CLK_SLEEP_DISABLE __HAL_RCC_FMC_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1742 #define __FMC_CLK_SLEEP_ENABLE __HAL_RCC_FMC_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1743 #define __FMC_FORCE_RESET __HAL_RCC_FMC_FORCE_RESET
phungductung 0:8ede47d38d10 1744 #define __FMC_RELEASE_RESET __HAL_RCC_FMC_RELEASE_RESET
phungductung 0:8ede47d38d10 1745 #define __FSMC_CLK_DISABLE __HAL_RCC_FSMC_CLK_DISABLE
phungductung 0:8ede47d38d10 1746 #define __FSMC_CLK_ENABLE __HAL_RCC_FSMC_CLK_ENABLE
phungductung 0:8ede47d38d10 1747 #define __GPIOA_CLK_DISABLE __HAL_RCC_GPIOA_CLK_DISABLE
phungductung 0:8ede47d38d10 1748 #define __GPIOA_CLK_ENABLE __HAL_RCC_GPIOA_CLK_ENABLE
phungductung 0:8ede47d38d10 1749 #define __GPIOA_CLK_SLEEP_DISABLE __HAL_RCC_GPIOA_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1750 #define __GPIOA_CLK_SLEEP_ENABLE __HAL_RCC_GPIOA_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1751 #define __GPIOA_FORCE_RESET __HAL_RCC_GPIOA_FORCE_RESET
phungductung 0:8ede47d38d10 1752 #define __GPIOA_RELEASE_RESET __HAL_RCC_GPIOA_RELEASE_RESET
phungductung 0:8ede47d38d10 1753 #define __GPIOB_CLK_DISABLE __HAL_RCC_GPIOB_CLK_DISABLE
phungductung 0:8ede47d38d10 1754 #define __GPIOB_CLK_ENABLE __HAL_RCC_GPIOB_CLK_ENABLE
phungductung 0:8ede47d38d10 1755 #define __GPIOB_CLK_SLEEP_DISABLE __HAL_RCC_GPIOB_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1756 #define __GPIOB_CLK_SLEEP_ENABLE __HAL_RCC_GPIOB_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1757 #define __GPIOB_FORCE_RESET __HAL_RCC_GPIOB_FORCE_RESET
phungductung 0:8ede47d38d10 1758 #define __GPIOB_RELEASE_RESET __HAL_RCC_GPIOB_RELEASE_RESET
phungductung 0:8ede47d38d10 1759 #define __GPIOC_CLK_DISABLE __HAL_RCC_GPIOC_CLK_DISABLE
phungductung 0:8ede47d38d10 1760 #define __GPIOC_CLK_ENABLE __HAL_RCC_GPIOC_CLK_ENABLE
phungductung 0:8ede47d38d10 1761 #define __GPIOC_CLK_SLEEP_DISABLE __HAL_RCC_GPIOC_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1762 #define __GPIOC_CLK_SLEEP_ENABLE __HAL_RCC_GPIOC_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1763 #define __GPIOC_FORCE_RESET __HAL_RCC_GPIOC_FORCE_RESET
phungductung 0:8ede47d38d10 1764 #define __GPIOC_RELEASE_RESET __HAL_RCC_GPIOC_RELEASE_RESET
phungductung 0:8ede47d38d10 1765 #define __GPIOD_CLK_DISABLE __HAL_RCC_GPIOD_CLK_DISABLE
phungductung 0:8ede47d38d10 1766 #define __GPIOD_CLK_ENABLE __HAL_RCC_GPIOD_CLK_ENABLE
phungductung 0:8ede47d38d10 1767 #define __GPIOD_CLK_SLEEP_DISABLE __HAL_RCC_GPIOD_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1768 #define __GPIOD_CLK_SLEEP_ENABLE __HAL_RCC_GPIOD_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1769 #define __GPIOD_FORCE_RESET __HAL_RCC_GPIOD_FORCE_RESET
phungductung 0:8ede47d38d10 1770 #define __GPIOD_RELEASE_RESET __HAL_RCC_GPIOD_RELEASE_RESET
phungductung 0:8ede47d38d10 1771 #define __GPIOE_CLK_DISABLE __HAL_RCC_GPIOE_CLK_DISABLE
phungductung 0:8ede47d38d10 1772 #define __GPIOE_CLK_ENABLE __HAL_RCC_GPIOE_CLK_ENABLE
phungductung 0:8ede47d38d10 1773 #define __GPIOE_CLK_SLEEP_DISABLE __HAL_RCC_GPIOE_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1774 #define __GPIOE_CLK_SLEEP_ENABLE __HAL_RCC_GPIOE_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1775 #define __GPIOE_FORCE_RESET __HAL_RCC_GPIOE_FORCE_RESET
phungductung 0:8ede47d38d10 1776 #define __GPIOE_RELEASE_RESET __HAL_RCC_GPIOE_RELEASE_RESET
phungductung 0:8ede47d38d10 1777 #define __GPIOF_CLK_DISABLE __HAL_RCC_GPIOF_CLK_DISABLE
phungductung 0:8ede47d38d10 1778 #define __GPIOF_CLK_ENABLE __HAL_RCC_GPIOF_CLK_ENABLE
phungductung 0:8ede47d38d10 1779 #define __GPIOF_CLK_SLEEP_DISABLE __HAL_RCC_GPIOF_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1780 #define __GPIOF_CLK_SLEEP_ENABLE __HAL_RCC_GPIOF_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1781 #define __GPIOF_FORCE_RESET __HAL_RCC_GPIOF_FORCE_RESET
phungductung 0:8ede47d38d10 1782 #define __GPIOF_RELEASE_RESET __HAL_RCC_GPIOF_RELEASE_RESET
phungductung 0:8ede47d38d10 1783 #define __GPIOG_CLK_DISABLE __HAL_RCC_GPIOG_CLK_DISABLE
phungductung 0:8ede47d38d10 1784 #define __GPIOG_CLK_ENABLE __HAL_RCC_GPIOG_CLK_ENABLE
phungductung 0:8ede47d38d10 1785 #define __GPIOG_CLK_SLEEP_DISABLE __HAL_RCC_GPIOG_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1786 #define __GPIOG_CLK_SLEEP_ENABLE __HAL_RCC_GPIOG_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1787 #define __GPIOG_FORCE_RESET __HAL_RCC_GPIOG_FORCE_RESET
phungductung 0:8ede47d38d10 1788 #define __GPIOG_RELEASE_RESET __HAL_RCC_GPIOG_RELEASE_RESET
phungductung 0:8ede47d38d10 1789 #define __GPIOH_CLK_DISABLE __HAL_RCC_GPIOH_CLK_DISABLE
phungductung 0:8ede47d38d10 1790 #define __GPIOH_CLK_ENABLE __HAL_RCC_GPIOH_CLK_ENABLE
phungductung 0:8ede47d38d10 1791 #define __GPIOH_CLK_SLEEP_DISABLE __HAL_RCC_GPIOH_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1792 #define __GPIOH_CLK_SLEEP_ENABLE __HAL_RCC_GPIOH_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1793 #define __GPIOH_FORCE_RESET __HAL_RCC_GPIOH_FORCE_RESET
phungductung 0:8ede47d38d10 1794 #define __GPIOH_RELEASE_RESET __HAL_RCC_GPIOH_RELEASE_RESET
phungductung 0:8ede47d38d10 1795 #define __I2C1_CLK_DISABLE __HAL_RCC_I2C1_CLK_DISABLE
phungductung 0:8ede47d38d10 1796 #define __I2C1_CLK_ENABLE __HAL_RCC_I2C1_CLK_ENABLE
phungductung 0:8ede47d38d10 1797 #define __I2C1_CLK_SLEEP_DISABLE __HAL_RCC_I2C1_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1798 #define __I2C1_CLK_SLEEP_ENABLE __HAL_RCC_I2C1_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1799 #define __I2C1_FORCE_RESET __HAL_RCC_I2C1_FORCE_RESET
phungductung 0:8ede47d38d10 1800 #define __I2C1_RELEASE_RESET __HAL_RCC_I2C1_RELEASE_RESET
phungductung 0:8ede47d38d10 1801 #define __I2C2_CLK_DISABLE __HAL_RCC_I2C2_CLK_DISABLE
phungductung 0:8ede47d38d10 1802 #define __I2C2_CLK_ENABLE __HAL_RCC_I2C2_CLK_ENABLE
phungductung 0:8ede47d38d10 1803 #define __I2C2_CLK_SLEEP_DISABLE __HAL_RCC_I2C2_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1804 #define __I2C2_CLK_SLEEP_ENABLE __HAL_RCC_I2C2_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1805 #define __I2C2_FORCE_RESET __HAL_RCC_I2C2_FORCE_RESET
phungductung 0:8ede47d38d10 1806 #define __I2C2_RELEASE_RESET __HAL_RCC_I2C2_RELEASE_RESET
phungductung 0:8ede47d38d10 1807 #define __I2C3_CLK_DISABLE __HAL_RCC_I2C3_CLK_DISABLE
phungductung 0:8ede47d38d10 1808 #define __I2C3_CLK_ENABLE __HAL_RCC_I2C3_CLK_ENABLE
phungductung 0:8ede47d38d10 1809 #define __I2C3_CLK_SLEEP_DISABLE __HAL_RCC_I2C3_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1810 #define __I2C3_CLK_SLEEP_ENABLE __HAL_RCC_I2C3_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1811 #define __I2C3_FORCE_RESET __HAL_RCC_I2C3_FORCE_RESET
phungductung 0:8ede47d38d10 1812 #define __I2C3_RELEASE_RESET __HAL_RCC_I2C3_RELEASE_RESET
phungductung 0:8ede47d38d10 1813 #define __LCD_CLK_DISABLE __HAL_RCC_LCD_CLK_DISABLE
phungductung 0:8ede47d38d10 1814 #define __LCD_CLK_ENABLE __HAL_RCC_LCD_CLK_ENABLE
phungductung 0:8ede47d38d10 1815 #define __LCD_CLK_SLEEP_DISABLE __HAL_RCC_LCD_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1816 #define __LCD_CLK_SLEEP_ENABLE __HAL_RCC_LCD_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1817 #define __LCD_FORCE_RESET __HAL_RCC_LCD_FORCE_RESET
phungductung 0:8ede47d38d10 1818 #define __LCD_RELEASE_RESET __HAL_RCC_LCD_RELEASE_RESET
phungductung 0:8ede47d38d10 1819 #define __LPTIM1_CLK_DISABLE __HAL_RCC_LPTIM1_CLK_DISABLE
phungductung 0:8ede47d38d10 1820 #define __LPTIM1_CLK_ENABLE __HAL_RCC_LPTIM1_CLK_ENABLE
phungductung 0:8ede47d38d10 1821 #define __LPTIM1_CLK_SLEEP_DISABLE __HAL_RCC_LPTIM1_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1822 #define __LPTIM1_CLK_SLEEP_ENABLE __HAL_RCC_LPTIM1_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1823 #define __LPTIM1_FORCE_RESET __HAL_RCC_LPTIM1_FORCE_RESET
phungductung 0:8ede47d38d10 1824 #define __LPTIM1_RELEASE_RESET __HAL_RCC_LPTIM1_RELEASE_RESET
phungductung 0:8ede47d38d10 1825 #define __LPTIM2_CLK_DISABLE __HAL_RCC_LPTIM2_CLK_DISABLE
phungductung 0:8ede47d38d10 1826 #define __LPTIM2_CLK_ENABLE __HAL_RCC_LPTIM2_CLK_ENABLE
phungductung 0:8ede47d38d10 1827 #define __LPTIM2_CLK_SLEEP_DISABLE __HAL_RCC_LPTIM2_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1828 #define __LPTIM2_CLK_SLEEP_ENABLE __HAL_RCC_LPTIM2_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1829 #define __LPTIM2_FORCE_RESET __HAL_RCC_LPTIM2_FORCE_RESET
phungductung 0:8ede47d38d10 1830 #define __LPTIM2_RELEASE_RESET __HAL_RCC_LPTIM2_RELEASE_RESET
phungductung 0:8ede47d38d10 1831 #define __LPUART1_CLK_DISABLE __HAL_RCC_LPUART1_CLK_DISABLE
phungductung 0:8ede47d38d10 1832 #define __LPUART1_CLK_ENABLE __HAL_RCC_LPUART1_CLK_ENABLE
phungductung 0:8ede47d38d10 1833 #define __LPUART1_CLK_SLEEP_DISABLE __HAL_RCC_LPUART1_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1834 #define __LPUART1_CLK_SLEEP_ENABLE __HAL_RCC_LPUART1_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1835 #define __LPUART1_FORCE_RESET __HAL_RCC_LPUART1_FORCE_RESET
phungductung 0:8ede47d38d10 1836 #define __LPUART1_RELEASE_RESET __HAL_RCC_LPUART1_RELEASE_RESET
phungductung 0:8ede47d38d10 1837 #define __OPAMP_CLK_DISABLE __HAL_RCC_OPAMP_CLK_DISABLE
phungductung 0:8ede47d38d10 1838 #define __OPAMP_CLK_ENABLE __HAL_RCC_OPAMP_CLK_ENABLE
phungductung 0:8ede47d38d10 1839 #define __OPAMP_CLK_SLEEP_DISABLE __HAL_RCC_OPAMP_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1840 #define __OPAMP_CLK_SLEEP_ENABLE __HAL_RCC_OPAMP_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1841 #define __OPAMP_FORCE_RESET __HAL_RCC_OPAMP_FORCE_RESET
phungductung 0:8ede47d38d10 1842 #define __OPAMP_RELEASE_RESET __HAL_RCC_OPAMP_RELEASE_RESET
phungductung 0:8ede47d38d10 1843 #define __OTGFS_CLK_DISABLE __HAL_RCC_OTGFS_CLK_DISABLE
phungductung 0:8ede47d38d10 1844 #define __OTGFS_CLK_ENABLE __HAL_RCC_OTGFS_CLK_ENABLE
phungductung 0:8ede47d38d10 1845 #define __OTGFS_CLK_SLEEP_DISABLE __HAL_RCC_OTGFS_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1846 #define __OTGFS_CLK_SLEEP_ENABLE __HAL_RCC_OTGFS_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1847 #define __OTGFS_FORCE_RESET __HAL_RCC_OTGFS_FORCE_RESET
phungductung 0:8ede47d38d10 1848 #define __OTGFS_RELEASE_RESET __HAL_RCC_OTGFS_RELEASE_RESET
phungductung 0:8ede47d38d10 1849 #define __PWR_CLK_DISABLE __HAL_RCC_PWR_CLK_DISABLE
phungductung 0:8ede47d38d10 1850 #define __PWR_CLK_ENABLE __HAL_RCC_PWR_CLK_ENABLE
phungductung 0:8ede47d38d10 1851 #define __PWR_CLK_SLEEP_DISABLE __HAL_RCC_PWR_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1852 #define __PWR_CLK_SLEEP_ENABLE __HAL_RCC_PWR_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1853 #define __PWR_FORCE_RESET __HAL_RCC_PWR_FORCE_RESET
phungductung 0:8ede47d38d10 1854 #define __PWR_RELEASE_RESET __HAL_RCC_PWR_RELEASE_RESET
phungductung 0:8ede47d38d10 1855 #define __QSPI_CLK_DISABLE __HAL_RCC_QSPI_CLK_DISABLE
phungductung 0:8ede47d38d10 1856 #define __QSPI_CLK_ENABLE __HAL_RCC_QSPI_CLK_ENABLE
phungductung 0:8ede47d38d10 1857 #define __QSPI_CLK_SLEEP_DISABLE __HAL_RCC_QSPI_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1858 #define __QSPI_CLK_SLEEP_ENABLE __HAL_RCC_QSPI_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1859 #define __QSPI_FORCE_RESET __HAL_RCC_QSPI_FORCE_RESET
phungductung 0:8ede47d38d10 1860 #define __QSPI_RELEASE_RESET __HAL_RCC_QSPI_RELEASE_RESET
phungductung 0:8ede47d38d10 1861 #define __RNG_CLK_DISABLE __HAL_RCC_RNG_CLK_DISABLE
phungductung 0:8ede47d38d10 1862 #define __RNG_CLK_ENABLE __HAL_RCC_RNG_CLK_ENABLE
phungductung 0:8ede47d38d10 1863 #define __RNG_CLK_SLEEP_DISABLE __HAL_RCC_RNG_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1864 #define __RNG_CLK_SLEEP_ENABLE __HAL_RCC_RNG_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1865 #define __RNG_FORCE_RESET __HAL_RCC_RNG_FORCE_RESET
phungductung 0:8ede47d38d10 1866 #define __RNG_RELEASE_RESET __HAL_RCC_RNG_RELEASE_RESET
phungductung 0:8ede47d38d10 1867 #define __SAI1_CLK_DISABLE __HAL_RCC_SAI1_CLK_DISABLE
phungductung 0:8ede47d38d10 1868 #define __SAI1_CLK_ENABLE __HAL_RCC_SAI1_CLK_ENABLE
phungductung 0:8ede47d38d10 1869 #define __SAI1_CLK_SLEEP_DISABLE __HAL_RCC_SAI1_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1870 #define __SAI1_CLK_SLEEP_ENABLE __HAL_RCC_SAI1_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1871 #define __SAI1_FORCE_RESET __HAL_RCC_SAI1_FORCE_RESET
phungductung 0:8ede47d38d10 1872 #define __SAI1_RELEASE_RESET __HAL_RCC_SAI1_RELEASE_RESET
phungductung 0:8ede47d38d10 1873 #define __SAI2_CLK_DISABLE __HAL_RCC_SAI2_CLK_DISABLE
phungductung 0:8ede47d38d10 1874 #define __SAI2_CLK_ENABLE __HAL_RCC_SAI2_CLK_ENABLE
phungductung 0:8ede47d38d10 1875 #define __SAI2_CLK_SLEEP_DISABLE __HAL_RCC_SAI2_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1876 #define __SAI2_CLK_SLEEP_ENABLE __HAL_RCC_SAI2_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1877 #define __SAI2_FORCE_RESET __HAL_RCC_SAI2_FORCE_RESET
phungductung 0:8ede47d38d10 1878 #define __SAI2_RELEASE_RESET __HAL_RCC_SAI2_RELEASE_RESET
phungductung 0:8ede47d38d10 1879 #define __SDIO_CLK_DISABLE __HAL_RCC_SDIO_CLK_DISABLE
phungductung 0:8ede47d38d10 1880 #define __SDIO_CLK_ENABLE __HAL_RCC_SDIO_CLK_ENABLE
phungductung 0:8ede47d38d10 1881 #define __SDMMC_CLK_DISABLE __HAL_RCC_SDMMC_CLK_DISABLE
phungductung 0:8ede47d38d10 1882 #define __SDMMC_CLK_ENABLE __HAL_RCC_SDMMC_CLK_ENABLE
phungductung 0:8ede47d38d10 1883 #define __SDMMC_CLK_SLEEP_DISABLE __HAL_RCC_SDMMC_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1884 #define __SDMMC_CLK_SLEEP_ENABLE __HAL_RCC_SDMMC_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1885 #define __SDMMC_FORCE_RESET __HAL_RCC_SDMMC_FORCE_RESET
phungductung 0:8ede47d38d10 1886 #define __SDMMC_RELEASE_RESET __HAL_RCC_SDMMC_RELEASE_RESET
phungductung 0:8ede47d38d10 1887 #define __SPI1_CLK_DISABLE __HAL_RCC_SPI1_CLK_DISABLE
phungductung 0:8ede47d38d10 1888 #define __SPI1_CLK_ENABLE __HAL_RCC_SPI1_CLK_ENABLE
phungductung 0:8ede47d38d10 1889 #define __SPI1_CLK_SLEEP_DISABLE __HAL_RCC_SPI1_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1890 #define __SPI1_CLK_SLEEP_ENABLE __HAL_RCC_SPI1_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1891 #define __SPI1_FORCE_RESET __HAL_RCC_SPI1_FORCE_RESET
phungductung 0:8ede47d38d10 1892 #define __SPI1_RELEASE_RESET __HAL_RCC_SPI1_RELEASE_RESET
phungductung 0:8ede47d38d10 1893 #define __SPI2_CLK_DISABLE __HAL_RCC_SPI2_CLK_DISABLE
phungductung 0:8ede47d38d10 1894 #define __SPI2_CLK_ENABLE __HAL_RCC_SPI2_CLK_ENABLE
phungductung 0:8ede47d38d10 1895 #define __SPI2_CLK_SLEEP_DISABLE __HAL_RCC_SPI2_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1896 #define __SPI2_CLK_SLEEP_ENABLE __HAL_RCC_SPI2_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1897 #define __SPI2_FORCE_RESET __HAL_RCC_SPI2_FORCE_RESET
phungductung 0:8ede47d38d10 1898 #define __SPI2_RELEASE_RESET __HAL_RCC_SPI2_RELEASE_RESET
phungductung 0:8ede47d38d10 1899 #define __SPI3_CLK_DISABLE __HAL_RCC_SPI3_CLK_DISABLE
phungductung 0:8ede47d38d10 1900 #define __SPI3_CLK_ENABLE __HAL_RCC_SPI3_CLK_ENABLE
phungductung 0:8ede47d38d10 1901 #define __SPI3_CLK_SLEEP_DISABLE __HAL_RCC_SPI3_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1902 #define __SPI3_CLK_SLEEP_ENABLE __HAL_RCC_SPI3_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1903 #define __SPI3_FORCE_RESET __HAL_RCC_SPI3_FORCE_RESET
phungductung 0:8ede47d38d10 1904 #define __SPI3_RELEASE_RESET __HAL_RCC_SPI3_RELEASE_RESET
phungductung 0:8ede47d38d10 1905 #define __SRAM_CLK_DISABLE __HAL_RCC_SRAM_CLK_DISABLE
phungductung 0:8ede47d38d10 1906 #define __SRAM_CLK_ENABLE __HAL_RCC_SRAM_CLK_ENABLE
phungductung 0:8ede47d38d10 1907 #define __SRAM1_CLK_SLEEP_DISABLE __HAL_RCC_SRAM1_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1908 #define __SRAM1_CLK_SLEEP_ENABLE __HAL_RCC_SRAM1_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1909 #define __SRAM2_CLK_SLEEP_DISABLE __HAL_RCC_SRAM2_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1910 #define __SRAM2_CLK_SLEEP_ENABLE __HAL_RCC_SRAM2_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1911 #define __SWPMI1_CLK_DISABLE __HAL_RCC_SWPMI1_CLK_DISABLE
phungductung 0:8ede47d38d10 1912 #define __SWPMI1_CLK_ENABLE __HAL_RCC_SWPMI1_CLK_ENABLE
phungductung 0:8ede47d38d10 1913 #define __SWPMI1_CLK_SLEEP_DISABLE __HAL_RCC_SWPMI1_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1914 #define __SWPMI1_CLK_SLEEP_ENABLE __HAL_RCC_SWPMI1_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1915 #define __SWPMI1_FORCE_RESET __HAL_RCC_SWPMI1_FORCE_RESET
phungductung 0:8ede47d38d10 1916 #define __SWPMI1_RELEASE_RESET __HAL_RCC_SWPMI1_RELEASE_RESET
phungductung 0:8ede47d38d10 1917 #define __SYSCFG_CLK_DISABLE __HAL_RCC_SYSCFG_CLK_DISABLE
phungductung 0:8ede47d38d10 1918 #define __SYSCFG_CLK_ENABLE __HAL_RCC_SYSCFG_CLK_ENABLE
phungductung 0:8ede47d38d10 1919 #define __SYSCFG_CLK_SLEEP_DISABLE __HAL_RCC_SYSCFG_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1920 #define __SYSCFG_CLK_SLEEP_ENABLE __HAL_RCC_SYSCFG_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1921 #define __SYSCFG_FORCE_RESET __HAL_RCC_SYSCFG_FORCE_RESET
phungductung 0:8ede47d38d10 1922 #define __SYSCFG_RELEASE_RESET __HAL_RCC_SYSCFG_RELEASE_RESET
phungductung 0:8ede47d38d10 1923 #define __TIM1_CLK_DISABLE __HAL_RCC_TIM1_CLK_DISABLE
phungductung 0:8ede47d38d10 1924 #define __TIM1_CLK_ENABLE __HAL_RCC_TIM1_CLK_ENABLE
phungductung 0:8ede47d38d10 1925 #define __TIM1_CLK_SLEEP_DISABLE __HAL_RCC_TIM1_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1926 #define __TIM1_CLK_SLEEP_ENABLE __HAL_RCC_TIM1_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1927 #define __TIM1_FORCE_RESET __HAL_RCC_TIM1_FORCE_RESET
phungductung 0:8ede47d38d10 1928 #define __TIM1_RELEASE_RESET __HAL_RCC_TIM1_RELEASE_RESET
phungductung 0:8ede47d38d10 1929 #define __TIM10_CLK_DISABLE __HAL_RCC_TIM10_CLK_DISABLE
phungductung 0:8ede47d38d10 1930 #define __TIM10_CLK_ENABLE __HAL_RCC_TIM10_CLK_ENABLE
phungductung 0:8ede47d38d10 1931 #define __TIM10_FORCE_RESET __HAL_RCC_TIM10_FORCE_RESET
phungductung 0:8ede47d38d10 1932 #define __TIM10_RELEASE_RESET __HAL_RCC_TIM10_RELEASE_RESET
phungductung 0:8ede47d38d10 1933 #define __TIM11_CLK_DISABLE __HAL_RCC_TIM11_CLK_DISABLE
phungductung 0:8ede47d38d10 1934 #define __TIM11_CLK_ENABLE __HAL_RCC_TIM11_CLK_ENABLE
phungductung 0:8ede47d38d10 1935 #define __TIM11_FORCE_RESET __HAL_RCC_TIM11_FORCE_RESET
phungductung 0:8ede47d38d10 1936 #define __TIM11_RELEASE_RESET __HAL_RCC_TIM11_RELEASE_RESET
phungductung 0:8ede47d38d10 1937 #define __TIM12_CLK_DISABLE __HAL_RCC_TIM12_CLK_DISABLE
phungductung 0:8ede47d38d10 1938 #define __TIM12_CLK_ENABLE __HAL_RCC_TIM12_CLK_ENABLE
phungductung 0:8ede47d38d10 1939 #define __TIM12_FORCE_RESET __HAL_RCC_TIM12_FORCE_RESET
phungductung 0:8ede47d38d10 1940 #define __TIM12_RELEASE_RESET __HAL_RCC_TIM12_RELEASE_RESET
phungductung 0:8ede47d38d10 1941 #define __TIM13_CLK_DISABLE __HAL_RCC_TIM13_CLK_DISABLE
phungductung 0:8ede47d38d10 1942 #define __TIM13_CLK_ENABLE __HAL_RCC_TIM13_CLK_ENABLE
phungductung 0:8ede47d38d10 1943 #define __TIM13_FORCE_RESET __HAL_RCC_TIM13_FORCE_RESET
phungductung 0:8ede47d38d10 1944 #define __TIM13_RELEASE_RESET __HAL_RCC_TIM13_RELEASE_RESET
phungductung 0:8ede47d38d10 1945 #define __TIM14_CLK_DISABLE __HAL_RCC_TIM14_CLK_DISABLE
phungductung 0:8ede47d38d10 1946 #define __TIM14_CLK_ENABLE __HAL_RCC_TIM14_CLK_ENABLE
phungductung 0:8ede47d38d10 1947 #define __TIM14_FORCE_RESET __HAL_RCC_TIM14_FORCE_RESET
phungductung 0:8ede47d38d10 1948 #define __TIM14_RELEASE_RESET __HAL_RCC_TIM14_RELEASE_RESET
phungductung 0:8ede47d38d10 1949 #define __TIM15_CLK_DISABLE __HAL_RCC_TIM15_CLK_DISABLE
phungductung 0:8ede47d38d10 1950 #define __TIM15_CLK_ENABLE __HAL_RCC_TIM15_CLK_ENABLE
phungductung 0:8ede47d38d10 1951 #define __TIM15_CLK_SLEEP_DISABLE __HAL_RCC_TIM15_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1952 #define __TIM15_CLK_SLEEP_ENABLE __HAL_RCC_TIM15_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1953 #define __TIM15_FORCE_RESET __HAL_RCC_TIM15_FORCE_RESET
phungductung 0:8ede47d38d10 1954 #define __TIM15_RELEASE_RESET __HAL_RCC_TIM15_RELEASE_RESET
phungductung 0:8ede47d38d10 1955 #define __TIM16_CLK_DISABLE __HAL_RCC_TIM16_CLK_DISABLE
phungductung 0:8ede47d38d10 1956 #define __TIM16_CLK_ENABLE __HAL_RCC_TIM16_CLK_ENABLE
phungductung 0:8ede47d38d10 1957 #define __TIM16_CLK_SLEEP_DISABLE __HAL_RCC_TIM16_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1958 #define __TIM16_CLK_SLEEP_ENABLE __HAL_RCC_TIM16_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1959 #define __TIM16_FORCE_RESET __HAL_RCC_TIM16_FORCE_RESET
phungductung 0:8ede47d38d10 1960 #define __TIM16_RELEASE_RESET __HAL_RCC_TIM16_RELEASE_RESET
phungductung 0:8ede47d38d10 1961 #define __TIM17_CLK_DISABLE __HAL_RCC_TIM17_CLK_DISABLE
phungductung 0:8ede47d38d10 1962 #define __TIM17_CLK_ENABLE __HAL_RCC_TIM17_CLK_ENABLE
phungductung 0:8ede47d38d10 1963 #define __TIM17_CLK_SLEEP_DISABLE __HAL_RCC_TIM17_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1964 #define __TIM17_CLK_SLEEP_ENABLE __HAL_RCC_TIM17_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1965 #define __TIM17_FORCE_RESET __HAL_RCC_TIM17_FORCE_RESET
phungductung 0:8ede47d38d10 1966 #define __TIM17_RELEASE_RESET __HAL_RCC_TIM17_RELEASE_RESET
phungductung 0:8ede47d38d10 1967 #define __TIM2_CLK_DISABLE __HAL_RCC_TIM2_CLK_DISABLE
phungductung 0:8ede47d38d10 1968 #define __TIM2_CLK_ENABLE __HAL_RCC_TIM2_CLK_ENABLE
phungductung 0:8ede47d38d10 1969 #define __TIM2_CLK_SLEEP_DISABLE __HAL_RCC_TIM2_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1970 #define __TIM2_CLK_SLEEP_ENABLE __HAL_RCC_TIM2_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1971 #define __TIM2_FORCE_RESET __HAL_RCC_TIM2_FORCE_RESET
phungductung 0:8ede47d38d10 1972 #define __TIM2_RELEASE_RESET __HAL_RCC_TIM2_RELEASE_RESET
phungductung 0:8ede47d38d10 1973 #define __TIM3_CLK_DISABLE __HAL_RCC_TIM3_CLK_DISABLE
phungductung 0:8ede47d38d10 1974 #define __TIM3_CLK_ENABLE __HAL_RCC_TIM3_CLK_ENABLE
phungductung 0:8ede47d38d10 1975 #define __TIM3_CLK_SLEEP_DISABLE __HAL_RCC_TIM3_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1976 #define __TIM3_CLK_SLEEP_ENABLE __HAL_RCC_TIM3_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1977 #define __TIM3_FORCE_RESET __HAL_RCC_TIM3_FORCE_RESET
phungductung 0:8ede47d38d10 1978 #define __TIM3_RELEASE_RESET __HAL_RCC_TIM3_RELEASE_RESET
phungductung 0:8ede47d38d10 1979 #define __TIM4_CLK_DISABLE __HAL_RCC_TIM4_CLK_DISABLE
phungductung 0:8ede47d38d10 1980 #define __TIM4_CLK_ENABLE __HAL_RCC_TIM4_CLK_ENABLE
phungductung 0:8ede47d38d10 1981 #define __TIM4_CLK_SLEEP_DISABLE __HAL_RCC_TIM4_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1982 #define __TIM4_CLK_SLEEP_ENABLE __HAL_RCC_TIM4_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1983 #define __TIM4_FORCE_RESET __HAL_RCC_TIM4_FORCE_RESET
phungductung 0:8ede47d38d10 1984 #define __TIM4_RELEASE_RESET __HAL_RCC_TIM4_RELEASE_RESET
phungductung 0:8ede47d38d10 1985 #define __TIM5_CLK_DISABLE __HAL_RCC_TIM5_CLK_DISABLE
phungductung 0:8ede47d38d10 1986 #define __TIM5_CLK_ENABLE __HAL_RCC_TIM5_CLK_ENABLE
phungductung 0:8ede47d38d10 1987 #define __TIM5_CLK_SLEEP_DISABLE __HAL_RCC_TIM5_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1988 #define __TIM5_CLK_SLEEP_ENABLE __HAL_RCC_TIM5_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1989 #define __TIM5_FORCE_RESET __HAL_RCC_TIM5_FORCE_RESET
phungductung 0:8ede47d38d10 1990 #define __TIM5_RELEASE_RESET __HAL_RCC_TIM5_RELEASE_RESET
phungductung 0:8ede47d38d10 1991 #define __TIM6_CLK_DISABLE __HAL_RCC_TIM6_CLK_DISABLE
phungductung 0:8ede47d38d10 1992 #define __TIM6_CLK_ENABLE __HAL_RCC_TIM6_CLK_ENABLE
phungductung 0:8ede47d38d10 1993 #define __TIM6_CLK_SLEEP_DISABLE __HAL_RCC_TIM6_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 1994 #define __TIM6_CLK_SLEEP_ENABLE __HAL_RCC_TIM6_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 1995 #define __TIM6_FORCE_RESET __HAL_RCC_TIM6_FORCE_RESET
phungductung 0:8ede47d38d10 1996 #define __TIM6_RELEASE_RESET __HAL_RCC_TIM6_RELEASE_RESET
phungductung 0:8ede47d38d10 1997 #define __TIM7_CLK_DISABLE __HAL_RCC_TIM7_CLK_DISABLE
phungductung 0:8ede47d38d10 1998 #define __TIM7_CLK_ENABLE __HAL_RCC_TIM7_CLK_ENABLE
phungductung 0:8ede47d38d10 1999 #define __TIM7_CLK_SLEEP_DISABLE __HAL_RCC_TIM7_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2000 #define __TIM7_CLK_SLEEP_ENABLE __HAL_RCC_TIM7_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2001 #define __TIM7_FORCE_RESET __HAL_RCC_TIM7_FORCE_RESET
phungductung 0:8ede47d38d10 2002 #define __TIM7_RELEASE_RESET __HAL_RCC_TIM7_RELEASE_RESET
phungductung 0:8ede47d38d10 2003 #define __TIM8_CLK_DISABLE __HAL_RCC_TIM8_CLK_DISABLE
phungductung 0:8ede47d38d10 2004 #define __TIM8_CLK_ENABLE __HAL_RCC_TIM8_CLK_ENABLE
phungductung 0:8ede47d38d10 2005 #define __TIM8_CLK_SLEEP_DISABLE __HAL_RCC_TIM8_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2006 #define __TIM8_CLK_SLEEP_ENABLE __HAL_RCC_TIM8_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2007 #define __TIM8_FORCE_RESET __HAL_RCC_TIM8_FORCE_RESET
phungductung 0:8ede47d38d10 2008 #define __TIM8_RELEASE_RESET __HAL_RCC_TIM8_RELEASE_RESET
phungductung 0:8ede47d38d10 2009 #define __TIM9_CLK_DISABLE __HAL_RCC_TIM9_CLK_DISABLE
phungductung 0:8ede47d38d10 2010 #define __TIM9_CLK_ENABLE __HAL_RCC_TIM9_CLK_ENABLE
phungductung 0:8ede47d38d10 2011 #define __TIM9_FORCE_RESET __HAL_RCC_TIM9_FORCE_RESET
phungductung 0:8ede47d38d10 2012 #define __TIM9_RELEASE_RESET __HAL_RCC_TIM9_RELEASE_RESET
phungductung 0:8ede47d38d10 2013 #define __TSC_CLK_DISABLE __HAL_RCC_TSC_CLK_DISABLE
phungductung 0:8ede47d38d10 2014 #define __TSC_CLK_ENABLE __HAL_RCC_TSC_CLK_ENABLE
phungductung 0:8ede47d38d10 2015 #define __TSC_CLK_SLEEP_DISABLE __HAL_RCC_TSC_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2016 #define __TSC_CLK_SLEEP_ENABLE __HAL_RCC_TSC_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2017 #define __TSC_FORCE_RESET __HAL_RCC_TSC_FORCE_RESET
phungductung 0:8ede47d38d10 2018 #define __TSC_RELEASE_RESET __HAL_RCC_TSC_RELEASE_RESET
phungductung 0:8ede47d38d10 2019 #define __UART4_CLK_DISABLE __HAL_RCC_UART4_CLK_DISABLE
phungductung 0:8ede47d38d10 2020 #define __UART4_CLK_ENABLE __HAL_RCC_UART4_CLK_ENABLE
phungductung 0:8ede47d38d10 2021 #define __UART4_CLK_SLEEP_DISABLE __HAL_RCC_UART4_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2022 #define __UART4_CLK_SLEEP_ENABLE __HAL_RCC_UART4_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2023 #define __UART4_FORCE_RESET __HAL_RCC_UART4_FORCE_RESET
phungductung 0:8ede47d38d10 2024 #define __UART4_RELEASE_RESET __HAL_RCC_UART4_RELEASE_RESET
phungductung 0:8ede47d38d10 2025 #define __UART5_CLK_DISABLE __HAL_RCC_UART5_CLK_DISABLE
phungductung 0:8ede47d38d10 2026 #define __UART5_CLK_ENABLE __HAL_RCC_UART5_CLK_ENABLE
phungductung 0:8ede47d38d10 2027 #define __UART5_CLK_SLEEP_DISABLE __HAL_RCC_UART5_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2028 #define __UART5_CLK_SLEEP_ENABLE __HAL_RCC_UART5_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2029 #define __UART5_FORCE_RESET __HAL_RCC_UART5_FORCE_RESET
phungductung 0:8ede47d38d10 2030 #define __UART5_RELEASE_RESET __HAL_RCC_UART5_RELEASE_RESET
phungductung 0:8ede47d38d10 2031 #define __USART1_CLK_DISABLE __HAL_RCC_USART1_CLK_DISABLE
phungductung 0:8ede47d38d10 2032 #define __USART1_CLK_ENABLE __HAL_RCC_USART1_CLK_ENABLE
phungductung 0:8ede47d38d10 2033 #define __USART1_CLK_SLEEP_DISABLE __HAL_RCC_USART1_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2034 #define __USART1_CLK_SLEEP_ENABLE __HAL_RCC_USART1_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2035 #define __USART1_FORCE_RESET __HAL_RCC_USART1_FORCE_RESET
phungductung 0:8ede47d38d10 2036 #define __USART1_RELEASE_RESET __HAL_RCC_USART1_RELEASE_RESET
phungductung 0:8ede47d38d10 2037 #define __USART2_CLK_DISABLE __HAL_RCC_USART2_CLK_DISABLE
phungductung 0:8ede47d38d10 2038 #define __USART2_CLK_ENABLE __HAL_RCC_USART2_CLK_ENABLE
phungductung 0:8ede47d38d10 2039 #define __USART2_CLK_SLEEP_DISABLE __HAL_RCC_USART2_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2040 #define __USART2_CLK_SLEEP_ENABLE __HAL_RCC_USART2_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2041 #define __USART2_FORCE_RESET __HAL_RCC_USART2_FORCE_RESET
phungductung 0:8ede47d38d10 2042 #define __USART2_RELEASE_RESET __HAL_RCC_USART2_RELEASE_RESET
phungductung 0:8ede47d38d10 2043 #define __USART3_CLK_DISABLE __HAL_RCC_USART3_CLK_DISABLE
phungductung 0:8ede47d38d10 2044 #define __USART3_CLK_ENABLE __HAL_RCC_USART3_CLK_ENABLE
phungductung 0:8ede47d38d10 2045 #define __USART3_CLK_SLEEP_DISABLE __HAL_RCC_USART3_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2046 #define __USART3_CLK_SLEEP_ENABLE __HAL_RCC_USART3_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2047 #define __USART3_FORCE_RESET __HAL_RCC_USART3_FORCE_RESET
phungductung 0:8ede47d38d10 2048 #define __USART3_RELEASE_RESET __HAL_RCC_USART3_RELEASE_RESET
phungductung 0:8ede47d38d10 2049 #define __USART4_CLK_DISABLE __HAL_RCC_USART4_CLK_DISABLE
phungductung 0:8ede47d38d10 2050 #define __USART4_CLK_ENABLE __HAL_RCC_USART4_CLK_ENABLE
phungductung 0:8ede47d38d10 2051 #define __USART4_CLK_SLEEP_ENABLE __HAL_RCC_USART4_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2052 #define __USART4_CLK_SLEEP_DISABLE __HAL_RCC_USART4_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2053 #define __USART4_FORCE_RESET __HAL_RCC_USART4_FORCE_RESET
phungductung 0:8ede47d38d10 2054 #define __USART4_RELEASE_RESET __HAL_RCC_USART4_RELEASE_RESET
phungductung 0:8ede47d38d10 2055 #define __USART5_CLK_DISABLE __HAL_RCC_USART5_CLK_DISABLE
phungductung 0:8ede47d38d10 2056 #define __USART5_CLK_ENABLE __HAL_RCC_USART5_CLK_ENABLE
phungductung 0:8ede47d38d10 2057 #define __USART5_CLK_SLEEP_ENABLE __HAL_RCC_USART5_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2058 #define __USART5_CLK_SLEEP_DISABLE __HAL_RCC_USART5_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2059 #define __USART5_FORCE_RESET __HAL_RCC_USART5_FORCE_RESET
phungductung 0:8ede47d38d10 2060 #define __USART5_RELEASE_RESET __HAL_RCC_USART5_RELEASE_RESET
phungductung 0:8ede47d38d10 2061 #define __USART7_CLK_DISABLE __HAL_RCC_USART7_CLK_DISABLE
phungductung 0:8ede47d38d10 2062 #define __USART7_CLK_ENABLE __HAL_RCC_USART7_CLK_ENABLE
phungductung 0:8ede47d38d10 2063 #define __USART7_FORCE_RESET __HAL_RCC_USART7_FORCE_RESET
phungductung 0:8ede47d38d10 2064 #define __USART7_RELEASE_RESET __HAL_RCC_USART7_RELEASE_RESET
phungductung 0:8ede47d38d10 2065 #define __USART8_CLK_DISABLE __HAL_RCC_USART8_CLK_DISABLE
phungductung 0:8ede47d38d10 2066 #define __USART8_CLK_ENABLE __HAL_RCC_USART8_CLK_ENABLE
phungductung 0:8ede47d38d10 2067 #define __USART8_FORCE_RESET __HAL_RCC_USART8_FORCE_RESET
phungductung 0:8ede47d38d10 2068 #define __USART8_RELEASE_RESET __HAL_RCC_USART8_RELEASE_RESET
phungductung 0:8ede47d38d10 2069 #define __USB_CLK_DISABLE __HAL_RCC_USB_CLK_DISABLE
phungductung 0:8ede47d38d10 2070 #define __USB_CLK_ENABLE __HAL_RCC_USB_CLK_ENABLE
phungductung 0:8ede47d38d10 2071 #define __USB_FORCE_RESET __HAL_RCC_USB_FORCE_RESET
phungductung 0:8ede47d38d10 2072 #define __USB_CLK_SLEEP_ENABLE __HAL_RCC_USB_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2073 #define __USB_CLK_SLEEP_DISABLE __HAL_RCC_USB_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2074 #define __USB_OTG_FS_CLK_DISABLE __HAL_RCC_USB_OTG_FS_CLK_DISABLE
phungductung 0:8ede47d38d10 2075 #define __USB_OTG_FS_CLK_ENABLE __HAL_RCC_USB_OTG_FS_CLK_ENABLE
phungductung 0:8ede47d38d10 2076 #define __USB_RELEASE_RESET __HAL_RCC_USB_RELEASE_RESET
phungductung 0:8ede47d38d10 2077 #define __WWDG_CLK_DISABLE __HAL_RCC_WWDG_CLK_DISABLE
phungductung 0:8ede47d38d10 2078 #define __WWDG_CLK_ENABLE __HAL_RCC_WWDG_CLK_ENABLE
phungductung 0:8ede47d38d10 2079 #define __WWDG_CLK_SLEEP_DISABLE __HAL_RCC_WWDG_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2080 #define __WWDG_CLK_SLEEP_ENABLE __HAL_RCC_WWDG_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2081 #define __WWDG_FORCE_RESET __HAL_RCC_WWDG_FORCE_RESET
phungductung 0:8ede47d38d10 2082 #define __WWDG_RELEASE_RESET __HAL_RCC_WWDG_RELEASE_RESET
phungductung 0:8ede47d38d10 2083 #define __TIM21_CLK_ENABLE __HAL_RCC_TIM21_CLK_ENABLE
phungductung 0:8ede47d38d10 2084 #define __TIM21_CLK_DISABLE __HAL_RCC_TIM21_CLK_DISABLE
phungductung 0:8ede47d38d10 2085 #define __TIM21_FORCE_RESET __HAL_RCC_TIM21_FORCE_RESET
phungductung 0:8ede47d38d10 2086 #define __TIM21_RELEASE_RESET __HAL_RCC_TIM21_RELEASE_RESET
phungductung 0:8ede47d38d10 2087 #define __TIM21_CLK_SLEEP_ENABLE __HAL_RCC_TIM21_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2088 #define __TIM21_CLK_SLEEP_DISABLE __HAL_RCC_TIM21_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2089 #define __TIM22_CLK_ENABLE __HAL_RCC_TIM22_CLK_ENABLE
phungductung 0:8ede47d38d10 2090 #define __TIM22_CLK_DISABLE __HAL_RCC_TIM22_CLK_DISABLE
phungductung 0:8ede47d38d10 2091 #define __TIM22_FORCE_RESET __HAL_RCC_TIM22_FORCE_RESET
phungductung 0:8ede47d38d10 2092 #define __TIM22_RELEASE_RESET __HAL_RCC_TIM22_RELEASE_RESET
phungductung 0:8ede47d38d10 2093 #define __TIM22_CLK_SLEEP_ENABLE __HAL_RCC_TIM22_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2094 #define __TIM22_CLK_SLEEP_DISABLE __HAL_RCC_TIM22_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2095 #define __CRS_CLK_DISABLE __HAL_RCC_CRS_CLK_DISABLE
phungductung 0:8ede47d38d10 2096 #define __CRS_CLK_ENABLE __HAL_RCC_CRS_CLK_ENABLE
phungductung 0:8ede47d38d10 2097 #define __CRS_CLK_SLEEP_DISABLE __HAL_RCC_CRS_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2098 #define __CRS_CLK_SLEEP_ENABLE __HAL_RCC_CRS_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2099 #define __CRS_FORCE_RESET __HAL_RCC_CRS_FORCE_RESET
phungductung 0:8ede47d38d10 2100 #define __CRS_RELEASE_RESET __HAL_RCC_CRS_RELEASE_RESET
phungductung 0:8ede47d38d10 2101 #define __RCC_BACKUPRESET_FORCE __HAL_RCC_BACKUPRESET_FORCE
phungductung 0:8ede47d38d10 2102 #define __RCC_BACKUPRESET_RELEASE __HAL_RCC_BACKUPRESET_RELEASE
phungductung 0:8ede47d38d10 2103
phungductung 0:8ede47d38d10 2104 #define __USB_OTG_FS_FORCE_RESET __HAL_RCC_USB_OTG_FS_FORCE_RESET
phungductung 0:8ede47d38d10 2105 #define __USB_OTG_FS_RELEASE_RESET __HAL_RCC_USB_OTG_FS_RELEASE_RESET
phungductung 0:8ede47d38d10 2106 #define __USB_OTG_FS_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_FS_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2107 #define __USB_OTG_FS_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_FS_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2108 #define __USB_OTG_HS_CLK_DISABLE __HAL_RCC_USB_OTG_HS_CLK_DISABLE
phungductung 0:8ede47d38d10 2109 #define __USB_OTG_HS_CLK_ENABLE __HAL_RCC_USB_OTG_HS_CLK_ENABLE
phungductung 0:8ede47d38d10 2110 #define __USB_OTG_HS_ULPI_CLK_ENABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE
phungductung 0:8ede47d38d10 2111 #define __USB_OTG_HS_ULPI_CLK_DISABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_DISABLE
phungductung 0:8ede47d38d10 2112 #define __TIM9_CLK_SLEEP_ENABLE __HAL_RCC_TIM9_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2113 #define __TIM9_CLK_SLEEP_DISABLE __HAL_RCC_TIM9_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2114 #define __TIM10_CLK_SLEEP_ENABLE __HAL_RCC_TIM10_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2115 #define __TIM10_CLK_SLEEP_DISABLE __HAL_RCC_TIM10_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2116 #define __TIM11_CLK_SLEEP_ENABLE __HAL_RCC_TIM11_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2117 #define __TIM11_CLK_SLEEP_DISABLE __HAL_RCC_TIM11_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2118 #define __ETHMACPTP_CLK_SLEEP_ENABLE __HAL_RCC_ETHMACPTP_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2119 #define __ETHMACPTP_CLK_SLEEP_DISABLE __HAL_RCC_ETHMACPTP_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2120 #define __ETHMACPTP_CLK_ENABLE __HAL_RCC_ETHMACPTP_CLK_ENABLE
phungductung 0:8ede47d38d10 2121 #define __ETHMACPTP_CLK_DISABLE __HAL_RCC_ETHMACPTP_CLK_DISABLE
phungductung 0:8ede47d38d10 2122 #define __HASH_CLK_ENABLE __HAL_RCC_HASH_CLK_ENABLE
phungductung 0:8ede47d38d10 2123 #define __HASH_FORCE_RESET __HAL_RCC_HASH_FORCE_RESET
phungductung 0:8ede47d38d10 2124 #define __HASH_RELEASE_RESET __HAL_RCC_HASH_RELEASE_RESET
phungductung 0:8ede47d38d10 2125 #define __HASH_CLK_SLEEP_ENABLE __HAL_RCC_HASH_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2126 #define __HASH_CLK_SLEEP_DISABLE __HAL_RCC_HASH_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2127 #define __HASH_CLK_DISABLE __HAL_RCC_HASH_CLK_DISABLE
phungductung 0:8ede47d38d10 2128 #define __SPI5_CLK_ENABLE __HAL_RCC_SPI5_CLK_ENABLE
phungductung 0:8ede47d38d10 2129 #define __SPI5_CLK_DISABLE __HAL_RCC_SPI5_CLK_DISABLE
phungductung 0:8ede47d38d10 2130 #define __SPI5_FORCE_RESET __HAL_RCC_SPI5_FORCE_RESET
phungductung 0:8ede47d38d10 2131 #define __SPI5_RELEASE_RESET __HAL_RCC_SPI5_RELEASE_RESET
phungductung 0:8ede47d38d10 2132 #define __SPI5_CLK_SLEEP_ENABLE __HAL_RCC_SPI5_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2133 #define __SPI5_CLK_SLEEP_DISABLE __HAL_RCC_SPI5_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2134 #define __SPI6_CLK_ENABLE __HAL_RCC_SPI6_CLK_ENABLE
phungductung 0:8ede47d38d10 2135 #define __SPI6_CLK_DISABLE __HAL_RCC_SPI6_CLK_DISABLE
phungductung 0:8ede47d38d10 2136 #define __SPI6_FORCE_RESET __HAL_RCC_SPI6_FORCE_RESET
phungductung 0:8ede47d38d10 2137 #define __SPI6_RELEASE_RESET __HAL_RCC_SPI6_RELEASE_RESET
phungductung 0:8ede47d38d10 2138 #define __SPI6_CLK_SLEEP_ENABLE __HAL_RCC_SPI6_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2139 #define __SPI6_CLK_SLEEP_DISABLE __HAL_RCC_SPI6_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2140 #define __LTDC_CLK_ENABLE __HAL_RCC_LTDC_CLK_ENABLE
phungductung 0:8ede47d38d10 2141 #define __LTDC_CLK_DISABLE __HAL_RCC_LTDC_CLK_DISABLE
phungductung 0:8ede47d38d10 2142 #define __LTDC_FORCE_RESET __HAL_RCC_LTDC_FORCE_RESET
phungductung 0:8ede47d38d10 2143 #define __LTDC_RELEASE_RESET __HAL_RCC_LTDC_RELEASE_RESET
phungductung 0:8ede47d38d10 2144 #define __LTDC_CLK_SLEEP_ENABLE __HAL_RCC_LTDC_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2145 #define __ETHMAC_CLK_SLEEP_ENABLE __HAL_RCC_ETHMAC_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2146 #define __ETHMAC_CLK_SLEEP_DISABLE __HAL_RCC_ETHMAC_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2147 #define __ETHMACTX_CLK_SLEEP_ENABLE __HAL_RCC_ETHMACTX_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2148 #define __ETHMACTX_CLK_SLEEP_DISABLE __HAL_RCC_ETHMACTX_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2149 #define __ETHMACRX_CLK_SLEEP_ENABLE __HAL_RCC_ETHMACRX_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2150 #define __ETHMACRX_CLK_SLEEP_DISABLE __HAL_RCC_ETHMACRX_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2151 #define __TIM12_CLK_SLEEP_ENABLE __HAL_RCC_TIM12_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2152 #define __TIM12_CLK_SLEEP_DISABLE __HAL_RCC_TIM12_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2153 #define __TIM13_CLK_SLEEP_ENABLE __HAL_RCC_TIM13_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2154 #define __TIM13_CLK_SLEEP_DISABLE __HAL_RCC_TIM13_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2155 #define __TIM14_CLK_SLEEP_ENABLE __HAL_RCC_TIM14_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2156 #define __TIM14_CLK_SLEEP_DISABLE __HAL_RCC_TIM14_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2157 #define __BKPSRAM_CLK_ENABLE __HAL_RCC_BKPSRAM_CLK_ENABLE
phungductung 0:8ede47d38d10 2158 #define __BKPSRAM_CLK_DISABLE __HAL_RCC_BKPSRAM_CLK_DISABLE
phungductung 0:8ede47d38d10 2159 #define __BKPSRAM_CLK_SLEEP_ENABLE __HAL_RCC_BKPSRAM_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2160 #define __BKPSRAM_CLK_SLEEP_DISABLE __HAL_RCC_BKPSRAM_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2161 #define __CCMDATARAMEN_CLK_ENABLE __HAL_RCC_CCMDATARAMEN_CLK_ENABLE
phungductung 0:8ede47d38d10 2162 #define __CCMDATARAMEN_CLK_DISABLE __HAL_RCC_CCMDATARAMEN_CLK_DISABLE
phungductung 0:8ede47d38d10 2163 #define __USART6_CLK_ENABLE __HAL_RCC_USART6_CLK_ENABLE
phungductung 0:8ede47d38d10 2164 #define __USART6_CLK_DISABLE __HAL_RCC_USART6_CLK_DISABLE
phungductung 0:8ede47d38d10 2165 #define __USART6_FORCE_RESET __HAL_RCC_USART6_FORCE_RESET
phungductung 0:8ede47d38d10 2166 #define __USART6_RELEASE_RESET __HAL_RCC_USART6_RELEASE_RESET
phungductung 0:8ede47d38d10 2167 #define __USART6_CLK_SLEEP_ENABLE __HAL_RCC_USART6_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2168 #define __USART6_CLK_SLEEP_DISABLE __HAL_RCC_USART6_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2169 #define __SPI4_CLK_ENABLE __HAL_RCC_SPI4_CLK_ENABLE
phungductung 0:8ede47d38d10 2170 #define __SPI4_CLK_DISABLE __HAL_RCC_SPI4_CLK_DISABLE
phungductung 0:8ede47d38d10 2171 #define __SPI4_FORCE_RESET __HAL_RCC_SPI4_FORCE_RESET
phungductung 0:8ede47d38d10 2172 #define __SPI4_RELEASE_RESET __HAL_RCC_SPI4_RELEASE_RESET
phungductung 0:8ede47d38d10 2173 #define __SPI4_CLK_SLEEP_ENABLE __HAL_RCC_SPI4_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2174 #define __SPI4_CLK_SLEEP_DISABLE __HAL_RCC_SPI4_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2175 #define __GPIOI_CLK_ENABLE __HAL_RCC_GPIOI_CLK_ENABLE
phungductung 0:8ede47d38d10 2176 #define __GPIOI_CLK_DISABLE __HAL_RCC_GPIOI_CLK_DISABLE
phungductung 0:8ede47d38d10 2177 #define __GPIOI_FORCE_RESET __HAL_RCC_GPIOI_FORCE_RESET
phungductung 0:8ede47d38d10 2178 #define __GPIOI_RELEASE_RESET __HAL_RCC_GPIOI_RELEASE_RESET
phungductung 0:8ede47d38d10 2179 #define __GPIOI_CLK_SLEEP_ENABLE __HAL_RCC_GPIOI_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2180 #define __GPIOI_CLK_SLEEP_DISABLE __HAL_RCC_GPIOI_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2181 #define __GPIOJ_CLK_ENABLE __HAL_RCC_GPIOJ_CLK_ENABLE
phungductung 0:8ede47d38d10 2182 #define __GPIOJ_CLK_DISABLE __HAL_RCC_GPIOJ_CLK_DISABLE
phungductung 0:8ede47d38d10 2183 #define __GPIOJ_FORCE_RESET __HAL_RCC_GPIOJ_FORCE_RESET
phungductung 0:8ede47d38d10 2184 #define __GPIOJ_RELEASE_RESET __HAL_RCC_GPIOJ_RELEASE_RESET
phungductung 0:8ede47d38d10 2185 #define __GPIOJ_CLK_SLEEP_ENABLE __HAL_RCC_GPIOJ_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2186 #define __GPIOJ_CLK_SLEEP_DISABLE __HAL_RCC_GPIOJ_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2187 #define __GPIOK_CLK_ENABLE __HAL_RCC_GPIOK_CLK_ENABLE
phungductung 0:8ede47d38d10 2188 #define __GPIOK_CLK_DISABLE __HAL_RCC_GPIOK_CLK_DISABLE
phungductung 0:8ede47d38d10 2189 #define __GPIOK_RELEASE_RESET __HAL_RCC_GPIOK_RELEASE_RESET
phungductung 0:8ede47d38d10 2190 #define __GPIOK_CLK_SLEEP_ENABLE __HAL_RCC_GPIOK_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2191 #define __GPIOK_CLK_SLEEP_DISABLE __HAL_RCC_GPIOK_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2192 #define __ETH_CLK_ENABLE __HAL_RCC_ETH_CLK_ENABLE
phungductung 0:8ede47d38d10 2193 #define __ETH_CLK_DISABLE __HAL_RCC_ETH_CLK_DISABLE
phungductung 0:8ede47d38d10 2194 #define __DCMI_CLK_ENABLE __HAL_RCC_DCMI_CLK_ENABLE
phungductung 0:8ede47d38d10 2195 #define __DCMI_CLK_DISABLE __HAL_RCC_DCMI_CLK_DISABLE
phungductung 0:8ede47d38d10 2196 #define __DCMI_FORCE_RESET __HAL_RCC_DCMI_FORCE_RESET
phungductung 0:8ede47d38d10 2197 #define __DCMI_RELEASE_RESET __HAL_RCC_DCMI_RELEASE_RESET
phungductung 0:8ede47d38d10 2198 #define __DCMI_CLK_SLEEP_ENABLE __HAL_RCC_DCMI_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2199 #define __DCMI_CLK_SLEEP_DISABLE __HAL_RCC_DCMI_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2200 #define __UART7_CLK_ENABLE __HAL_RCC_UART7_CLK_ENABLE
phungductung 0:8ede47d38d10 2201 #define __UART7_CLK_DISABLE __HAL_RCC_UART7_CLK_DISABLE
phungductung 0:8ede47d38d10 2202 #define __UART7_RELEASE_RESET __HAL_RCC_UART7_RELEASE_RESET
phungductung 0:8ede47d38d10 2203 #define __UART7_FORCE_RESET __HAL_RCC_UART7_FORCE_RESET
phungductung 0:8ede47d38d10 2204 #define __UART7_CLK_SLEEP_ENABLE __HAL_RCC_UART7_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2205 #define __UART7_CLK_SLEEP_DISABLE __HAL_RCC_UART7_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2206 #define __UART8_CLK_ENABLE __HAL_RCC_UART8_CLK_ENABLE
phungductung 0:8ede47d38d10 2207 #define __UART8_CLK_DISABLE __HAL_RCC_UART8_CLK_DISABLE
phungductung 0:8ede47d38d10 2208 #define __UART8_FORCE_RESET __HAL_RCC_UART8_FORCE_RESET
phungductung 0:8ede47d38d10 2209 #define __UART8_RELEASE_RESET __HAL_RCC_UART8_RELEASE_RESET
phungductung 0:8ede47d38d10 2210 #define __UART8_CLK_SLEEP_ENABLE __HAL_RCC_UART8_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2211 #define __UART8_CLK_SLEEP_DISABLE __HAL_RCC_UART8_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2212 #define __OTGHS_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2213 #define __OTGHS_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2214 #define __OTGHS_FORCE_RESET __HAL_RCC_USB_OTG_HS_FORCE_RESET
phungductung 0:8ede47d38d10 2215 #define __OTGHS_RELEASE_RESET __HAL_RCC_USB_OTG_HS_RELEASE_RESET
phungductung 0:8ede47d38d10 2216 #define __OTGHSULPI_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2217 #define __OTGHSULPI_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2218 #define __HAL_RCC_OTGHS_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2219 #define __HAL_RCC_OTGHS_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2220 #define __HAL_RCC_OTGHS_IS_CLK_SLEEP_ENABLED __HAL_RCC_USB_OTG_HS_IS_CLK_SLEEP_ENABLED
phungductung 0:8ede47d38d10 2221 #define __HAL_RCC_OTGHS_IS_CLK_SLEEP_DISABLED __HAL_RCC_USB_OTG_HS_IS_CLK_SLEEP_DISABLED
phungductung 0:8ede47d38d10 2222 #define __HAL_RCC_OTGHS_FORCE_RESET __HAL_RCC_USB_OTG_HS_FORCE_RESET
phungductung 0:8ede47d38d10 2223 #define __HAL_RCC_OTGHS_RELEASE_RESET __HAL_RCC_USB_OTG_HS_RELEASE_RESET
phungductung 0:8ede47d38d10 2224 #define __HAL_RCC_OTGHSULPI_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2225 #define __HAL_RCC_OTGHSULPI_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2226 #define __HAL_RCC_OTGHSULPI_IS_CLK_SLEEP_ENABLED __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_SLEEP_ENABLED
phungductung 0:8ede47d38d10 2227 #define __HAL_RCC_OTGHSULPI_IS_CLK_SLEEP_DISABLED __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_SLEEP_DISABLED
phungductung 0:8ede47d38d10 2228 #define __CRYP_FORCE_RESET __HAL_RCC_CRYP_FORCE_RESET
phungductung 0:8ede47d38d10 2229 #define __SRAM3_CLK_SLEEP_ENABLE __HAL_RCC_SRAM3_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2230 #define __CAN2_CLK_SLEEP_ENABLE __HAL_RCC_CAN2_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2231 #define __CAN2_CLK_SLEEP_DISABLE __HAL_RCC_CAN2_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2232 #define __DAC_CLK_SLEEP_ENABLE __HAL_RCC_DAC_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2233 #define __DAC_CLK_SLEEP_DISABLE __HAL_RCC_DAC_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2234 #define __ADC2_CLK_SLEEP_ENABLE __HAL_RCC_ADC2_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2235 #define __ADC2_CLK_SLEEP_DISABLE __HAL_RCC_ADC2_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2236 #define __ADC3_CLK_SLEEP_ENABLE __HAL_RCC_ADC3_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2237 #define __ADC3_CLK_SLEEP_DISABLE __HAL_RCC_ADC3_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2238 #define __FSMC_FORCE_RESET __HAL_RCC_FSMC_FORCE_RESET
phungductung 0:8ede47d38d10 2239 #define __FSMC_RELEASE_RESET __HAL_RCC_FSMC_RELEASE_RESET
phungductung 0:8ede47d38d10 2240 #define __FSMC_CLK_SLEEP_ENABLE __HAL_RCC_FSMC_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2241 #define __FSMC_CLK_SLEEP_DISABLE __HAL_RCC_FSMC_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2242 #define __SDIO_FORCE_RESET __HAL_RCC_SDIO_FORCE_RESET
phungductung 0:8ede47d38d10 2243 #define __SDIO_RELEASE_RESET __HAL_RCC_SDIO_RELEASE_RESET
phungductung 0:8ede47d38d10 2244 #define __SDIO_CLK_SLEEP_DISABLE __HAL_RCC_SDIO_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2245 #define __SDIO_CLK_SLEEP_ENABLE __HAL_RCC_SDIO_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2246 #define __DMA2D_CLK_ENABLE __HAL_RCC_DMA2D_CLK_ENABLE
phungductung 0:8ede47d38d10 2247 #define __DMA2D_CLK_DISABLE __HAL_RCC_DMA2D_CLK_DISABLE
phungductung 0:8ede47d38d10 2248 #define __DMA2D_FORCE_RESET __HAL_RCC_DMA2D_FORCE_RESET
phungductung 0:8ede47d38d10 2249 #define __DMA2D_RELEASE_RESET __HAL_RCC_DMA2D_RELEASE_RESET
phungductung 0:8ede47d38d10 2250 #define __DMA2D_CLK_SLEEP_ENABLE __HAL_RCC_DMA2D_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2251 #define __DMA2D_CLK_SLEEP_DISABLE __HAL_RCC_DMA2D_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2252
phungductung 0:8ede47d38d10 2253 /* alias define maintained for legacy */
phungductung 0:8ede47d38d10 2254 #define __HAL_RCC_OTGFS_FORCE_RESET __HAL_RCC_USB_OTG_FS_FORCE_RESET
phungductung 0:8ede47d38d10 2255 #define __HAL_RCC_OTGFS_RELEASE_RESET __HAL_RCC_USB_OTG_FS_RELEASE_RESET
phungductung 0:8ede47d38d10 2256
phungductung 0:8ede47d38d10 2257 #define __ADC12_CLK_ENABLE __HAL_RCC_ADC12_CLK_ENABLE
phungductung 0:8ede47d38d10 2258 #define __ADC12_CLK_DISABLE __HAL_RCC_ADC12_CLK_DISABLE
phungductung 0:8ede47d38d10 2259 #define __ADC34_CLK_ENABLE __HAL_RCC_ADC34_CLK_ENABLE
phungductung 0:8ede47d38d10 2260 #define __ADC34_CLK_DISABLE __HAL_RCC_ADC34_CLK_DISABLE
phungductung 0:8ede47d38d10 2261 #define __ADC12_CLK_ENABLE __HAL_RCC_ADC12_CLK_ENABLE
phungductung 0:8ede47d38d10 2262 #define __ADC12_CLK_DISABLE __HAL_RCC_ADC12_CLK_DISABLE
phungductung 0:8ede47d38d10 2263 #define __DAC2_CLK_ENABLE __HAL_RCC_DAC2_CLK_ENABLE
phungductung 0:8ede47d38d10 2264 #define __DAC2_CLK_DISABLE __HAL_RCC_DAC2_CLK_DISABLE
phungductung 0:8ede47d38d10 2265 #define __TIM18_CLK_ENABLE __HAL_RCC_TIM18_CLK_ENABLE
phungductung 0:8ede47d38d10 2266 #define __TIM18_CLK_DISABLE __HAL_RCC_TIM18_CLK_DISABLE
phungductung 0:8ede47d38d10 2267 #define __TIM19_CLK_ENABLE __HAL_RCC_TIM19_CLK_ENABLE
phungductung 0:8ede47d38d10 2268 #define __TIM19_CLK_DISABLE __HAL_RCC_TIM19_CLK_DISABLE
phungductung 0:8ede47d38d10 2269 #define __TIM20_CLK_ENABLE __HAL_RCC_TIM20_CLK_ENABLE
phungductung 0:8ede47d38d10 2270 #define __TIM20_CLK_DISABLE __HAL_RCC_TIM20_CLK_DISABLE
phungductung 0:8ede47d38d10 2271 #define __HRTIM1_CLK_ENABLE __HAL_RCC_HRTIM1_CLK_ENABLE
phungductung 0:8ede47d38d10 2272 #define __HRTIM1_CLK_DISABLE __HAL_RCC_HRTIM1_CLK_DISABLE
phungductung 0:8ede47d38d10 2273 #define __SDADC1_CLK_ENABLE __HAL_RCC_SDADC1_CLK_ENABLE
phungductung 0:8ede47d38d10 2274 #define __SDADC2_CLK_ENABLE __HAL_RCC_SDADC2_CLK_ENABLE
phungductung 0:8ede47d38d10 2275 #define __SDADC3_CLK_ENABLE __HAL_RCC_SDADC3_CLK_ENABLE
phungductung 0:8ede47d38d10 2276 #define __SDADC1_CLK_DISABLE __HAL_RCC_SDADC1_CLK_DISABLE
phungductung 0:8ede47d38d10 2277 #define __SDADC2_CLK_DISABLE __HAL_RCC_SDADC2_CLK_DISABLE
phungductung 0:8ede47d38d10 2278 #define __SDADC3_CLK_DISABLE __HAL_RCC_SDADC3_CLK_DISABLE
phungductung 0:8ede47d38d10 2279
phungductung 0:8ede47d38d10 2280 #define __ADC12_FORCE_RESET __HAL_RCC_ADC12_FORCE_RESET
phungductung 0:8ede47d38d10 2281 #define __ADC12_RELEASE_RESET __HAL_RCC_ADC12_RELEASE_RESET
phungductung 0:8ede47d38d10 2282 #define __ADC34_FORCE_RESET __HAL_RCC_ADC34_FORCE_RESET
phungductung 0:8ede47d38d10 2283 #define __ADC34_RELEASE_RESET __HAL_RCC_ADC34_RELEASE_RESET
phungductung 0:8ede47d38d10 2284 #define __ADC12_FORCE_RESET __HAL_RCC_ADC12_FORCE_RESET
phungductung 0:8ede47d38d10 2285 #define __ADC12_RELEASE_RESET __HAL_RCC_ADC12_RELEASE_RESET
phungductung 0:8ede47d38d10 2286 #define __DAC2_FORCE_RESET __HAL_RCC_DAC2_FORCE_RESET
phungductung 0:8ede47d38d10 2287 #define __DAC2_RELEASE_RESET __HAL_RCC_DAC2_RELEASE_RESET
phungductung 0:8ede47d38d10 2288 #define __TIM18_FORCE_RESET __HAL_RCC_TIM18_FORCE_RESET
phungductung 0:8ede47d38d10 2289 #define __TIM18_RELEASE_RESET __HAL_RCC_TIM18_RELEASE_RESET
phungductung 0:8ede47d38d10 2290 #define __TIM19_FORCE_RESET __HAL_RCC_TIM19_FORCE_RESET
phungductung 0:8ede47d38d10 2291 #define __TIM19_RELEASE_RESET __HAL_RCC_TIM19_RELEASE_RESET
phungductung 0:8ede47d38d10 2292 #define __TIM20_FORCE_RESET __HAL_RCC_TIM20_FORCE_RESET
phungductung 0:8ede47d38d10 2293 #define __TIM20_RELEASE_RESET __HAL_RCC_TIM20_RELEASE_RESET
phungductung 0:8ede47d38d10 2294 #define __HRTIM1_FORCE_RESET __HAL_RCC_HRTIM1_FORCE_RESET
phungductung 0:8ede47d38d10 2295 #define __HRTIM1_RELEASE_RESET __HAL_RCC_HRTIM1_RELEASE_RESET
phungductung 0:8ede47d38d10 2296 #define __SDADC1_FORCE_RESET __HAL_RCC_SDADC1_FORCE_RESET
phungductung 0:8ede47d38d10 2297 #define __SDADC2_FORCE_RESET __HAL_RCC_SDADC2_FORCE_RESET
phungductung 0:8ede47d38d10 2298 #define __SDADC3_FORCE_RESET __HAL_RCC_SDADC3_FORCE_RESET
phungductung 0:8ede47d38d10 2299 #define __SDADC1_RELEASE_RESET __HAL_RCC_SDADC1_RELEASE_RESET
phungductung 0:8ede47d38d10 2300 #define __SDADC2_RELEASE_RESET __HAL_RCC_SDADC2_RELEASE_RESET
phungductung 0:8ede47d38d10 2301 #define __SDADC3_RELEASE_RESET __HAL_RCC_SDADC3_RELEASE_RESET
phungductung 0:8ede47d38d10 2302
phungductung 0:8ede47d38d10 2303 #define __ADC1_IS_CLK_ENABLED __HAL_RCC_ADC1_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2304 #define __ADC1_IS_CLK_DISABLED __HAL_RCC_ADC1_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2305 #define __ADC12_IS_CLK_ENABLED __HAL_RCC_ADC12_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2306 #define __ADC12_IS_CLK_DISABLED __HAL_RCC_ADC12_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2307 #define __ADC34_IS_CLK_ENABLED __HAL_RCC_ADC34_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2308 #define __ADC34_IS_CLK_DISABLED __HAL_RCC_ADC34_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2309 #define __CEC_IS_CLK_ENABLED __HAL_RCC_CEC_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2310 #define __CEC_IS_CLK_DISABLED __HAL_RCC_CEC_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2311 #define __CRC_IS_CLK_ENABLED __HAL_RCC_CRC_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2312 #define __CRC_IS_CLK_DISABLED __HAL_RCC_CRC_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2313 #define __DAC1_IS_CLK_ENABLED __HAL_RCC_DAC1_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2314 #define __DAC1_IS_CLK_DISABLED __HAL_RCC_DAC1_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2315 #define __DAC2_IS_CLK_ENABLED __HAL_RCC_DAC2_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2316 #define __DAC2_IS_CLK_DISABLED __HAL_RCC_DAC2_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2317 #define __DMA1_IS_CLK_ENABLED __HAL_RCC_DMA1_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2318 #define __DMA1_IS_CLK_DISABLED __HAL_RCC_DMA1_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2319 #define __DMA2_IS_CLK_ENABLED __HAL_RCC_DMA2_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2320 #define __DMA2_IS_CLK_DISABLED __HAL_RCC_DMA2_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2321 #define __FLITF_IS_CLK_ENABLED __HAL_RCC_FLITF_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2322 #define __FLITF_IS_CLK_DISABLED __HAL_RCC_FLITF_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2323 #define __FMC_IS_CLK_ENABLED __HAL_RCC_FMC_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2324 #define __FMC_IS_CLK_DISABLED __HAL_RCC_FMC_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2325 #define __GPIOA_IS_CLK_ENABLED __HAL_RCC_GPIOA_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2326 #define __GPIOA_IS_CLK_DISABLED __HAL_RCC_GPIOA_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2327 #define __GPIOB_IS_CLK_ENABLED __HAL_RCC_GPIOB_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2328 #define __GPIOB_IS_CLK_DISABLED __HAL_RCC_GPIOB_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2329 #define __GPIOC_IS_CLK_ENABLED __HAL_RCC_GPIOC_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2330 #define __GPIOC_IS_CLK_DISABLED __HAL_RCC_GPIOC_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2331 #define __GPIOD_IS_CLK_ENABLED __HAL_RCC_GPIOD_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2332 #define __GPIOD_IS_CLK_DISABLED __HAL_RCC_GPIOD_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2333 #define __GPIOE_IS_CLK_ENABLED __HAL_RCC_GPIOE_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2334 #define __GPIOE_IS_CLK_DISABLED __HAL_RCC_GPIOE_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2335 #define __GPIOF_IS_CLK_ENABLED __HAL_RCC_GPIOF_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2336 #define __GPIOF_IS_CLK_DISABLED __HAL_RCC_GPIOF_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2337 #define __GPIOG_IS_CLK_ENABLED __HAL_RCC_GPIOG_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2338 #define __GPIOG_IS_CLK_DISABLED __HAL_RCC_GPIOG_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2339 #define __GPIOH_IS_CLK_ENABLED __HAL_RCC_GPIOH_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2340 #define __GPIOH_IS_CLK_DISABLED __HAL_RCC_GPIOH_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2341 #define __HRTIM1_IS_CLK_ENABLED __HAL_RCC_HRTIM1_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2342 #define __HRTIM1_IS_CLK_DISABLED __HAL_RCC_HRTIM1_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2343 #define __I2C1_IS_CLK_ENABLED __HAL_RCC_I2C1_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2344 #define __I2C1_IS_CLK_DISABLED __HAL_RCC_I2C1_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2345 #define __I2C2_IS_CLK_ENABLED __HAL_RCC_I2C2_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2346 #define __I2C2_IS_CLK_DISABLED __HAL_RCC_I2C2_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2347 #define __I2C3_IS_CLK_ENABLED __HAL_RCC_I2C3_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2348 #define __I2C3_IS_CLK_DISABLED __HAL_RCC_I2C3_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2349 #define __PWR_IS_CLK_ENABLED __HAL_RCC_PWR_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2350 #define __PWR_IS_CLK_DISABLED __HAL_RCC_PWR_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2351 #define __SYSCFG_IS_CLK_ENABLED __HAL_RCC_SYSCFG_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2352 #define __SYSCFG_IS_CLK_DISABLED __HAL_RCC_SYSCFG_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2353 #define __SPI1_IS_CLK_ENABLED __HAL_RCC_SPI1_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2354 #define __SPI1_IS_CLK_DISABLED __HAL_RCC_SPI1_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2355 #define __SPI2_IS_CLK_ENABLED __HAL_RCC_SPI2_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2356 #define __SPI2_IS_CLK_DISABLED __HAL_RCC_SPI2_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2357 #define __SPI3_IS_CLK_ENABLED __HAL_RCC_SPI3_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2358 #define __SPI3_IS_CLK_DISABLED __HAL_RCC_SPI3_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2359 #define __SPI4_IS_CLK_ENABLED __HAL_RCC_SPI4_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2360 #define __SPI4_IS_CLK_DISABLED __HAL_RCC_SPI4_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2361 #define __SDADC1_IS_CLK_ENABLED __HAL_RCC_SDADC1_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2362 #define __SDADC1_IS_CLK_DISABLED __HAL_RCC_SDADC1_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2363 #define __SDADC2_IS_CLK_ENABLED __HAL_RCC_SDADC2_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2364 #define __SDADC2_IS_CLK_DISABLED __HAL_RCC_SDADC2_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2365 #define __SDADC3_IS_CLK_ENABLED __HAL_RCC_SDADC3_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2366 #define __SDADC3_IS_CLK_DISABLED __HAL_RCC_SDADC3_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2367 #define __SRAM_IS_CLK_ENABLED __HAL_RCC_SRAM_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2368 #define __SRAM_IS_CLK_DISABLED __HAL_RCC_SRAM_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2369 #define __TIM1_IS_CLK_ENABLED __HAL_RCC_TIM1_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2370 #define __TIM1_IS_CLK_DISABLED __HAL_RCC_TIM1_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2371 #define __TIM2_IS_CLK_ENABLED __HAL_RCC_TIM2_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2372 #define __TIM2_IS_CLK_DISABLED __HAL_RCC_TIM2_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2373 #define __TIM3_IS_CLK_ENABLED __HAL_RCC_TIM3_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2374 #define __TIM3_IS_CLK_DISABLED __HAL_RCC_TIM3_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2375 #define __TIM4_IS_CLK_ENABLED __HAL_RCC_TIM4_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2376 #define __TIM4_IS_CLK_DISABLED __HAL_RCC_TIM4_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2377 #define __TIM5_IS_CLK_ENABLED __HAL_RCC_TIM5_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2378 #define __TIM5_IS_CLK_DISABLED __HAL_RCC_TIM5_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2379 #define __TIM6_IS_CLK_ENABLED __HAL_RCC_TIM6_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2380 #define __TIM6_IS_CLK_DISABLED __HAL_RCC_TIM6_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2381 #define __TIM7_IS_CLK_ENABLED __HAL_RCC_TIM7_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2382 #define __TIM7_IS_CLK_DISABLED __HAL_RCC_TIM7_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2383 #define __TIM8_IS_CLK_ENABLED __HAL_RCC_TIM8_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2384 #define __TIM8_IS_CLK_DISABLED __HAL_RCC_TIM8_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2385 #define __TIM12_IS_CLK_ENABLED __HAL_RCC_TIM12_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2386 #define __TIM12_IS_CLK_DISABLED __HAL_RCC_TIM12_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2387 #define __TIM13_IS_CLK_ENABLED __HAL_RCC_TIM13_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2388 #define __TIM13_IS_CLK_DISABLED __HAL_RCC_TIM13_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2389 #define __TIM14_IS_CLK_ENABLED __HAL_RCC_TIM14_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2390 #define __TIM14_IS_CLK_DISABLED __HAL_RCC_TIM14_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2391 #define __TIM15_IS_CLK_ENABLED __HAL_RCC_TIM15_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2392 #define __TIM15_IS_CLK_DISABLED __HAL_RCC_TIM15_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2393 #define __TIM16_IS_CLK_ENABLED __HAL_RCC_TIM16_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2394 #define __TIM16_IS_CLK_DISABLED __HAL_RCC_TIM16_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2395 #define __TIM17_IS_CLK_ENABLED __HAL_RCC_TIM17_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2396 #define __TIM17_IS_CLK_DISABLED __HAL_RCC_TIM17_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2397 #define __TIM18_IS_CLK_ENABLED __HAL_RCC_TIM18_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2398 #define __TIM18_IS_CLK_DISABLED __HAL_RCC_TIM18_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2399 #define __TIM19_IS_CLK_ENABLED __HAL_RCC_TIM19_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2400 #define __TIM19_IS_CLK_DISABLED __HAL_RCC_TIM19_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2401 #define __TIM20_IS_CLK_ENABLED __HAL_RCC_TIM20_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2402 #define __TIM20_IS_CLK_DISABLED __HAL_RCC_TIM20_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2403 #define __TSC_IS_CLK_ENABLED __HAL_RCC_TSC_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2404 #define __TSC_IS_CLK_DISABLED __HAL_RCC_TSC_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2405 #define __UART4_IS_CLK_ENABLED __HAL_RCC_UART4_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2406 #define __UART4_IS_CLK_DISABLED __HAL_RCC_UART4_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2407 #define __UART5_IS_CLK_ENABLED __HAL_RCC_UART5_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2408 #define __UART5_IS_CLK_DISABLED __HAL_RCC_UART5_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2409 #define __USART1_IS_CLK_ENABLED __HAL_RCC_USART1_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2410 #define __USART1_IS_CLK_DISABLED __HAL_RCC_USART1_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2411 #define __USART2_IS_CLK_ENABLED __HAL_RCC_USART2_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2412 #define __USART2_IS_CLK_DISABLED __HAL_RCC_USART2_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2413 #define __USART3_IS_CLK_ENABLED __HAL_RCC_USART3_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2414 #define __USART3_IS_CLK_DISABLED __HAL_RCC_USART3_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2415 #define __USB_IS_CLK_ENABLED __HAL_RCC_USB_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2416 #define __USB_IS_CLK_DISABLED __HAL_RCC_USB_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2417 #define __WWDG_IS_CLK_ENABLED __HAL_RCC_WWDG_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2418 #define __WWDG_IS_CLK_DISABLED __HAL_RCC_WWDG_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2419
phungductung 0:8ede47d38d10 2420 #if defined(STM32F4)
phungductung 0:8ede47d38d10 2421 #define __HAL_RCC_SDMMC1_FORCE_RESET __HAL_RCC_SDIO_FORCE_RESET
phungductung 0:8ede47d38d10 2422 #define __HAL_RCC_SDMMC1_RELEASE_RESET __HAL_RCC_SDIO_RELEASE_RESET
phungductung 0:8ede47d38d10 2423 #define __HAL_RCC_SDMMC1_CLK_SLEEP_ENABLE __HAL_RCC_SDIO_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2424 #define __HAL_RCC_SDMMC1_CLK_SLEEP_DISABLE __HAL_RCC_SDIO_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2425 #define __HAL_RCC_SDMMC1_CLK_ENABLE __HAL_RCC_SDIO_CLK_ENABLE
phungductung 0:8ede47d38d10 2426 #define __HAL_RCC_SDMMC1_CLK_DISABLE __HAL_RCC_SDIO_CLK_DISABLE
phungductung 0:8ede47d38d10 2427 #define __HAL_RCC_SDMMC1_IS_CLK_ENABLED __HAL_RCC_SDIO_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2428 #define __HAL_RCC_SDMMC1_IS_CLK_DISABLED __HAL_RCC_SDIO_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2429 #define Sdmmc1ClockSelection SdioClockSelection
phungductung 0:8ede47d38d10 2430 #define RCC_PERIPHCLK_SDMMC1 RCC_PERIPHCLK_SDIO
phungductung 0:8ede47d38d10 2431 #define RCC_SDMMC1CLKSOURCE_CLK48 RCC_SDIOCLKSOURCE_CK48
phungductung 0:8ede47d38d10 2432 #define RCC_SDMMC1CLKSOURCE_SYSCLK RCC_SDIOCLKSOURCE_SYSCLK
phungductung 0:8ede47d38d10 2433 #define __HAL_RCC_SDMMC1_CONFIG __HAL_RCC_SDIO_CONFIG
phungductung 0:8ede47d38d10 2434 #define __HAL_RCC_GET_SDMMC1_SOURCE __HAL_RCC_GET_SDIO_SOURCE
phungductung 0:8ede47d38d10 2435 #endif
phungductung 0:8ede47d38d10 2436
phungductung 0:8ede47d38d10 2437 #if defined(STM32F7) || defined(STM32L4)
phungductung 0:8ede47d38d10 2438 #define __HAL_RCC_SDIO_FORCE_RESET __HAL_RCC_SDMMC1_FORCE_RESET
phungductung 0:8ede47d38d10 2439 #define __HAL_RCC_SDIO_RELEASE_RESET __HAL_RCC_SDMMC1_RELEASE_RESET
phungductung 0:8ede47d38d10 2440 #define __HAL_RCC_SDIO_CLK_SLEEP_ENABLE __HAL_RCC_SDMMC1_CLK_SLEEP_ENABLE
phungductung 0:8ede47d38d10 2441 #define __HAL_RCC_SDIO_CLK_SLEEP_DISABLE __HAL_RCC_SDMMC1_CLK_SLEEP_DISABLE
phungductung 0:8ede47d38d10 2442 #define __HAL_RCC_SDIO_CLK_ENABLE __HAL_RCC_SDMMC1_CLK_ENABLE
phungductung 0:8ede47d38d10 2443 #define __HAL_RCC_SDIO_CLK_DISABLE __HAL_RCC_SDMMC1_CLK_DISABLE
phungductung 0:8ede47d38d10 2444 #define __HAL_RCC_SDIO_IS_CLK_ENABLED __HAL_RCC_SDMMC1_IS_CLK_ENABLED
phungductung 0:8ede47d38d10 2445 #define __HAL_RCC_SDIO_IS_CLK_DISABLED __HAL_RCC_SDMMC1_IS_CLK_DISABLED
phungductung 0:8ede47d38d10 2446 #define SdioClockSelection Sdmmc1ClockSelection
phungductung 0:8ede47d38d10 2447 #define RCC_PERIPHCLK_SDIO RCC_PERIPHCLK_SDMMC1
phungductung 0:8ede47d38d10 2448 #define __HAL_RCC_SDIO_CONFIG __HAL_RCC_SDMMC1_CONFIG
phungductung 0:8ede47d38d10 2449 #define __HAL_RCC_GET_SDIO_SOURCE __HAL_RCC_GET_SDMMC1_SOURCE
phungductung 0:8ede47d38d10 2450 #endif
phungductung 0:8ede47d38d10 2451
phungductung 0:8ede47d38d10 2452 #if defined(STM32F7)
phungductung 0:8ede47d38d10 2453 #define RCC_SDIOCLKSOURCE_CK48 RCC_SDMMC1CLKSOURCE_CLK48
phungductung 0:8ede47d38d10 2454 #define RCC_SDIOCLKSOURCE_SYSCLK RCC_SDMMC1CLKSOURCE_SYSCLK
phungductung 0:8ede47d38d10 2455 #endif
phungductung 0:8ede47d38d10 2456
phungductung 0:8ede47d38d10 2457 #define __HAL_RCC_I2SCLK __HAL_RCC_I2S_CONFIG
phungductung 0:8ede47d38d10 2458 #define __HAL_RCC_I2SCLK_CONFIG __HAL_RCC_I2S_CONFIG
phungductung 0:8ede47d38d10 2459
phungductung 0:8ede47d38d10 2460 #define __RCC_PLLSRC RCC_GET_PLL_OSCSOURCE
phungductung 0:8ede47d38d10 2461
phungductung 0:8ede47d38d10 2462 #define IS_RCC_MSIRANGE IS_RCC_MSI_CLOCK_RANGE
phungductung 0:8ede47d38d10 2463 #define IS_RCC_RTCCLK_SOURCE IS_RCC_RTCCLKSOURCE
phungductung 0:8ede47d38d10 2464 #define IS_RCC_SYSCLK_DIV IS_RCC_HCLK
phungductung 0:8ede47d38d10 2465 #define IS_RCC_HCLK_DIV IS_RCC_PCLK
phungductung 0:8ede47d38d10 2466 #define IS_RCC_PERIPHCLK IS_RCC_PERIPHCLOCK
phungductung 0:8ede47d38d10 2467
phungductung 0:8ede47d38d10 2468 #define RCC_IT_HSI14 RCC_IT_HSI14RDY
phungductung 0:8ede47d38d10 2469
phungductung 0:8ede47d38d10 2470 #if defined(STM32L0)
phungductung 0:8ede47d38d10 2471 #define RCC_IT_LSECSS RCC_IT_CSSLSE
phungductung 0:8ede47d38d10 2472 #define RCC_IT_CSS RCC_IT_CSSHSE
phungductung 0:8ede47d38d10 2473 #endif
phungductung 0:8ede47d38d10 2474
phungductung 0:8ede47d38d10 2475 #define IS_RCC_MCOSOURCE IS_RCC_MCO1SOURCE
phungductung 0:8ede47d38d10 2476 #define __HAL_RCC_MCO_CONFIG __HAL_RCC_MCO1_CONFIG
phungductung 0:8ede47d38d10 2477 #define RCC_MCO_NODIV RCC_MCODIV_1
phungductung 0:8ede47d38d10 2478 #define RCC_MCO_DIV1 RCC_MCODIV_1
phungductung 0:8ede47d38d10 2479 #define RCC_MCO_DIV2 RCC_MCODIV_2
phungductung 0:8ede47d38d10 2480 #define RCC_MCO_DIV4 RCC_MCODIV_4
phungductung 0:8ede47d38d10 2481 #define RCC_MCO_DIV8 RCC_MCODIV_8
phungductung 0:8ede47d38d10 2482 #define RCC_MCO_DIV16 RCC_MCODIV_16
phungductung 0:8ede47d38d10 2483 #define RCC_MCO_DIV32 RCC_MCODIV_32
phungductung 0:8ede47d38d10 2484 #define RCC_MCO_DIV64 RCC_MCODIV_64
phungductung 0:8ede47d38d10 2485 #define RCC_MCO_DIV128 RCC_MCODIV_128
phungductung 0:8ede47d38d10 2486 #define RCC_MCOSOURCE_NONE RCC_MCO1SOURCE_NOCLOCK
phungductung 0:8ede47d38d10 2487 #define RCC_MCOSOURCE_LSI RCC_MCO1SOURCE_LSI
phungductung 0:8ede47d38d10 2488 #define RCC_MCOSOURCE_LSE RCC_MCO1SOURCE_LSE
phungductung 0:8ede47d38d10 2489 #define RCC_MCOSOURCE_SYSCLK RCC_MCO1SOURCE_SYSCLK
phungductung 0:8ede47d38d10 2490 #define RCC_MCOSOURCE_HSI RCC_MCO1SOURCE_HSI
phungductung 0:8ede47d38d10 2491 #define RCC_MCOSOURCE_HSI14 RCC_MCO1SOURCE_HSI14
phungductung 0:8ede47d38d10 2492 #define RCC_MCOSOURCE_HSI48 RCC_MCO1SOURCE_HSI48
phungductung 0:8ede47d38d10 2493 #define RCC_MCOSOURCE_HSE RCC_MCO1SOURCE_HSE
phungductung 0:8ede47d38d10 2494 #define RCC_MCOSOURCE_PLLCLK_DIV1 RCC_MCO1SOURCE_PLLCLK
phungductung 0:8ede47d38d10 2495 #define RCC_MCOSOURCE_PLLCLK_NODIV RCC_MCO1SOURCE_PLLCLK
phungductung 0:8ede47d38d10 2496 #define RCC_MCOSOURCE_PLLCLK_DIV2 RCC_MCO1SOURCE_PLLCLK_DIV2
phungductung 0:8ede47d38d10 2497
phungductung 0:8ede47d38d10 2498 #define RCC_RTCCLKSOURCE_NONE RCC_RTCCLKSOURCE_NO_CLK
phungductung 0:8ede47d38d10 2499
phungductung 0:8ede47d38d10 2500 #define RCC_USBCLK_PLLSAI1 RCC_USBCLKSOURCE_PLLSAI1
phungductung 0:8ede47d38d10 2501 #define RCC_USBCLK_PLL RCC_USBCLKSOURCE_PLL
phungductung 0:8ede47d38d10 2502 #define RCC_USBCLK_MSI RCC_USBCLKSOURCE_MSI
phungductung 0:8ede47d38d10 2503 #define RCC_USBCLKSOURCE_PLLCLK RCC_USBCLKSOURCE_PLL
phungductung 0:8ede47d38d10 2504 #define RCC_USBPLLCLK_DIV1 RCC_USBCLKSOURCE_PLL
phungductung 0:8ede47d38d10 2505 #define RCC_USBPLLCLK_DIV1_5 RCC_USBCLKSOURCE_PLL_DIV1_5
phungductung 0:8ede47d38d10 2506 #define RCC_USBPLLCLK_DIV2 RCC_USBCLKSOURCE_PLL_DIV2
phungductung 0:8ede47d38d10 2507 #define RCC_USBPLLCLK_DIV3 RCC_USBCLKSOURCE_PLL_DIV3
phungductung 0:8ede47d38d10 2508
phungductung 0:8ede47d38d10 2509 #define HSION_BitNumber RCC_HSION_BIT_NUMBER
phungductung 0:8ede47d38d10 2510 #define HSION_BITNUMBER RCC_HSION_BIT_NUMBER
phungductung 0:8ede47d38d10 2511 #define HSEON_BitNumber RCC_HSEON_BIT_NUMBER
phungductung 0:8ede47d38d10 2512 #define HSEON_BITNUMBER RCC_HSEON_BIT_NUMBER
phungductung 0:8ede47d38d10 2513 #define MSION_BITNUMBER RCC_MSION_BIT_NUMBER
phungductung 0:8ede47d38d10 2514 #define CSSON_BitNumber RCC_CSSON_BIT_NUMBER
phungductung 0:8ede47d38d10 2515 #define CSSON_BITNUMBER RCC_CSSON_BIT_NUMBER
phungductung 0:8ede47d38d10 2516 #define PLLON_BitNumber RCC_PLLON_BIT_NUMBER
phungductung 0:8ede47d38d10 2517 #define PLLON_BITNUMBER RCC_PLLON_BIT_NUMBER
phungductung 0:8ede47d38d10 2518 #define PLLI2SON_BitNumber RCC_PLLI2SON_BIT_NUMBER
phungductung 0:8ede47d38d10 2519 #define I2SSRC_BitNumber RCC_I2SSRC_BIT_NUMBER
phungductung 0:8ede47d38d10 2520 #define RTCEN_BitNumber RCC_RTCEN_BIT_NUMBER
phungductung 0:8ede47d38d10 2521 #define RTCEN_BITNUMBER RCC_RTCEN_BIT_NUMBER
phungductung 0:8ede47d38d10 2522 #define BDRST_BitNumber RCC_BDRST_BIT_NUMBER
phungductung 0:8ede47d38d10 2523 #define BDRST_BITNUMBER RCC_BDRST_BIT_NUMBER
phungductung 0:8ede47d38d10 2524 #define RTCRST_BITNUMBER RCC_RTCRST_BIT_NUMBER
phungductung 0:8ede47d38d10 2525 #define LSION_BitNumber RCC_LSION_BIT_NUMBER
phungductung 0:8ede47d38d10 2526 #define LSION_BITNUMBER RCC_LSION_BIT_NUMBER
phungductung 0:8ede47d38d10 2527 #define LSEON_BitNumber RCC_LSEON_BIT_NUMBER
phungductung 0:8ede47d38d10 2528 #define LSEON_BITNUMBER RCC_LSEON_BIT_NUMBER
phungductung 0:8ede47d38d10 2529 #define LSEBYP_BITNUMBER RCC_LSEBYP_BIT_NUMBER
phungductung 0:8ede47d38d10 2530 #define PLLSAION_BitNumber RCC_PLLSAION_BIT_NUMBER
phungductung 0:8ede47d38d10 2531 #define TIMPRE_BitNumber RCC_TIMPRE_BIT_NUMBER
phungductung 0:8ede47d38d10 2532 #define RMVF_BitNumber RCC_RMVF_BIT_NUMBER
phungductung 0:8ede47d38d10 2533 #define RMVF_BITNUMBER RCC_RMVF_BIT_NUMBER
phungductung 0:8ede47d38d10 2534 #define RCC_CR2_HSI14TRIM_BitNumber RCC_HSI14TRIM_BIT_NUMBER
phungductung 0:8ede47d38d10 2535 #define CR_BYTE2_ADDRESS RCC_CR_BYTE2_ADDRESS
phungductung 0:8ede47d38d10 2536 #define CIR_BYTE1_ADDRESS RCC_CIR_BYTE1_ADDRESS
phungductung 0:8ede47d38d10 2537 #define CIR_BYTE2_ADDRESS RCC_CIR_BYTE2_ADDRESS
phungductung 0:8ede47d38d10 2538 #define BDCR_BYTE0_ADDRESS RCC_BDCR_BYTE0_ADDRESS
phungductung 0:8ede47d38d10 2539 #define DBP_TIMEOUT_VALUE RCC_DBP_TIMEOUT_VALUE
phungductung 0:8ede47d38d10 2540 #define LSE_TIMEOUT_VALUE RCC_LSE_TIMEOUT_VALUE
phungductung 0:8ede47d38d10 2541
phungductung 0:8ede47d38d10 2542 #define CR_HSION_BB RCC_CR_HSION_BB
phungductung 0:8ede47d38d10 2543 #define CR_CSSON_BB RCC_CR_CSSON_BB
phungductung 0:8ede47d38d10 2544 #define CR_PLLON_BB RCC_CR_PLLON_BB
phungductung 0:8ede47d38d10 2545 #define CR_PLLI2SON_BB RCC_CR_PLLI2SON_BB
phungductung 0:8ede47d38d10 2546 #define CR_MSION_BB RCC_CR_MSION_BB
phungductung 0:8ede47d38d10 2547 #define CSR_LSION_BB RCC_CSR_LSION_BB
phungductung 0:8ede47d38d10 2548 #define CSR_LSEON_BB RCC_CSR_LSEON_BB
phungductung 0:8ede47d38d10 2549 #define CSR_LSEBYP_BB RCC_CSR_LSEBYP_BB
phungductung 0:8ede47d38d10 2550 #define CSR_RTCEN_BB RCC_CSR_RTCEN_BB
phungductung 0:8ede47d38d10 2551 #define CSR_RTCRST_BB RCC_CSR_RTCRST_BB
phungductung 0:8ede47d38d10 2552 #define CFGR_I2SSRC_BB RCC_CFGR_I2SSRC_BB
phungductung 0:8ede47d38d10 2553 #define BDCR_RTCEN_BB RCC_BDCR_RTCEN_BB
phungductung 0:8ede47d38d10 2554 #define BDCR_BDRST_BB RCC_BDCR_BDRST_BB
phungductung 0:8ede47d38d10 2555 #define CR_HSEON_BB RCC_CR_HSEON_BB
phungductung 0:8ede47d38d10 2556 #define CSR_RMVF_BB RCC_CSR_RMVF_BB
phungductung 0:8ede47d38d10 2557 #define CR_PLLSAION_BB RCC_CR_PLLSAION_BB
phungductung 0:8ede47d38d10 2558 #define DCKCFGR_TIMPRE_BB RCC_DCKCFGR_TIMPRE_BB
phungductung 0:8ede47d38d10 2559
phungductung 0:8ede47d38d10 2560 #define __HAL_RCC_CRS_ENABLE_FREQ_ERROR_COUNTER __HAL_RCC_CRS_FREQ_ERROR_COUNTER_ENABLE
phungductung 0:8ede47d38d10 2561 #define __HAL_RCC_CRS_DISABLE_FREQ_ERROR_COUNTER __HAL_RCC_CRS_FREQ_ERROR_COUNTER_DISABLE
phungductung 0:8ede47d38d10 2562 #define __HAL_RCC_CRS_ENABLE_AUTOMATIC_CALIB __HAL_RCC_CRS_AUTOMATIC_CALIB_ENABLE
phungductung 0:8ede47d38d10 2563 #define __HAL_RCC_CRS_DISABLE_AUTOMATIC_CALIB __HAL_RCC_CRS_AUTOMATIC_CALIB_DISABLE
phungductung 0:8ede47d38d10 2564 #define __HAL_RCC_CRS_CALCULATE_RELOADVALUE __HAL_RCC_CRS_RELOADVALUE_CALCULATE
phungductung 0:8ede47d38d10 2565
phungductung 0:8ede47d38d10 2566 #define __HAL_RCC_GET_IT_SOURCE __HAL_RCC_GET_IT
phungductung 0:8ede47d38d10 2567 /**
phungductung 0:8ede47d38d10 2568 * @}
phungductung 0:8ede47d38d10 2569 */
phungductung 0:8ede47d38d10 2570
phungductung 0:8ede47d38d10 2571 /** @defgroup HAL_RNG_Aliased_Macros HAL RNG Aliased Macros maintained for legacy purpose
phungductung 0:8ede47d38d10 2572 * @{
phungductung 0:8ede47d38d10 2573 */
phungductung 0:8ede47d38d10 2574 #define HAL_RNG_ReadyCallback(__HANDLE__) HAL_RNG_ReadyDataCallback((__HANDLE__), uint32_t random32bit)
phungductung 0:8ede47d38d10 2575
phungductung 0:8ede47d38d10 2576 /**
phungductung 0:8ede47d38d10 2577 * @}
phungductung 0:8ede47d38d10 2578 */
phungductung 0:8ede47d38d10 2579
phungductung 0:8ede47d38d10 2580 /** @defgroup HAL_RTC_Aliased_Macros HAL RTC Aliased Macros maintained for legacy purpose
phungductung 0:8ede47d38d10 2581 * @{
phungductung 0:8ede47d38d10 2582 */
phungductung 0:8ede47d38d10 2583
phungductung 0:8ede47d38d10 2584 #define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG
phungductung 0:8ede47d38d10 2585 #define __HAL_RTC_DISABLE_IT __HAL_RTC_EXTI_DISABLE_IT
phungductung 0:8ede47d38d10 2586 #define __HAL_RTC_ENABLE_IT __HAL_RTC_EXTI_ENABLE_IT
phungductung 0:8ede47d38d10 2587
phungductung 0:8ede47d38d10 2588 #if defined (STM32F1)
phungductung 0:8ede47d38d10 2589 #define __HAL_RTC_EXTI_CLEAR_FLAG(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_CLEAR_FLAG()
phungductung 0:8ede47d38d10 2590
phungductung 0:8ede47d38d10 2591 #define __HAL_RTC_EXTI_ENABLE_IT(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_ENABLE_IT()
phungductung 0:8ede47d38d10 2592
phungductung 0:8ede47d38d10 2593 #define __HAL_RTC_EXTI_DISABLE_IT(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_DISABLE_IT()
phungductung 0:8ede47d38d10 2594
phungductung 0:8ede47d38d10 2595 #define __HAL_RTC_EXTI_GET_FLAG(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_GET_FLAG()
phungductung 0:8ede47d38d10 2596
phungductung 0:8ede47d38d10 2597 #define __HAL_RTC_EXTI_GENERATE_SWIT(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_GENERATE_SWIT()
phungductung 0:8ede47d38d10 2598 #else
phungductung 0:8ede47d38d10 2599 #define __HAL_RTC_EXTI_CLEAR_FLAG(__EXTI_LINE__) (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_CLEAR_FLAG() : \
phungductung 0:8ede47d38d10 2600 (((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG() : \
phungductung 0:8ede47d38d10 2601 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_CLEAR_FLAG()))
phungductung 0:8ede47d38d10 2602 #define __HAL_RTC_EXTI_ENABLE_IT(__EXTI_LINE__) (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_ENABLE_IT() : \
phungductung 0:8ede47d38d10 2603 (((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_IT() : \
phungductung 0:8ede47d38d10 2604 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT()))
phungductung 0:8ede47d38d10 2605 #define __HAL_RTC_EXTI_DISABLE_IT(__EXTI_LINE__) (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_DISABLE_IT() : \
phungductung 0:8ede47d38d10 2606 (((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_IT() : \
phungductung 0:8ede47d38d10 2607 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_IT()))
phungductung 0:8ede47d38d10 2608 #define __HAL_RTC_EXTI_GET_FLAG(__EXTI_LINE__) (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_GET_FLAG() : \
phungductung 0:8ede47d38d10 2609 (((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_GET_FLAG() : \
phungductung 0:8ede47d38d10 2610 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GET_FLAG()))
phungductung 0:8ede47d38d10 2611 #define __HAL_RTC_EXTI_GENERATE_SWIT(__EXTI_LINE__) (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_GENERATE_SWIT() : \
phungductung 0:8ede47d38d10 2612 (((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_GENERATE_SWIT() : \
phungductung 0:8ede47d38d10 2613 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GENERATE_SWIT()))
phungductung 0:8ede47d38d10 2614 #endif /* STM32F1 */
phungductung 0:8ede47d38d10 2615
phungductung 0:8ede47d38d10 2616 #define IS_ALARM IS_RTC_ALARM
phungductung 0:8ede47d38d10 2617 #define IS_ALARM_MASK IS_RTC_ALARM_MASK
phungductung 0:8ede47d38d10 2618 #define IS_TAMPER IS_RTC_TAMPER
phungductung 0:8ede47d38d10 2619 #define IS_TAMPER_ERASE_MODE IS_RTC_TAMPER_ERASE_MODE
phungductung 0:8ede47d38d10 2620 #define IS_TAMPER_FILTER IS_RTC_TAMPER_FILTER
phungductung 0:8ede47d38d10 2621 #define IS_TAMPER_INTERRUPT IS_RTC_TAMPER_INTERRUPT
phungductung 0:8ede47d38d10 2622 #define IS_TAMPER_MASKFLAG_STATE IS_RTC_TAMPER_MASKFLAG_STATE
phungductung 0:8ede47d38d10 2623 #define IS_TAMPER_PRECHARGE_DURATION IS_RTC_TAMPER_PRECHARGE_DURATION
phungductung 0:8ede47d38d10 2624 #define IS_TAMPER_PULLUP_STATE IS_RTC_TAMPER_PULLUP_STATE
phungductung 0:8ede47d38d10 2625 #define IS_TAMPER_SAMPLING_FREQ IS_RTC_TAMPER_SAMPLING_FREQ
phungductung 0:8ede47d38d10 2626 #define IS_TAMPER_TIMESTAMPONTAMPER_DETECTION IS_RTC_TAMPER_TIMESTAMPONTAMPER_DETECTION
phungductung 0:8ede47d38d10 2627 #define IS_TAMPER_TRIGGER IS_RTC_TAMPER_TRIGGER
phungductung 0:8ede47d38d10 2628 #define IS_WAKEUP_CLOCK IS_RTC_WAKEUP_CLOCK
phungductung 0:8ede47d38d10 2629 #define IS_WAKEUP_COUNTER IS_RTC_WAKEUP_COUNTER
phungductung 0:8ede47d38d10 2630
phungductung 0:8ede47d38d10 2631 #define __RTC_WRITEPROTECTION_ENABLE __HAL_RTC_WRITEPROTECTION_ENABLE
phungductung 0:8ede47d38d10 2632 #define __RTC_WRITEPROTECTION_DISABLE __HAL_RTC_WRITEPROTECTION_DISABLE
phungductung 0:8ede47d38d10 2633
phungductung 0:8ede47d38d10 2634 /**
phungductung 0:8ede47d38d10 2635 * @}
phungductung 0:8ede47d38d10 2636 */
phungductung 0:8ede47d38d10 2637
phungductung 0:8ede47d38d10 2638 /** @defgroup HAL_SD_Aliased_Macros HAL SD Aliased Macros maintained for legacy purpose
phungductung 0:8ede47d38d10 2639 * @{
phungductung 0:8ede47d38d10 2640 */
phungductung 0:8ede47d38d10 2641
phungductung 0:8ede47d38d10 2642 #define SD_OCR_CID_CSD_OVERWRIETE SD_OCR_CID_CSD_OVERWRITE
phungductung 0:8ede47d38d10 2643 #define SD_CMD_SD_APP_STAUS SD_CMD_SD_APP_STATUS
phungductung 0:8ede47d38d10 2644
phungductung 0:8ede47d38d10 2645 #if defined(STM32F4)
phungductung 0:8ede47d38d10 2646 #define SD_SDMMC_DISABLED SD_SDIO_DISABLED
phungductung 0:8ede47d38d10 2647 #define SD_SDMMC_FUNCTION_BUSY SD_SDIO_FUNCTION_BUSY
phungductung 0:8ede47d38d10 2648 #define SD_SDMMC_FUNCTION_FAILED SD_SDIO_FUNCTION_FAILED
phungductung 0:8ede47d38d10 2649 #define SD_SDMMC_UNKNOWN_FUNCTION SD_SDIO_UNKNOWN_FUNCTION
phungductung 0:8ede47d38d10 2650 #define SD_CMD_SDMMC_SEN_OP_COND SD_CMD_SDIO_SEN_OP_COND
phungductung 0:8ede47d38d10 2651 #define SD_CMD_SDMMC_RW_DIRECT SD_CMD_SDIO_RW_DIRECT
phungductung 0:8ede47d38d10 2652 #define SD_CMD_SDMMC_RW_EXTENDED SD_CMD_SDIO_RW_EXTENDED
phungductung 0:8ede47d38d10 2653 #define __HAL_SD_SDMMC_ENABLE __HAL_SD_SDIO_ENABLE
phungductung 0:8ede47d38d10 2654 #define __HAL_SD_SDMMC_DISABLE __HAL_SD_SDIO_DISABLE
phungductung 0:8ede47d38d10 2655 #define __HAL_SD_SDMMC_DMA_ENABLE __HAL_SD_SDIO_DMA_ENABLE
phungductung 0:8ede47d38d10 2656 #define __HAL_SD_SDMMC_DMA_DISABLE __HAL_SD_SDIO_DMA_DISABL
phungductung 0:8ede47d38d10 2657 #define __HAL_SD_SDMMC_ENABLE_IT __HAL_SD_SDIO_ENABLE_IT
phungductung 0:8ede47d38d10 2658 #define __HAL_SD_SDMMC_DISABLE_IT __HAL_SD_SDIO_DISABLE_IT
phungductung 0:8ede47d38d10 2659 #define __HAL_SD_SDMMC_GET_FLAG __HAL_SD_SDIO_GET_FLAG
phungductung 0:8ede47d38d10 2660 #define __HAL_SD_SDMMC_CLEAR_FLAG __HAL_SD_SDIO_CLEAR_FLAG
phungductung 0:8ede47d38d10 2661 #define __HAL_SD_SDMMC_GET_IT __HAL_SD_SDIO_GET_IT
phungductung 0:8ede47d38d10 2662 #define __HAL_SD_SDMMC_CLEAR_IT __HAL_SD_SDIO_CLEAR_IT
phungductung 0:8ede47d38d10 2663 #define SDMMC_STATIC_FLAGS SDIO_STATIC_FLAGS
phungductung 0:8ede47d38d10 2664 #define SDMMC_CMD0TIMEOUT SDIO_CMD0TIMEOUT
phungductung 0:8ede47d38d10 2665 #define SD_SDMMC_SEND_IF_COND SD_SDIO_SEND_IF_COND
phungductung 0:8ede47d38d10 2666 /* alias CMSIS */
phungductung 0:8ede47d38d10 2667 #define SDMMC1_IRQn SDIO_IRQn
phungductung 0:8ede47d38d10 2668 #define SDMMC1_IRQHandler SDIO_IRQHandler
phungductung 0:8ede47d38d10 2669 #endif
phungductung 0:8ede47d38d10 2670
phungductung 0:8ede47d38d10 2671 #if defined(STM32F7) || defined(STM32L4)
phungductung 0:8ede47d38d10 2672 #define SD_SDIO_DISABLED SD_SDMMC_DISABLED
phungductung 0:8ede47d38d10 2673 #define SD_SDIO_FUNCTION_BUSY SD_SDMMC_FUNCTION_BUSY
phungductung 0:8ede47d38d10 2674 #define SD_SDIO_FUNCTION_FAILED SD_SDMMC_FUNCTION_FAILED
phungductung 0:8ede47d38d10 2675 #define SD_SDIO_UNKNOWN_FUNCTION SD_SDMMC_UNKNOWN_FUNCTION
phungductung 0:8ede47d38d10 2676 #define SD_CMD_SDIO_SEN_OP_COND SD_CMD_SDMMC_SEN_OP_COND
phungductung 0:8ede47d38d10 2677 #define SD_CMD_SDIO_RW_DIRECT SD_CMD_SDMMC_RW_DIRECT
phungductung 0:8ede47d38d10 2678 #define SD_CMD_SDIO_RW_EXTENDED SD_CMD_SDMMC_RW_EXTENDED
phungductung 0:8ede47d38d10 2679 #define __HAL_SD_SDIO_ENABLE __HAL_SD_SDMMC_ENABLE
phungductung 0:8ede47d38d10 2680 #define __HAL_SD_SDIO_DISABLE __HAL_SD_SDMMC_DISABLE
phungductung 0:8ede47d38d10 2681 #define __HAL_SD_SDIO_DMA_ENABLE __HAL_SD_SDMMC_DMA_ENABLE
phungductung 0:8ede47d38d10 2682 #define __HAL_SD_SDIO_DMA_DISABL __HAL_SD_SDMMC_DMA_DISABLE
phungductung 0:8ede47d38d10 2683 #define __HAL_SD_SDIO_ENABLE_IT __HAL_SD_SDMMC_ENABLE_IT
phungductung 0:8ede47d38d10 2684 #define __HAL_SD_SDIO_DISABLE_IT __HAL_SD_SDMMC_DISABLE_IT
phungductung 0:8ede47d38d10 2685 #define __HAL_SD_SDIO_GET_FLAG __HAL_SD_SDMMC_GET_FLAG
phungductung 0:8ede47d38d10 2686 #define __HAL_SD_SDIO_CLEAR_FLAG __HAL_SD_SDMMC_CLEAR_FLAG
phungductung 0:8ede47d38d10 2687 #define __HAL_SD_SDIO_GET_IT __HAL_SD_SDMMC_GET_IT
phungductung 0:8ede47d38d10 2688 #define __HAL_SD_SDIO_CLEAR_IT __HAL_SD_SDMMC_CLEAR_IT
phungductung 0:8ede47d38d10 2689 #define SDIO_STATIC_FLAGS SDMMC_STATIC_FLAGS
phungductung 0:8ede47d38d10 2690 #define SDIO_CMD0TIMEOUT SDMMC_CMD0TIMEOUT
phungductung 0:8ede47d38d10 2691 #define SD_SDIO_SEND_IF_COND SD_SDMMC_SEND_IF_COND
phungductung 0:8ede47d38d10 2692 /* alias CMSIS for compatibilities */
phungductung 0:8ede47d38d10 2693 #define SDIO_IRQn SDMMC1_IRQn
phungductung 0:8ede47d38d10 2694 #define SDIO_IRQHandler SDMMC1_IRQHandler
phungductung 0:8ede47d38d10 2695 #endif
phungductung 0:8ede47d38d10 2696 /**
phungductung 0:8ede47d38d10 2697 * @}
phungductung 0:8ede47d38d10 2698 */
phungductung 0:8ede47d38d10 2699
phungductung 0:8ede47d38d10 2700 /** @defgroup HAL_SMARTCARD_Aliased_Macros HAL SMARTCARD Aliased Macros maintained for legacy purpose
phungductung 0:8ede47d38d10 2701 * @{
phungductung 0:8ede47d38d10 2702 */
phungductung 0:8ede47d38d10 2703
phungductung 0:8ede47d38d10 2704 #define __SMARTCARD_ENABLE_IT __HAL_SMARTCARD_ENABLE_IT
phungductung 0:8ede47d38d10 2705 #define __SMARTCARD_DISABLE_IT __HAL_SMARTCARD_DISABLE_IT
phungductung 0:8ede47d38d10 2706 #define __SMARTCARD_ENABLE __HAL_SMARTCARD_ENABLE
phungductung 0:8ede47d38d10 2707 #define __SMARTCARD_DISABLE __HAL_SMARTCARD_DISABLE
phungductung 0:8ede47d38d10 2708 #define __SMARTCARD_DMA_REQUEST_ENABLE __HAL_SMARTCARD_DMA_REQUEST_ENABLE
phungductung 0:8ede47d38d10 2709 #define __SMARTCARD_DMA_REQUEST_DISABLE __HAL_SMARTCARD_DMA_REQUEST_DISABLE
phungductung 0:8ede47d38d10 2710
phungductung 0:8ede47d38d10 2711 #define __HAL_SMARTCARD_GETCLOCKSOURCE SMARTCARD_GETCLOCKSOURCE
phungductung 0:8ede47d38d10 2712 #define __SMARTCARD_GETCLOCKSOURCE SMARTCARD_GETCLOCKSOURCE
phungductung 0:8ede47d38d10 2713
phungductung 0:8ede47d38d10 2714 #define IS_SMARTCARD_ONEBIT_SAMPLING IS_SMARTCARD_ONE_BIT_SAMPLE
phungductung 0:8ede47d38d10 2715
phungductung 0:8ede47d38d10 2716 /**
phungductung 0:8ede47d38d10 2717 * @}
phungductung 0:8ede47d38d10 2718 */
phungductung 0:8ede47d38d10 2719
phungductung 0:8ede47d38d10 2720 /** @defgroup HAL_SMBUS_Aliased_Macros HAL SMBUS Aliased Macros maintained for legacy purpose
phungductung 0:8ede47d38d10 2721 * @{
phungductung 0:8ede47d38d10 2722 */
phungductung 0:8ede47d38d10 2723 #define __HAL_SMBUS_RESET_CR1 SMBUS_RESET_CR1
phungductung 0:8ede47d38d10 2724 #define __HAL_SMBUS_RESET_CR2 SMBUS_RESET_CR2
phungductung 0:8ede47d38d10 2725 #define __HAL_SMBUS_GENERATE_START SMBUS_GENERATE_START
phungductung 0:8ede47d38d10 2726 #define __HAL_SMBUS_GET_ADDR_MATCH SMBUS_GET_ADDR_MATCH
phungductung 0:8ede47d38d10 2727 #define __HAL_SMBUS_GET_DIR SMBUS_GET_DIR
phungductung 0:8ede47d38d10 2728 #define __HAL_SMBUS_GET_STOP_MODE SMBUS_GET_STOP_MODE
phungductung 0:8ede47d38d10 2729 #define __HAL_SMBUS_GET_PEC_MODE SMBUS_GET_PEC_MODE
phungductung 0:8ede47d38d10 2730 #define __HAL_SMBUS_GET_ALERT_ENABLED SMBUS_GET_ALERT_ENABLED
phungductung 0:8ede47d38d10 2731 /**
phungductung 0:8ede47d38d10 2732 * @}
phungductung 0:8ede47d38d10 2733 */
phungductung 0:8ede47d38d10 2734
phungductung 0:8ede47d38d10 2735 /** @defgroup HAL_SPI_Aliased_Macros HAL SPI Aliased Macros maintained for legacy purpose
phungductung 0:8ede47d38d10 2736 * @{
phungductung 0:8ede47d38d10 2737 */
phungductung 0:8ede47d38d10 2738
phungductung 0:8ede47d38d10 2739 #define __HAL_SPI_1LINE_TX SPI_1LINE_TX
phungductung 0:8ede47d38d10 2740 #define __HAL_SPI_1LINE_RX SPI_1LINE_RX
phungductung 0:8ede47d38d10 2741 #define __HAL_SPI_RESET_CRC SPI_RESET_CRC
phungductung 0:8ede47d38d10 2742
phungductung 0:8ede47d38d10 2743 /**
phungductung 0:8ede47d38d10 2744 * @}
phungductung 0:8ede47d38d10 2745 */
phungductung 0:8ede47d38d10 2746
phungductung 0:8ede47d38d10 2747 /** @defgroup HAL_UART_Aliased_Macros HAL UART Aliased Macros maintained for legacy purpose
phungductung 0:8ede47d38d10 2748 * @{
phungductung 0:8ede47d38d10 2749 */
phungductung 0:8ede47d38d10 2750
phungductung 0:8ede47d38d10 2751 #define __HAL_UART_GETCLOCKSOURCE UART_GETCLOCKSOURCE
phungductung 0:8ede47d38d10 2752 #define __HAL_UART_MASK_COMPUTATION UART_MASK_COMPUTATION
phungductung 0:8ede47d38d10 2753 #define __UART_GETCLOCKSOURCE UART_GETCLOCKSOURCE
phungductung 0:8ede47d38d10 2754 #define __UART_MASK_COMPUTATION UART_MASK_COMPUTATION
phungductung 0:8ede47d38d10 2755
phungductung 0:8ede47d38d10 2756 #define IS_UART_WAKEUPMETHODE IS_UART_WAKEUPMETHOD
phungductung 0:8ede47d38d10 2757
phungductung 0:8ede47d38d10 2758 #define IS_UART_ONEBIT_SAMPLE IS_UART_ONE_BIT_SAMPLE
phungductung 0:8ede47d38d10 2759 #define IS_UART_ONEBIT_SAMPLING IS_UART_ONE_BIT_SAMPLE
phungductung 0:8ede47d38d10 2760
phungductung 0:8ede47d38d10 2761 /**
phungductung 0:8ede47d38d10 2762 * @}
phungductung 0:8ede47d38d10 2763 */
phungductung 0:8ede47d38d10 2764
phungductung 0:8ede47d38d10 2765
phungductung 0:8ede47d38d10 2766 /** @defgroup HAL_USART_Aliased_Macros HAL USART Aliased Macros maintained for legacy purpose
phungductung 0:8ede47d38d10 2767 * @{
phungductung 0:8ede47d38d10 2768 */
phungductung 0:8ede47d38d10 2769
phungductung 0:8ede47d38d10 2770 #define __USART_ENABLE_IT __HAL_USART_ENABLE_IT
phungductung 0:8ede47d38d10 2771 #define __USART_DISABLE_IT __HAL_USART_DISABLE_IT
phungductung 0:8ede47d38d10 2772 #define __USART_ENABLE __HAL_USART_ENABLE
phungductung 0:8ede47d38d10 2773 #define __USART_DISABLE __HAL_USART_DISABLE
phungductung 0:8ede47d38d10 2774
phungductung 0:8ede47d38d10 2775 #define __HAL_USART_GETCLOCKSOURCE USART_GETCLOCKSOURCE
phungductung 0:8ede47d38d10 2776 #define __USART_GETCLOCKSOURCE USART_GETCLOCKSOURCE
phungductung 0:8ede47d38d10 2777
phungductung 0:8ede47d38d10 2778 /**
phungductung 0:8ede47d38d10 2779 * @}
phungductung 0:8ede47d38d10 2780 */
phungductung 0:8ede47d38d10 2781
phungductung 0:8ede47d38d10 2782 /** @defgroup HAL_USB_Aliased_Macros HAL USB Aliased Macros maintained for legacy purpose
phungductung 0:8ede47d38d10 2783 * @{
phungductung 0:8ede47d38d10 2784 */
phungductung 0:8ede47d38d10 2785 #define USB_EXTI_LINE_WAKEUP USB_WAKEUP_EXTI_LINE
phungductung 0:8ede47d38d10 2786
phungductung 0:8ede47d38d10 2787 #define USB_FS_EXTI_TRIGGER_RISING_EDGE USB_OTG_FS_WAKEUP_EXTI_RISING_EDGE
phungductung 0:8ede47d38d10 2788 #define USB_FS_EXTI_TRIGGER_FALLING_EDGE USB_OTG_FS_WAKEUP_EXTI_FALLING_EDGE
phungductung 0:8ede47d38d10 2789 #define USB_FS_EXTI_TRIGGER_BOTH_EDGE USB_OTG_FS_WAKEUP_EXTI_RISING_FALLING_EDGE
phungductung 0:8ede47d38d10 2790 #define USB_FS_EXTI_LINE_WAKEUP USB_OTG_FS_WAKEUP_EXTI_LINE
phungductung 0:8ede47d38d10 2791
phungductung 0:8ede47d38d10 2792 #define USB_HS_EXTI_TRIGGER_RISING_EDGE USB_OTG_HS_WAKEUP_EXTI_RISING_EDGE
phungductung 0:8ede47d38d10 2793 #define USB_HS_EXTI_TRIGGER_FALLING_EDGE USB_OTG_HS_WAKEUP_EXTI_FALLING_EDGE
phungductung 0:8ede47d38d10 2794 #define USB_HS_EXTI_TRIGGER_BOTH_EDGE USB_OTG_HS_WAKEUP_EXTI_RISING_FALLING_EDGE
phungductung 0:8ede47d38d10 2795 #define USB_HS_EXTI_LINE_WAKEUP USB_OTG_HS_WAKEUP_EXTI_LINE
phungductung 0:8ede47d38d10 2796
phungductung 0:8ede47d38d10 2797 #define __HAL_USB_EXTI_ENABLE_IT __HAL_USB_WAKEUP_EXTI_ENABLE_IT
phungductung 0:8ede47d38d10 2798 #define __HAL_USB_EXTI_DISABLE_IT __HAL_USB_WAKEUP_EXTI_DISABLE_IT
phungductung 0:8ede47d38d10 2799 #define __HAL_USB_EXTI_GET_FLAG __HAL_USB_WAKEUP_EXTI_GET_FLAG
phungductung 0:8ede47d38d10 2800 #define __HAL_USB_EXTI_CLEAR_FLAG __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG
phungductung 0:8ede47d38d10 2801 #define __HAL_USB_EXTI_SET_RISING_EDGE_TRIGGER __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE
phungductung 0:8ede47d38d10 2802 #define __HAL_USB_EXTI_SET_FALLING_EDGE_TRIGGER __HAL_USB_WAKEUP_EXTI_ENABLE_FALLING_EDGE
phungductung 0:8ede47d38d10 2803 #define __HAL_USB_EXTI_SET_FALLINGRISING_TRIGGER __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE
phungductung 0:8ede47d38d10 2804
phungductung 0:8ede47d38d10 2805 #define __HAL_USB_FS_EXTI_ENABLE_IT __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT
phungductung 0:8ede47d38d10 2806 #define __HAL_USB_FS_EXTI_DISABLE_IT __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT
phungductung 0:8ede47d38d10 2807 #define __HAL_USB_FS_EXTI_GET_FLAG __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG
phungductung 0:8ede47d38d10 2808 #define __HAL_USB_FS_EXTI_CLEAR_FLAG __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG
phungductung 0:8ede47d38d10 2809 #define __HAL_USB_FS_EXTI_SET_RISING_EGDE_TRIGGER __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE
phungductung 0:8ede47d38d10 2810 #define __HAL_USB_FS_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_FALLING_EDGE
phungductung 0:8ede47d38d10 2811 #define __HAL_USB_FS_EXTI_SET_FALLINGRISING_TRIGGER __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE
phungductung 0:8ede47d38d10 2812 #define __HAL_USB_FS_EXTI_GENERATE_SWIT __HAL_USB_OTG_FS_WAKEUP_EXTI_GENERATE_SWIT
phungductung 0:8ede47d38d10 2813
phungductung 0:8ede47d38d10 2814 #define __HAL_USB_HS_EXTI_ENABLE_IT __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_IT
phungductung 0:8ede47d38d10 2815 #define __HAL_USB_HS_EXTI_DISABLE_IT __HAL_USB_OTG_HS_WAKEUP_EXTI_DISABLE_IT
phungductung 0:8ede47d38d10 2816 #define __HAL_USB_HS_EXTI_GET_FLAG __HAL_USB_OTG_HS_WAKEUP_EXTI_GET_FLAG
phungductung 0:8ede47d38d10 2817 #define __HAL_USB_HS_EXTI_CLEAR_FLAG __HAL_USB_OTG_HS_WAKEUP_EXTI_CLEAR_FLAG
phungductung 0:8ede47d38d10 2818 #define __HAL_USB_HS_EXTI_SET_RISING_EGDE_TRIGGER __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_RISING_EDGE
phungductung 0:8ede47d38d10 2819 #define __HAL_USB_HS_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_FALLING_EDGE
phungductung 0:8ede47d38d10 2820 #define __HAL_USB_HS_EXTI_SET_FALLINGRISING_TRIGGER __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE
phungductung 0:8ede47d38d10 2821 #define __HAL_USB_HS_EXTI_GENERATE_SWIT __HAL_USB_OTG_HS_WAKEUP_EXTI_GENERATE_SWIT
phungductung 0:8ede47d38d10 2822
phungductung 0:8ede47d38d10 2823 #define HAL_PCD_ActiveRemoteWakeup HAL_PCD_ActivateRemoteWakeup
phungductung 0:8ede47d38d10 2824 #define HAL_PCD_DeActiveRemoteWakeup HAL_PCD_DeActivateRemoteWakeup
phungductung 0:8ede47d38d10 2825
phungductung 0:8ede47d38d10 2826 #define HAL_PCD_SetTxFiFo HAL_PCDEx_SetTxFiFo
phungductung 0:8ede47d38d10 2827 #define HAL_PCD_SetRxFiFo HAL_PCDEx_SetRxFiFo
phungductung 0:8ede47d38d10 2828 /**
phungductung 0:8ede47d38d10 2829 * @}
phungductung 0:8ede47d38d10 2830 */
phungductung 0:8ede47d38d10 2831
phungductung 0:8ede47d38d10 2832 /** @defgroup HAL_TIM_Aliased_Macros HAL TIM Aliased Macros maintained for legacy purpose
phungductung 0:8ede47d38d10 2833 * @{
phungductung 0:8ede47d38d10 2834 */
phungductung 0:8ede47d38d10 2835 #define __HAL_TIM_SetICPrescalerValue TIM_SET_ICPRESCALERVALUE
phungductung 0:8ede47d38d10 2836 #define __HAL_TIM_ResetICPrescalerValue TIM_RESET_ICPRESCALERVALUE
phungductung 0:8ede47d38d10 2837
phungductung 0:8ede47d38d10 2838 #define TIM_GET_ITSTATUS __HAL_TIM_GET_IT_SOURCE
phungductung 0:8ede47d38d10 2839 #define TIM_GET_CLEAR_IT __HAL_TIM_CLEAR_IT
phungductung 0:8ede47d38d10 2840
phungductung 0:8ede47d38d10 2841 #define __HAL_TIM_GET_ITSTATUS __HAL_TIM_GET_IT_SOURCE
phungductung 0:8ede47d38d10 2842
phungductung 0:8ede47d38d10 2843 #define __HAL_TIM_DIRECTION_STATUS __HAL_TIM_IS_TIM_COUNTING_DOWN
phungductung 0:8ede47d38d10 2844 #define __HAL_TIM_PRESCALER __HAL_TIM_SET_PRESCALER
phungductung 0:8ede47d38d10 2845 #define __HAL_TIM_SetCounter __HAL_TIM_SET_COUNTER
phungductung 0:8ede47d38d10 2846 #define __HAL_TIM_GetCounter __HAL_TIM_GET_COUNTER
phungductung 0:8ede47d38d10 2847 #define __HAL_TIM_SetAutoreload __HAL_TIM_SET_AUTORELOAD
phungductung 0:8ede47d38d10 2848 #define __HAL_TIM_GetAutoreload __HAL_TIM_GET_AUTORELOAD
phungductung 0:8ede47d38d10 2849 #define __HAL_TIM_SetClockDivision __HAL_TIM_SET_CLOCKDIVISION
phungductung 0:8ede47d38d10 2850 #define __HAL_TIM_GetClockDivision __HAL_TIM_GET_CLOCKDIVISION
phungductung 0:8ede47d38d10 2851 #define __HAL_TIM_SetICPrescaler __HAL_TIM_SET_ICPRESCALER
phungductung 0:8ede47d38d10 2852 #define __HAL_TIM_GetICPrescaler __HAL_TIM_GET_ICPRESCALER
phungductung 0:8ede47d38d10 2853 #define __HAL_TIM_SetCompare __HAL_TIM_SET_COMPARE
phungductung 0:8ede47d38d10 2854 #define __HAL_TIM_GetCompare __HAL_TIM_GET_COMPARE
phungductung 0:8ede47d38d10 2855
phungductung 0:8ede47d38d10 2856 #define TIM_TS_ITR0 ((uint32_t)0x0000)
phungductung 0:8ede47d38d10 2857 #define TIM_TS_ITR1 ((uint32_t)0x0010)
phungductung 0:8ede47d38d10 2858 #define TIM_TS_ITR2 ((uint32_t)0x0020)
phungductung 0:8ede47d38d10 2859 #define TIM_TS_ITR3 ((uint32_t)0x0030)
phungductung 0:8ede47d38d10 2860 #define IS_TIM_INTERNAL_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \
phungductung 0:8ede47d38d10 2861 ((SELECTION) == TIM_TS_ITR1) || \
phungductung 0:8ede47d38d10 2862 ((SELECTION) == TIM_TS_ITR2) || \
phungductung 0:8ede47d38d10 2863 ((SELECTION) == TIM_TS_ITR3))
phungductung 0:8ede47d38d10 2864
phungductung 0:8ede47d38d10 2865 #define TIM_CHANNEL_1 ((uint32_t)0x0000)
phungductung 0:8ede47d38d10 2866 #define TIM_CHANNEL_2 ((uint32_t)0x0004)
phungductung 0:8ede47d38d10 2867 #define IS_TIM_PWMI_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) || \
phungductung 0:8ede47d38d10 2868 ((CHANNEL) == TIM_CHANNEL_2))
phungductung 0:8ede47d38d10 2869
phungductung 0:8ede47d38d10 2870 #define TIM_OUTPUTNSTATE_DISABLE ((uint32_t)0x0000)
phungductung 0:8ede47d38d10 2871 #define TIM_OUTPUTNSTATE_ENABLE (TIM_CCER_CC1NE)
phungductung 0:8ede47d38d10 2872
phungductung 0:8ede47d38d10 2873 #define IS_TIM_OUTPUTN_STATE(STATE) (((STATE) == TIM_OUTPUTNSTATE_DISABLE) || \
phungductung 0:8ede47d38d10 2874 ((STATE) == TIM_OUTPUTNSTATE_ENABLE))
phungductung 0:8ede47d38d10 2875
phungductung 0:8ede47d38d10 2876 #define TIM_OUTPUTSTATE_DISABLE ((uint32_t)0x0000)
phungductung 0:8ede47d38d10 2877 #define TIM_OUTPUTSTATE_ENABLE (TIM_CCER_CC1E)
phungductung 0:8ede47d38d10 2878
phungductung 0:8ede47d38d10 2879 #define IS_TIM_OUTPUT_STATE(STATE) (((STATE) == TIM_OUTPUTSTATE_DISABLE) || \
phungductung 0:8ede47d38d10 2880 ((STATE) == TIM_OUTPUTSTATE_ENABLE))
phungductung 0:8ede47d38d10 2881 /**
phungductung 0:8ede47d38d10 2882 * @}
phungductung 0:8ede47d38d10 2883 */
phungductung 0:8ede47d38d10 2884
phungductung 0:8ede47d38d10 2885 /** @defgroup HAL_ETH_Aliased_Macros HAL ETH Aliased Macros maintained for legacy purpose
phungductung 0:8ede47d38d10 2886 * @{
phungductung 0:8ede47d38d10 2887 */
phungductung 0:8ede47d38d10 2888
phungductung 0:8ede47d38d10 2889 #define __HAL_ETH_EXTI_ENABLE_IT __HAL_ETH_WAKEUP_EXTI_ENABLE_IT
phungductung 0:8ede47d38d10 2890 #define __HAL_ETH_EXTI_DISABLE_IT __HAL_ETH_WAKEUP_EXTI_DISABLE_IT
phungductung 0:8ede47d38d10 2891 #define __HAL_ETH_EXTI_GET_FLAG __HAL_ETH_WAKEUP_EXTI_GET_FLAG
phungductung 0:8ede47d38d10 2892 #define __HAL_ETH_EXTI_CLEAR_FLAG __HAL_ETH_WAKEUP_EXTI_CLEAR_FLAG
phungductung 0:8ede47d38d10 2893 #define __HAL_ETH_EXTI_SET_RISING_EGDE_TRIGGER __HAL_ETH_WAKEUP_EXTI_ENABLE_RISING_EDGE_TRIGGER
phungductung 0:8ede47d38d10 2894 #define __HAL_ETH_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_ETH_WAKEUP_EXTI_ENABLE_FALLING_EDGE_TRIGGER
phungductung 0:8ede47d38d10 2895 #define __HAL_ETH_EXTI_SET_FALLINGRISING_TRIGGER __HAL_ETH_WAKEUP_EXTI_ENABLE_FALLINGRISING_TRIGGER
phungductung 0:8ede47d38d10 2896
phungductung 0:8ede47d38d10 2897 #define ETH_PROMISCIOUSMODE_ENABLE ETH_PROMISCUOUS_MODE_ENABLE
phungductung 0:8ede47d38d10 2898 #define ETH_PROMISCIOUSMODE_DISABLE ETH_PROMISCUOUS_MODE_DISABLE
phungductung 0:8ede47d38d10 2899 #define IS_ETH_PROMISCIOUS_MODE IS_ETH_PROMISCUOUS_MODE
phungductung 0:8ede47d38d10 2900 /**
phungductung 0:8ede47d38d10 2901 * @}
phungductung 0:8ede47d38d10 2902 */
phungductung 0:8ede47d38d10 2903
phungductung 0:8ede47d38d10 2904 /** @defgroup HAL_LTDC_Aliased_Macros HAL LTDC Aliased Macros maintained for legacy purpose
phungductung 0:8ede47d38d10 2905 * @{
phungductung 0:8ede47d38d10 2906 */
phungductung 0:8ede47d38d10 2907 #define __HAL_LTDC_LAYER LTDC_LAYER
phungductung 0:8ede47d38d10 2908 /**
phungductung 0:8ede47d38d10 2909 * @}
phungductung 0:8ede47d38d10 2910 */
phungductung 0:8ede47d38d10 2911
phungductung 0:8ede47d38d10 2912 /** @defgroup HAL_SAI_Aliased_Macros HAL SAI Aliased Macros maintained for legacy purpose
phungductung 0:8ede47d38d10 2913 * @{
phungductung 0:8ede47d38d10 2914 */
phungductung 0:8ede47d38d10 2915 #define SAI_OUTPUTDRIVE_DISABLED SAI_OUTPUTDRIVE_DISABLE
phungductung 0:8ede47d38d10 2916 #define SAI_OUTPUTDRIVE_ENABLED SAI_OUTPUTDRIVE_ENABLE
phungductung 0:8ede47d38d10 2917 #define SAI_MASTERDIVIDER_ENABLED SAI_MASTERDIVIDER_ENABLE
phungductung 0:8ede47d38d10 2918 #define SAI_MASTERDIVIDER_DISABLED SAI_MASTERDIVIDER_DISABLE
phungductung 0:8ede47d38d10 2919 #define SAI_STREOMODE SAI_STEREOMODE
phungductung 0:8ede47d38d10 2920 #define SAI_FIFOStatus_Empty SAI_FIFOSTATUS_EMPTY
phungductung 0:8ede47d38d10 2921 #define SAI_FIFOStatus_Less1QuarterFull SAI_FIFOSTATUS_LESS1QUARTERFULL
phungductung 0:8ede47d38d10 2922 #define SAI_FIFOStatus_1QuarterFull SAI_FIFOSTATUS_1QUARTERFULL
phungductung 0:8ede47d38d10 2923 #define SAI_FIFOStatus_HalfFull SAI_FIFOSTATUS_HALFFULL
phungductung 0:8ede47d38d10 2924 #define SAI_FIFOStatus_3QuartersFull SAI_FIFOSTATUS_3QUARTERFULL
phungductung 0:8ede47d38d10 2925 #define SAI_FIFOStatus_Full SAI_FIFOSTATUS_FULL
phungductung 0:8ede47d38d10 2926 #define IS_SAI_BLOCK_MONO_STREO_MODE IS_SAI_BLOCK_MONO_STEREO_MODE
phungductung 0:8ede47d38d10 2927
phungductung 0:8ede47d38d10 2928 /**
phungductung 0:8ede47d38d10 2929 * @}
phungductung 0:8ede47d38d10 2930 */
phungductung 0:8ede47d38d10 2931
phungductung 0:8ede47d38d10 2932
phungductung 0:8ede47d38d10 2933 /** @defgroup HAL_PPP_Aliased_Macros HAL PPP Aliased Macros maintained for legacy purpose
phungductung 0:8ede47d38d10 2934 * @{
phungductung 0:8ede47d38d10 2935 */
phungductung 0:8ede47d38d10 2936
phungductung 0:8ede47d38d10 2937 /**
phungductung 0:8ede47d38d10 2938 * @}
phungductung 0:8ede47d38d10 2939 */
phungductung 0:8ede47d38d10 2940
phungductung 0:8ede47d38d10 2941 #ifdef __cplusplus
phungductung 0:8ede47d38d10 2942 }
phungductung 0:8ede47d38d10 2943 #endif
phungductung 0:8ede47d38d10 2944
phungductung 0:8ede47d38d10 2945 #endif /* ___STM32_HAL_LEGACY */
phungductung 0:8ede47d38d10 2946
phungductung 0:8ede47d38d10 2947 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
phungductung 0:8ede47d38d10 2948