phs fan
/
PHSShield_f405bridge
Hack the PHS Shield, serial bridge
Fork of PHSShield_F405hack by
phs_f405.cpp@1:9cb4854ab263, 2015-07-01 (annotated)
- Committer:
- phsfan
- Date:
- Wed Jul 01 00:45:54 2015 +0000
- Revision:
- 1:9cb4854ab263
test build
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
phsfan | 1:9cb4854ab263 | 1 | #include "phs_f405.h" |
phsfan | 1:9cb4854ab263 | 2 | #include "stm32f4xx_hal.h" |
phsfan | 1:9cb4854ab263 | 3 | #include <cstdarg> |
phsfan | 1:9cb4854ab263 | 4 | |
phsfan | 1:9cb4854ab263 | 5 | |
phsfan | 1:9cb4854ab263 | 6 | void PhsReset::write (int value) { |
phsfan | 1:9cb4854ab263 | 7 | __GPIOB_CLK_ENABLE(); |
phsfan | 1:9cb4854ab263 | 8 | if (value) { |
phsfan | 1:9cb4854ab263 | 9 | GPIOB->MODER &= ~(3<<22); // PB_11 input |
phsfan | 1:9cb4854ab263 | 10 | GPIOB->PUPDR = (GPIOB->PUPDR & ~(3<<22)) | (1<<22); // pullup |
phsfan | 1:9cb4854ab263 | 11 | GPIOB->OTYPER &= ~(1<<11); // push pull |
phsfan | 1:9cb4854ab263 | 12 | GPIOB->BSRRL = (1<<11); // reser=1 |
phsfan | 1:9cb4854ab263 | 13 | } else { |
phsfan | 1:9cb4854ab263 | 14 | GPIOB->MODER = (GPIOB->MODER & ~(3<<22)) | (1<<22); // PB_11 output |
phsfan | 1:9cb4854ab263 | 15 | GPIOB->PUPDR &= ~(3<<22); // pull none |
phsfan | 1:9cb4854ab263 | 16 | GPIOB->OTYPER |= (1<<11); // open drain |
phsfan | 1:9cb4854ab263 | 17 | GPIOB->BSRRH = (1<<11); // reser=0 |
phsfan | 1:9cb4854ab263 | 18 | } |
phsfan | 1:9cb4854ab263 | 19 | } |
phsfan | 1:9cb4854ab263 | 20 | |
phsfan | 1:9cb4854ab263 | 21 | int PhsReset::read () { |
phsfan | 1:9cb4854ab263 | 22 | int status; |
phsfan | 1:9cb4854ab263 | 23 | status = (GPIOB->ODR & (1<<11)) ? 1 : 0; |
phsfan | 1:9cb4854ab263 | 24 | return status; |
phsfan | 1:9cb4854ab263 | 25 | } |
phsfan | 1:9cb4854ab263 | 26 | |
phsfan | 1:9cb4854ab263 | 27 | |
phsfan | 1:9cb4854ab263 | 28 | #define STRING_STACK_LIMIT 256 |
phsfan | 1:9cb4854ab263 | 29 | #define UART5_BASE (APB1PERIPH_BASE + 0x5000) |
phsfan | 1:9cb4854ab263 | 30 | #define UART5 ((USART_TypeDef *) UART5_BASE) |
phsfan | 1:9cb4854ab263 | 31 | #define RCC_APB1ENR_UART5EN ((uint32_t)0x00100000) |
phsfan | 1:9cb4854ab263 | 32 | #define __UART5_CLK_ENABLE() (RCC->APB1ENR |= (RCC_APB1ENR_UART5EN)) |
phsfan | 1:9cb4854ab263 | 33 | #define GPIO_AF8_UART5 ((uint8_t)0x08) |
phsfan | 1:9cb4854ab263 | 34 | |
phsfan | 1:9cb4854ab263 | 35 | ShieldSerial::ShieldSerial (int baud) { |
phsfan | 1:9cb4854ab263 | 36 | __UART5_CLK_ENABLE(); |
phsfan | 1:9cb4854ab263 | 37 | |
phsfan | 1:9cb4854ab263 | 38 | UartHandle.Instance = (USART_TypeDef *)UART5; |
phsfan | 1:9cb4854ab263 | 39 | UartHandle.Init.BaudRate = baud; |
phsfan | 1:9cb4854ab263 | 40 | UartHandle.Init.WordLength = UART_WORDLENGTH_8B; |
phsfan | 1:9cb4854ab263 | 41 | UartHandle.Init.StopBits = UART_STOPBITS_1; |
phsfan | 1:9cb4854ab263 | 42 | UartHandle.Init.Parity = UART_PARITY_NONE; |
phsfan | 1:9cb4854ab263 | 43 | UartHandle.Init.HwFlowCtl = UART_HWCONTROL_NONE; |
phsfan | 1:9cb4854ab263 | 44 | UartHandle.Init.Mode = UART_MODE_TX_RX; |
phsfan | 1:9cb4854ab263 | 45 | if (HAL_UART_Init(&UartHandle) != HAL_OK) { |
phsfan | 1:9cb4854ab263 | 46 | mbed_die(); |
phsfan | 1:9cb4854ab263 | 47 | } |
phsfan | 1:9cb4854ab263 | 48 | |
phsfan | 1:9cb4854ab263 | 49 | __GPIOC_CLK_ENABLE(); |
phsfan | 1:9cb4854ab263 | 50 | __GPIOD_CLK_ENABLE(); |
phsfan | 1:9cb4854ab263 | 51 | GPIO_InitTypeDef GPIO_InitStruct; |
phsfan | 1:9cb4854ab263 | 52 | GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; |
phsfan | 1:9cb4854ab263 | 53 | GPIO_InitStruct.Pull = GPIO_PULLUP; |
phsfan | 1:9cb4854ab263 | 54 | GPIO_InitStruct.Speed = GPIO_SPEED_FAST; |
phsfan | 1:9cb4854ab263 | 55 | GPIO_InitStruct.Pin = GPIO_PIN_12; |
phsfan | 1:9cb4854ab263 | 56 | GPIO_InitStruct.Alternate = GPIO_AF8_UART5; |
phsfan | 1:9cb4854ab263 | 57 | HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); // TX |
phsfan | 1:9cb4854ab263 | 58 | GPIO_InitStruct.Pin = GPIO_PIN_2; |
phsfan | 1:9cb4854ab263 | 59 | GPIO_InitStruct.Alternate = GPIO_AF8_UART5; |
phsfan | 1:9cb4854ab263 | 60 | HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); // RX |
phsfan | 1:9cb4854ab263 | 61 | } |
phsfan | 1:9cb4854ab263 | 62 | |
phsfan | 1:9cb4854ab263 | 63 | int ShieldSerial::getc () { |
phsfan | 1:9cb4854ab263 | 64 | while (!readable()); |
phsfan | 1:9cb4854ab263 | 65 | return (int)(UartHandle.Instance->DR & 0x1FF); |
phsfan | 1:9cb4854ab263 | 66 | } |
phsfan | 1:9cb4854ab263 | 67 | |
phsfan | 1:9cb4854ab263 | 68 | int ShieldSerial::putc (int c) { |
phsfan | 1:9cb4854ab263 | 69 | while (!writeable()); |
phsfan | 1:9cb4854ab263 | 70 | UartHandle.Instance->DR = (uint32_t)(c & 0x1FF); |
phsfan | 1:9cb4854ab263 | 71 | return 0; |
phsfan | 1:9cb4854ab263 | 72 | } |
phsfan | 1:9cb4854ab263 | 73 | |
phsfan | 1:9cb4854ab263 | 74 | int ShieldSerial::readable () { |
phsfan | 1:9cb4854ab263 | 75 | int status; |
phsfan | 1:9cb4854ab263 | 76 | status = ((__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE) != RESET) ? 1 : 0); |
phsfan | 1:9cb4854ab263 | 77 | return status; |
phsfan | 1:9cb4854ab263 | 78 | } |
phsfan | 1:9cb4854ab263 | 79 | |
phsfan | 1:9cb4854ab263 | 80 | int ShieldSerial::writeable () { |
phsfan | 1:9cb4854ab263 | 81 | int status; |
phsfan | 1:9cb4854ab263 | 82 | status = ((__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_TXE) != RESET) ? 1 : 0); |
phsfan | 1:9cb4854ab263 | 83 | return status; |
phsfan | 1:9cb4854ab263 | 84 | } |