Diff: capi/semihost_api.h

Revision:

2:143cac498751

Parent:

0:fd0d7bdfcdc2

Child:

3:c24f5ba8a7f9

--- a/capi/semihost_api.h	Thu Nov 29 15:41:14 2012 +0000
+++ b/capi/semihost_api.h	Mon Feb 18 11:44:18 2013 +0000
@@ -1,23 +1,17 @@
 /* mbed Microcontroller Library
- * Copyright (c) 2006-2012 ARM Limited
+ * Copyright (c) 2006-2013 ARM Limited
  *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
  *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
+ *     http://www.apache.org/licenses/LICENSE-2.0
  *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
  */
 #ifndef MBED_SEMIHOST_H
 #define MBED_SEMIHOST_H
@@ -29,47 +23,42 @@
 extern "C" {
 #endif
 
-/* __semihost intrinsic
- This intrinsic inserts an SVC or BKPT instruction into the instruction stream
- generated by the compiler. It enables you to make semihosting calls from C or
- C++ that are independent of the target architecture.
- */
+#if DEVICE_SEMIHOST
+
 #ifndef __CC_ARM
-/* Semihost implementation taken from eLua (MIT license):
- *    git://github.com/elua/elua.git/src/semifs.c
- */
 
-/* SWI numbers for RDI (Angel) monitors */
+#if defined(__ICCARM__)
+inline int __semihost(int reason, const void *arg) {
+    return __semihosting(reason, (void*)arg);
+}
+#else
+
 #ifdef __thumb__
-#define AngelSWI            0xAB
+#   define AngelSWI            0xAB
+#   define AngelSWIInsn        "bkpt"
+#   define AngelSWIAsm          bkpt
 #else
-#define AngelSWI            0x123456
-#endif
-/* For Thumb-2 code use the BKPT instruction instead of SWI */
-#ifdef __thumb2__
-#define AngelSWIInsn        "bkpt"
-#define AngelSWIAsm          bkpt
-#else
-#define AngelSWIInsn        "swi"
-#define AngelSWIAsm          swi
+#   define AngelSWI            0x123456
+#   define AngelSWIInsn        "swi"
+#   define AngelSWIAsm          swi
 #endif
 
 inline int __semihost(int reason, const void *arg) {
     int value;
-    asm volatile ("mov r0, %1; mov r1, %2; " AngelSWIInsn " %a3; mov %0, r0"
-       : "=r" (value) /* Outputs */
-       : "r" (reason), "r" (arg), "i" (AngelSWI) /* Inputs */
-       : "r0", "r1", "r2", "r3", "ip", "lr", "memory", "cc"
-                /* Clobbers r0 and r1, and lr if in supervisor mode */);
-                /* Accordingly to page 13-77 of ARM DUI 0040D other registers
-                   can also be clobbered.  Some memory positions may also be
-                   changed by a system call, so they should not be kept in
-                   registers. Note: we are assuming the manual is right and
-                   Angel is respecting the APCS.  */
-    
+
+    asm volatile (
+       "mov r0, %1"          "\n\t"
+       "mov r1, %2"          "\n\t"
+       AngelSWIInsn " %a3"   "\n\t"
+       "mov %0, r0"
+       : "=r" (value)                                         /* output operands             */
+       : "r" (reason), "r" (arg), "i" (AngelSWI)              /* input operands              */
+       : "r0", "r1", "r2", "r3", "ip", "lr", "memory", "cc"   /* list of clobbered registers */
+    );
+
     return value;
 }
-
+#endif
 #endif
 
 #if DEVICE_LOCALFILESYSTEM
@@ -95,6 +84,8 @@
 int semihost_connected(void);
 int semihost_disabledebug(void);
 
+#endif
+
 #ifdef __cplusplus
 }
 #endif