Modified mbed library sources only for STM32F030K6, LQFP32 (0.8mm pitch) package, 32K Flash, 4K SRAM. Compiler target: Nucleo 32F030R8

Fork of mbed-src by mbed official

Committer:
emilmont
Date:
Fri Jun 14 17:49:17 2013 +0100
Revision:
10:3bc89ef62ce7
Parent:
9:0ce32e54c9a7
Child:
13:0645d8841f51
Unify mbed library sources

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 10:3bc89ef62ce7 1 /* mbed Microcontroller Library
emilmont 10:3bc89ef62ce7 2 * Copyright (c) 2006-2013 ARM Limited
emilmont 10:3bc89ef62ce7 3 *
emilmont 10:3bc89ef62ce7 4 * Licensed under the Apache License, Version 2.0 (the "License");
emilmont 10:3bc89ef62ce7 5 * you may not use this file except in compliance with the License.
emilmont 10:3bc89ef62ce7 6 * You may obtain a copy of the License at
emilmont 10:3bc89ef62ce7 7 *
emilmont 10:3bc89ef62ce7 8 * http://www.apache.org/licenses/LICENSE-2.0
emilmont 10:3bc89ef62ce7 9 *
emilmont 10:3bc89ef62ce7 10 * Unless required by applicable law or agreed to in writing, software
emilmont 10:3bc89ef62ce7 11 * distributed under the License is distributed on an "AS IS" BASIS,
emilmont 10:3bc89ef62ce7 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
emilmont 10:3bc89ef62ce7 13 * See the License for the specific language governing permissions and
emilmont 10:3bc89ef62ce7 14 * limitations under the License.
emilmont 10:3bc89ef62ce7 15 */
emilmont 10:3bc89ef62ce7 16 #include "SPI.h"
emilmont 10:3bc89ef62ce7 17
emilmont 10:3bc89ef62ce7 18 #if DEVICE_SPI
emilmont 10:3bc89ef62ce7 19
emilmont 10:3bc89ef62ce7 20 namespace mbed {
emilmont 10:3bc89ef62ce7 21
emilmont 10:3bc89ef62ce7 22 SPI::SPI(PinName mosi, PinName miso, PinName sclk) {
emilmont 10:3bc89ef62ce7 23 spi_init(&_spi, mosi, miso, sclk, NC);
emilmont 10:3bc89ef62ce7 24 _bits = 8;
emilmont 10:3bc89ef62ce7 25 _mode = 0;
emilmont 10:3bc89ef62ce7 26 _hz = 1000000;
emilmont 10:3bc89ef62ce7 27 spi_format(&_spi, _bits, _mode, 0);
emilmont 10:3bc89ef62ce7 28 spi_frequency(&_spi, _hz);
emilmont 10:3bc89ef62ce7 29 }
emilmont 10:3bc89ef62ce7 30
emilmont 10:3bc89ef62ce7 31 void SPI::format(int bits, int mode) {
emilmont 10:3bc89ef62ce7 32 _bits = bits;
emilmont 10:3bc89ef62ce7 33 _mode = mode;
emilmont 10:3bc89ef62ce7 34 SPI::_owner = NULL; // Not that elegant, but works. rmeyer
emilmont 10:3bc89ef62ce7 35 aquire();
emilmont 10:3bc89ef62ce7 36 }
emilmont 10:3bc89ef62ce7 37
emilmont 10:3bc89ef62ce7 38 void SPI::frequency(int hz) {
emilmont 10:3bc89ef62ce7 39 _hz = hz;
emilmont 10:3bc89ef62ce7 40 SPI::_owner = NULL; // Not that elegant, but works. rmeyer
emilmont 10:3bc89ef62ce7 41 aquire();
emilmont 10:3bc89ef62ce7 42 }
emilmont 10:3bc89ef62ce7 43
emilmont 10:3bc89ef62ce7 44 SPI* SPI::_owner = NULL;
emilmont 10:3bc89ef62ce7 45
emilmont 10:3bc89ef62ce7 46 // ignore the fact there are multiple physical spis, and always update if it wasnt us last
emilmont 10:3bc89ef62ce7 47 void SPI::aquire() {
emilmont 10:3bc89ef62ce7 48 if (_owner != this) {
emilmont 10:3bc89ef62ce7 49 spi_format(&_spi, _bits, _mode, 0);
emilmont 10:3bc89ef62ce7 50 spi_frequency(&_spi, _hz);
emilmont 10:3bc89ef62ce7 51 _owner = this;
emilmont 10:3bc89ef62ce7 52 }
emilmont 10:3bc89ef62ce7 53 }
emilmont 10:3bc89ef62ce7 54
emilmont 10:3bc89ef62ce7 55 int SPI::write(int value) {
emilmont 10:3bc89ef62ce7 56 aquire();
emilmont 10:3bc89ef62ce7 57 return spi_master_write(&_spi, value);
emilmont 10:3bc89ef62ce7 58 }
emilmont 10:3bc89ef62ce7 59
emilmont 10:3bc89ef62ce7 60 } // namespace mbed
emilmont 10:3bc89ef62ce7 61
emilmont 10:3bc89ef62ce7 62 #endif