Modified mbed library sources only for STM32F030K6, LQFP32 (0.8mm pitch) package, 32K Flash, 4K SRAM. Compiler target: Nucleo 32F030R8

Fork of mbed-src by mbed official

Committer:
emilmont
Date:
Mon Feb 18 11:44:18 2013 +0000
Revision:
2:143cac498751
Parent:
0:fd0d7bdfcdc2
Update mbed sources to Rev 59

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 0:fd0d7bdfcdc2 1 /* mbed Microcontroller Library
emilmont 2:143cac498751 2 * Copyright (c) 2006-2013 ARM Limited
mbed_official 0:fd0d7bdfcdc2 3 *
emilmont 2:143cac498751 4 * Licensed under the Apache License, Version 2.0 (the "License");
emilmont 2:143cac498751 5 * you may not use this file except in compliance with the License.
emilmont 2:143cac498751 6 * You may obtain a copy of the License at
mbed_official 0:fd0d7bdfcdc2 7 *
emilmont 2:143cac498751 8 * http://www.apache.org/licenses/LICENSE-2.0
mbed_official 0:fd0d7bdfcdc2 9 *
emilmont 2:143cac498751 10 * Unless required by applicable law or agreed to in writing, software
emilmont 2:143cac498751 11 * distributed under the License is distributed on an "AS IS" BASIS,
emilmont 2:143cac498751 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
emilmont 2:143cac498751 13 * See the License for the specific language governing permissions and
emilmont 2:143cac498751 14 * limitations under the License.
mbed_official 0:fd0d7bdfcdc2 15 */
mbed_official 0:fd0d7bdfcdc2 16 #ifndef MBED_SPI_H
mbed_official 0:fd0d7bdfcdc2 17 #define MBED_SPI_H
mbed_official 0:fd0d7bdfcdc2 18
mbed_official 0:fd0d7bdfcdc2 19 #include "platform.h"
mbed_official 0:fd0d7bdfcdc2 20
mbed_official 0:fd0d7bdfcdc2 21 #if DEVICE_SPI
mbed_official 0:fd0d7bdfcdc2 22
mbed_official 0:fd0d7bdfcdc2 23 #include "spi_api.h"
mbed_official 0:fd0d7bdfcdc2 24
mbed_official 0:fd0d7bdfcdc2 25 namespace mbed {
mbed_official 0:fd0d7bdfcdc2 26
mbed_official 0:fd0d7bdfcdc2 27 /** A SPI Master, used for communicating with SPI slave devices
mbed_official 0:fd0d7bdfcdc2 28 *
mbed_official 0:fd0d7bdfcdc2 29 * The default format is set to 8-bits, mode 0, and a clock frequency of 1MHz
mbed_official 0:fd0d7bdfcdc2 30 *
mbed_official 0:fd0d7bdfcdc2 31 * Most SPI devices will also require Chip Select and Reset signals. These
mbed_official 0:fd0d7bdfcdc2 32 * can be controlled using <DigitalOut> pins
mbed_official 0:fd0d7bdfcdc2 33 *
mbed_official 0:fd0d7bdfcdc2 34 * Example:
mbed_official 0:fd0d7bdfcdc2 35 * @code
mbed_official 0:fd0d7bdfcdc2 36 * // Send a byte to a SPI slave, and record the response
mbed_official 0:fd0d7bdfcdc2 37 *
mbed_official 0:fd0d7bdfcdc2 38 * #include "mbed.h"
mbed_official 0:fd0d7bdfcdc2 39 *
mbed_official 0:fd0d7bdfcdc2 40 * SPI device(p5, p6, p7); // mosi, miso, sclk
mbed_official 0:fd0d7bdfcdc2 41 *
mbed_official 0:fd0d7bdfcdc2 42 * int main() {
mbed_official 0:fd0d7bdfcdc2 43 * int response = device.write(0xFF);
mbed_official 0:fd0d7bdfcdc2 44 * }
mbed_official 0:fd0d7bdfcdc2 45 * @endcode
mbed_official 0:fd0d7bdfcdc2 46 */
mbed_official 0:fd0d7bdfcdc2 47 class SPI {
mbed_official 0:fd0d7bdfcdc2 48
mbed_official 0:fd0d7bdfcdc2 49 public:
mbed_official 0:fd0d7bdfcdc2 50
mbed_official 0:fd0d7bdfcdc2 51 /** Create a SPI master connected to the specified pins
mbed_official 0:fd0d7bdfcdc2 52 *
mbed_official 0:fd0d7bdfcdc2 53 * Pin Options:
mbed_official 0:fd0d7bdfcdc2 54 * (5, 6, 7) or (11, 12, 13)
mbed_official 0:fd0d7bdfcdc2 55 *
mbed_official 0:fd0d7bdfcdc2 56 * mosi or miso can be specfied as NC if not used
mbed_official 0:fd0d7bdfcdc2 57 *
mbed_official 0:fd0d7bdfcdc2 58 * @param mosi SPI Master Out, Slave In pin
mbed_official 0:fd0d7bdfcdc2 59 * @param miso SPI Master In, Slave Out pin
mbed_official 0:fd0d7bdfcdc2 60 * @param sclk SPI Clock pin
mbed_official 0:fd0d7bdfcdc2 61 */
mbed_official 0:fd0d7bdfcdc2 62 SPI(PinName mosi, PinName miso, PinName sclk);
mbed_official 0:fd0d7bdfcdc2 63
mbed_official 0:fd0d7bdfcdc2 64 /** Configure the data transmission format
mbed_official 0:fd0d7bdfcdc2 65 *
mbed_official 0:fd0d7bdfcdc2 66 * @param bits Number of bits per SPI frame (4 - 16)
mbed_official 0:fd0d7bdfcdc2 67 * @param mode Clock polarity and phase mode (0 - 3)
mbed_official 0:fd0d7bdfcdc2 68 *
mbed_official 0:fd0d7bdfcdc2 69 * @code
emilmont 2:143cac498751 70 * mode | POL PHA
emilmont 2:143cac498751 71 * -----+--------
emilmont 2:143cac498751 72 * 0 | 0 0
mbed_official 0:fd0d7bdfcdc2 73 * 1 | 0 1
emilmont 2:143cac498751 74 * 2 | 1 0
mbed_official 0:fd0d7bdfcdc2 75 * 3 | 1 1
mbed_official 0:fd0d7bdfcdc2 76 * @endcode
mbed_official 0:fd0d7bdfcdc2 77 */
mbed_official 0:fd0d7bdfcdc2 78 void format(int bits, int mode = 0);
mbed_official 0:fd0d7bdfcdc2 79
mbed_official 0:fd0d7bdfcdc2 80 /** Set the spi bus clock frequency
mbed_official 0:fd0d7bdfcdc2 81 *
mbed_official 0:fd0d7bdfcdc2 82 * @param hz SCLK frequency in hz (default = 1MHz)
mbed_official 0:fd0d7bdfcdc2 83 */
mbed_official 0:fd0d7bdfcdc2 84 void frequency(int hz = 1000000);
mbed_official 0:fd0d7bdfcdc2 85
mbed_official 0:fd0d7bdfcdc2 86 /** Write to the SPI Slave and return the response
mbed_official 0:fd0d7bdfcdc2 87 *
mbed_official 0:fd0d7bdfcdc2 88 * @param value Data to be sent to the SPI slave
mbed_official 0:fd0d7bdfcdc2 89 *
mbed_official 0:fd0d7bdfcdc2 90 * @returns
mbed_official 0:fd0d7bdfcdc2 91 * Response from the SPI slave
mbed_official 0:fd0d7bdfcdc2 92 */
mbed_official 0:fd0d7bdfcdc2 93 virtual int write(int value);
mbed_official 0:fd0d7bdfcdc2 94
mbed_official 0:fd0d7bdfcdc2 95 protected:
mbed_official 0:fd0d7bdfcdc2 96 spi_t _spi;
emilmont 2:143cac498751 97
mbed_official 0:fd0d7bdfcdc2 98 void aquire(void);
mbed_official 0:fd0d7bdfcdc2 99 static SPI *_owner;
mbed_official 0:fd0d7bdfcdc2 100 int _bits;
mbed_official 0:fd0d7bdfcdc2 101 int _mode;
mbed_official 0:fd0d7bdfcdc2 102 int _hz;
mbed_official 0:fd0d7bdfcdc2 103 };
mbed_official 0:fd0d7bdfcdc2 104
mbed_official 0:fd0d7bdfcdc2 105 } // namespace mbed
mbed_official 0:fd0d7bdfcdc2 106
mbed_official 0:fd0d7bdfcdc2 107 #endif
mbed_official 0:fd0d7bdfcdc2 108
mbed_official 0:fd0d7bdfcdc2 109 #endif