Parth Sagar / Mbed OS MAX3000_Beta_July_first_demo

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Dependencies:   MAX30003 max32630fthr

main.cpp@11:300afaf2696b, 2020-09-25 (annotated)

Committer:
parthsagar2010
Date:
Fri Sep 25 16:42:40 2020 +0000
Revision:
11:300afaf2696b
Parent:
10:54aa50490b15
Child:
12:10b49ad3c492
final_with_timestamp

Who changed what in which revision?

UserRevisionLine numberNew contents of line
coreyharris 6:86ac850c718d 1
parthsagar2010 8:6b9359f81cc0 2 #include "MAX30003.h"
coreyharris 0:38c49bc37c7c 3 #include "mbed.h"
coreyharris 0:38c49bc37c7c 4 #include "max32630fthr.h"
parthsagar2010 9:24ecf16eab0f 5 #include "ds1307.h"
parthsagar2010 11:300afaf2696b 6 //#include <BufferedSerial.h>
parthsagar2010 10:54aa50490b15 7 #include <string>
parthsagar2010 10:54aa50490b15 8 //#include <Serial.h>
parthsagar2010 11:300afaf2696b 9
parthsagar2010 11:300afaf2696b 10 #define TARGET_TX_PIN P3_1
parthsagar2010 11:300afaf2696b 11 #define TARGET_RX_PIN P3_0
parthsagar2010 11:300afaf2696b 12
parthsagar2010 9:24ecf16eab0f 13 Timer timer_fast;
parthsagar2010 10:54aa50490b15 14 Timer t;
coreyharris 0:38c49bc37c7c 15 MAX32630FTHR pegasus(MAX32630FTHR::VIO_3V3);
coreyharris 0:38c49bc37c7c 16
parthsagar2010 9:24ecf16eab0f 17 void task_fast(void);
parthsagar2010 9:24ecf16eab0f 18 DigitalOut ledA(LED2);
coreyharris 0:38c49bc37c7c 19 void ecg_config(MAX30003 &ecgAFE);
parthsagar2010 11:300afaf2696b 20 //BufferedSerial pc(P3_1,P3_0); // Use USB debug probe for serial link static Unbuffered
parthsagar2010 11:300afaf2696b 21 static BufferedSerial pc(TARGET_TX_PIN, TARGET_RX_PIN, 115200);
parthsagar2010 11:300afaf2696b 22
parthsagar2010 10:54aa50490b15 23 //Serial uart_1(USBTX, USBRX); // Use USB debug probe for serial link static Unbuffered
parthsagar2010 10:54aa50490b15 24 //
parthsagar2010 10:54aa50490b15 25 //Serial pc(P3_1,P3_0);
coreyharris 0:38c49bc37c7c 26 volatile bool ecgFIFOIntFlag = 0;
parthsagar2010 9:24ecf16eab0f 27 volatile bool timerflag = 0;
parthsagar2010 11:300afaf2696b 28
parthsagar2010 11:300afaf2696b 29 FileHandle *mbed::mbed_override_console(int fd)
parthsagar2010 11:300afaf2696b 30 {
parthsagar2010 11:300afaf2696b 31 return &pc;
parthsagar2010 11:300afaf2696b 32 }
parthsagar2010 11:300afaf2696b 33
parthsagar2010 8:6b9359f81cc0 34 void ecgFIFO_callback_1() { // Triggered when the ECG FIFO is about to be full
coreyharris 0:38c49bc37c7c 35
coreyharris 0:38c49bc37c7c 36 ecgFIFOIntFlag = 1;
coreyharris 0:38c49bc37c7c 37 }
coreyharris 0:38c49bc37c7c 38
parthsagar2010 11:300afaf2696b 39 int main(void)
coreyharris 3:420d5efbd967 40 {
parthsagar2010 11:300afaf2696b 41 // Constants
coreyharris 4:06e258ff0b97 42 const int EINT_STATUS_MASK = 1 << 23;
coreyharris 6:86ac850c718d 43 const int FIFO_OVF_MASK = 0x7;
coreyharris 6:86ac850c718d 44 const int FIFO_VALID_SAMPLE_MASK = 0x0;
coreyharris 6:86ac850c718d 45 const int FIFO_FAST_SAMPLE_MASK = 0x1;
coreyharris 6:86ac850c718d 46 const int ETAG_BITS_MASK = 0x7;
parthsagar2010 9:24ecf16eab0f 47 timer_fast.start();
parthsagar2010 8:6b9359f81cc0 48 DigitalOut rLed(LED1, LED_OFF);
parthsagar2010 10:54aa50490b15 49 // pc.baud(9600);
coreyharris 3:420d5efbd967 50
parthsagar2010 11:300afaf2696b 51 //pc.set_baud(115200); // Baud rate = 115200
parthsagar2010 11:300afaf2696b 52 //pc.set_format(
parthsagar2010 11:300afaf2696b 53 // /* bits */ 8,
parthsagar2010 11:300afaf2696b 54 // /* parity */ BufferedSerial::None,
parthsagar2010 11:300afaf2696b 55 // /* stop bit */ 1 //1
parthsagar2010 11:300afaf2696b 56 //);
parthsagar2010 10:54aa50490b15 57 //uart_1.baud(115200);
coreyharris 1:86843c27cc81 58 InterruptIn ecgFIFO_int(P5_4); // Config P5_4 as int. in for the
parthsagar2010 8:6b9359f81cc0 59 ecgFIFO_int.fall(&ecgFIFO_callback_1); // ecg FIFO interrupt at falling edge
coreyharris 0:38c49bc37c7c 60
coreyharris 1:86843c27cc81 61 SPI spiBus(SPI2_MOSI, SPI2_MISO, SPI2_SCK); // SPI bus, P5_1 = MOSI,
coreyharris 1:86843c27cc81 62 // P5_2 = MISO, P5_0 = SCK
parthsagar2010 10:54aa50490b15 63
coreyharris 4:06e258ff0b97 64 MAX30003 ecgAFE(spiBus, P5_3); // New MAX30003 on spiBus, CS = P5_3
parthsagar2010 8:6b9359f81cc0 65
coreyharris 4:06e258ff0b97 66 ecg_config(ecgAFE); // Config ECG
coreyharris 1:86843c27cc81 67
coreyharris 0:38c49bc37c7c 68
coreyharris 4:06e258ff0b97 69 ecgAFE.writeRegister( MAX30003::SYNCH , 0);
coreyharris 0:38c49bc37c7c 70
coreyharris 4:06e258ff0b97 71 uint32_t ecgFIFO, readECGSamples, idx, ETAG[32], status;
coreyharris 1:86843c27cc81 72 int16_t ecgSample[32];
parthsagar2010 9:24ecf16eab0f 73 //bool timerflag = false;
parthsagar2010 10:54aa50490b15 74 int16_t ecgSample_1sec[200];
parthsagar2010 10:54aa50490b15 75 uint8_t ecg_1 = 0;
parthsagar2010 10:54aa50490b15 76 uint8_t ecg_2 = 0;
parthsagar2010 10:54aa50490b15 77 uint16_t onesec_counter = 0;
parthsagar2010 10:54aa50490b15 78 uint16_t onesec_counter_temp = 0;
parthsagar2010 10:54aa50490b15 79
parthsagar2010 9:24ecf16eab0f 80 int16_t sample = 300;
parthsagar2010 10:54aa50490b15 81 uint8_t final[10];
parthsagar2010 10:54aa50490b15 82 uint32_t packet_1 = 1600674360;
parthsagar2010 10:54aa50490b15 83 uint16_t checksum_ = 0;
parthsagar2010 10:54aa50490b15 84 uint16_t mod_checksum = 0;
parthsagar2010 10:54aa50490b15 85
parthsagar2010 10:54aa50490b15 86 uint8_t p_1 = 0;
parthsagar2010 10:54aa50490b15 87 uint8_t p_2 = 0;
parthsagar2010 10:54aa50490b15 88 uint8_t p_3 = 0;
parthsagar2010 10:54aa50490b15 89 uint8_t p_4 = 0;
parthsagar2010 10:54aa50490b15 90
parthsagar2010 10:54aa50490b15 91 uint8_t data_len_1 = 0;
parthsagar2010 10:54aa50490b15 92 uint8_t data_len_2 = 0;
parthsagar2010 10:54aa50490b15 93
parthsagar2010 10:54aa50490b15 94 uint8_t cksm_1 = 0;
parthsagar2010 10:54aa50490b15 95 uint8_t cksm_2 = 0;
parthsagar2010 10:54aa50490b15 96 uint8_t header_device_id[3] = {0,0,210};
parthsagar2010 10:54aa50490b15 97 uint8_t header_packet_type[2] = {0,2};
parthsagar2010 10:54aa50490b15 98
parthsagar2010 10:54aa50490b15 99 uint8_t ending[5] = {'@','#','%','!','7'};
parthsagar2010 10:54aa50490b15 100
parthsagar2010 11:300afaf2696b 101 char buf[20];
parthsagar2010 11:300afaf2696b 102 pc.write("Welcome",8*sizeof(char));
parthsagar2010 11:300afaf2696b 103 printf("In the main loop");
parthsagar2010 11:300afaf2696b 104 bool flag_first = false;
parthsagar2010 11:300afaf2696b 105
parthsagar2010 11:300afaf2696b 106 do
parthsagar2010 11:300afaf2696b 107 {
parthsagar2010 11:300afaf2696b 108 if (pc.readable()) {
parthsagar2010 11:300afaf2696b 109 scanf("%s",buf);
parthsagar2010 11:300afaf2696b 110 printf("The entered string is %s : \n ",buf);
parthsagar2010 11:300afaf2696b 111 uint32_t packet_1 = atoi(buf);
parthsagar2010 11:300afaf2696b 112 flag_first = true;
coreyharris 2:812d40f1853d 113
parthsagar2010 11:300afaf2696b 114 }
parthsagar2010 11:300afaf2696b 115
parthsagar2010 11:300afaf2696b 116 }while (flag_first==false);
parthsagar2010 11:300afaf2696b 117
parthsagar2010 11:300afaf2696b 118 while(1)
parthsagar2010 9:24ecf16eab0f 119 {
parthsagar2010 10:54aa50490b15 120
parthsagar2010 9:24ecf16eab0f 121
parthsagar2010 10:54aa50490b15 122 if (timer_fast.read() > .9)
parthsagar2010 9:24ecf16eab0f 123 {
parthsagar2010 11:300afaf2696b 124 //t.start();
parthsagar2010 10:54aa50490b15 125 //ledA = !ledA;
parthsagar2010 10:54aa50490b15 126
parthsagar2010 10:54aa50490b15 127
parthsagar2010 10:54aa50490b15 128 pc.write((uint8_t *)header_device_id, sizeof(header_device_id));
parthsagar2010 10:54aa50490b15 129
parthsagar2010 10:54aa50490b15 130 pc.write((uint8_t *)header_packet_type, sizeof(header_packet_type));
parthsagar2010 10:54aa50490b15 131 packet_1 ++;
parthsagar2010 10:54aa50490b15 132 p_1 = packet_1 & 0xff;
parthsagar2010 10:54aa50490b15 133 p_2 = (packet_1 >> 8) & 0xff;
parthsagar2010 10:54aa50490b15 134 p_3 = (packet_1 >> 16) & 0xff;
parthsagar2010 10:54aa50490b15 135 p_4 = (packet_1 >> 24) & 0xff;
parthsagar2010 10:54aa50490b15 136 // checksum_ = checksum_ + (packet_1 & 0xffff) + ((packet_1 >> 16) & 0xffff) ;
parthsagar2010 10:54aa50490b15 137 checksum_ = checksum_ + p_1 + p_2 + p_3 + p_4 ;
parthsagar2010 10:54aa50490b15 138 uint8_t header_packet_id[4] = {p_4,p_3,p_2,p_1};
parthsagar2010 10:54aa50490b15 139 pc.write((uint8_t *)header_packet_id, sizeof(header_packet_id));
parthsagar2010 10:54aa50490b15 140 onesec_counter_temp = onesec_counter * 2;
parthsagar2010 10:54aa50490b15 141 data_len_1 = onesec_counter_temp & 0xff;
parthsagar2010 10:54aa50490b15 142 data_len_2 = (onesec_counter_temp >> 8) & 0xff;
parthsagar2010 10:54aa50490b15 143 checksum_ = checksum_ + data_len_1 + data_len_2;
parthsagar2010 10:54aa50490b15 144 //pc.write((uint32_t *)packet_1, sizeof(packet_1));
parthsagar2010 10:54aa50490b15 145 uint8_t header_ecg_datalen[2] = {data_len_2,data_len_1};
parthsagar2010 10:54aa50490b15 146 pc.write((uint8_t *)header_ecg_datalen, sizeof(header_ecg_datalen));
parthsagar2010 10:54aa50490b15 147 mod_checksum = checksum_ % 65536 ;
parthsagar2010 10:54aa50490b15 148 cksm_1 = mod_checksum & 0xff;
parthsagar2010 10:54aa50490b15 149 cksm_2 = (mod_checksum >> 8) & 0xff;
parthsagar2010 10:54aa50490b15 150 uint8_t header_ecg_checksum[2] = {cksm_2,cksm_1};
parthsagar2010 10:54aa50490b15 151 pc.write((uint8_t *)header_ecg_checksum, sizeof(header_ecg_checksum));
parthsagar2010 10:54aa50490b15 152
parthsagar2010 10:54aa50490b15 153 pc.write((int16_t *)ecgSample_1sec,onesec_counter * sizeof(int16_t));
parthsagar2010 10:54aa50490b15 154 onesec_counter = 0;
parthsagar2010 10:54aa50490b15 155 // memset(ecgSample_1sec, 0, sizeof(ecgSample_1sec));
parthsagar2010 10:54aa50490b15 156
parthsagar2010 10:54aa50490b15 157 pc.write((uint8_t *)ending, sizeof(ending));
parthsagar2010 10:54aa50490b15 158 checksum_ = 0;
parthsagar2010 11:300afaf2696b 159 // t.stop();
parthsagar2010 11:300afaf2696b 160 // auto us = t.elapsed_time().count();
parthsagar2010 11:300afaf2696b 161 // printf("Timer time: %llu ms \n", us);
parthsagar2010 9:24ecf16eab0f 162 timer_fast.reset();
parthsagar2010 9:24ecf16eab0f 163 }
coreyharris 4:06e258ff0b97 164 // Read back ECG samples from the FIFO
parthsagar2010 9:24ecf16eab0f 165 else if( (ecgFIFOIntFlag==1))// && (timerflag == 0))
parthsagar2010 9:24ecf16eab0f 166 {
coreyharris 2:812d40f1853d 167
coreyharris 5:f8d1f651bef5 168 ecgFIFOIntFlag = 0;
coreyharris 4:06e258ff0b97 169 status = ecgAFE.readRegister( MAX30003::STATUS ); // Read the STATUS register
coreyharris 2:812d40f1853d 170
coreyharris 3:420d5efbd967 171 // Check if EINT interrupt asserted
parthsagar2010 9:24ecf16eab0f 172 if ( ( status & EINT_STATUS_MASK ) == EINT_STATUS_MASK )
parthsagar2010 9:24ecf16eab0f 173 {
coreyharris 3:420d5efbd967 174
coreyharris 4:06e258ff0b97 175 readECGSamples = 0; // Reset sample counter
coreyharris 3:420d5efbd967 176
coreyharris 2:812d40f1853d 177 do {
coreyharris 6:86ac850c718d 178 ecgFIFO = ecgAFE.readRegister( MAX30003::ECG_FIFO ); // Read FIFO
coreyharris 4:06e258ff0b97 179 ecgSample[readECGSamples] = ecgFIFO >> 8; // Isolate voltage data
parthsagar2010 10:54aa50490b15 180 ecgSample[readECGSamples] = ((ecgSample[readECGSamples]<<8)&0xFF00)|((ecgSample[readECGSamples]>>8)&0x00FF);
coreyharris 6:86ac850c718d 181 ETAG[readECGSamples] = ( ecgFIFO >> 3 ) & ETAG_BITS_MASK; // Isolate ETAG
coreyharris 4:06e258ff0b97 182 readECGSamples++; // Increment sample counter
coreyharris 3:420d5efbd967 183
coreyharris 3:420d5efbd967 184 // Check that sample is not last sample in FIFO
coreyharris 6:86ac850c718d 185 } while ( ETAG[readECGSamples-1] == FIFO_VALID_SAMPLE_MASK ||
coreyharris 6:86ac850c718d 186 ETAG[readECGSamples-1] == FIFO_FAST_SAMPLE_MASK );
coreyharris 2:812d40f1853d 187
coreyharris 3:420d5efbd967 188 // Check if FIFO has overflowed
parthsagar2010 9:24ecf16eab0f 189 if( ETAG[readECGSamples - 1] == FIFO_OVF_MASK )
parthsagar2010 9:24ecf16eab0f 190 {
coreyharris 3:420d5efbd967 191 ecgAFE.writeRegister( MAX30003::FIFO_RST , 0); // Reset FIFO
johnGreeneMaxim 7:cf0855a0450a 192 rLed = 1;//notifies the user that an over flow occured
coreyharris 3:420d5efbd967 193 }
parthsagar2010 10:54aa50490b15 194 //uint8_t header_ecg_checksum[2] = {'%','%'};
parthsagar2010 10:54aa50490b15 195 //pc.write((uint8_t *)header_ecg_checksum, sizeof(header_ecg_checksum));
coreyharris 3:420d5efbd967 196
parthsagar2010 10:54aa50490b15 197 //pc.write((int16_t *)ecgSample,readECGSamples * sizeof(int16_t ));
parthsagar2010 10:54aa50490b15 198 //memcpy(ecgSample_1sec , ecgSample, sizeof(ecgSample));
parthsagar2010 10:54aa50490b15 199
parthsagar2010 10:54aa50490b15 200 //memcpy(ecgSample_1sec + (onesec_counter * sizeof(int16_t)), ecgSample, sizeof(ecgSample));
parthsagar2010 10:54aa50490b15 201 for( idx = 0; idx < readECGSamples; idx++ )
parthsagar2010 9:24ecf16eab0f 202 {
parthsagar2010 9:24ecf16eab0f 203 //pc.printf("%6d\r\n", ecgSample[idx]);
parthsagar2010 9:24ecf16eab0f 204 ecgSample_1sec[onesec_counter] = ecgSample[idx];
parthsagar2010 10:54aa50490b15 205
parthsagar2010 10:54aa50490b15 206 cksm_1 = ecgSample[idx] & 0xff;
parthsagar2010 10:54aa50490b15 207 cksm_2 = (ecgSample[idx] >> 8) & 0xff;
parthsagar2010 10:54aa50490b15 208 checksum_ += cksm_1 + cksm_2;
parthsagar2010 9:24ecf16eab0f 209 onesec_counter++;
coreyharris 6:86ac850c718d 210 }
parthsagar2010 11:300afaf2696b 211
coreyharris 0:38c49bc37c7c 212 }
parthsagar2010 10:54aa50490b15 213
coreyharris 0:38c49bc37c7c 214 }
coreyharris 0:38c49bc37c7c 215 }
coreyharris 0:38c49bc37c7c 216 }
coreyharris 0:38c49bc37c7c 217
coreyharris 0:38c49bc37c7c 218
coreyharris 0:38c49bc37c7c 219
coreyharris 0:38c49bc37c7c 220
coreyharris 0:38c49bc37c7c 221 void ecg_config(MAX30003& ecgAFE) {
coreyharris 0:38c49bc37c7c 222
coreyharris 1:86843c27cc81 223 // Reset ECG to clear registers
coreyharris 1:86843c27cc81 224 ecgAFE.writeRegister( MAX30003::SW_RST , 0);
coreyharris 0:38c49bc37c7c 225
coreyharris 1:86843c27cc81 226 // General config register setting
coreyharris 1:86843c27cc81 227 MAX30003::GeneralConfiguration_u CNFG_GEN_r;
coreyharris 3:420d5efbd967 228 CNFG_GEN_r.bits.en_ecg = 1; // Enable ECG channel
coreyharris 3:420d5efbd967 229 CNFG_GEN_r.bits.rbiasn = 1; // Enable resistive bias on negative input
coreyharris 3:420d5efbd967 230 CNFG_GEN_r.bits.rbiasp = 1; // Enable resistive bias on positive input
coreyharris 3:420d5efbd967 231 CNFG_GEN_r.bits.en_rbias = 1; // Enable resistive bias
coreyharris 3:420d5efbd967 232 CNFG_GEN_r.bits.imag = 2; // Current magnitude = 10nA
coreyharris 3:420d5efbd967 233 CNFG_GEN_r.bits.en_dcloff = 1; // Enable DC lead-off detection
coreyharris 1:86843c27cc81 234 ecgAFE.writeRegister( MAX30003::CNFG_GEN , CNFG_GEN_r.all);
coreyharris 1:86843c27cc81 235
coreyharris 1:86843c27cc81 236
coreyharris 1:86843c27cc81 237 // ECG Config register setting
coreyharris 1:86843c27cc81 238 MAX30003::ECGConfiguration_u CNFG_ECG_r;
coreyharris 3:420d5efbd967 239 CNFG_ECG_r.bits.dlpf = 1; // Digital LPF cutoff = 40Hz
coreyharris 3:420d5efbd967 240 CNFG_ECG_r.bits.dhpf = 1; // Digital HPF cutoff = 0.5Hz
coreyharris 3:420d5efbd967 241 CNFG_ECG_r.bits.gain = 3; // ECG gain = 160V/V
coreyharris 3:420d5efbd967 242 CNFG_ECG_r.bits.rate = 2; // Sample rate = 128 sps
coreyharris 1:86843c27cc81 243 ecgAFE.writeRegister( MAX30003::CNFG_ECG , CNFG_ECG_r.all);
coreyharris 1:86843c27cc81 244
coreyharris 1:86843c27cc81 245
coreyharris 1:86843c27cc81 246 //R-to-R configuration
coreyharris 1:86843c27cc81 247 MAX30003::RtoR1Configuration_u CNFG_RTOR_r;
coreyharris 3:420d5efbd967 248 CNFG_RTOR_r.bits.en_rtor = 1; // Enable R-to-R detection
coreyharris 1:86843c27cc81 249 ecgAFE.writeRegister( MAX30003::CNFG_RTOR1 , CNFG_RTOR_r.all);
coreyharris 1:86843c27cc81 250
coreyharris 1:86843c27cc81 251
coreyharris 1:86843c27cc81 252 //Manage interrupts register setting
coreyharris 1:86843c27cc81 253 MAX30003::ManageInterrupts_u MNG_INT_r;
coreyharris 3:420d5efbd967 254 MNG_INT_r.bits.efit = 0b00011; // Assert EINT w/ 4 unread samples
coreyharris 3:420d5efbd967 255 MNG_INT_r.bits.clr_rrint = 0b01; // Clear R-to-R on RTOR reg. read back
coreyharris 1:86843c27cc81 256 ecgAFE.writeRegister( MAX30003::MNGR_INT , MNG_INT_r.all);
coreyharris 0:38c49bc37c7c 257
coreyharris 0:38c49bc37c7c 258
coreyharris 1:86843c27cc81 259 //Enable interrupts register setting
coreyharris 1:86843c27cc81 260 MAX30003::EnableInterrupts_u EN_INT_r;
coreyharris 5:f8d1f651bef5 261 EN_INT_r.all = 0;
coreyharris 3:420d5efbd967 262 EN_INT_r.bits.en_eint = 1; // Enable EINT interrupt
coreyharris 4:06e258ff0b97 263 EN_INT_r.bits.en_rrint = 0; // Disable R-to-R interrupt
coreyharris 3:420d5efbd967 264 EN_INT_r.bits.intb_type = 3; // Open-drain NMOS with internal pullup
coreyharris 1:86843c27cc81 265 ecgAFE.writeRegister( MAX30003::EN_INT , EN_INT_r.all);
coreyharris 1:86843c27cc81 266
coreyharris 1:86843c27cc81 267
coreyharris 1:86843c27cc81 268 //Dyanmic modes config
coreyharris 1:86843c27cc81 269 MAX30003::ManageDynamicModes_u MNG_DYN_r;
coreyharris 3:420d5efbd967 270 MNG_DYN_r.bits.fast = 0; // Fast recovery mode disabled
coreyharris 1:86843c27cc81 271 ecgAFE.writeRegister( MAX30003::MNGR_DYN , MNG_DYN_r.all);
coreyharris 5:f8d1f651bef5 272
coreyharris 5:f8d1f651bef5 273 // MUX Config
coreyharris 5:f8d1f651bef5 274 MAX30003::MuxConfiguration_u CNFG_MUX_r;
coreyharris 5:f8d1f651bef5 275 CNFG_MUX_r.bits.openn = 0; // Connect ECGN to AFE channel
coreyharris 5:f8d1f651bef5 276 CNFG_MUX_r.bits.openp = 0; // Connect ECGP to AFE channel
coreyharris 5:f8d1f651bef5 277 ecgAFE.writeRegister( MAX30003::CNFG_EMUX , CNFG_MUX_r.all);
coreyharris 1:86843c27cc81 278
coreyharris 1:86843c27cc81 279 return;
coreyharris 0:38c49bc37c7c 280 }
coreyharris 0:38c49bc37c7c 281