palheart@mailinator.com palheart@mailinator.com / USBDeviceASD

Renamed the whole thing in order to prevent messing up with the real library

Dependents:   ActiveGamesWeek1

Fork of USBDevice by mbed official

USBDevice/USBHAL_LPC11U.cpp@17:bbd6dac92961, 2014-01-23 (annotated)

Committer:
mbed_official
Date:
Thu Jan 23 17:30:20 2014 +0000
Revision:
17:bbd6dac92961
Parent:
11:eeb3cbbaa996
Child:
23:ecbbaf64bc3d
Synchronized with git revision b7a925e3cf046d2c5a95f80b14d6c285afbdfa7e



Full URL: https://github.com/mbedmicro/mbed/commit/b7a925e3cf046d2c5a95f80b14d6c285afbdfa7e/



LPC11U35 support for USBDevice and mbed-rtos

Who changed what in which revision?

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samux 1:80ab0d068708 1 /* Copyright (c) 2010-2011 mbed.org, MIT License
samux 1:80ab0d068708 2 *
samux 1:80ab0d068708 3 * Permission is hereby granted, free of charge, to any person obtaining a copy of this software
samux 1:80ab0d068708 4 * and associated documentation files (the "Software"), to deal in the Software without
samux 1:80ab0d068708 5 * restriction, including without limitation the rights to use, copy, modify, merge, publish,
samux 1:80ab0d068708 6 * distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the
samux 1:80ab0d068708 7 * Software is furnished to do so, subject to the following conditions:
samux 1:80ab0d068708 8 *
samux 1:80ab0d068708 9 * The above copyright notice and this permission notice shall be included in all copies or
samux 1:80ab0d068708 10 * substantial portions of the Software.
samux 1:80ab0d068708 11 *
samux 1:80ab0d068708 12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
samux 1:80ab0d068708 13 * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
samux 1:80ab0d068708 14 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
samux 1:80ab0d068708 15 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
samux 1:80ab0d068708 16 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
samux 1:80ab0d068708 17 */
samux 1:80ab0d068708 18
mbed_official 17:bbd6dac92961 19 #if defined(TARGET_LPC11U24) || defined(TARGET_LPC11U35_401) || defined(TARGET_LPC1347)
bogdanm 11:eeb3cbbaa996 20
bogdanm 11:eeb3cbbaa996 21 #if defined(TARGET_LPC1347)
bogdanm 11:eeb3cbbaa996 22 #define USB_IRQ USB_IRQ_IRQn
mbed_official 17:bbd6dac92961 23 #elif defined(TARGET_LPC11U24) || defined(TARGET_LPC11U35_401)
bogdanm 11:eeb3cbbaa996 24 #define USB_IRQ USB_IRQn
bogdanm 11:eeb3cbbaa996 25 #endif
samux 1:80ab0d068708 26
samux 1:80ab0d068708 27 #include "USBHAL.h"
samux 1:80ab0d068708 28
samux 1:80ab0d068708 29 USBHAL * USBHAL::instance;
samux 1:80ab0d068708 30
samux 1:80ab0d068708 31 // Valid physical endpoint numbers are 0 to (NUMBER_OF_PHYSICAL_ENDPOINTS-1)
samux 1:80ab0d068708 32 #define LAST_PHYSICAL_ENDPOINT (NUMBER_OF_PHYSICAL_ENDPOINTS-1)
samux 1:80ab0d068708 33
samux 1:80ab0d068708 34 // Convert physical endpoint number to register bit
samux 1:80ab0d068708 35 #define EP(endpoint) (1UL<<endpoint)
samux 1:80ab0d068708 36
samux 1:80ab0d068708 37 // Convert physical to logical
samux 1:80ab0d068708 38 #define PHY_TO_LOG(endpoint) ((endpoint)>>1)
samux 1:80ab0d068708 39
samux 1:80ab0d068708 40 // Get endpoint direction
samux 1:80ab0d068708 41 #define IN_EP(endpoint) ((endpoint) & 1U ? true : false)
samux 1:80ab0d068708 42 #define OUT_EP(endpoint) ((endpoint) & 1U ? false : true)
samux 1:80ab0d068708 43
samux 1:80ab0d068708 44 // USB RAM
samux 1:80ab0d068708 45 #define USB_RAM_START (0x20004000)
samux 1:80ab0d068708 46 #define USB_RAM_SIZE (0x00000800)
samux 1:80ab0d068708 47
samux 1:80ab0d068708 48 // SYSAHBCLKCTRL
samux 1:80ab0d068708 49 #define CLK_USB (1UL<<14)
samux 1:80ab0d068708 50 #define CLK_USBRAM (1UL<<27)
samux 1:80ab0d068708 51
samux 1:80ab0d068708 52 // USB Information register
samux 1:80ab0d068708 53 #define FRAME_NR(a) ((a) & 0x7ff) // Frame number
samux 1:80ab0d068708 54
samux 1:80ab0d068708 55 // USB Device Command/Status register
samux 1:80ab0d068708 56 #define DEV_ADDR_MASK (0x7f) // Device address
samux 1:80ab0d068708 57 #define DEV_ADDR(a) ((a) & DEV_ADDR_MASK)
samux 1:80ab0d068708 58 #define DEV_EN (1UL<<7) // Device enable
samux 1:80ab0d068708 59 #define SETUP (1UL<<8) // SETUP token received
samux 1:80ab0d068708 60 #define PLL_ON (1UL<<9) // PLL enabled in suspend
samux 1:80ab0d068708 61 #define DCON (1UL<<16) // Device status - connect
samux 1:80ab0d068708 62 #define DSUS (1UL<<17) // Device status - suspend
samux 1:80ab0d068708 63 #define DCON_C (1UL<<24) // Connect change
samux 1:80ab0d068708 64 #define DSUS_C (1UL<<25) // Suspend change
samux 1:80ab0d068708 65 #define DRES_C (1UL<<26) // Reset change
samux 1:80ab0d068708 66 #define VBUSDEBOUNCED (1UL<<28) // Vbus detected
samux 1:80ab0d068708 67
samux 1:80ab0d068708 68 // Endpoint Command/Status list
samux 1:80ab0d068708 69 #define CMDSTS_A (1UL<<31) // Active
samux 1:80ab0d068708 70 #define CMDSTS_D (1UL<<30) // Disable
samux 1:80ab0d068708 71 #define CMDSTS_S (1UL<<29) // Stall
samux 1:80ab0d068708 72 #define CMDSTS_TR (1UL<<28) // Toggle Reset
samux 1:80ab0d068708 73 #define CMDSTS_RF (1UL<<27) // Rate Feedback mode
samux 1:80ab0d068708 74 #define CMDSTS_TV (1UL<<27) // Toggle Value
samux 1:80ab0d068708 75 #define CMDSTS_T (1UL<<26) // Endpoint Type
samux 1:80ab0d068708 76 #define CMDSTS_NBYTES(n) (((n)&0x3ff)<<16) // Number of bytes
samux 1:80ab0d068708 77 #define CMDSTS_ADDRESS_OFFSET(a) (((a)>>6)&0xffff) // Buffer start address
samux 1:80ab0d068708 78
samux 1:80ab0d068708 79 #define BYTES_REMAINING(s) (((s)>>16)&0x3ff) // Bytes remaining after transfer
samux 1:80ab0d068708 80
samux 1:80ab0d068708 81 // USB Non-endpoint interrupt sources
samux 1:80ab0d068708 82 #define FRAME_INT (1UL<<30)
samux 1:80ab0d068708 83 #define DEV_INT (1UL<<31)
samux 1:80ab0d068708 84
samux 1:80ab0d068708 85 static volatile int epComplete = 0;
samux 1:80ab0d068708 86
samux 1:80ab0d068708 87 // One entry for a double-buffered logical endpoint in the endpoint
samux 1:80ab0d068708 88 // command/status list. Endpoint 0 is single buffered, out[1] is used
samux 1:80ab0d068708 89 // for the SETUP packet and in[1] is not used
bogdanm 11:eeb3cbbaa996 90 typedef struct {
samux 1:80ab0d068708 91 uint32_t out[2];
samux 1:80ab0d068708 92 uint32_t in[2];
bogdanm 11:eeb3cbbaa996 93 } PACKED EP_COMMAND_STATUS;
samux 1:80ab0d068708 94
bogdanm 11:eeb3cbbaa996 95 typedef struct {
samux 1:80ab0d068708 96 uint8_t out[MAX_PACKET_SIZE_EP0];
samux 1:80ab0d068708 97 uint8_t in[MAX_PACKET_SIZE_EP0];
samux 1:80ab0d068708 98 uint8_t setup[SETUP_PACKET_SIZE];
bogdanm 11:eeb3cbbaa996 99 } PACKED CONTROL_TRANSFER;
samux 1:80ab0d068708 100
bogdanm 11:eeb3cbbaa996 101 typedef struct {
samux 1:80ab0d068708 102 uint32_t maxPacket;
samux 1:80ab0d068708 103 uint32_t buffer[2];
samux 1:80ab0d068708 104 uint32_t options;
bogdanm 11:eeb3cbbaa996 105 } PACKED EP_STATE;
samux 1:80ab0d068708 106
samux 1:80ab0d068708 107 static volatile EP_STATE endpointState[NUMBER_OF_PHYSICAL_ENDPOINTS];
samux 1:80ab0d068708 108
samux 1:80ab0d068708 109 // Pointer to the endpoint command/status list
samux 1:80ab0d068708 110 static EP_COMMAND_STATUS *ep = NULL;
samux 1:80ab0d068708 111
samux 1:80ab0d068708 112 // Pointer to endpoint 0 data (IN/OUT and SETUP)
samux 1:80ab0d068708 113 static CONTROL_TRANSFER *ct = NULL;
samux 1:80ab0d068708 114
samux 1:80ab0d068708 115 // Shadow DEVCMDSTAT register to avoid accidentally clearing flags or
samux 1:80ab0d068708 116 // initiating a remote wakeup event.
samux 1:80ab0d068708 117 static volatile uint32_t devCmdStat;
samux 1:80ab0d068708 118
samux 1:80ab0d068708 119 // Pointers used to allocate USB RAM
samux 1:80ab0d068708 120 static uint32_t usbRamPtr = USB_RAM_START;
samux 1:80ab0d068708 121 static uint32_t epRamPtr = 0; // Buffers for endpoints > 0 start here
samux 1:80ab0d068708 122
samux 1:80ab0d068708 123 #define ROUND_UP_TO_MULTIPLE(x, m) ((((x)+((m)-1))/(m))*(m))
samux 1:80ab0d068708 124
samux 1:80ab0d068708 125 void USBMemCopy(uint8_t *dst, uint8_t *src, uint32_t size);
samux 1:80ab0d068708 126 void USBMemCopy(uint8_t *dst, uint8_t *src, uint32_t size) {
samux 1:80ab0d068708 127 if (size > 0) {
samux 1:80ab0d068708 128 do {
samux 1:80ab0d068708 129 *dst++ = *src++;
samux 1:80ab0d068708 130 } while (--size > 0);
samux 1:80ab0d068708 131 }
samux 1:80ab0d068708 132 }
samux 1:80ab0d068708 133
samux 1:80ab0d068708 134
samux 1:80ab0d068708 135 USBHAL::USBHAL(void) {
bogdanm 11:eeb3cbbaa996 136 NVIC_DisableIRQ(USB_IRQ);
samux 8:335f2506f422 137
samux 8:335f2506f422 138 // fill in callback array
samux 8:335f2506f422 139 epCallback[0] = &USBHAL::EP1_OUT_callback;
samux 8:335f2506f422 140 epCallback[1] = &USBHAL::EP1_IN_callback;
samux 8:335f2506f422 141 epCallback[2] = &USBHAL::EP2_OUT_callback;
samux 8:335f2506f422 142 epCallback[3] = &USBHAL::EP2_IN_callback;
samux 8:335f2506f422 143 epCallback[4] = &USBHAL::EP3_OUT_callback;
samux 8:335f2506f422 144 epCallback[5] = &USBHAL::EP3_IN_callback;
samux 8:335f2506f422 145 epCallback[6] = &USBHAL::EP4_OUT_callback;
samux 8:335f2506f422 146 epCallback[7] = &USBHAL::EP4_IN_callback;
samux 1:80ab0d068708 147
mbed_official 17:bbd6dac92961 148 #if defined(TARGET_LPC11U35_401)
mbed_official 17:bbd6dac92961 149 // USB_VBUS input with pull-down
mbed_official 17:bbd6dac92961 150 LPC_IOCON->PIO0_3 = 0x00000009;
mbed_official 17:bbd6dac92961 151 #endif
mbed_official 17:bbd6dac92961 152
samux 1:80ab0d068708 153 // nUSB_CONNECT output
samux 1:80ab0d068708 154 LPC_IOCON->PIO0_6 = 0x00000001;
samux 1:80ab0d068708 155
samux 1:80ab0d068708 156 // Enable clocks (USB registers, USB RAM)
samux 1:80ab0d068708 157 LPC_SYSCON->SYSAHBCLKCTRL |= CLK_USB | CLK_USBRAM;
samux 1:80ab0d068708 158
samux 1:80ab0d068708 159 // Ensure device disconnected (DCON not set)
samux 1:80ab0d068708 160 LPC_USB->DEVCMDSTAT = 0;
samux 1:80ab0d068708 161
samux 1:80ab0d068708 162 // to ensure that the USB host sees the device as
samux 1:80ab0d068708 163 // disconnected if the target CPU is reset.
samux 1:80ab0d068708 164 wait(0.3);
samux 1:80ab0d068708 165
samux 1:80ab0d068708 166 // Reserve space in USB RAM for endpoint command/status list
samux 1:80ab0d068708 167 // Must be 256 byte aligned
samux 1:80ab0d068708 168 usbRamPtr = ROUND_UP_TO_MULTIPLE(usbRamPtr, 256);
samux 1:80ab0d068708 169 ep = (EP_COMMAND_STATUS *)usbRamPtr;
samux 1:80ab0d068708 170 usbRamPtr += (sizeof(EP_COMMAND_STATUS) * NUMBER_OF_LOGICAL_ENDPOINTS);
samux 1:80ab0d068708 171 LPC_USB->EPLISTSTART = (uint32_t)(ep) & 0xffffff00;
samux 1:80ab0d068708 172
samux 1:80ab0d068708 173 // Reserve space in USB RAM for Endpoint 0
samux 1:80ab0d068708 174 // Must be 64 byte aligned
samux 1:80ab0d068708 175 usbRamPtr = ROUND_UP_TO_MULTIPLE(usbRamPtr, 64);
samux 1:80ab0d068708 176 ct = (CONTROL_TRANSFER *)usbRamPtr;
samux 1:80ab0d068708 177 usbRamPtr += sizeof(CONTROL_TRANSFER);
samux 1:80ab0d068708 178 LPC_USB->DATABUFSTART =(uint32_t)(ct) & 0xffc00000;
samux 1:80ab0d068708 179
samux 1:80ab0d068708 180 // Setup command/status list for EP0
samux 1:80ab0d068708 181 ep[0].out[0] = 0;
samux 1:80ab0d068708 182 ep[0].in[0] = 0;
samux 1:80ab0d068708 183 ep[0].out[1] = CMDSTS_ADDRESS_OFFSET((uint32_t)ct->setup);
samux 1:80ab0d068708 184
samux 1:80ab0d068708 185 // Route all interrupts to IRQ, some can be routed to
samux 1:80ab0d068708 186 // USB_FIQ if you wish.
samux 1:80ab0d068708 187 LPC_USB->INTROUTING = 0;
samux 1:80ab0d068708 188
samux 1:80ab0d068708 189 // Set device address 0, enable USB device, no remote wakeup
samux 1:80ab0d068708 190 devCmdStat = DEV_ADDR(0) | DEV_EN | DSUS;
samux 1:80ab0d068708 191 LPC_USB->DEVCMDSTAT = devCmdStat;
samux 1:80ab0d068708 192
samux 1:80ab0d068708 193 // Enable interrupts for device events and EP0
samux 1:80ab0d068708 194 LPC_USB->INTEN = DEV_INT | EP(EP0IN) | EP(EP0OUT) | FRAME_INT;
samux 1:80ab0d068708 195 instance = this;
samux 1:80ab0d068708 196
samux 1:80ab0d068708 197 //attach IRQ handler and enable interrupts
bogdanm 11:eeb3cbbaa996 198 NVIC_SetVector(USB_IRQ, (uint32_t)&_usbisr);
samux 1:80ab0d068708 199 }
samux 1:80ab0d068708 200
samux 1:80ab0d068708 201 USBHAL::~USBHAL(void) {
samux 1:80ab0d068708 202 // Ensure device disconnected (DCON not set)
samux 1:80ab0d068708 203 LPC_USB->DEVCMDSTAT = 0;
samux 1:80ab0d068708 204 // Disable USB interrupts
bogdanm 11:eeb3cbbaa996 205 NVIC_DisableIRQ(USB_IRQ);
samux 1:80ab0d068708 206 }
samux 1:80ab0d068708 207
samux 1:80ab0d068708 208 void USBHAL::connect(void) {
bogdanm 11:eeb3cbbaa996 209 NVIC_EnableIRQ(USB_IRQ);
samux 1:80ab0d068708 210 devCmdStat |= DCON;
samux 1:80ab0d068708 211 LPC_USB->DEVCMDSTAT = devCmdStat;
samux 1:80ab0d068708 212 }
samux 1:80ab0d068708 213
samux 1:80ab0d068708 214 void USBHAL::disconnect(void) {
bogdanm 11:eeb3cbbaa996 215 NVIC_DisableIRQ(USB_IRQ);
samux 1:80ab0d068708 216 devCmdStat &= ~DCON;
samux 1:80ab0d068708 217 LPC_USB->DEVCMDSTAT = devCmdStat;
samux 1:80ab0d068708 218 }
samux 1:80ab0d068708 219
samux 1:80ab0d068708 220 void USBHAL::configureDevice(void) {
samux 8:335f2506f422 221 // Not required
samux 1:80ab0d068708 222 }
samux 1:80ab0d068708 223
samux 1:80ab0d068708 224 void USBHAL::unconfigureDevice(void) {
samux 8:335f2506f422 225 // Not required
samux 1:80ab0d068708 226 }
samux 1:80ab0d068708 227
samux 1:80ab0d068708 228 void USBHAL::EP0setup(uint8_t *buffer) {
samux 1:80ab0d068708 229 // Copy setup packet data
samux 1:80ab0d068708 230 USBMemCopy(buffer, ct->setup, SETUP_PACKET_SIZE);
samux 1:80ab0d068708 231 }
samux 1:80ab0d068708 232
samux 1:80ab0d068708 233 void USBHAL::EP0read(void) {
samux 1:80ab0d068708 234 // Start an endpoint 0 read
samux 1:80ab0d068708 235
samux 1:80ab0d068708 236 // The USB ISR will call USBDevice_EP0out() when a packet has been read,
samux 1:80ab0d068708 237 // the USBDevice layer then calls USBBusInterface_EP0getReadResult() to
samux 1:80ab0d068708 238 // read the data.
samux 1:80ab0d068708 239
samux 1:80ab0d068708 240 ep[0].out[0] = CMDSTS_A |CMDSTS_NBYTES(MAX_PACKET_SIZE_EP0) \
samux 1:80ab0d068708 241 | CMDSTS_ADDRESS_OFFSET((uint32_t)ct->out);
samux 1:80ab0d068708 242 }
samux 1:80ab0d068708 243
samux 1:80ab0d068708 244 uint32_t USBHAL::EP0getReadResult(uint8_t *buffer) {
samux 1:80ab0d068708 245 // Complete an endpoint 0 read
samux 1:80ab0d068708 246 uint32_t bytesRead;
samux 1:80ab0d068708 247
samux 1:80ab0d068708 248 // Find how many bytes were read
samux 1:80ab0d068708 249 bytesRead = MAX_PACKET_SIZE_EP0 - BYTES_REMAINING(ep[0].out[0]);
samux 1:80ab0d068708 250
samux 1:80ab0d068708 251 // Copy data
samux 1:80ab0d068708 252 USBMemCopy(buffer, ct->out, bytesRead);
samux 1:80ab0d068708 253 return bytesRead;
samux 1:80ab0d068708 254 }
samux 1:80ab0d068708 255
samux 8:335f2506f422 256
samux 8:335f2506f422 257 void USBHAL::EP0readStage(void) {
samux 8:335f2506f422 258 // Not required
samux 8:335f2506f422 259 }
samux 8:335f2506f422 260
samux 1:80ab0d068708 261 void USBHAL::EP0write(uint8_t *buffer, uint32_t size) {
samux 1:80ab0d068708 262 // Start and endpoint 0 write
samux 1:80ab0d068708 263
samux 1:80ab0d068708 264 // The USB ISR will call USBDevice_EP0in() when the data has
samux 1:80ab0d068708 265 // been written, the USBDevice layer then calls
samux 1:80ab0d068708 266 // USBBusInterface_EP0getWriteResult() to complete the transaction.
samux 1:80ab0d068708 267
samux 1:80ab0d068708 268 // Copy data
samux 1:80ab0d068708 269 USBMemCopy(ct->in, buffer, size);
samux 1:80ab0d068708 270
samux 1:80ab0d068708 271 // Start transfer
samux 1:80ab0d068708 272 ep[0].in[0] = CMDSTS_A | CMDSTS_NBYTES(size) \
samux 1:80ab0d068708 273 | CMDSTS_ADDRESS_OFFSET((uint32_t)ct->in);
samux 1:80ab0d068708 274 }
samux 1:80ab0d068708 275
samux 1:80ab0d068708 276
samux 1:80ab0d068708 277 EP_STATUS USBHAL::endpointRead(uint8_t endpoint, uint32_t maximumSize) {
samux 1:80ab0d068708 278 uint8_t bf = 0;
samux 1:80ab0d068708 279 uint32_t flags = 0;
samux 1:80ab0d068708 280
samux 1:80ab0d068708 281 //check which buffer must be filled
samux 1:80ab0d068708 282 if (LPC_USB->EPBUFCFG & EP(endpoint)) {
samux 1:80ab0d068708 283 // Double buffered
samux 1:80ab0d068708 284 if (LPC_USB->EPINUSE & EP(endpoint)) {
samux 1:80ab0d068708 285 bf = 1;
samux 1:80ab0d068708 286 } else {
samux 1:80ab0d068708 287 bf = 0;
samux 1:80ab0d068708 288 }
samux 1:80ab0d068708 289 }
samux 1:80ab0d068708 290
samux 1:80ab0d068708 291 // if isochronous endpoint, T = 1
samux 1:80ab0d068708 292 if(endpointState[endpoint].options & ISOCHRONOUS)
samux 1:80ab0d068708 293 {
samux 1:80ab0d068708 294 flags |= CMDSTS_T;
samux 1:80ab0d068708 295 }
samux 1:80ab0d068708 296
samux 1:80ab0d068708 297 //Active the endpoint for reading
samux 1:80ab0d068708 298 ep[PHY_TO_LOG(endpoint)].out[bf] = CMDSTS_A | CMDSTS_NBYTES(maximumSize) \
samux 1:80ab0d068708 299 | CMDSTS_ADDRESS_OFFSET((uint32_t)ct->out) | flags;
samux 1:80ab0d068708 300 return EP_PENDING;
samux 1:80ab0d068708 301 }
samux 1:80ab0d068708 302
samux 1:80ab0d068708 303 EP_STATUS USBHAL::endpointReadResult(uint8_t endpoint, uint8_t *data, uint32_t *bytesRead) {
samux 1:80ab0d068708 304
samux 1:80ab0d068708 305 uint8_t bf = 0;
samux 1:80ab0d068708 306
samux 1:80ab0d068708 307 if (!(epComplete & EP(endpoint)))
samux 1:80ab0d068708 308 return EP_PENDING;
samux 1:80ab0d068708 309 else {
samux 1:80ab0d068708 310 epComplete &= ~EP(endpoint);
samux 1:80ab0d068708 311
samux 1:80ab0d068708 312 //check which buffer has been filled
samux 1:80ab0d068708 313 if (LPC_USB->EPBUFCFG & EP(endpoint)) {
samux 1:80ab0d068708 314 // Double buffered (here we read the previous buffer which was used)
samux 1:80ab0d068708 315 if (LPC_USB->EPINUSE & EP(endpoint)) {
samux 1:80ab0d068708 316 bf = 0;
samux 1:80ab0d068708 317 } else {
samux 1:80ab0d068708 318 bf = 1;
samux 1:80ab0d068708 319 }
samux 1:80ab0d068708 320 }
samux 1:80ab0d068708 321
samux 1:80ab0d068708 322 // Find how many bytes were read
samux 1:80ab0d068708 323 *bytesRead = (uint32_t) (endpointState[endpoint].maxPacket - BYTES_REMAINING(ep[PHY_TO_LOG(endpoint)].out[bf]));
samux 1:80ab0d068708 324
samux 1:80ab0d068708 325 // Copy data
samux 1:80ab0d068708 326 USBMemCopy(data, ct->out, *bytesRead);
samux 1:80ab0d068708 327 return EP_COMPLETED;
samux 1:80ab0d068708 328 }
samux 1:80ab0d068708 329 }
samux 1:80ab0d068708 330
samux 1:80ab0d068708 331 void USBHAL::EP0getWriteResult(void) {
samux 8:335f2506f422 332 // Not required
samux 1:80ab0d068708 333 }
samux 1:80ab0d068708 334
samux 1:80ab0d068708 335 void USBHAL::EP0stall(void) {
samux 1:80ab0d068708 336 ep[0].in[0] = CMDSTS_S;
samux 1:80ab0d068708 337 ep[0].out[0] = CMDSTS_S;
samux 1:80ab0d068708 338 }
samux 1:80ab0d068708 339
samux 1:80ab0d068708 340 void USBHAL::setAddress(uint8_t address) {
samux 1:80ab0d068708 341 devCmdStat &= ~DEV_ADDR_MASK;
samux 1:80ab0d068708 342 devCmdStat |= DEV_ADDR(address);
samux 1:80ab0d068708 343 LPC_USB->DEVCMDSTAT = devCmdStat;
samux 1:80ab0d068708 344 }
samux 1:80ab0d068708 345
samux 1:80ab0d068708 346 EP_STATUS USBHAL::endpointWrite(uint8_t endpoint, uint8_t *data, uint32_t size) {
samux 1:80ab0d068708 347 uint32_t flags = 0;
samux 1:80ab0d068708 348 uint32_t bf;
samux 1:80ab0d068708 349
samux 1:80ab0d068708 350 // Validate parameters
samux 1:80ab0d068708 351 if (data == NULL) {
samux 1:80ab0d068708 352 return EP_INVALID;
samux 1:80ab0d068708 353 }
samux 1:80ab0d068708 354
samux 1:80ab0d068708 355 if (endpoint > LAST_PHYSICAL_ENDPOINT) {
samux 1:80ab0d068708 356 return EP_INVALID;
samux 1:80ab0d068708 357 }
samux 1:80ab0d068708 358
samux 1:80ab0d068708 359 if ((endpoint==EP0IN) || (endpoint==EP0OUT)) {
samux 1:80ab0d068708 360 return EP_INVALID;
samux 1:80ab0d068708 361 }
samux 1:80ab0d068708 362
samux 1:80ab0d068708 363 if (size > endpointState[endpoint].maxPacket) {
samux 1:80ab0d068708 364 return EP_INVALID;
samux 1:80ab0d068708 365 }
samux 1:80ab0d068708 366
samux 1:80ab0d068708 367 if (LPC_USB->EPBUFCFG & EP(endpoint)) {
samux 1:80ab0d068708 368 // Double buffered
samux 1:80ab0d068708 369 if (LPC_USB->EPINUSE & EP(endpoint)) {
samux 1:80ab0d068708 370 bf = 1;
samux 1:80ab0d068708 371 } else {
samux 1:80ab0d068708 372 bf = 0;
samux 1:80ab0d068708 373 }
samux 1:80ab0d068708 374 } else {
samux 1:80ab0d068708 375 // Single buffered
samux 1:80ab0d068708 376 bf = 0;
samux 1:80ab0d068708 377 }
samux 1:80ab0d068708 378
samux 1:80ab0d068708 379 // Check if already active
samux 1:80ab0d068708 380 if (ep[PHY_TO_LOG(endpoint)].in[bf] & CMDSTS_A) {
samux 1:80ab0d068708 381 return EP_INVALID;
samux 1:80ab0d068708 382 }
samux 1:80ab0d068708 383
samux 1:80ab0d068708 384 // Check if stalled
samux 1:80ab0d068708 385 if (ep[PHY_TO_LOG(endpoint)].in[bf] & CMDSTS_S) {
samux 1:80ab0d068708 386 return EP_STALLED;
samux 1:80ab0d068708 387 }
samux 1:80ab0d068708 388
samux 1:80ab0d068708 389 // Copy data to USB RAM
samux 1:80ab0d068708 390 USBMemCopy((uint8_t *)endpointState[endpoint].buffer[bf], data, size);
samux 1:80ab0d068708 391
samux 1:80ab0d068708 392 // Add options
samux 1:80ab0d068708 393 if (endpointState[endpoint].options & RATE_FEEDBACK_MODE) {
samux 1:80ab0d068708 394 flags |= CMDSTS_RF;
samux 1:80ab0d068708 395 }
samux 1:80ab0d068708 396
samux 1:80ab0d068708 397 if (endpointState[endpoint].options & ISOCHRONOUS) {
samux 1:80ab0d068708 398 flags |= CMDSTS_T;
samux 1:80ab0d068708 399 }
samux 1:80ab0d068708 400
samux 1:80ab0d068708 401 // Add transfer
samux 1:80ab0d068708 402 ep[PHY_TO_LOG(endpoint)].in[bf] = CMDSTS_ADDRESS_OFFSET( \
samux 1:80ab0d068708 403 endpointState[endpoint].buffer[bf]) \
samux 1:80ab0d068708 404 | CMDSTS_NBYTES(size) | CMDSTS_A | flags;
samux 1:80ab0d068708 405
samux 1:80ab0d068708 406 return EP_PENDING;
samux 1:80ab0d068708 407 }
samux 1:80ab0d068708 408
samux 1:80ab0d068708 409 EP_STATUS USBHAL::endpointWriteResult(uint8_t endpoint) {
samux 1:80ab0d068708 410 uint32_t bf;
samux 8:335f2506f422 411
samux 1:80ab0d068708 412 // Validate parameters
samux 1:80ab0d068708 413 if (endpoint > LAST_PHYSICAL_ENDPOINT) {
samux 1:80ab0d068708 414 return EP_INVALID;
samux 1:80ab0d068708 415 }
samux 1:80ab0d068708 416
samux 1:80ab0d068708 417 if (OUT_EP(endpoint)) {
samux 1:80ab0d068708 418 return EP_INVALID;
samux 1:80ab0d068708 419 }
samux 1:80ab0d068708 420
samux 1:80ab0d068708 421 if (LPC_USB->EPBUFCFG & EP(endpoint)) {
samux 1:80ab0d068708 422 // Double buffered // TODO: FIX THIS
samux 1:80ab0d068708 423 if (LPC_USB->EPINUSE & EP(endpoint)) {
samux 1:80ab0d068708 424 bf = 1;
samux 1:80ab0d068708 425 } else {
samux 1:80ab0d068708 426 bf = 0;
samux 1:80ab0d068708 427 }
samux 1:80ab0d068708 428 } else {
samux 1:80ab0d068708 429 // Single buffered
samux 1:80ab0d068708 430 bf = 0;
samux 1:80ab0d068708 431 }
samux 1:80ab0d068708 432
samux 1:80ab0d068708 433 // Check if endpoint still active
samux 1:80ab0d068708 434 if (ep[PHY_TO_LOG(endpoint)].in[bf] & CMDSTS_A) {
samux 1:80ab0d068708 435 return EP_PENDING;
samux 1:80ab0d068708 436 }
samux 1:80ab0d068708 437
samux 1:80ab0d068708 438 // Check if stalled
samux 1:80ab0d068708 439 if (ep[PHY_TO_LOG(endpoint)].in[bf] & CMDSTS_S) {
samux 1:80ab0d068708 440 return EP_STALLED;
samux 1:80ab0d068708 441 }
samux 1:80ab0d068708 442
samux 1:80ab0d068708 443 return EP_COMPLETED;
samux 1:80ab0d068708 444 }
samux 1:80ab0d068708 445
samux 1:80ab0d068708 446 void USBHAL::stallEndpoint(uint8_t endpoint) {
samux 1:80ab0d068708 447
samux 8:335f2506f422 448 // FIX: should this clear active bit?
samux 1:80ab0d068708 449 if (IN_EP(endpoint)) {
samux 1:80ab0d068708 450 ep[PHY_TO_LOG(endpoint)].in[0] |= CMDSTS_S;
samux 1:80ab0d068708 451 ep[PHY_TO_LOG(endpoint)].in[1] |= CMDSTS_S;
samux 1:80ab0d068708 452 } else {
samux 1:80ab0d068708 453 ep[PHY_TO_LOG(endpoint)].out[0] |= CMDSTS_S;
samux 1:80ab0d068708 454 ep[PHY_TO_LOG(endpoint)].out[1] |= CMDSTS_S;
samux 1:80ab0d068708 455 }
samux 1:80ab0d068708 456 }
samux 1:80ab0d068708 457
samux 1:80ab0d068708 458 void USBHAL::unstallEndpoint(uint8_t endpoint) {
samux 1:80ab0d068708 459 if (LPC_USB->EPBUFCFG & EP(endpoint)) {
samux 1:80ab0d068708 460 // Double buffered
samux 1:80ab0d068708 461 if (IN_EP(endpoint)) {
samux 1:80ab0d068708 462 ep[PHY_TO_LOG(endpoint)].in[0] = 0; // S = 0
samux 1:80ab0d068708 463 ep[PHY_TO_LOG(endpoint)].in[1] = 0; // S = 0
samux 1:80ab0d068708 464
samux 1:80ab0d068708 465 if (LPC_USB->EPINUSE & EP(endpoint)) {
samux 8:335f2506f422 466 ep[PHY_TO_LOG(endpoint)].in[1] = CMDSTS_TR; // S = 0, TR = 1, TV = 0
samux 1:80ab0d068708 467 } else {
samux 8:335f2506f422 468 ep[PHY_TO_LOG(endpoint)].in[0] = CMDSTS_TR; // S = 0, TR = 1, TV = 0
samux 1:80ab0d068708 469 }
samux 1:80ab0d068708 470 } else {
samux 1:80ab0d068708 471 ep[PHY_TO_LOG(endpoint)].out[0] = 0; // S = 0
samux 1:80ab0d068708 472 ep[PHY_TO_LOG(endpoint)].out[1] = 0; // S = 0
samux 1:80ab0d068708 473
samux 1:80ab0d068708 474 if (LPC_USB->EPINUSE & EP(endpoint)) {
samux 8:335f2506f422 475 ep[PHY_TO_LOG(endpoint)].out[1] = CMDSTS_TR; // S = 0, TR = 1, TV = 0
samux 1:80ab0d068708 476 } else {
samux 8:335f2506f422 477 ep[PHY_TO_LOG(endpoint)].out[0] = CMDSTS_TR; // S = 0, TR = 1, TV = 0
samux 1:80ab0d068708 478 }
samux 1:80ab0d068708 479 }
samux 1:80ab0d068708 480 } else {
samux 1:80ab0d068708 481 // Single buffered
samux 1:80ab0d068708 482 if (IN_EP(endpoint)) {
samux 8:335f2506f422 483 ep[PHY_TO_LOG(endpoint)].in[0] = CMDSTS_TR; // S = 0, TR = 1, TV = 0
samux 1:80ab0d068708 484 } else {
samux 8:335f2506f422 485 ep[PHY_TO_LOG(endpoint)].out[0] = CMDSTS_TR; // S = 0, TR = 1, TV = 0
samux 1:80ab0d068708 486 }
samux 1:80ab0d068708 487 }
samux 1:80ab0d068708 488 }
samux 1:80ab0d068708 489
samux 1:80ab0d068708 490 bool USBHAL::getEndpointStallState(unsigned char endpoint) {
samux 1:80ab0d068708 491 if (IN_EP(endpoint)) {
samux 1:80ab0d068708 492 if (LPC_USB->EPINUSE & EP(endpoint)) {
samux 1:80ab0d068708 493 if (ep[PHY_TO_LOG(endpoint)].in[1] & CMDSTS_S) {
samux 1:80ab0d068708 494 return true;
samux 1:80ab0d068708 495 }
samux 1:80ab0d068708 496 } else {
samux 1:80ab0d068708 497 if (ep[PHY_TO_LOG(endpoint)].in[0] & CMDSTS_S) {
samux 1:80ab0d068708 498 return true;
samux 1:80ab0d068708 499 }
samux 1:80ab0d068708 500 }
samux 1:80ab0d068708 501 } else {
samux 1:80ab0d068708 502 if (LPC_USB->EPINUSE & EP(endpoint)) {
samux 1:80ab0d068708 503 if (ep[PHY_TO_LOG(endpoint)].out[1] & CMDSTS_S) {
samux 1:80ab0d068708 504 return true;
samux 1:80ab0d068708 505 }
samux 1:80ab0d068708 506 } else {
samux 1:80ab0d068708 507 if (ep[PHY_TO_LOG(endpoint)].out[0] & CMDSTS_S) {
samux 1:80ab0d068708 508 return true;
samux 1:80ab0d068708 509 }
samux 1:80ab0d068708 510 }
samux 1:80ab0d068708 511 }
samux 1:80ab0d068708 512
samux 1:80ab0d068708 513 return false;
samux 1:80ab0d068708 514 }
samux 1:80ab0d068708 515
samux 1:80ab0d068708 516 bool USBHAL::realiseEndpoint(uint8_t endpoint, uint32_t maxPacket, uint32_t options) {
samux 1:80ab0d068708 517 uint32_t tmpEpRamPtr;
samux 1:80ab0d068708 518
samux 1:80ab0d068708 519 if (endpoint > LAST_PHYSICAL_ENDPOINT) {
samux 1:80ab0d068708 520 return false;
samux 1:80ab0d068708 521 }
samux 1:80ab0d068708 522
samux 1:80ab0d068708 523 // Not applicable to the control endpoints
samux 1:80ab0d068708 524 if ((endpoint==EP0IN) || (endpoint==EP0OUT)) {
samux 1:80ab0d068708 525 return false;
samux 1:80ab0d068708 526 }
samux 1:80ab0d068708 527
samux 1:80ab0d068708 528 // Allocate buffers in USB RAM
samux 1:80ab0d068708 529 tmpEpRamPtr = epRamPtr;
samux 1:80ab0d068708 530
samux 1:80ab0d068708 531 // Must be 64 byte aligned
samux 1:80ab0d068708 532 tmpEpRamPtr = ROUND_UP_TO_MULTIPLE(tmpEpRamPtr, 64);
samux 1:80ab0d068708 533
samux 1:80ab0d068708 534 if ((tmpEpRamPtr + maxPacket) > (USB_RAM_START + USB_RAM_SIZE)) {
samux 1:80ab0d068708 535 // Out of memory
samux 1:80ab0d068708 536 return false;
samux 1:80ab0d068708 537 }
samux 1:80ab0d068708 538
samux 1:80ab0d068708 539 // Allocate first buffer
samux 1:80ab0d068708 540 endpointState[endpoint].buffer[0] = tmpEpRamPtr;
samux 1:80ab0d068708 541 tmpEpRamPtr += maxPacket;
samux 1:80ab0d068708 542
samux 1:80ab0d068708 543 if (!(options & SINGLE_BUFFERED)) {
samux 1:80ab0d068708 544 // Must be 64 byte aligned
samux 1:80ab0d068708 545 tmpEpRamPtr = ROUND_UP_TO_MULTIPLE(tmpEpRamPtr, 64);
samux 1:80ab0d068708 546
samux 1:80ab0d068708 547 if ((tmpEpRamPtr + maxPacket) > (USB_RAM_START + USB_RAM_SIZE)) {
samux 1:80ab0d068708 548 // Out of memory
samux 1:80ab0d068708 549 return false;
samux 1:80ab0d068708 550 }
samux 1:80ab0d068708 551
samux 1:80ab0d068708 552 // Allocate second buffer
samux 1:80ab0d068708 553 endpointState[endpoint].buffer[1] = tmpEpRamPtr;
samux 1:80ab0d068708 554 tmpEpRamPtr += maxPacket;
samux 1:80ab0d068708 555 }
samux 1:80ab0d068708 556
samux 1:80ab0d068708 557 // Commit to this USB RAM allocation
samux 1:80ab0d068708 558 epRamPtr = tmpEpRamPtr;
samux 1:80ab0d068708 559
samux 1:80ab0d068708 560 // Remaining endpoint state values
samux 1:80ab0d068708 561 endpointState[endpoint].maxPacket = maxPacket;
samux 1:80ab0d068708 562 endpointState[endpoint].options = options;
samux 1:80ab0d068708 563
samux 1:80ab0d068708 564 // Enable double buffering if required
samux 1:80ab0d068708 565 if (options & SINGLE_BUFFERED) {
samux 1:80ab0d068708 566 LPC_USB->EPBUFCFG &= ~EP(endpoint);
samux 1:80ab0d068708 567 } else {
samux 1:80ab0d068708 568 // Double buffered
samux 1:80ab0d068708 569 LPC_USB->EPBUFCFG |= EP(endpoint);
samux 1:80ab0d068708 570 }
samux 1:80ab0d068708 571
samux 1:80ab0d068708 572 // Enable interrupt
samux 1:80ab0d068708 573 LPC_USB->INTEN |= EP(endpoint);
samux 1:80ab0d068708 574
samux 1:80ab0d068708 575 // Enable endpoint
samux 1:80ab0d068708 576 unstallEndpoint(endpoint);
samux 1:80ab0d068708 577 return true;
samux 1:80ab0d068708 578 }
samux 1:80ab0d068708 579
samux 1:80ab0d068708 580 void USBHAL::remoteWakeup(void) {
samux 1:80ab0d068708 581 // Clearing DSUS bit initiates a remote wakeup if the
samux 1:80ab0d068708 582 // device is currently enabled and suspended - otherwise
samux 1:80ab0d068708 583 // it has no effect.
samux 1:80ab0d068708 584 LPC_USB->DEVCMDSTAT = devCmdStat & ~DSUS;
samux 1:80ab0d068708 585 }
samux 1:80ab0d068708 586
samux 1:80ab0d068708 587
samux 1:80ab0d068708 588 static void disableEndpoints(void) {
samux 1:80ab0d068708 589 uint32_t logEp;
samux 1:80ab0d068708 590
samux 1:80ab0d068708 591 // Ref. Table 158 "When a bus reset is received, software
samux 1:80ab0d068708 592 // must set the disable bit of all endpoints to 1".
samux 1:80ab0d068708 593
samux 1:80ab0d068708 594 for (logEp = 1; logEp < NUMBER_OF_LOGICAL_ENDPOINTS; logEp++) {
samux 1:80ab0d068708 595 ep[logEp].out[0] = CMDSTS_D;
samux 1:80ab0d068708 596 ep[logEp].out[1] = CMDSTS_D;
samux 1:80ab0d068708 597 ep[logEp].in[0] = CMDSTS_D;
samux 1:80ab0d068708 598 ep[logEp].in[1] = CMDSTS_D;
samux 1:80ab0d068708 599 }
samux 1:80ab0d068708 600
samux 1:80ab0d068708 601 // Start of USB RAM for endpoints > 0
samux 1:80ab0d068708 602 epRamPtr = usbRamPtr;
samux 1:80ab0d068708 603 }
samux 1:80ab0d068708 604
samux 1:80ab0d068708 605
samux 1:80ab0d068708 606
samux 1:80ab0d068708 607 void USBHAL::_usbisr(void) {
samux 1:80ab0d068708 608 instance->usbisr();
samux 1:80ab0d068708 609 }
samux 1:80ab0d068708 610
samux 1:80ab0d068708 611 void USBHAL::usbisr(void) {
samux 1:80ab0d068708 612 // Start of frame
samux 1:80ab0d068708 613 if (LPC_USB->INTSTAT & FRAME_INT) {
samux 1:80ab0d068708 614 // Clear SOF interrupt
samux 1:80ab0d068708 615 LPC_USB->INTSTAT = FRAME_INT;
samux 1:80ab0d068708 616
samux 1:80ab0d068708 617 // SOF event, read frame number
samux 1:80ab0d068708 618 SOF(FRAME_NR(LPC_USB->INFO));
samux 1:80ab0d068708 619 }
samux 1:80ab0d068708 620
samux 1:80ab0d068708 621 // Device state
samux 1:80ab0d068708 622 if (LPC_USB->INTSTAT & DEV_INT) {
samux 1:80ab0d068708 623 LPC_USB->INTSTAT = DEV_INT;
samux 1:80ab0d068708 624
samux 1:80ab0d068708 625 if (LPC_USB->DEVCMDSTAT & DSUS_C) {
samux 1:80ab0d068708 626 // Suspend status changed
samux 1:80ab0d068708 627 LPC_USB->DEVCMDSTAT = devCmdStat | DSUS_C;
samux 1:80ab0d068708 628 if((LPC_USB->DEVCMDSTAT & DSUS) != 0) {
samux 1:80ab0d068708 629 suspendStateChanged(1);
samux 1:80ab0d068708 630 }
samux 1:80ab0d068708 631 }
samux 1:80ab0d068708 632
samux 1:80ab0d068708 633 if (LPC_USB->DEVCMDSTAT & DRES_C) {
samux 1:80ab0d068708 634 // Bus reset
samux 1:80ab0d068708 635 LPC_USB->DEVCMDSTAT = devCmdStat | DRES_C;
samux 1:80ab0d068708 636
samux 1:80ab0d068708 637 suspendStateChanged(0);
samux 1:80ab0d068708 638
samux 1:80ab0d068708 639 // Disable endpoints > 0
samux 1:80ab0d068708 640 disableEndpoints();
samux 1:80ab0d068708 641
samux 1:80ab0d068708 642 // Bus reset event
samux 1:80ab0d068708 643 busReset();
samux 1:80ab0d068708 644 }
samux 1:80ab0d068708 645 }
samux 1:80ab0d068708 646
samux 1:80ab0d068708 647 // Endpoint 0
samux 1:80ab0d068708 648 if (LPC_USB->INTSTAT & EP(EP0OUT)) {
samux 1:80ab0d068708 649 // Clear EP0OUT/SETUP interrupt
samux 1:80ab0d068708 650 LPC_USB->INTSTAT = EP(EP0OUT);
samux 1:80ab0d068708 651
samux 1:80ab0d068708 652 // Check if SETUP
samux 1:80ab0d068708 653 if (LPC_USB->DEVCMDSTAT & SETUP) {
samux 1:80ab0d068708 654 // Clear Active and Stall bits for EP0
samux 1:80ab0d068708 655 // Documentation does not make it clear if we must use the
samux 1:80ab0d068708 656 // EPSKIP register to achieve this, Fig. 16 and NXP reference
samux 1:80ab0d068708 657 // code suggests we can just clear the Active bits - check with
samux 1:80ab0d068708 658 // NXP to be sure.
samux 1:80ab0d068708 659 ep[0].in[0] = 0;
samux 1:80ab0d068708 660 ep[0].out[0] = 0;
samux 1:80ab0d068708 661
samux 1:80ab0d068708 662 // Clear EP0IN interrupt
samux 1:80ab0d068708 663 LPC_USB->INTSTAT = EP(EP0IN);
samux 1:80ab0d068708 664
samux 1:80ab0d068708 665 // Clear SETUP (and INTONNAK_CI/O) in device status register
samux 1:80ab0d068708 666 LPC_USB->DEVCMDSTAT = devCmdStat | SETUP;
samux 1:80ab0d068708 667
samux 1:80ab0d068708 668 // EP0 SETUP event (SETUP data received)
samux 1:80ab0d068708 669 EP0setupCallback();
samux 1:80ab0d068708 670 } else {
samux 1:80ab0d068708 671 // EP0OUT ACK event (OUT data received)
samux 1:80ab0d068708 672 EP0out();
samux 1:80ab0d068708 673 }
samux 1:80ab0d068708 674 }
samux 1:80ab0d068708 675
samux 1:80ab0d068708 676 if (LPC_USB->INTSTAT & EP(EP0IN)) {
samux 1:80ab0d068708 677 // Clear EP0IN interrupt
samux 1:80ab0d068708 678 LPC_USB->INTSTAT = EP(EP0IN);
samux 1:80ab0d068708 679
samux 1:80ab0d068708 680 // EP0IN ACK event (IN data sent)
samux 1:80ab0d068708 681 EP0in();
samux 1:80ab0d068708 682 }
samux 8:335f2506f422 683
samux 8:335f2506f422 684 for (uint8_t num = 2; num < 5*2; num++) {
samux 8:335f2506f422 685 if (LPC_USB->INTSTAT & EP(num)) {
samux 8:335f2506f422 686 LPC_USB->INTSTAT = EP(num);
samux 8:335f2506f422 687 epComplete |= EP(num);
samux 8:335f2506f422 688 if ((instance->*(epCallback[num - 2]))()) {
samux 8:335f2506f422 689 epComplete &= ~EP(num);
samux 8:335f2506f422 690 }
samux 8:335f2506f422 691 }
samux 1:80ab0d068708 692 }
samux 1:80ab0d068708 693 }
samux 1:80ab0d068708 694
samux 1:80ab0d068708 695 #endif