p igmon / Mbed 2 deprecated uGen4x

PCM Digital Synthesizer

Dependencies:   LCD mbed

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stm32f4xx_hal_msp.cpp@0:ad6637c36dc7, 2016-09-02 (annotated)

Committer:
p_igmon
Date:
Fri Sep 02 13:24:16 2016 +0000
Revision:
0:ad6637c36dc7
for Micro Gen4 Synthesizer

Who changed what in which revision?

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p_igmon 0:ad6637c36dc7 1 /**
p_igmon 0:ad6637c36dc7 2 ******************************************************************************
p_igmon 0:ad6637c36dc7 3 * File Name : stm32f4xx_hal_msp.c
p_igmon 0:ad6637c36dc7 4 * Date : 22/06/2014 09:00:07
p_igmon 0:ad6637c36dc7 5 * Description : This file provides code for the MSP Initialization
p_igmon 0:ad6637c36dc7 6 * and de-Initialization codes.
p_igmon 0:ad6637c36dc7 7 ******************************************************************************
p_igmon 0:ad6637c36dc7 8 *
p_igmon 0:ad6637c36dc7 9 * COPYRIGHT(c) 2014 STMicroelectronics
p_igmon 0:ad6637c36dc7 10 *
p_igmon 0:ad6637c36dc7 11 * Redistribution and use in source and binary forms, with or without modification,
p_igmon 0:ad6637c36dc7 12 * are permitted provided that the following conditions are met:
p_igmon 0:ad6637c36dc7 13 * 1. Redistributions of source code must retain the above copyright notice,
p_igmon 0:ad6637c36dc7 14 * this list of conditions and the following disclaimer.
p_igmon 0:ad6637c36dc7 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
p_igmon 0:ad6637c36dc7 16 * this list of conditions and the following disclaimer in the documentation
p_igmon 0:ad6637c36dc7 17 * and/or other materials provided with the distribution.
p_igmon 0:ad6637c36dc7 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
p_igmon 0:ad6637c36dc7 19 * may be used to endorse or promote products derived from this software
p_igmon 0:ad6637c36dc7 20 * without specific prior written permission.
p_igmon 0:ad6637c36dc7 21 *
p_igmon 0:ad6637c36dc7 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
p_igmon 0:ad6637c36dc7 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
p_igmon 0:ad6637c36dc7 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
p_igmon 0:ad6637c36dc7 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
p_igmon 0:ad6637c36dc7 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
p_igmon 0:ad6637c36dc7 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
p_igmon 0:ad6637c36dc7 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
p_igmon 0:ad6637c36dc7 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
p_igmon 0:ad6637c36dc7 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
p_igmon 0:ad6637c36dc7 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
p_igmon 0:ad6637c36dc7 32 *
p_igmon 0:ad6637c36dc7 33 ******************************************************************************
p_igmon 0:ad6637c36dc7 34 */
p_igmon 0:ad6637c36dc7 35
p_igmon 0:ad6637c36dc7 36 #include "synthesizer.h"
p_igmon 0:ad6637c36dc7 37 extern DigitalOut myled;
p_igmon 0:ad6637c36dc7 38
p_igmon 0:ad6637c36dc7 39 extern DMA_HandleTypeDef hdma_i2s2_ext_tx;
p_igmon 0:ad6637c36dc7 40
p_igmon 0:ad6637c36dc7 41 void HAL_I2S_MspInit(I2S_HandleTypeDef* hi2s)
p_igmon 0:ad6637c36dc7 42 {
p_igmon 0:ad6637c36dc7 43
p_igmon 0:ad6637c36dc7 44 // GPIO_InitTypeDef GPIO_InitStruct;
p_igmon 0:ad6637c36dc7 45 if(hi2s->Instance==SPI2)
p_igmon 0:ad6637c36dc7 46 {
p_igmon 0:ad6637c36dc7 47 /* Peripheral clock enable */
p_igmon 0:ad6637c36dc7 48 __SPI2_CLK_ENABLE();
p_igmon 0:ad6637c36dc7 49
p_igmon 0:ad6637c36dc7 50 /**I2S2 GPIO Configuration
p_igmon 0:ad6637c36dc7 51 PC3 ------> I2S2_SD
p_igmon 0:ad6637c36dc7 52 PB10 ------> I2S2_CK
p_igmon 0:ad6637c36dc7 53 PB12 ------> I2S2_WS
p_igmon 0:ad6637c36dc7 54 PC6 ------> I2S2_MCK
p_igmon 0:ad6637c36dc7 55 */
p_igmon 0:ad6637c36dc7 56 /*
p_igmon 0:ad6637c36dc7 57 GPIO_InitStruct.Pin = GPIO_PIN_3|GPIO_PIN_6;
p_igmon 0:ad6637c36dc7 58 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
p_igmon 0:ad6637c36dc7 59 GPIO_InitStruct.Pull = GPIO_NOPULL;
p_igmon 0:ad6637c36dc7 60 GPIO_InitStruct.Speed = GPIO_SPEED_LOW;
p_igmon 0:ad6637c36dc7 61 GPIO_InitStruct.Alternate = GPIO_AF5_SPI2;
p_igmon 0:ad6637c36dc7 62 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
p_igmon 0:ad6637c36dc7 63
p_igmon 0:ad6637c36dc7 64 GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_12;
p_igmon 0:ad6637c36dc7 65 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
p_igmon 0:ad6637c36dc7 66 GPIO_InitStruct.Pull = GPIO_NOPULL;
p_igmon 0:ad6637c36dc7 67 GPIO_InitStruct.Speed = GPIO_SPEED_LOW;
p_igmon 0:ad6637c36dc7 68 GPIO_InitStruct.Alternate = GPIO_AF5_SPI2;
p_igmon 0:ad6637c36dc7 69 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
p_igmon 0:ad6637c36dc7 70 */
p_igmon 0:ad6637c36dc7 71 /* Peripheral DMA init*/
p_igmon 0:ad6637c36dc7 72
p_igmon 0:ad6637c36dc7 73 hdma_i2s2_ext_tx.Instance = DMA1_Stream4;
p_igmon 0:ad6637c36dc7 74 hdma_i2s2_ext_tx.Init.Channel = DMA_CHANNEL_0;
p_igmon 0:ad6637c36dc7 75 hdma_i2s2_ext_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
p_igmon 0:ad6637c36dc7 76 hdma_i2s2_ext_tx.Init.PeriphInc = DMA_PINC_DISABLE;
p_igmon 0:ad6637c36dc7 77 hdma_i2s2_ext_tx.Init.MemInc = DMA_MINC_ENABLE;
p_igmon 0:ad6637c36dc7 78 hdma_i2s2_ext_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
p_igmon 0:ad6637c36dc7 79 hdma_i2s2_ext_tx.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
p_igmon 0:ad6637c36dc7 80 hdma_i2s2_ext_tx.Init.Mode = DMA_NORMAL;
p_igmon 0:ad6637c36dc7 81 hdma_i2s2_ext_tx.Init.Priority = DMA_PRIORITY_LOW;
p_igmon 0:ad6637c36dc7 82 hdma_i2s2_ext_tx.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
p_igmon 0:ad6637c36dc7 83 hdma_i2s2_ext_tx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
p_igmon 0:ad6637c36dc7 84 hdma_i2s2_ext_tx.Init.MemBurst = DMA_MBURST_SINGLE;
p_igmon 0:ad6637c36dc7 85 hdma_i2s2_ext_tx.Init.PeriphBurst = DMA_PBURST_SINGLE;
p_igmon 0:ad6637c36dc7 86 HAL_DMA_Init(&hdma_i2s2_ext_tx);
p_igmon 0:ad6637c36dc7 87
p_igmon 0:ad6637c36dc7 88 __HAL_LINKDMA(hi2s,hdmatx,hdma_i2s2_ext_tx);
p_igmon 0:ad6637c36dc7 89 // myled =1;
p_igmon 0:ad6637c36dc7 90 }
p_igmon 0:ad6637c36dc7 91
p_igmon 0:ad6637c36dc7 92 }
p_igmon 0:ad6637c36dc7 93
p_igmon 0:ad6637c36dc7 94 void HAL_I2S_MspDeInit(I2S_HandleTypeDef* hi2s)
p_igmon 0:ad6637c36dc7 95 {
p_igmon 0:ad6637c36dc7 96
p_igmon 0:ad6637c36dc7 97 if(hi2s->Instance==SPI2)
p_igmon 0:ad6637c36dc7 98 {
p_igmon 0:ad6637c36dc7 99 /* Peripheral clock disable */
p_igmon 0:ad6637c36dc7 100 __SPI2_CLK_DISABLE();
p_igmon 0:ad6637c36dc7 101
p_igmon 0:ad6637c36dc7 102 /**I2S2 GPIO Configuration
p_igmon 0:ad6637c36dc7 103 PC3 ------> I2S2_SD
p_igmon 0:ad6637c36dc7 104 PB10 ------> I2S2_CK
p_igmon 0:ad6637c36dc7 105 PB12 ------> I2S2_WS
p_igmon 0:ad6637c36dc7 106 PC6 ------> I2S2_MCK
p_igmon 0:ad6637c36dc7 107 */
p_igmon 0:ad6637c36dc7 108 // HAL_GPIO_DeInit(GPIOC, GPIO_PIN_3|GPIO_PIN_6);
p_igmon 0:ad6637c36dc7 109
p_igmon 0:ad6637c36dc7 110 // HAL_GPIO_DeInit(GPIOB, GPIO_PIN_10|GPIO_PIN_12);
p_igmon 0:ad6637c36dc7 111
p_igmon 0:ad6637c36dc7 112 /* Peripheral DMA DeInit*/
p_igmon 0:ad6637c36dc7 113 HAL_DMA_DeInit(hi2s->hdmatx);
p_igmon 0:ad6637c36dc7 114 }
p_igmon 0:ad6637c36dc7 115
p_igmon 0:ad6637c36dc7 116 }
p_igmon 0:ad6637c36dc7 117
p_igmon 0:ad6637c36dc7 118
p_igmon 0:ad6637c36dc7 119 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
p_igmon 0:ad6637c36dc7 120
p_igmon 0:ad6637c36dc7 121
p_igmon 0:ad6637c36dc7 122
p_igmon 0:ad6637c36dc7 123