PCM Digital Synthesizer

Dependencies:   LCD mbed

/media/uploads/p_igmon/img_1731-w480.jpg

Committer:
p_igmon
Date:
Fri Sep 02 13:24:16 2016 +0000
Revision:
0:ad6637c36dc7
for Micro Gen4 Synthesizer

Who changed what in which revision?

UserRevisionLine numberNew contents of line
p_igmon 0:ad6637c36dc7 1 /**
p_igmon 0:ad6637c36dc7 2 ******************************************************************************
p_igmon 0:ad6637c36dc7 3 * @file stm32f4xx_hal_conf.h
p_igmon 0:ad6637c36dc7 4 * @brief HAL configuration file.
p_igmon 0:ad6637c36dc7 5 ******************************************************************************
p_igmon 0:ad6637c36dc7 6 * @attention
p_igmon 0:ad6637c36dc7 7 *
p_igmon 0:ad6637c36dc7 8 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
p_igmon 0:ad6637c36dc7 9 *
p_igmon 0:ad6637c36dc7 10 * Redistribution and use in source and binary forms, with or without modification,
p_igmon 0:ad6637c36dc7 11 * are permitted provided that the following conditions are met:
p_igmon 0:ad6637c36dc7 12 * 1. Redistributions of source code must retain the above copyright notice,
p_igmon 0:ad6637c36dc7 13 * this list of conditions and the following disclaimer.
p_igmon 0:ad6637c36dc7 14 * 2. Redistributions in binary form must reproduce the above copyright notice,
p_igmon 0:ad6637c36dc7 15 * this list of conditions and the following disclaimer in the documentation
p_igmon 0:ad6637c36dc7 16 * and/or other materials provided with the distribution.
p_igmon 0:ad6637c36dc7 17 * 3. Neither the name of STMicroelectronics nor the names of its contributors
p_igmon 0:ad6637c36dc7 18 * may be used to endorse or promote products derived from this software
p_igmon 0:ad6637c36dc7 19 * without specific prior written permission.
p_igmon 0:ad6637c36dc7 20 *
p_igmon 0:ad6637c36dc7 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
p_igmon 0:ad6637c36dc7 22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
p_igmon 0:ad6637c36dc7 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
p_igmon 0:ad6637c36dc7 24 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
p_igmon 0:ad6637c36dc7 25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
p_igmon 0:ad6637c36dc7 26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
p_igmon 0:ad6637c36dc7 27 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
p_igmon 0:ad6637c36dc7 28 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
p_igmon 0:ad6637c36dc7 29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
p_igmon 0:ad6637c36dc7 30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
p_igmon 0:ad6637c36dc7 31 *
p_igmon 0:ad6637c36dc7 32 ******************************************************************************
p_igmon 0:ad6637c36dc7 33 */
p_igmon 0:ad6637c36dc7 34
p_igmon 0:ad6637c36dc7 35 /* Define to prevent recursive inclusion -------------------------------------*/
p_igmon 0:ad6637c36dc7 36 #ifndef __STM32F4xx_HAL_CONF_H
p_igmon 0:ad6637c36dc7 37 #define __STM32F4xx_HAL_CONF_H
p_igmon 0:ad6637c36dc7 38
p_igmon 0:ad6637c36dc7 39 #ifdef __cplusplus
p_igmon 0:ad6637c36dc7 40 extern "C" {
p_igmon 0:ad6637c36dc7 41 #endif
p_igmon 0:ad6637c36dc7 42
p_igmon 0:ad6637c36dc7 43 /* Exported types ------------------------------------------------------------*/
p_igmon 0:ad6637c36dc7 44 /* Exported constants --------------------------------------------------------*/
p_igmon 0:ad6637c36dc7 45
p_igmon 0:ad6637c36dc7 46 /* ########################## Module Selection ############################## */
p_igmon 0:ad6637c36dc7 47 /**
p_igmon 0:ad6637c36dc7 48 * @brief This is the list of modules to be used in the HAL driver
p_igmon 0:ad6637c36dc7 49 */
p_igmon 0:ad6637c36dc7 50 #define HAL_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 51 //#define HAL_ADC_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 52 //#define HAL_CAN_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 53 //#define HAL_CRC_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 54 //#define HAL_CRYP_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 55 //#define HAL_DAC_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 56 //#define HAL_DCMI_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 57 //#define HAL_DMA2D_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 58 //#define HAL_ETH_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 59 //#define HAL_NAND_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 60 //#define HAL_NOR_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 61 //#define HAL_PCCARD_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 62 //#define HAL_SRAM_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 63 //#define HAL_SDRAM_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 64 //#define HAL_HASH_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 65 #define HAL_I2C_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 66 #define HAL_I2S_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 67 //#define HAL_IWDG_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 68 //#define HAL_LTDC_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 69 //#define HAL_RNG_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 70 //#define HAL_RTC_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 71 //#define HAL_SAI_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 72 //#define HAL_SD_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 73 //#define HAL_SPI_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 74 //#define HAL_TIM_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 75 #define HAL_UART_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 76 //#define HAL_USART_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 77 //#define HAL_IRDA_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 78 //#define HAL_SMARTCARD_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 79 //#define HAL_WWDG_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 80 //#define HAL_PCD_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 81 //#define HAL_HCD_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 82 #define HAL_GPIO_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 83 #define HAL_DMA_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 84 #define HAL_RCC_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 85 #define HAL_FLASH_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 86 #define HAL_PWR_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 87 #define HAL_CORTEX_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 88
p_igmon 0:ad6637c36dc7 89 /* ########################## HSE/HSI Values adaptation ##################### */
p_igmon 0:ad6637c36dc7 90 /**
p_igmon 0:ad6637c36dc7 91 * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
p_igmon 0:ad6637c36dc7 92 * This value is used by the RCC HAL module to compute the system frequency
p_igmon 0:ad6637c36dc7 93 * (when HSE is used as system clock source, directly or through the PLL).
p_igmon 0:ad6637c36dc7 94 */
p_igmon 0:ad6637c36dc7 95 #if !defined (HSE_VALUE)
p_igmon 0:ad6637c36dc7 96 #define HSE_VALUE ((uint32_t)25000000) /*!< Value of the External oscillator in Hz */
p_igmon 0:ad6637c36dc7 97 #endif /* HSE_VALUE */
p_igmon 0:ad6637c36dc7 98
p_igmon 0:ad6637c36dc7 99 #if !defined (HSE_STARTUP_TIMEOUT)
p_igmon 0:ad6637c36dc7 100 #define HSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for HSE start up, in ms */
p_igmon 0:ad6637c36dc7 101 #endif /* HSE_STARTUP_TIMEOUT */
p_igmon 0:ad6637c36dc7 102
p_igmon 0:ad6637c36dc7 103 /**
p_igmon 0:ad6637c36dc7 104 * @brief Internal High Speed oscillator (HSI) value.
p_igmon 0:ad6637c36dc7 105 * This value is used by the RCC HAL module to compute the system frequency
p_igmon 0:ad6637c36dc7 106 * (when HSI is used as system clock source, directly or through the PLL).
p_igmon 0:ad6637c36dc7 107 */
p_igmon 0:ad6637c36dc7 108 #if !defined (HSI_VALUE)
p_igmon 0:ad6637c36dc7 109 #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
p_igmon 0:ad6637c36dc7 110 #endif /* HSI_VALUE */
p_igmon 0:ad6637c36dc7 111
p_igmon 0:ad6637c36dc7 112 /**
p_igmon 0:ad6637c36dc7 113 * @brief External clock source for I2S peripheral
p_igmon 0:ad6637c36dc7 114 * This value is used by the I2S HAL module to compute the I2S clock source
p_igmon 0:ad6637c36dc7 115 * frequency, this source is inserted directly through I2S_CKIN pad.
p_igmon 0:ad6637c36dc7 116 */
p_igmon 0:ad6637c36dc7 117 #if !defined (EXTERNAL_CLOCK_VALUE)
p_igmon 0:ad6637c36dc7 118 #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000) /*!< Value of the External audio frequency in Hz*/
p_igmon 0:ad6637c36dc7 119 #endif /* EXTERNAL_CLOCK_VALUE */
p_igmon 0:ad6637c36dc7 120
p_igmon 0:ad6637c36dc7 121 /* Tip: To avoid modifying this file each time you need to use different HSE,
p_igmon 0:ad6637c36dc7 122 === you can define the HSE value in your toolchain compiler preprocessor. */
p_igmon 0:ad6637c36dc7 123
p_igmon 0:ad6637c36dc7 124 /* ########################### System Configuration ######################### */
p_igmon 0:ad6637c36dc7 125 /**
p_igmon 0:ad6637c36dc7 126 * @brief This is the HAL system configuration section
p_igmon 0:ad6637c36dc7 127 */
p_igmon 0:ad6637c36dc7 128
p_igmon 0:ad6637c36dc7 129 #define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */
p_igmon 0:ad6637c36dc7 130 #define USE_RTOS 0
p_igmon 0:ad6637c36dc7 131 #define PREFETCH_ENABLE 1
p_igmon 0:ad6637c36dc7 132 #define INSTRUCTION_CACHE_ENABLE 1
p_igmon 0:ad6637c36dc7 133 #define DATA_CACHE_ENABLE 1
p_igmon 0:ad6637c36dc7 134
p_igmon 0:ad6637c36dc7 135 /* ########################## Assert Selection ############################## */
p_igmon 0:ad6637c36dc7 136 /**
p_igmon 0:ad6637c36dc7 137 * @brief Uncomment the line below to expanse the "assert_param" macro in the
p_igmon 0:ad6637c36dc7 138 * HAL drivers code
p_igmon 0:ad6637c36dc7 139 */
p_igmon 0:ad6637c36dc7 140 /* #define USE_FULL_ASSERT 1 */
p_igmon 0:ad6637c36dc7 141
p_igmon 0:ad6637c36dc7 142 /* ################## Ethernet peripheral configuration ##################### */
p_igmon 0:ad6637c36dc7 143
p_igmon 0:ad6637c36dc7 144 /* Section 1 : Ethernet peripheral configuration */
p_igmon 0:ad6637c36dc7 145
p_igmon 0:ad6637c36dc7 146 /* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
p_igmon 0:ad6637c36dc7 147 #define MAC_ADDR0 2
p_igmon 0:ad6637c36dc7 148 #define MAC_ADDR1 0
p_igmon 0:ad6637c36dc7 149 #define MAC_ADDR2 0
p_igmon 0:ad6637c36dc7 150 #define MAC_ADDR3 0
p_igmon 0:ad6637c36dc7 151 #define MAC_ADDR4 0
p_igmon 0:ad6637c36dc7 152 #define MAC_ADDR5 0
p_igmon 0:ad6637c36dc7 153
p_igmon 0:ad6637c36dc7 154 /* Definition of the Ethernet driver buffers size and count */
p_igmon 0:ad6637c36dc7 155 #define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */
p_igmon 0:ad6637c36dc7 156 #define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */
p_igmon 0:ad6637c36dc7 157 #define ETH_RXBUFNB ((uint32_t)4) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */
p_igmon 0:ad6637c36dc7 158 #define ETH_TXBUFNB ((uint32_t)4) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */
p_igmon 0:ad6637c36dc7 159
p_igmon 0:ad6637c36dc7 160 /* Section 2: PHY configuration section */
p_igmon 0:ad6637c36dc7 161
p_igmon 0:ad6637c36dc7 162 /* DP83848 PHY Address*/
p_igmon 0:ad6637c36dc7 163 #define DP83848_PHY_ADDRESS 0x01
p_igmon 0:ad6637c36dc7 164 /* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
p_igmon 0:ad6637c36dc7 165 #define PHY_RESET_DELAY ((uint32_t)0x000000FF)
p_igmon 0:ad6637c36dc7 166 /* PHY Configuration delay */
p_igmon 0:ad6637c36dc7 167 #define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF)
p_igmon 0:ad6637c36dc7 168
p_igmon 0:ad6637c36dc7 169 #define PHY_READ_TO ((uint32_t)0x0000FFFF)
p_igmon 0:ad6637c36dc7 170 #define PHY_WRITE_TO ((uint32_t)0x0000FFFF)
p_igmon 0:ad6637c36dc7 171
p_igmon 0:ad6637c36dc7 172 /* Section 3: Common PHY Registers */
p_igmon 0:ad6637c36dc7 173
p_igmon 0:ad6637c36dc7 174 #define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */
p_igmon 0:ad6637c36dc7 175 #define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */
p_igmon 0:ad6637c36dc7 176
p_igmon 0:ad6637c36dc7 177 #define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */
p_igmon 0:ad6637c36dc7 178 #define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */
p_igmon 0:ad6637c36dc7 179 #define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */
p_igmon 0:ad6637c36dc7 180 #define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */
p_igmon 0:ad6637c36dc7 181 #define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */
p_igmon 0:ad6637c36dc7 182 #define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */
p_igmon 0:ad6637c36dc7 183 #define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */
p_igmon 0:ad6637c36dc7 184 #define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */
p_igmon 0:ad6637c36dc7 185 #define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */
p_igmon 0:ad6637c36dc7 186 #define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */
p_igmon 0:ad6637c36dc7 187
p_igmon 0:ad6637c36dc7 188 #define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */
p_igmon 0:ad6637c36dc7 189 #define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */
p_igmon 0:ad6637c36dc7 190 #define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */
p_igmon 0:ad6637c36dc7 191
p_igmon 0:ad6637c36dc7 192 /* Section 4: Extended PHY Registers */
p_igmon 0:ad6637c36dc7 193
p_igmon 0:ad6637c36dc7 194 #define PHY_SR ((uint16_t)0x10) /*!< PHY status register Offset */
p_igmon 0:ad6637c36dc7 195 #define PHY_MICR ((uint16_t)0x11) /*!< MII Interrupt Control Register */
p_igmon 0:ad6637c36dc7 196 #define PHY_MISR ((uint16_t)0x12) /*!< MII Interrupt Status and Misc. Control Register */
p_igmon 0:ad6637c36dc7 197
p_igmon 0:ad6637c36dc7 198 #define PHY_LINK_STATUS ((uint16_t)0x0001) /*!< PHY Link mask */
p_igmon 0:ad6637c36dc7 199 #define PHY_SPEED_STATUS ((uint16_t)0x0002) /*!< PHY Speed mask */
p_igmon 0:ad6637c36dc7 200 #define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /*!< PHY Duplex mask */
p_igmon 0:ad6637c36dc7 201
p_igmon 0:ad6637c36dc7 202 #define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */
p_igmon 0:ad6637c36dc7 203 #define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */
p_igmon 0:ad6637c36dc7 204
p_igmon 0:ad6637c36dc7 205 #define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */
p_igmon 0:ad6637c36dc7 206 #define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */
p_igmon 0:ad6637c36dc7 207
p_igmon 0:ad6637c36dc7 208 /* Includes ------------------------------------------------------------------*/
p_igmon 0:ad6637c36dc7 209 /**
p_igmon 0:ad6637c36dc7 210 * @brief Include module's header file
p_igmon 0:ad6637c36dc7 211 */
p_igmon 0:ad6637c36dc7 212
p_igmon 0:ad6637c36dc7 213 #ifdef HAL_RCC_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 214 #include "stm32f4xx_hal_rcc.h"
p_igmon 0:ad6637c36dc7 215 #endif /* HAL_RCC_MODULE_ENABLED */
p_igmon 0:ad6637c36dc7 216
p_igmon 0:ad6637c36dc7 217 #ifdef HAL_GPIO_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 218 #include "stm32f4xx_hal_gpio.h"
p_igmon 0:ad6637c36dc7 219 #endif /* HAL_GPIO_MODULE_ENABLED */
p_igmon 0:ad6637c36dc7 220
p_igmon 0:ad6637c36dc7 221 #ifdef HAL_DMA_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 222 #include "stm32f4xx_hal_dma.h"
p_igmon 0:ad6637c36dc7 223 #endif /* HAL_DMA_MODULE_ENABLED */
p_igmon 0:ad6637c36dc7 224
p_igmon 0:ad6637c36dc7 225 #ifdef HAL_CORTEX_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 226 #include "stm32f4xx_hal_cortex.h"
p_igmon 0:ad6637c36dc7 227 #endif /* HAL_CORTEX_MODULE_ENABLED */
p_igmon 0:ad6637c36dc7 228
p_igmon 0:ad6637c36dc7 229 #ifdef HAL_ADC_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 230 #include "stm32f4xx_hal_adc.h"
p_igmon 0:ad6637c36dc7 231 #endif /* HAL_ADC_MODULE_ENABLED */
p_igmon 0:ad6637c36dc7 232
p_igmon 0:ad6637c36dc7 233 #ifdef HAL_CAN_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 234 #include "stm32f4xx_hal_can.h"
p_igmon 0:ad6637c36dc7 235 #endif /* HAL_CAN_MODULE_ENABLED */
p_igmon 0:ad6637c36dc7 236
p_igmon 0:ad6637c36dc7 237 #ifdef HAL_CRC_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 238 #include "stm32f4xx_hal_crc.h"
p_igmon 0:ad6637c36dc7 239 #endif /* HAL_CRC_MODULE_ENABLED */
p_igmon 0:ad6637c36dc7 240
p_igmon 0:ad6637c36dc7 241 #ifdef HAL_CRYP_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 242 #include "stm32f4xx_hal_cryp.h"
p_igmon 0:ad6637c36dc7 243 #endif /* HAL_CRYP_MODULE_ENABLED */
p_igmon 0:ad6637c36dc7 244
p_igmon 0:ad6637c36dc7 245 #ifdef HAL_DMA2D_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 246 #include "stm32f4xx_hal_dma2d.h"
p_igmon 0:ad6637c36dc7 247 #endif /* HAL_DMA2D_MODULE_ENABLED */
p_igmon 0:ad6637c36dc7 248
p_igmon 0:ad6637c36dc7 249 #ifdef HAL_DAC_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 250 #include "stm32f4xx_hal_dac.h"
p_igmon 0:ad6637c36dc7 251 #endif /* HAL_DAC_MODULE_ENABLED */
p_igmon 0:ad6637c36dc7 252
p_igmon 0:ad6637c36dc7 253 #ifdef HAL_DCMI_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 254 #include "stm32f4xx_hal_dcmi.h"
p_igmon 0:ad6637c36dc7 255 #endif /* HAL_DCMI_MODULE_ENABLED */
p_igmon 0:ad6637c36dc7 256
p_igmon 0:ad6637c36dc7 257 #ifdef HAL_ETH_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 258 #include "stm32f4xx_hal_eth.h"
p_igmon 0:ad6637c36dc7 259 #endif /* HAL_ETH_MODULE_ENABLED */
p_igmon 0:ad6637c36dc7 260
p_igmon 0:ad6637c36dc7 261 #ifdef HAL_FLASH_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 262 #include "stm32f4xx_hal_flash.h"
p_igmon 0:ad6637c36dc7 263 #endif /* HAL_FLASH_MODULE_ENABLED */
p_igmon 0:ad6637c36dc7 264
p_igmon 0:ad6637c36dc7 265 #ifdef HAL_SRAM_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 266 #include "stm32f4xx_hal_sram.h"
p_igmon 0:ad6637c36dc7 267 #endif /* HAL_SRAM_MODULE_ENABLED */
p_igmon 0:ad6637c36dc7 268
p_igmon 0:ad6637c36dc7 269 #ifdef HAL_NOR_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 270 #include "stm32f4xx_hal_nor.h"
p_igmon 0:ad6637c36dc7 271 #endif /* HAL_NOR_MODULE_ENABLED */
p_igmon 0:ad6637c36dc7 272
p_igmon 0:ad6637c36dc7 273 #ifdef HAL_NAND_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 274 #include "stm32f4xx_hal_nand.h"
p_igmon 0:ad6637c36dc7 275 #endif /* HAL_NAND_MODULE_ENABLED */
p_igmon 0:ad6637c36dc7 276
p_igmon 0:ad6637c36dc7 277 #ifdef HAL_PCCARD_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 278 #include "stm32f4xx_hal_pccard.h"
p_igmon 0:ad6637c36dc7 279 #endif /* HAL_PCCARD_MODULE_ENABLED */
p_igmon 0:ad6637c36dc7 280
p_igmon 0:ad6637c36dc7 281 #ifdef HAL_SDRAM_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 282 #include "stm32f4xx_hal_sdram.h"
p_igmon 0:ad6637c36dc7 283 #endif /* HAL_SDRAM_MODULE_ENABLED */
p_igmon 0:ad6637c36dc7 284
p_igmon 0:ad6637c36dc7 285 #ifdef HAL_HASH_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 286 #include "stm32f4xx_hal_hash.h"
p_igmon 0:ad6637c36dc7 287 #endif /* HAL_HASH_MODULE_ENABLED */
p_igmon 0:ad6637c36dc7 288
p_igmon 0:ad6637c36dc7 289 #ifdef HAL_I2C_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 290 #include "stm32f4xx_hal_i2c.h"
p_igmon 0:ad6637c36dc7 291 #endif /* HAL_I2C_MODULE_ENABLED */
p_igmon 0:ad6637c36dc7 292
p_igmon 0:ad6637c36dc7 293 #ifdef HAL_I2S_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 294 #include "stm32f4xx_hal_i2s.h"
p_igmon 0:ad6637c36dc7 295 #endif /* HAL_I2S_MODULE_ENABLED */
p_igmon 0:ad6637c36dc7 296
p_igmon 0:ad6637c36dc7 297 #ifdef HAL_IWDG_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 298 #include "stm32f4xx_hal_iwdg.h"
p_igmon 0:ad6637c36dc7 299 #endif /* HAL_IWDG_MODULE_ENABLED */
p_igmon 0:ad6637c36dc7 300
p_igmon 0:ad6637c36dc7 301 #ifdef HAL_LTDC_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 302 #include "stm32f4xx_hal_ltdc.h"
p_igmon 0:ad6637c36dc7 303 #endif /* HAL_LTDC_MODULE_ENABLED */
p_igmon 0:ad6637c36dc7 304
p_igmon 0:ad6637c36dc7 305 #ifdef HAL_PWR_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 306 #include "stm32f4xx_hal_pwr.h"
p_igmon 0:ad6637c36dc7 307 #endif /* HAL_PWR_MODULE_ENABLED */
p_igmon 0:ad6637c36dc7 308
p_igmon 0:ad6637c36dc7 309 #ifdef HAL_RNG_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 310 #include "stm32f4xx_hal_rng.h"
p_igmon 0:ad6637c36dc7 311 #endif /* HAL_RNG_MODULE_ENABLED */
p_igmon 0:ad6637c36dc7 312
p_igmon 0:ad6637c36dc7 313 #ifdef HAL_RTC_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 314 #include "stm32f4xx_hal_rtc.h"
p_igmon 0:ad6637c36dc7 315 #endif /* HAL_RTC_MODULE_ENABLED */
p_igmon 0:ad6637c36dc7 316
p_igmon 0:ad6637c36dc7 317 #ifdef HAL_SAI_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 318 #include "stm32f4xx_hal_sai.h"
p_igmon 0:ad6637c36dc7 319 #endif /* HAL_SAI_MODULE_ENABLED */
p_igmon 0:ad6637c36dc7 320
p_igmon 0:ad6637c36dc7 321 #ifdef HAL_SD_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 322 #include "stm32f4xx_hal_sd.h"
p_igmon 0:ad6637c36dc7 323 #endif /* HAL_SD_MODULE_ENABLED */
p_igmon 0:ad6637c36dc7 324
p_igmon 0:ad6637c36dc7 325 #ifdef HAL_SPI_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 326 #include "stm32f4xx_hal_spi.h"
p_igmon 0:ad6637c36dc7 327 #endif /* HAL_SPI_MODULE_ENABLED */
p_igmon 0:ad6637c36dc7 328
p_igmon 0:ad6637c36dc7 329 #ifdef HAL_TIM_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 330 #include "stm32f4xx_hal_tim.h"
p_igmon 0:ad6637c36dc7 331 #endif /* HAL_TIM_MODULE_ENABLED */
p_igmon 0:ad6637c36dc7 332
p_igmon 0:ad6637c36dc7 333 #ifdef HAL_UART_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 334 #include "stm32f4xx_hal_uart.h"
p_igmon 0:ad6637c36dc7 335 #endif /* HAL_UART_MODULE_ENABLED */
p_igmon 0:ad6637c36dc7 336
p_igmon 0:ad6637c36dc7 337 #ifdef HAL_USART_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 338 #include "stm32f4xx_hal_usart.h"
p_igmon 0:ad6637c36dc7 339 #endif /* HAL_USART_MODULE_ENABLED */
p_igmon 0:ad6637c36dc7 340
p_igmon 0:ad6637c36dc7 341 #ifdef HAL_IRDA_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 342 #include "stm32f4xx_hal_irda.h"
p_igmon 0:ad6637c36dc7 343 #endif /* HAL_IRDA_MODULE_ENABLED */
p_igmon 0:ad6637c36dc7 344
p_igmon 0:ad6637c36dc7 345 #ifdef HAL_SMARTCARD_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 346 #include "stm32f4xx_hal_smartcard.h"
p_igmon 0:ad6637c36dc7 347 #endif /* HAL_SMARTCARD_MODULE_ENABLED */
p_igmon 0:ad6637c36dc7 348
p_igmon 0:ad6637c36dc7 349 #ifdef HAL_WWDG_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 350 #include "stm32f4xx_hal_wwdg.h"
p_igmon 0:ad6637c36dc7 351 #endif /* HAL_WWDG_MODULE_ENABLED */
p_igmon 0:ad6637c36dc7 352
p_igmon 0:ad6637c36dc7 353 #ifdef HAL_PCD_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 354 #include "stm32f4xx_hal_pcd.h"
p_igmon 0:ad6637c36dc7 355 #endif /* HAL_PCD_MODULE_ENABLED */
p_igmon 0:ad6637c36dc7 356
p_igmon 0:ad6637c36dc7 357 #ifdef HAL_HCD_MODULE_ENABLED
p_igmon 0:ad6637c36dc7 358 #include "stm32f4xx_hal_hcd.h"
p_igmon 0:ad6637c36dc7 359 #endif /* HAL_HCD_MODULE_ENABLED */
p_igmon 0:ad6637c36dc7 360
p_igmon 0:ad6637c36dc7 361 /* Exported macro ------------------------------------------------------------*/
p_igmon 0:ad6637c36dc7 362 #ifdef USE_FULL_ASSERT
p_igmon 0:ad6637c36dc7 363 /**
p_igmon 0:ad6637c36dc7 364 * @brief The assert_param macro is used for function's parameters check.
p_igmon 0:ad6637c36dc7 365 * @param expr: If expr is false, it calls assert_failed function
p_igmon 0:ad6637c36dc7 366 * which reports the name of the source file and the source
p_igmon 0:ad6637c36dc7 367 * line number of the call that failed.
p_igmon 0:ad6637c36dc7 368 * If expr is true, it returns no value.
p_igmon 0:ad6637c36dc7 369 * @retval None
p_igmon 0:ad6637c36dc7 370 */
p_igmon 0:ad6637c36dc7 371 #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
p_igmon 0:ad6637c36dc7 372 /* Exported functions ------------------------------------------------------- */
p_igmon 0:ad6637c36dc7 373 void assert_failed(uint8_t* file, uint32_t line);
p_igmon 0:ad6637c36dc7 374 #else
p_igmon 0:ad6637c36dc7 375 #define assert_param(expr) ((void)0)
p_igmon 0:ad6637c36dc7 376 #endif /* USE_FULL_ASSERT */
p_igmon 0:ad6637c36dc7 377
p_igmon 0:ad6637c36dc7 378 #ifdef __cplusplus
p_igmon 0:ad6637c36dc7 379 }
p_igmon 0:ad6637c36dc7 380 #endif
p_igmon 0:ad6637c36dc7 381
p_igmon 0:ad6637c36dc7 382 #endif /* __STM32F4xx_HAL_CONF_H */
p_igmon 0:ad6637c36dc7 383
p_igmon 0:ad6637c36dc7 384
p_igmon 0:ad6637c36dc7 385 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
p_igmon 0:ad6637c36dc7 386