p igmon / Mbed 2 deprecated uGen4x

PCM Digital Synthesizer

Dependencies:   LCD mbed

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device.cpp@0:ad6637c36dc7, 2016-09-02 (annotated)

Committer:
p_igmon
Date:
Fri Sep 02 13:24:16 2016 +0000
Revision:
0:ad6637c36dc7
for Micro Gen4 Synthesizer

Who changed what in which revision?

UserRevisionLine numberNew contents of line
p_igmon 0:ad6637c36dc7 1 /**
p_igmon 0:ad6637c36dc7 2 * COPYRIGHT(c) 2014 STMicroelectronics
p_igmon 0:ad6637c36dc7 3 *
p_igmon 0:ad6637c36dc7 4 * Redistribution and use in source and binary forms, with or without modification,
p_igmon 0:ad6637c36dc7 5 * are permitted provided that the following conditions are met:
p_igmon 0:ad6637c36dc7 6 * 1. Redistributions of source code must retain the above copyright notice,
p_igmon 0:ad6637c36dc7 7 * this list of conditions and the following disclaimer.
p_igmon 0:ad6637c36dc7 8 * 2. Redistributions in binary form must reproduce the above copyright notice,
p_igmon 0:ad6637c36dc7 9 * this list of conditions and the following disclaimer in the documentation
p_igmon 0:ad6637c36dc7 10 * and/or other materials provided with the distribution.
p_igmon 0:ad6637c36dc7 11 * 3. Neither the name of STMicroelectronics nor the names of its contributors
p_igmon 0:ad6637c36dc7 12 * may be used to endorse or promote products derived from this software
p_igmon 0:ad6637c36dc7 13 * without specific prior written permission.
p_igmon 0:ad6637c36dc7 14 *
p_igmon 0:ad6637c36dc7 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
p_igmon 0:ad6637c36dc7 16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
p_igmon 0:ad6637c36dc7 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
p_igmon 0:ad6637c36dc7 18 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
p_igmon 0:ad6637c36dc7 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
p_igmon 0:ad6637c36dc7 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
p_igmon 0:ad6637c36dc7 21 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
p_igmon 0:ad6637c36dc7 22 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
p_igmon 0:ad6637c36dc7 23 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
p_igmon 0:ad6637c36dc7 24 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
p_igmon 0:ad6637c36dc7 25 *
p_igmon 0:ad6637c36dc7 26 ******************************************************************************
p_igmon 0:ad6637c36dc7 27 */
p_igmon 0:ad6637c36dc7 28
p_igmon 0:ad6637c36dc7 29 #include "synthesizer.h"
p_igmon 0:ad6637c36dc7 30
p_igmon 0:ad6637c36dc7 31 /* Private variables ---------------------------------------------------------*/
p_igmon 0:ad6637c36dc7 32 I2S_HandleTypeDef hi2s2;
p_igmon 0:ad6637c36dc7 33 DMA_HandleTypeDef hdma_i2s2_ext_tx;
p_igmon 0:ad6637c36dc7 34
p_igmon 0:ad6637c36dc7 35
p_igmon 0:ad6637c36dc7 36 /* Private function prototypes -----------------------------------------------*/
p_igmon 0:ad6637c36dc7 37 static void SystemClock_Config(void);
p_igmon 0:ad6637c36dc7 38 static void MX_DMA_Init(void);
p_igmon 0:ad6637c36dc7 39 static void MX_I2S2_Init(void);
p_igmon 0:ad6637c36dc7 40
p_igmon 0:ad6637c36dc7 41
p_igmon 0:ad6637c36dc7 42 void uGen4_device_init(void)
p_igmon 0:ad6637c36dc7 43 {
p_igmon 0:ad6637c36dc7 44 /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
p_igmon 0:ad6637c36dc7 45 HAL_Init();
p_igmon 0:ad6637c36dc7 46
p_igmon 0:ad6637c36dc7 47 /* Configure the system clock */
p_igmon 0:ad6637c36dc7 48 SystemClock_Config();// Set RCC I2S Clock
p_igmon 0:ad6637c36dc7 49
p_igmon 0:ad6637c36dc7 50 /* Initialize all configured peripherals */
p_igmon 0:ad6637c36dc7 51 MX_GPIO_Init();// GPIO CLOCK Enable
p_igmon 0:ad6637c36dc7 52 MX_DMA_Init();
p_igmon 0:ad6637c36dc7 53 MX_I2S2_Init();
p_igmon 0:ad6637c36dc7 54 }
p_igmon 0:ad6637c36dc7 55
p_igmon 0:ad6637c36dc7 56
p_igmon 0:ad6637c36dc7 57 /** System Clock Configuration
p_igmon 0:ad6637c36dc7 58 */
p_igmon 0:ad6637c36dc7 59 static void SystemClock_Config(void)
p_igmon 0:ad6637c36dc7 60 {
p_igmon 0:ad6637c36dc7 61
p_igmon 0:ad6637c36dc7 62 RCC_ClkInitTypeDef RCC_ClkInitStruct;
p_igmon 0:ad6637c36dc7 63 RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
p_igmon 0:ad6637c36dc7 64 RCC_OscInitTypeDef RCC_OscInitStruct;
p_igmon 0:ad6637c36dc7 65
p_igmon 0:ad6637c36dc7 66 __PWR_CLK_ENABLE();
p_igmon 0:ad6637c36dc7 67
p_igmon 0:ad6637c36dc7 68 __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2);
p_igmon 0:ad6637c36dc7 69
p_igmon 0:ad6637c36dc7 70 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
p_igmon 0:ad6637c36dc7 71 RCC_OscInitStruct.HSIState = RCC_HSI_ON;
p_igmon 0:ad6637c36dc7 72 RCC_OscInitStruct.HSICalibrationValue = 6;
p_igmon 0:ad6637c36dc7 73 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
p_igmon 0:ad6637c36dc7 74 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
p_igmon 0:ad6637c36dc7 75 RCC_OscInitStruct.PLL.PLLM = 16;
p_igmon 0:ad6637c36dc7 76 RCC_OscInitStruct.PLL.PLLN = 336;
p_igmon 0:ad6637c36dc7 77 RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4;
p_igmon 0:ad6637c36dc7 78 RCC_OscInitStruct.PLL.PLLQ = 4;
p_igmon 0:ad6637c36dc7 79 HAL_RCC_OscConfig(&RCC_OscInitStruct);
p_igmon 0:ad6637c36dc7 80
p_igmon 0:ad6637c36dc7 81 RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK|RCC_CLOCKTYPE_PCLK1;
p_igmon 0:ad6637c36dc7 82 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
p_igmon 0:ad6637c36dc7 83 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
p_igmon 0:ad6637c36dc7 84 RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
p_igmon 0:ad6637c36dc7 85 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
p_igmon 0:ad6637c36dc7 86 HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2);
p_igmon 0:ad6637c36dc7 87
p_igmon 0:ad6637c36dc7 88 PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_I2S;
p_igmon 0:ad6637c36dc7 89 PeriphClkInitStruct.PLLI2S.PLLI2SN = 290;
p_igmon 0:ad6637c36dc7 90 PeriphClkInitStruct.PLLI2S.PLLI2SR = 2;
p_igmon 0:ad6637c36dc7 91 HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
p_igmon 0:ad6637c36dc7 92
p_igmon 0:ad6637c36dc7 93 }
p_igmon 0:ad6637c36dc7 94
p_igmon 0:ad6637c36dc7 95 /* I2S2 init function */
p_igmon 0:ad6637c36dc7 96 void MX_I2S2_Init(void)
p_igmon 0:ad6637c36dc7 97 {
p_igmon 0:ad6637c36dc7 98
p_igmon 0:ad6637c36dc7 99 hi2s2.Instance = SPI2;
p_igmon 0:ad6637c36dc7 100 hi2s2.Init.Mode = I2S_MODE_MASTER_TX;
p_igmon 0:ad6637c36dc7 101 hi2s2.Init.Standard = I2S_STANDARD_PHILLIPS;
p_igmon 0:ad6637c36dc7 102 hi2s2.Init.DataFormat = I2S_DATAFORMAT_16B;
p_igmon 0:ad6637c36dc7 103 hi2s2.Init.MCLKOutput = I2S_MCLKOUTPUT_ENABLE;
p_igmon 0:ad6637c36dc7 104 hi2s2.Init.AudioFreq = I2S_AUDIOFREQ_44K;
p_igmon 0:ad6637c36dc7 105 hi2s2.Init.CPOL = I2S_CPOL_LOW;
p_igmon 0:ad6637c36dc7 106 hi2s2.Init.ClockSource = I2S_CLOCK_PLL;
p_igmon 0:ad6637c36dc7 107 hi2s2.Init.FullDuplexMode = I2S_FULLDUPLEXMODE_DISABLE;
p_igmon 0:ad6637c36dc7 108 HAL_I2S_Init(&hi2s2);
p_igmon 0:ad6637c36dc7 109
p_igmon 0:ad6637c36dc7 110 }
p_igmon 0:ad6637c36dc7 111
p_igmon 0:ad6637c36dc7 112
p_igmon 0:ad6637c36dc7 113 /**
p_igmon 0:ad6637c36dc7 114 * Enable DMA controller clock
p_igmon 0:ad6637c36dc7 115 */
p_igmon 0:ad6637c36dc7 116 void MX_DMA_Init(void)
p_igmon 0:ad6637c36dc7 117 {
p_igmon 0:ad6637c36dc7 118 /* DMA controller clock enable */
p_igmon 0:ad6637c36dc7 119 __DMA1_CLK_ENABLE();
p_igmon 0:ad6637c36dc7 120
p_igmon 0:ad6637c36dc7 121 /* DMA interrupt init */
p_igmon 0:ad6637c36dc7 122 NVIC_SetVector(DMA1_Stream4_IRQn, (uint32_t )&DMA1_Stream4_IRQHandler);
p_igmon 0:ad6637c36dc7 123 /* Sets the priority grouping field */
p_igmon 0:ad6637c36dc7 124 HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_0);
p_igmon 0:ad6637c36dc7 125 HAL_NVIC_SetPriority(DMA1_Stream4_IRQn, 0, 0);
p_igmon 0:ad6637c36dc7 126 HAL_NVIC_EnableIRQ(DMA1_Stream4_IRQn);
p_igmon 0:ad6637c36dc7 127 }
p_igmon 0:ad6637c36dc7 128
p_igmon 0:ad6637c36dc7 129 /** Pinout Configuration
p_igmon 0:ad6637c36dc7 130 */
p_igmon 0:ad6637c36dc7 131 void MX_GPIO_Init(void)
p_igmon 0:ad6637c36dc7 132 {
p_igmon 0:ad6637c36dc7 133
p_igmon 0:ad6637c36dc7 134 /* GPIO Ports Clock Enable */
p_igmon 0:ad6637c36dc7 135 __GPIOC_CLK_ENABLE();
p_igmon 0:ad6637c36dc7 136 __GPIOB_CLK_ENABLE();
p_igmon 0:ad6637c36dc7 137 __GPIOA_CLK_ENABLE();
p_igmon 0:ad6637c36dc7 138
p_igmon 0:ad6637c36dc7 139 }
p_igmon 0:ad6637c36dc7 140
p_igmon 0:ad6637c36dc7 141
p_igmon 0:ad6637c36dc7 142 #ifdef USE_FULL_ASSERT
p_igmon 0:ad6637c36dc7 143
p_igmon 0:ad6637c36dc7 144 /**
p_igmon 0:ad6637c36dc7 145 * @brief Reports the name of the source file and the source line number
p_igmon 0:ad6637c36dc7 146 * where the assert_param error has occurred.
p_igmon 0:ad6637c36dc7 147 * @param file: pointer to the source file name
p_igmon 0:ad6637c36dc7 148 * @param line: assert_param error line source number
p_igmon 0:ad6637c36dc7 149 * @retval None
p_igmon 0:ad6637c36dc7 150 */
p_igmon 0:ad6637c36dc7 151 void assert_failed(uint8_t* file, uint32_t line)
p_igmon 0:ad6637c36dc7 152 {
p_igmon 0:ad6637c36dc7 153 /* User can add his own implementation to report the file name and line number,
p_igmon 0:ad6637c36dc7 154 ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
p_igmon 0:ad6637c36dc7 155
p_igmon 0:ad6637c36dc7 156 }
p_igmon 0:ad6637c36dc7 157
p_igmon 0:ad6637c36dc7 158 #endif
p_igmon 0:ad6637c36dc7 159
p_igmon 0:ad6637c36dc7 160
p_igmon 0:ad6637c36dc7 161 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
p_igmon 0:ad6637c36dc7 162
p_igmon 0:ad6637c36dc7 163
p_igmon 0:ad6637c36dc7 164