Serhii Ovchar
BSP_DISCO_F429ZI updated for gyroscope use on DISC1 board (i3g4250d)
Drivers/BSP/Components/i3g4250d/i3g4250d.h@3:d06d6759139b, 2021-12-15 (annotated)
- Committer:
- ovcharka132
- Date:
- Wed Dec 15 15:20:57 2021 +0000
- Revision:
- 3:d06d6759139b
Changed gyroscope driver to i3g4250d for f429-DISC1 board
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| ovcharka132 | 3:d06d6759139b | 1 | /** |
| ovcharka132 | 3:d06d6759139b | 2 | ****************************************************************************** |
| ovcharka132 | 3:d06d6759139b | 3 | * @file i3g4250d.h |
| ovcharka132 | 3:d06d6759139b | 4 | * @author MCD Application Team |
| ovcharka132 | 3:d06d6759139b | 5 | * @brief This file contains all the functions prototypes for the i3g4250d.c driver. |
| ovcharka132 | 3:d06d6759139b | 6 | ****************************************************************************** |
| ovcharka132 | 3:d06d6759139b | 7 | * @attention |
| ovcharka132 | 3:d06d6759139b | 8 | * |
| ovcharka132 | 3:d06d6759139b | 9 | * <h2><center>© Copyright (c) 2020 STMicroelectronics. |
| ovcharka132 | 3:d06d6759139b | 10 | * All rights reserved.</center></h2> |
| ovcharka132 | 3:d06d6759139b | 11 | * |
| ovcharka132 | 3:d06d6759139b | 12 | * This software component is licensed by ST under BSD 3-Clause license, |
| ovcharka132 | 3:d06d6759139b | 13 | * the "License"; You may not use this file except in compliance with the |
| ovcharka132 | 3:d06d6759139b | 14 | * License. You may obtain a copy of the License at: |
| ovcharka132 | 3:d06d6759139b | 15 | * opensource.org/licenses/BSD-3-Clause |
| ovcharka132 | 3:d06d6759139b | 16 | * |
| ovcharka132 | 3:d06d6759139b | 17 | ****************************************************************************** |
| ovcharka132 | 3:d06d6759139b | 18 | */ |
| ovcharka132 | 3:d06d6759139b | 19 | |
| ovcharka132 | 3:d06d6759139b | 20 | |
| ovcharka132 | 3:d06d6759139b | 21 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| ovcharka132 | 3:d06d6759139b | 22 | #ifndef __I3G4250D_H |
| ovcharka132 | 3:d06d6759139b | 23 | #define __I3G4250D_H |
| ovcharka132 | 3:d06d6759139b | 24 | |
| ovcharka132 | 3:d06d6759139b | 25 | #ifdef __cplusplus |
| ovcharka132 | 3:d06d6759139b | 26 | extern "C" { |
| ovcharka132 | 3:d06d6759139b | 27 | #endif |
| ovcharka132 | 3:d06d6759139b | 28 | |
| ovcharka132 | 3:d06d6759139b | 29 | /* Includes ------------------------------------------------------------------*/ |
| ovcharka132 | 3:d06d6759139b | 30 | #include "../Common/gyro.h" |
| ovcharka132 | 3:d06d6759139b | 31 | |
| ovcharka132 | 3:d06d6759139b | 32 | /** @addtogroup BSP |
| ovcharka132 | 3:d06d6759139b | 33 | * @{ |
| ovcharka132 | 3:d06d6759139b | 34 | */ |
| ovcharka132 | 3:d06d6759139b | 35 | |
| ovcharka132 | 3:d06d6759139b | 36 | /** @addtogroup Components |
| ovcharka132 | 3:d06d6759139b | 37 | * @{ |
| ovcharka132 | 3:d06d6759139b | 38 | */ |
| ovcharka132 | 3:d06d6759139b | 39 | |
| ovcharka132 | 3:d06d6759139b | 40 | /** @addtogroup I3G4250D |
| ovcharka132 | 3:d06d6759139b | 41 | * @{ |
| ovcharka132 | 3:d06d6759139b | 42 | */ |
| ovcharka132 | 3:d06d6759139b | 43 | |
| ovcharka132 | 3:d06d6759139b | 44 | /** @defgroup I3G4250D_Exported_Constants |
| ovcharka132 | 3:d06d6759139b | 45 | * @{ |
| ovcharka132 | 3:d06d6759139b | 46 | */ |
| ovcharka132 | 3:d06d6759139b | 47 | |
| ovcharka132 | 3:d06d6759139b | 48 | /******************************************************************************/ |
| ovcharka132 | 3:d06d6759139b | 49 | /*************************** START REGISTER MAPPING **************************/ |
| ovcharka132 | 3:d06d6759139b | 50 | /******************************************************************************/ |
| ovcharka132 | 3:d06d6759139b | 51 | #define I3G4250D_WHO_AM_I_ADDR 0x0F /* device identification register */ |
| ovcharka132 | 3:d06d6759139b | 52 | #define I3G4250D_CTRL_REG1_ADDR 0x20 /* Control register 1 */ |
| ovcharka132 | 3:d06d6759139b | 53 | #define I3G4250D_CTRL_REG2_ADDR 0x21 /* Control register 2 */ |
| ovcharka132 | 3:d06d6759139b | 54 | #define I3G4250D_CTRL_REG3_ADDR 0x22 /* Control register 3 */ |
| ovcharka132 | 3:d06d6759139b | 55 | #define I3G4250D_CTRL_REG4_ADDR 0x23 /* Control register 4 */ |
| ovcharka132 | 3:d06d6759139b | 56 | #define I3G4250D_CTRL_REG5_ADDR 0x24 /* Control register 5 */ |
| ovcharka132 | 3:d06d6759139b | 57 | #define I3G4250D_REFERENCE_REG_ADDR 0x25 /* Reference register */ |
| ovcharka132 | 3:d06d6759139b | 58 | #define I3G4250D_OUT_TEMP_ADDR 0x26 /* Out temp register */ |
| ovcharka132 | 3:d06d6759139b | 59 | #define I3G4250D_STATUS_REG_ADDR 0x27 /* Status register */ |
| ovcharka132 | 3:d06d6759139b | 60 | #define I3G4250D_OUT_X_L_ADDR 0x28 /* Output Register X */ |
| ovcharka132 | 3:d06d6759139b | 61 | #define I3G4250D_OUT_X_H_ADDR 0x29 /* Output Register X */ |
| ovcharka132 | 3:d06d6759139b | 62 | #define I3G4250D_OUT_Y_L_ADDR 0x2A /* Output Register Y */ |
| ovcharka132 | 3:d06d6759139b | 63 | #define I3G4250D_OUT_Y_H_ADDR 0x2B /* Output Register Y */ |
| ovcharka132 | 3:d06d6759139b | 64 | #define I3G4250D_OUT_Z_L_ADDR 0x2C /* Output Register Z */ |
| ovcharka132 | 3:d06d6759139b | 65 | #define I3G4250D_OUT_Z_H_ADDR 0x2D /* Output Register Z */ |
| ovcharka132 | 3:d06d6759139b | 66 | #define I3G4250D_FIFO_CTRL_REG_ADDR 0x2E /* Fifo control Register */ |
| ovcharka132 | 3:d06d6759139b | 67 | #define I3G4250D_FIFO_SRC_REG_ADDR 0x2F /* Fifo src Register */ |
| ovcharka132 | 3:d06d6759139b | 68 | |
| ovcharka132 | 3:d06d6759139b | 69 | #define I3G4250D_INT1_CFG_ADDR 0x30 /* Interrupt 1 configuration Register */ |
| ovcharka132 | 3:d06d6759139b | 70 | #define I3G4250D_INT1_SRC_ADDR 0x31 /* Interrupt 1 source Register */ |
| ovcharka132 | 3:d06d6759139b | 71 | #define I3G4250D_INT1_TSH_XH_ADDR 0x32 /* Interrupt 1 Threshold X register */ |
| ovcharka132 | 3:d06d6759139b | 72 | #define I3G4250D_INT1_TSH_XL_ADDR 0x33 /* Interrupt 1 Threshold X register */ |
| ovcharka132 | 3:d06d6759139b | 73 | #define I3G4250D_INT1_TSH_YH_ADDR 0x34 /* Interrupt 1 Threshold Y register */ |
| ovcharka132 | 3:d06d6759139b | 74 | #define I3G4250D_INT1_TSH_YL_ADDR 0x35 /* Interrupt 1 Threshold Y register */ |
| ovcharka132 | 3:d06d6759139b | 75 | #define I3G4250D_INT1_TSH_ZH_ADDR 0x36 /* Interrupt 1 Threshold Z register */ |
| ovcharka132 | 3:d06d6759139b | 76 | #define I3G4250D_INT1_TSH_ZL_ADDR 0x37 /* Interrupt 1 Threshold Z register */ |
| ovcharka132 | 3:d06d6759139b | 77 | #define I3G4250D_INT1_DURATION_ADDR 0x38 /* Interrupt 1 DURATION register */ |
| ovcharka132 | 3:d06d6759139b | 78 | |
| ovcharka132 | 3:d06d6759139b | 79 | /******************************************************************************/ |
| ovcharka132 | 3:d06d6759139b | 80 | /**************************** END REGISTER MAPPING ***************************/ |
| ovcharka132 | 3:d06d6759139b | 81 | /******************************************************************************/ |
| ovcharka132 | 3:d06d6759139b | 82 | |
| ovcharka132 | 3:d06d6759139b | 83 | #define I_AM_I3G4250D ((uint8_t)0xD3) |
| ovcharka132 | 3:d06d6759139b | 84 | |
| ovcharka132 | 3:d06d6759139b | 85 | /** @defgroup Power_Mode_selection Power Mode selection |
| ovcharka132 | 3:d06d6759139b | 86 | * @{ |
| ovcharka132 | 3:d06d6759139b | 87 | */ |
| ovcharka132 | 3:d06d6759139b | 88 | #define I3G4250D_MODE_POWERDOWN ((uint8_t)0x00) |
| ovcharka132 | 3:d06d6759139b | 89 | #define I3G4250D_MODE_ACTIVE ((uint8_t)0x08) |
| ovcharka132 | 3:d06d6759139b | 90 | /** |
| ovcharka132 | 3:d06d6759139b | 91 | * @} |
| ovcharka132 | 3:d06d6759139b | 92 | */ |
| ovcharka132 | 3:d06d6759139b | 93 | |
| ovcharka132 | 3:d06d6759139b | 94 | /** @defgroup OutPut_DataRate_Selection OutPut DataRate Selection |
| ovcharka132 | 3:d06d6759139b | 95 | * @{ |
| ovcharka132 | 3:d06d6759139b | 96 | */ |
| ovcharka132 | 3:d06d6759139b | 97 | #define I3G4250D_OUTPUT_DATARATE_1 ((uint8_t)0x00) |
| ovcharka132 | 3:d06d6759139b | 98 | #define I3G4250D_OUTPUT_DATARATE_2 ((uint8_t)0x40) |
| ovcharka132 | 3:d06d6759139b | 99 | #define I3G4250D_OUTPUT_DATARATE_3 ((uint8_t)0x80) |
| ovcharka132 | 3:d06d6759139b | 100 | #define I3G4250D_OUTPUT_DATARATE_4 ((uint8_t)0xC0) |
| ovcharka132 | 3:d06d6759139b | 101 | /** |
| ovcharka132 | 3:d06d6759139b | 102 | * @} |
| ovcharka132 | 3:d06d6759139b | 103 | */ |
| ovcharka132 | 3:d06d6759139b | 104 | |
| ovcharka132 | 3:d06d6759139b | 105 | /** @defgroup Axes_Selection Axes Selection |
| ovcharka132 | 3:d06d6759139b | 106 | * @{ |
| ovcharka132 | 3:d06d6759139b | 107 | */ |
| ovcharka132 | 3:d06d6759139b | 108 | #define I3G4250D_X_ENABLE ((uint8_t)0x02) |
| ovcharka132 | 3:d06d6759139b | 109 | #define I3G4250D_Y_ENABLE ((uint8_t)0x01) |
| ovcharka132 | 3:d06d6759139b | 110 | #define I3G4250D_Z_ENABLE ((uint8_t)0x04) |
| ovcharka132 | 3:d06d6759139b | 111 | #define I3G4250D_AXES_ENABLE ((uint8_t)0x07) |
| ovcharka132 | 3:d06d6759139b | 112 | #define I3G4250D_AXES_DISABLE ((uint8_t)0x00) |
| ovcharka132 | 3:d06d6759139b | 113 | /** |
| ovcharka132 | 3:d06d6759139b | 114 | * @} |
| ovcharka132 | 3:d06d6759139b | 115 | */ |
| ovcharka132 | 3:d06d6759139b | 116 | |
| ovcharka132 | 3:d06d6759139b | 117 | /** @defgroup Bandwidth_Selection Bandwidth Selection |
| ovcharka132 | 3:d06d6759139b | 118 | * @{ |
| ovcharka132 | 3:d06d6759139b | 119 | */ |
| ovcharka132 | 3:d06d6759139b | 120 | #define I3G4250D_BANDWIDTH_1 ((uint8_t)0x00) |
| ovcharka132 | 3:d06d6759139b | 121 | #define I3G4250D_BANDWIDTH_2 ((uint8_t)0x10) |
| ovcharka132 | 3:d06d6759139b | 122 | #define I3G4250D_BANDWIDTH_3 ((uint8_t)0x20) |
| ovcharka132 | 3:d06d6759139b | 123 | #define I3G4250D_BANDWIDTH_4 ((uint8_t)0x30) |
| ovcharka132 | 3:d06d6759139b | 124 | /** |
| ovcharka132 | 3:d06d6759139b | 125 | * @} |
| ovcharka132 | 3:d06d6759139b | 126 | */ |
| ovcharka132 | 3:d06d6759139b | 127 | |
| ovcharka132 | 3:d06d6759139b | 128 | /** @defgroup Full_Scale_Selection Full Scale Selection |
| ovcharka132 | 3:d06d6759139b | 129 | * @{ |
| ovcharka132 | 3:d06d6759139b | 130 | */ |
| ovcharka132 | 3:d06d6759139b | 131 | #define I3G4250D_FULLSCALE_245 ((uint8_t)0x00) |
| ovcharka132 | 3:d06d6759139b | 132 | #define I3G4250D_FULLSCALE_500 ((uint8_t)0x10) |
| ovcharka132 | 3:d06d6759139b | 133 | #define I3G4250D_FULLSCALE_2000 ((uint8_t)0x20) |
| ovcharka132 | 3:d06d6759139b | 134 | #define I3G4250D_FULLSCALE_SELECTION ((uint8_t)0x30) |
| ovcharka132 | 3:d06d6759139b | 135 | /** |
| ovcharka132 | 3:d06d6759139b | 136 | * @} |
| ovcharka132 | 3:d06d6759139b | 137 | */ |
| ovcharka132 | 3:d06d6759139b | 138 | |
| ovcharka132 | 3:d06d6759139b | 139 | /** @defgroup Full_Scale_Sensitivity Full Scale Sensitivity |
| ovcharka132 | 3:d06d6759139b | 140 | * @{ |
| ovcharka132 | 3:d06d6759139b | 141 | */ |
| ovcharka132 | 3:d06d6759139b | 142 | #define I3G4250D_SENSITIVITY_245DPS ((float)8.75f) /*!< gyroscope sensitivity with 250 dps full scale [DPS/LSB] */ |
| ovcharka132 | 3:d06d6759139b | 143 | #define I3G4250D_SENSITIVITY_500DPS ((float)17.50f) /*!< gyroscope sensitivity with 500 dps full scale [DPS/LSB] */ |
| ovcharka132 | 3:d06d6759139b | 144 | #define I3G4250D_SENSITIVITY_2000DPS ((float)70.00f) /*!< gyroscope sensitivity with 2000 dps full scale [DPS/LSB] */ |
| ovcharka132 | 3:d06d6759139b | 145 | /** |
| ovcharka132 | 3:d06d6759139b | 146 | * @} |
| ovcharka132 | 3:d06d6759139b | 147 | */ |
| ovcharka132 | 3:d06d6759139b | 148 | |
| ovcharka132 | 3:d06d6759139b | 149 | |
| ovcharka132 | 3:d06d6759139b | 150 | /** @defgroup Block_Data_Update Block Data Update |
| ovcharka132 | 3:d06d6759139b | 151 | * @{ |
| ovcharka132 | 3:d06d6759139b | 152 | */ |
| ovcharka132 | 3:d06d6759139b | 153 | #define I3G4250D_BlockDataUpdate_Continous ((uint8_t)0x00) |
| ovcharka132 | 3:d06d6759139b | 154 | #define I3G4250D_BlockDataUpdate_Single ((uint8_t)0x80) |
| ovcharka132 | 3:d06d6759139b | 155 | /** |
| ovcharka132 | 3:d06d6759139b | 156 | * @} |
| ovcharka132 | 3:d06d6759139b | 157 | */ |
| ovcharka132 | 3:d06d6759139b | 158 | |
| ovcharka132 | 3:d06d6759139b | 159 | /** @defgroup Endian_Data_selection Endian Data selection |
| ovcharka132 | 3:d06d6759139b | 160 | * @{ |
| ovcharka132 | 3:d06d6759139b | 161 | */ |
| ovcharka132 | 3:d06d6759139b | 162 | #define I3G4250D_BLE_LSB ((uint8_t)0x00) |
| ovcharka132 | 3:d06d6759139b | 163 | #define I3G4250D_BLE_MSB ((uint8_t)0x40) |
| ovcharka132 | 3:d06d6759139b | 164 | /** |
| ovcharka132 | 3:d06d6759139b | 165 | * @} |
| ovcharka132 | 3:d06d6759139b | 166 | */ |
| ovcharka132 | 3:d06d6759139b | 167 | |
| ovcharka132 | 3:d06d6759139b | 168 | /** @defgroup High_Pass_Filter_status High Pass Filter status |
| ovcharka132 | 3:d06d6759139b | 169 | * @{ |
| ovcharka132 | 3:d06d6759139b | 170 | */ |
| ovcharka132 | 3:d06d6759139b | 171 | #define I3G4250D_HIGHPASSFILTER_DISABLE ((uint8_t)0x00) |
| ovcharka132 | 3:d06d6759139b | 172 | #define I3G4250D_HIGHPASSFILTER_ENABLE ((uint8_t)0x10) |
| ovcharka132 | 3:d06d6759139b | 173 | /** |
| ovcharka132 | 3:d06d6759139b | 174 | * @} |
| ovcharka132 | 3:d06d6759139b | 175 | */ |
| ovcharka132 | 3:d06d6759139b | 176 | |
| ovcharka132 | 3:d06d6759139b | 177 | /** @defgroup INT1_INT2_selection Selection |
| ovcharka132 | 3:d06d6759139b | 178 | * @{ |
| ovcharka132 | 3:d06d6759139b | 179 | */ |
| ovcharka132 | 3:d06d6759139b | 180 | #define I3G4250D_INT1 ((uint8_t)0x00) |
| ovcharka132 | 3:d06d6759139b | 181 | #define I3G4250D_INT2 ((uint8_t)0x01) |
| ovcharka132 | 3:d06d6759139b | 182 | /** |
| ovcharka132 | 3:d06d6759139b | 183 | * @} |
| ovcharka132 | 3:d06d6759139b | 184 | */ |
| ovcharka132 | 3:d06d6759139b | 185 | |
| ovcharka132 | 3:d06d6759139b | 186 | /** @defgroup INT1_Interrupt_status Interrupt Status |
| ovcharka132 | 3:d06d6759139b | 187 | * @{ |
| ovcharka132 | 3:d06d6759139b | 188 | */ |
| ovcharka132 | 3:d06d6759139b | 189 | #define I3G4250D_INT1INTERRUPT_DISABLE ((uint8_t)0x00) |
| ovcharka132 | 3:d06d6759139b | 190 | #define I3G4250D_INT1INTERRUPT_ENABLE ((uint8_t)0x80) |
| ovcharka132 | 3:d06d6759139b | 191 | /** |
| ovcharka132 | 3:d06d6759139b | 192 | * @} |
| ovcharka132 | 3:d06d6759139b | 193 | */ |
| ovcharka132 | 3:d06d6759139b | 194 | |
| ovcharka132 | 3:d06d6759139b | 195 | /** @defgroup INT2_Interrupt_status Interrupt Status |
| ovcharka132 | 3:d06d6759139b | 196 | * @{ |
| ovcharka132 | 3:d06d6759139b | 197 | */ |
| ovcharka132 | 3:d06d6759139b | 198 | #define I3G4250D_INT2INTERRUPT_DISABLE ((uint8_t)0x00) |
| ovcharka132 | 3:d06d6759139b | 199 | #define I3G4250D_INT2INTERRUPT_ENABLE ((uint8_t)0x08) |
| ovcharka132 | 3:d06d6759139b | 200 | /** |
| ovcharka132 | 3:d06d6759139b | 201 | * @} |
| ovcharka132 | 3:d06d6759139b | 202 | */ |
| ovcharka132 | 3:d06d6759139b | 203 | |
| ovcharka132 | 3:d06d6759139b | 204 | /** @defgroup INT1_Interrupt_ActiveEdge Interrupt Active Edge |
| ovcharka132 | 3:d06d6759139b | 205 | * @{ |
| ovcharka132 | 3:d06d6759139b | 206 | */ |
| ovcharka132 | 3:d06d6759139b | 207 | #define I3G4250D_INT1INTERRUPT_LOW_EDGE ((uint8_t)0x20) |
| ovcharka132 | 3:d06d6759139b | 208 | #define I3G4250D_INT1INTERRUPT_HIGH_EDGE ((uint8_t)0x00) |
| ovcharka132 | 3:d06d6759139b | 209 | /** |
| ovcharka132 | 3:d06d6759139b | 210 | * @} |
| ovcharka132 | 3:d06d6759139b | 211 | */ |
| ovcharka132 | 3:d06d6759139b | 212 | |
| ovcharka132 | 3:d06d6759139b | 213 | /** @defgroup Boot_Mode_selection Boot Mode Selection |
| ovcharka132 | 3:d06d6759139b | 214 | * @{ |
| ovcharka132 | 3:d06d6759139b | 215 | */ |
| ovcharka132 | 3:d06d6759139b | 216 | #define I3G4250D_BOOT_NORMALMODE ((uint8_t)0x00) |
| ovcharka132 | 3:d06d6759139b | 217 | #define I3G4250D_BOOT_REBOOTMEMORY ((uint8_t)0x80) |
| ovcharka132 | 3:d06d6759139b | 218 | /** |
| ovcharka132 | 3:d06d6759139b | 219 | * @} |
| ovcharka132 | 3:d06d6759139b | 220 | */ |
| ovcharka132 | 3:d06d6759139b | 221 | |
| ovcharka132 | 3:d06d6759139b | 222 | /** @defgroup High_Pass_Filter_Mode High Pass Filter Mode |
| ovcharka132 | 3:d06d6759139b | 223 | * @{ |
| ovcharka132 | 3:d06d6759139b | 224 | */ |
| ovcharka132 | 3:d06d6759139b | 225 | #define I3G4250D_HPM_NORMAL_MODE_RES ((uint8_t)0x00) |
| ovcharka132 | 3:d06d6759139b | 226 | #define I3G4250D_HPM_REF_SIGNAL ((uint8_t)0x10) |
| ovcharka132 | 3:d06d6759139b | 227 | #define I3G4250D_HPM_NORMAL_MODE ((uint8_t)0x20) |
| ovcharka132 | 3:d06d6759139b | 228 | #define I3G4250D_HPM_AUTORESET_INT ((uint8_t)0x30) |
| ovcharka132 | 3:d06d6759139b | 229 | /** |
| ovcharka132 | 3:d06d6759139b | 230 | * @} |
| ovcharka132 | 3:d06d6759139b | 231 | */ |
| ovcharka132 | 3:d06d6759139b | 232 | |
| ovcharka132 | 3:d06d6759139b | 233 | /** @defgroup High_Pass_CUT OFF_Frequency High Pass CUT OFF Frequency |
| ovcharka132 | 3:d06d6759139b | 234 | * @{ |
| ovcharka132 | 3:d06d6759139b | 235 | */ |
| ovcharka132 | 3:d06d6759139b | 236 | #define I3G4250D_HPFCF_0 0x00 |
| ovcharka132 | 3:d06d6759139b | 237 | #define I3G4250D_HPFCF_1 0x01 |
| ovcharka132 | 3:d06d6759139b | 238 | #define I3G4250D_HPFCF_2 0x02 |
| ovcharka132 | 3:d06d6759139b | 239 | #define I3G4250D_HPFCF_3 0x03 |
| ovcharka132 | 3:d06d6759139b | 240 | #define I3G4250D_HPFCF_4 0x04 |
| ovcharka132 | 3:d06d6759139b | 241 | #define I3G4250D_HPFCF_5 0x05 |
| ovcharka132 | 3:d06d6759139b | 242 | #define I3G4250D_HPFCF_6 0x06 |
| ovcharka132 | 3:d06d6759139b | 243 | #define I3G4250D_HPFCF_7 0x07 |
| ovcharka132 | 3:d06d6759139b | 244 | #define I3G4250D_HPFCF_8 0x08 |
| ovcharka132 | 3:d06d6759139b | 245 | #define I3G4250D_HPFCF_9 0x09 |
| ovcharka132 | 3:d06d6759139b | 246 | /** |
| ovcharka132 | 3:d06d6759139b | 247 | * @} |
| ovcharka132 | 3:d06d6759139b | 248 | */ |
| ovcharka132 | 3:d06d6759139b | 249 | |
| ovcharka132 | 3:d06d6759139b | 250 | /** |
| ovcharka132 | 3:d06d6759139b | 251 | * @} |
| ovcharka132 | 3:d06d6759139b | 252 | */ |
| ovcharka132 | 3:d06d6759139b | 253 | /** @defgroup I3G4250D_Exported_Functions Exported Functions |
| ovcharka132 | 3:d06d6759139b | 254 | * @{ |
| ovcharka132 | 3:d06d6759139b | 255 | */ |
| ovcharka132 | 3:d06d6759139b | 256 | /* Sensor Configuration Functions */ |
| ovcharka132 | 3:d06d6759139b | 257 | void I3G4250D_Init(uint16_t InitStruct); |
| ovcharka132 | 3:d06d6759139b | 258 | void I3G4250D_DeInit(void); |
| ovcharka132 | 3:d06d6759139b | 259 | void I3G4250D_LowPower(uint16_t InitStruct); |
| ovcharka132 | 3:d06d6759139b | 260 | uint8_t I3G4250D_ReadID(void); |
| ovcharka132 | 3:d06d6759139b | 261 | void I3G4250D_RebootCmd(void); |
| ovcharka132 | 3:d06d6759139b | 262 | |
| ovcharka132 | 3:d06d6759139b | 263 | /* Interrupt Configuration Functions */ |
| ovcharka132 | 3:d06d6759139b | 264 | void I3G4250D_INT1InterruptConfig(uint16_t Int1Config); |
| ovcharka132 | 3:d06d6759139b | 265 | void I3G4250D_EnableIT(uint8_t IntSel); |
| ovcharka132 | 3:d06d6759139b | 266 | void I3G4250D_DisableIT(uint8_t IntSel); |
| ovcharka132 | 3:d06d6759139b | 267 | |
| ovcharka132 | 3:d06d6759139b | 268 | /* High Pass Filter Configuration Functions */ |
| ovcharka132 | 3:d06d6759139b | 269 | void I3G4250D_FilterConfig(uint8_t FilterStruct); |
| ovcharka132 | 3:d06d6759139b | 270 | void I3G4250D_FilterCmd(uint8_t HighPassFilterState); |
| ovcharka132 | 3:d06d6759139b | 271 | void I3G4250D_ReadXYZAngRate(float *pfData); |
| ovcharka132 | 3:d06d6759139b | 272 | uint8_t I3G4250D_GetDataStatus(void); |
| ovcharka132 | 3:d06d6759139b | 273 | |
| ovcharka132 | 3:d06d6759139b | 274 | /* Gyroscope IO functions */ |
| ovcharka132 | 3:d06d6759139b | 275 | void GYRO_IO_Init(void); |
| ovcharka132 | 3:d06d6759139b | 276 | void GYRO_IO_DeInit(void); |
| ovcharka132 | 3:d06d6759139b | 277 | void GYRO_IO_Write(uint8_t *pBuffer, uint8_t WriteAddr, uint16_t NumByteToWrite); |
| ovcharka132 | 3:d06d6759139b | 278 | void GYRO_IO_Read(uint8_t *pBuffer, uint8_t ReadAddr, uint16_t NumByteToRead); |
| ovcharka132 | 3:d06d6759139b | 279 | |
| ovcharka132 | 3:d06d6759139b | 280 | /* Gyroscope driver structure */ |
| ovcharka132 | 3:d06d6759139b | 281 | extern GYRO_DrvTypeDef I3g4250Drv; |
| ovcharka132 | 3:d06d6759139b | 282 | |
| ovcharka132 | 3:d06d6759139b | 283 | /** |
| ovcharka132 | 3:d06d6759139b | 284 | * @} |
| ovcharka132 | 3:d06d6759139b | 285 | */ |
| ovcharka132 | 3:d06d6759139b | 286 | |
| ovcharka132 | 3:d06d6759139b | 287 | /** |
| ovcharka132 | 3:d06d6759139b | 288 | * @} |
| ovcharka132 | 3:d06d6759139b | 289 | */ |
| ovcharka132 | 3:d06d6759139b | 290 | |
| ovcharka132 | 3:d06d6759139b | 291 | /** |
| ovcharka132 | 3:d06d6759139b | 292 | * @} |
| ovcharka132 | 3:d06d6759139b | 293 | */ |
| ovcharka132 | 3:d06d6759139b | 294 | |
| ovcharka132 | 3:d06d6759139b | 295 | /** |
| ovcharka132 | 3:d06d6759139b | 296 | * @} |
| ovcharka132 | 3:d06d6759139b | 297 | */ |
| ovcharka132 | 3:d06d6759139b | 298 | |
| ovcharka132 | 3:d06d6759139b | 299 | #ifdef __cplusplus |
| ovcharka132 | 3:d06d6759139b | 300 | } |
| ovcharka132 | 3:d06d6759139b | 301 | #endif |
| ovcharka132 | 3:d06d6759139b | 302 | |
| ovcharka132 | 3:d06d6759139b | 303 | #endif /* __I3G4250D_H */ |
| ovcharka132 | 3:d06d6759139b | 304 | |
| ovcharka132 | 3:d06d6759139b | 305 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |