BSP_DISCO_F429ZI updated for gyroscope use on DISC1 board (i3g4250d)
Drivers/BSP/Components/i3g4250d/i3g4250d.c@3:d06d6759139b, 2021-12-15 (annotated)
- Committer:
- ovcharka132
- Date:
- Wed Dec 15 15:20:57 2021 +0000
- Revision:
- 3:d06d6759139b
Changed gyroscope driver to i3g4250d for f429-DISC1 board
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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ovcharka132 | 3:d06d6759139b | 1 | /** |
ovcharka132 | 3:d06d6759139b | 2 | ****************************************************************************** |
ovcharka132 | 3:d06d6759139b | 3 | * @file i3g4250d.c |
ovcharka132 | 3:d06d6759139b | 4 | * @author MCD Application Team |
ovcharka132 | 3:d06d6759139b | 5 | * @brief This file provides a set of functions needed to manage the I3G4250D, |
ovcharka132 | 3:d06d6759139b | 6 | * ST MEMS motion sensor, 3-axis digital output gyroscope. |
ovcharka132 | 3:d06d6759139b | 7 | ****************************************************************************** |
ovcharka132 | 3:d06d6759139b | 8 | * @attention |
ovcharka132 | 3:d06d6759139b | 9 | * |
ovcharka132 | 3:d06d6759139b | 10 | * <h2><center>© Copyright (c) 2020 STMicroelectronics. |
ovcharka132 | 3:d06d6759139b | 11 | * All rights reserved.</center></h2> |
ovcharka132 | 3:d06d6759139b | 12 | * |
ovcharka132 | 3:d06d6759139b | 13 | * This software component is licensed by ST under BSD 3-Clause license, |
ovcharka132 | 3:d06d6759139b | 14 | * the "License"; You may not use this file except in compliance with the |
ovcharka132 | 3:d06d6759139b | 15 | * License. You may obtain a copy of the License at: |
ovcharka132 | 3:d06d6759139b | 16 | * opensource.org/licenses/BSD-3-Clause |
ovcharka132 | 3:d06d6759139b | 17 | * |
ovcharka132 | 3:d06d6759139b | 18 | ****************************************************************************** |
ovcharka132 | 3:d06d6759139b | 19 | */ |
ovcharka132 | 3:d06d6759139b | 20 | /* Includes ------------------------------------------------------------------*/ |
ovcharka132 | 3:d06d6759139b | 21 | #include "i3g4250d.h" |
ovcharka132 | 3:d06d6759139b | 22 | |
ovcharka132 | 3:d06d6759139b | 23 | /** @addtogroup BSP |
ovcharka132 | 3:d06d6759139b | 24 | * @{ |
ovcharka132 | 3:d06d6759139b | 25 | */ |
ovcharka132 | 3:d06d6759139b | 26 | |
ovcharka132 | 3:d06d6759139b | 27 | /** @addtogroup Components |
ovcharka132 | 3:d06d6759139b | 28 | * @{ |
ovcharka132 | 3:d06d6759139b | 29 | */ |
ovcharka132 | 3:d06d6759139b | 30 | |
ovcharka132 | 3:d06d6759139b | 31 | /** @addtogroup I3G4250D |
ovcharka132 | 3:d06d6759139b | 32 | * @{ |
ovcharka132 | 3:d06d6759139b | 33 | */ |
ovcharka132 | 3:d06d6759139b | 34 | |
ovcharka132 | 3:d06d6759139b | 35 | /** @defgroup I3G4250D_Private_TypesDefinitions Private Types Definitions |
ovcharka132 | 3:d06d6759139b | 36 | * @{ |
ovcharka132 | 3:d06d6759139b | 37 | */ |
ovcharka132 | 3:d06d6759139b | 38 | |
ovcharka132 | 3:d06d6759139b | 39 | /** |
ovcharka132 | 3:d06d6759139b | 40 | * @} |
ovcharka132 | 3:d06d6759139b | 41 | */ |
ovcharka132 | 3:d06d6759139b | 42 | |
ovcharka132 | 3:d06d6759139b | 43 | /** @defgroup I3G4250D_Private_Defines Private Defines |
ovcharka132 | 3:d06d6759139b | 44 | * @{ |
ovcharka132 | 3:d06d6759139b | 45 | */ |
ovcharka132 | 3:d06d6759139b | 46 | |
ovcharka132 | 3:d06d6759139b | 47 | /** |
ovcharka132 | 3:d06d6759139b | 48 | * @} |
ovcharka132 | 3:d06d6759139b | 49 | */ |
ovcharka132 | 3:d06d6759139b | 50 | |
ovcharka132 | 3:d06d6759139b | 51 | /** @defgroup I3G4250D_Private_Macros Private Macros |
ovcharka132 | 3:d06d6759139b | 52 | * @{ |
ovcharka132 | 3:d06d6759139b | 53 | */ |
ovcharka132 | 3:d06d6759139b | 54 | |
ovcharka132 | 3:d06d6759139b | 55 | /** |
ovcharka132 | 3:d06d6759139b | 56 | * @} |
ovcharka132 | 3:d06d6759139b | 57 | */ |
ovcharka132 | 3:d06d6759139b | 58 | |
ovcharka132 | 3:d06d6759139b | 59 | /** @defgroup I3G4250D_Private_Variables Private Variables |
ovcharka132 | 3:d06d6759139b | 60 | * @{ |
ovcharka132 | 3:d06d6759139b | 61 | */ |
ovcharka132 | 3:d06d6759139b | 62 | GYRO_DrvTypeDef I3g4250Drv = |
ovcharka132 | 3:d06d6759139b | 63 | { |
ovcharka132 | 3:d06d6759139b | 64 | I3G4250D_Init, |
ovcharka132 | 3:d06d6759139b | 65 | I3G4250D_DeInit, |
ovcharka132 | 3:d06d6759139b | 66 | I3G4250D_ReadID, |
ovcharka132 | 3:d06d6759139b | 67 | I3G4250D_RebootCmd, |
ovcharka132 | 3:d06d6759139b | 68 | I3G4250D_LowPower, |
ovcharka132 | 3:d06d6759139b | 69 | I3G4250D_INT1InterruptConfig, |
ovcharka132 | 3:d06d6759139b | 70 | I3G4250D_EnableIT, |
ovcharka132 | 3:d06d6759139b | 71 | I3G4250D_DisableIT, |
ovcharka132 | 3:d06d6759139b | 72 | 0, |
ovcharka132 | 3:d06d6759139b | 73 | 0, |
ovcharka132 | 3:d06d6759139b | 74 | I3G4250D_FilterConfig, |
ovcharka132 | 3:d06d6759139b | 75 | I3G4250D_FilterCmd, |
ovcharka132 | 3:d06d6759139b | 76 | I3G4250D_ReadXYZAngRate |
ovcharka132 | 3:d06d6759139b | 77 | }; |
ovcharka132 | 3:d06d6759139b | 78 | |
ovcharka132 | 3:d06d6759139b | 79 | /** |
ovcharka132 | 3:d06d6759139b | 80 | * @} |
ovcharka132 | 3:d06d6759139b | 81 | */ |
ovcharka132 | 3:d06d6759139b | 82 | |
ovcharka132 | 3:d06d6759139b | 83 | /** @defgroup I3G4250D_Private_FunctionPrototypes Private Function Prototypes |
ovcharka132 | 3:d06d6759139b | 84 | * @{ |
ovcharka132 | 3:d06d6759139b | 85 | */ |
ovcharka132 | 3:d06d6759139b | 86 | |
ovcharka132 | 3:d06d6759139b | 87 | /** |
ovcharka132 | 3:d06d6759139b | 88 | * @} |
ovcharka132 | 3:d06d6759139b | 89 | */ |
ovcharka132 | 3:d06d6759139b | 90 | |
ovcharka132 | 3:d06d6759139b | 91 | /** @defgroup I3G4250D_Private_Functions Private Functions |
ovcharka132 | 3:d06d6759139b | 92 | * @{ |
ovcharka132 | 3:d06d6759139b | 93 | */ |
ovcharka132 | 3:d06d6759139b | 94 | |
ovcharka132 | 3:d06d6759139b | 95 | /** |
ovcharka132 | 3:d06d6759139b | 96 | * @brief Set I3G4250D Initialization. |
ovcharka132 | 3:d06d6759139b | 97 | * @param I3G4250D_InitStruct: pointer to a I3G4250D_InitTypeDef structure |
ovcharka132 | 3:d06d6759139b | 98 | * that contains the configuration setting for the I3G4250D. |
ovcharka132 | 3:d06d6759139b | 99 | * @retval None |
ovcharka132 | 3:d06d6759139b | 100 | */ |
ovcharka132 | 3:d06d6759139b | 101 | void I3G4250D_Init(uint16_t InitStruct) |
ovcharka132 | 3:d06d6759139b | 102 | { |
ovcharka132 | 3:d06d6759139b | 103 | uint8_t ctrl = 0x00; |
ovcharka132 | 3:d06d6759139b | 104 | |
ovcharka132 | 3:d06d6759139b | 105 | /* Configure the low level interface */ |
ovcharka132 | 3:d06d6759139b | 106 | GYRO_IO_Init(); |
ovcharka132 | 3:d06d6759139b | 107 | |
ovcharka132 | 3:d06d6759139b | 108 | /* Write value to MEMS CTRL_REG1 register */ |
ovcharka132 | 3:d06d6759139b | 109 | ctrl = (uint8_t) InitStruct; |
ovcharka132 | 3:d06d6759139b | 110 | GYRO_IO_Write(&ctrl, I3G4250D_CTRL_REG1_ADDR, 1); |
ovcharka132 | 3:d06d6759139b | 111 | |
ovcharka132 | 3:d06d6759139b | 112 | /* Write value to MEMS CTRL_REG4 register */ |
ovcharka132 | 3:d06d6759139b | 113 | ctrl = (uint8_t)(InitStruct >> 8); |
ovcharka132 | 3:d06d6759139b | 114 | GYRO_IO_Write(&ctrl, I3G4250D_CTRL_REG4_ADDR, 1); |
ovcharka132 | 3:d06d6759139b | 115 | } |
ovcharka132 | 3:d06d6759139b | 116 | |
ovcharka132 | 3:d06d6759139b | 117 | |
ovcharka132 | 3:d06d6759139b | 118 | |
ovcharka132 | 3:d06d6759139b | 119 | /** |
ovcharka132 | 3:d06d6759139b | 120 | * @brief I3G4250D De-initialization |
ovcharka132 | 3:d06d6759139b | 121 | * @param None |
ovcharka132 | 3:d06d6759139b | 122 | * @retval None |
ovcharka132 | 3:d06d6759139b | 123 | */ |
ovcharka132 | 3:d06d6759139b | 124 | void I3G4250D_DeInit(void) |
ovcharka132 | 3:d06d6759139b | 125 | { |
ovcharka132 | 3:d06d6759139b | 126 | } |
ovcharka132 | 3:d06d6759139b | 127 | |
ovcharka132 | 3:d06d6759139b | 128 | /** |
ovcharka132 | 3:d06d6759139b | 129 | * @brief Read ID address of I3G4250D |
ovcharka132 | 3:d06d6759139b | 130 | * @param None |
ovcharka132 | 3:d06d6759139b | 131 | * @retval ID name |
ovcharka132 | 3:d06d6759139b | 132 | */ |
ovcharka132 | 3:d06d6759139b | 133 | uint8_t I3G4250D_ReadID(void) |
ovcharka132 | 3:d06d6759139b | 134 | { |
ovcharka132 | 3:d06d6759139b | 135 | uint8_t tmp; |
ovcharka132 | 3:d06d6759139b | 136 | |
ovcharka132 | 3:d06d6759139b | 137 | /* Configure the low level interface */ |
ovcharka132 | 3:d06d6759139b | 138 | GYRO_IO_Init(); |
ovcharka132 | 3:d06d6759139b | 139 | |
ovcharka132 | 3:d06d6759139b | 140 | /* Read WHO I AM register */ |
ovcharka132 | 3:d06d6759139b | 141 | GYRO_IO_Read(&tmp, I3G4250D_WHO_AM_I_ADDR, 1); |
ovcharka132 | 3:d06d6759139b | 142 | |
ovcharka132 | 3:d06d6759139b | 143 | /* Return the ID */ |
ovcharka132 | 3:d06d6759139b | 144 | return (uint8_t)tmp; |
ovcharka132 | 3:d06d6759139b | 145 | } |
ovcharka132 | 3:d06d6759139b | 146 | |
ovcharka132 | 3:d06d6759139b | 147 | /** |
ovcharka132 | 3:d06d6759139b | 148 | * @brief Reboot memory content of I3G4250D |
ovcharka132 | 3:d06d6759139b | 149 | * @param None |
ovcharka132 | 3:d06d6759139b | 150 | * @retval None |
ovcharka132 | 3:d06d6759139b | 151 | */ |
ovcharka132 | 3:d06d6759139b | 152 | void I3G4250D_RebootCmd(void) |
ovcharka132 | 3:d06d6759139b | 153 | { |
ovcharka132 | 3:d06d6759139b | 154 | uint8_t tmpreg; |
ovcharka132 | 3:d06d6759139b | 155 | |
ovcharka132 | 3:d06d6759139b | 156 | /* Read CTRL_REG5 register */ |
ovcharka132 | 3:d06d6759139b | 157 | GYRO_IO_Read(&tmpreg, I3G4250D_CTRL_REG5_ADDR, 1); |
ovcharka132 | 3:d06d6759139b | 158 | |
ovcharka132 | 3:d06d6759139b | 159 | /* Enable or Disable the reboot memory */ |
ovcharka132 | 3:d06d6759139b | 160 | tmpreg |= I3G4250D_BOOT_REBOOTMEMORY; |
ovcharka132 | 3:d06d6759139b | 161 | |
ovcharka132 | 3:d06d6759139b | 162 | /* Write value to MEMS CTRL_REG5 register */ |
ovcharka132 | 3:d06d6759139b | 163 | GYRO_IO_Write(&tmpreg, I3G4250D_CTRL_REG5_ADDR, 1); |
ovcharka132 | 3:d06d6759139b | 164 | } |
ovcharka132 | 3:d06d6759139b | 165 | |
ovcharka132 | 3:d06d6759139b | 166 | /** |
ovcharka132 | 3:d06d6759139b | 167 | * @brief Set I3G4250D in low-power mode |
ovcharka132 | 3:d06d6759139b | 168 | * @param I3G4250D_InitStruct: pointer to a I3G4250D_InitTypeDef structure |
ovcharka132 | 3:d06d6759139b | 169 | * that contains the configuration setting for the I3G4250D. |
ovcharka132 | 3:d06d6759139b | 170 | * @retval None |
ovcharka132 | 3:d06d6759139b | 171 | */ |
ovcharka132 | 3:d06d6759139b | 172 | void I3G4250D_LowPower(uint16_t InitStruct) |
ovcharka132 | 3:d06d6759139b | 173 | { |
ovcharka132 | 3:d06d6759139b | 174 | uint8_t ctrl = 0x00; |
ovcharka132 | 3:d06d6759139b | 175 | |
ovcharka132 | 3:d06d6759139b | 176 | /* Write value to MEMS CTRL_REG1 register */ |
ovcharka132 | 3:d06d6759139b | 177 | ctrl = (uint8_t) InitStruct; |
ovcharka132 | 3:d06d6759139b | 178 | GYRO_IO_Write(&ctrl, I3G4250D_CTRL_REG1_ADDR, 1); |
ovcharka132 | 3:d06d6759139b | 179 | } |
ovcharka132 | 3:d06d6759139b | 180 | |
ovcharka132 | 3:d06d6759139b | 181 | /** |
ovcharka132 | 3:d06d6759139b | 182 | * @brief Set I3G4250D Interrupt INT1 configuration |
ovcharka132 | 3:d06d6759139b | 183 | * @param Int1Config: the configuration setting for the I3G4250D Interrupt. |
ovcharka132 | 3:d06d6759139b | 184 | * @retval None |
ovcharka132 | 3:d06d6759139b | 185 | */ |
ovcharka132 | 3:d06d6759139b | 186 | void I3G4250D_INT1InterruptConfig(uint16_t Int1Config) |
ovcharka132 | 3:d06d6759139b | 187 | { |
ovcharka132 | 3:d06d6759139b | 188 | uint8_t ctrl_cfr = 0x00, ctrl3 = 0x00; |
ovcharka132 | 3:d06d6759139b | 189 | |
ovcharka132 | 3:d06d6759139b | 190 | /* Read INT1_CFG register */ |
ovcharka132 | 3:d06d6759139b | 191 | GYRO_IO_Read(&ctrl_cfr, I3G4250D_INT1_CFG_ADDR, 1); |
ovcharka132 | 3:d06d6759139b | 192 | |
ovcharka132 | 3:d06d6759139b | 193 | /* Read CTRL_REG3 register */ |
ovcharka132 | 3:d06d6759139b | 194 | GYRO_IO_Read(&ctrl3, I3G4250D_CTRL_REG3_ADDR, 1); |
ovcharka132 | 3:d06d6759139b | 195 | |
ovcharka132 | 3:d06d6759139b | 196 | ctrl_cfr &= 0x80; |
ovcharka132 | 3:d06d6759139b | 197 | ctrl_cfr |= ((uint8_t) Int1Config >> 8); |
ovcharka132 | 3:d06d6759139b | 198 | |
ovcharka132 | 3:d06d6759139b | 199 | ctrl3 &= 0xDF; |
ovcharka132 | 3:d06d6759139b | 200 | ctrl3 |= ((uint8_t) Int1Config); |
ovcharka132 | 3:d06d6759139b | 201 | |
ovcharka132 | 3:d06d6759139b | 202 | /* Write value to MEMS INT1_CFG register */ |
ovcharka132 | 3:d06d6759139b | 203 | GYRO_IO_Write(&ctrl_cfr, I3G4250D_INT1_CFG_ADDR, 1); |
ovcharka132 | 3:d06d6759139b | 204 | |
ovcharka132 | 3:d06d6759139b | 205 | /* Write value to MEMS CTRL_REG3 register */ |
ovcharka132 | 3:d06d6759139b | 206 | GYRO_IO_Write(&ctrl3, I3G4250D_CTRL_REG3_ADDR, 1); |
ovcharka132 | 3:d06d6759139b | 207 | } |
ovcharka132 | 3:d06d6759139b | 208 | |
ovcharka132 | 3:d06d6759139b | 209 | /** |
ovcharka132 | 3:d06d6759139b | 210 | * @brief Enable INT1 or INT2 interrupt |
ovcharka132 | 3:d06d6759139b | 211 | * @param IntSel: choice of INT1 or INT2 |
ovcharka132 | 3:d06d6759139b | 212 | * This parameter can be: |
ovcharka132 | 3:d06d6759139b | 213 | * @arg I3G4250D_INT1 |
ovcharka132 | 3:d06d6759139b | 214 | * @arg I3G4250D_INT2 |
ovcharka132 | 3:d06d6759139b | 215 | * @retval None |
ovcharka132 | 3:d06d6759139b | 216 | */ |
ovcharka132 | 3:d06d6759139b | 217 | void I3G4250D_EnableIT(uint8_t IntSel) |
ovcharka132 | 3:d06d6759139b | 218 | { |
ovcharka132 | 3:d06d6759139b | 219 | uint8_t tmpreg; |
ovcharka132 | 3:d06d6759139b | 220 | |
ovcharka132 | 3:d06d6759139b | 221 | /* Read CTRL_REG3 register */ |
ovcharka132 | 3:d06d6759139b | 222 | GYRO_IO_Read(&tmpreg, I3G4250D_CTRL_REG3_ADDR, 1); |
ovcharka132 | 3:d06d6759139b | 223 | |
ovcharka132 | 3:d06d6759139b | 224 | if (IntSel == I3G4250D_INT1) |
ovcharka132 | 3:d06d6759139b | 225 | { |
ovcharka132 | 3:d06d6759139b | 226 | tmpreg &= 0x7F; |
ovcharka132 | 3:d06d6759139b | 227 | tmpreg |= I3G4250D_INT1INTERRUPT_ENABLE; |
ovcharka132 | 3:d06d6759139b | 228 | } |
ovcharka132 | 3:d06d6759139b | 229 | else if (IntSel == I3G4250D_INT2) |
ovcharka132 | 3:d06d6759139b | 230 | { |
ovcharka132 | 3:d06d6759139b | 231 | tmpreg &= 0xF7; |
ovcharka132 | 3:d06d6759139b | 232 | tmpreg |= I3G4250D_INT2INTERRUPT_ENABLE; |
ovcharka132 | 3:d06d6759139b | 233 | } |
ovcharka132 | 3:d06d6759139b | 234 | |
ovcharka132 | 3:d06d6759139b | 235 | /* Write value to MEMS CTRL_REG3 register */ |
ovcharka132 | 3:d06d6759139b | 236 | GYRO_IO_Write(&tmpreg, I3G4250D_CTRL_REG3_ADDR, 1); |
ovcharka132 | 3:d06d6759139b | 237 | } |
ovcharka132 | 3:d06d6759139b | 238 | |
ovcharka132 | 3:d06d6759139b | 239 | /** |
ovcharka132 | 3:d06d6759139b | 240 | * @brief Disable INT1 or INT2 interrupt |
ovcharka132 | 3:d06d6759139b | 241 | * @param IntSel: choice of INT1 or INT2 |
ovcharka132 | 3:d06d6759139b | 242 | * This parameter can be: |
ovcharka132 | 3:d06d6759139b | 243 | * @arg I3G4250D_INT1 |
ovcharka132 | 3:d06d6759139b | 244 | * @arg I3G4250D_INT2 |
ovcharka132 | 3:d06d6759139b | 245 | * @retval None |
ovcharka132 | 3:d06d6759139b | 246 | */ |
ovcharka132 | 3:d06d6759139b | 247 | void I3G4250D_DisableIT(uint8_t IntSel) |
ovcharka132 | 3:d06d6759139b | 248 | { |
ovcharka132 | 3:d06d6759139b | 249 | uint8_t tmpreg; |
ovcharka132 | 3:d06d6759139b | 250 | |
ovcharka132 | 3:d06d6759139b | 251 | /* Read CTRL_REG3 register */ |
ovcharka132 | 3:d06d6759139b | 252 | GYRO_IO_Read(&tmpreg, I3G4250D_CTRL_REG3_ADDR, 1); |
ovcharka132 | 3:d06d6759139b | 253 | |
ovcharka132 | 3:d06d6759139b | 254 | if (IntSel == I3G4250D_INT1) |
ovcharka132 | 3:d06d6759139b | 255 | { |
ovcharka132 | 3:d06d6759139b | 256 | tmpreg &= 0x7F; |
ovcharka132 | 3:d06d6759139b | 257 | tmpreg |= I3G4250D_INT1INTERRUPT_DISABLE; |
ovcharka132 | 3:d06d6759139b | 258 | } |
ovcharka132 | 3:d06d6759139b | 259 | else if (IntSel == I3G4250D_INT2) |
ovcharka132 | 3:d06d6759139b | 260 | { |
ovcharka132 | 3:d06d6759139b | 261 | tmpreg &= 0xF7; |
ovcharka132 | 3:d06d6759139b | 262 | tmpreg |= I3G4250D_INT2INTERRUPT_DISABLE; |
ovcharka132 | 3:d06d6759139b | 263 | } |
ovcharka132 | 3:d06d6759139b | 264 | |
ovcharka132 | 3:d06d6759139b | 265 | /* Write value to MEMS CTRL_REG3 register */ |
ovcharka132 | 3:d06d6759139b | 266 | GYRO_IO_Write(&tmpreg, I3G4250D_CTRL_REG3_ADDR, 1); |
ovcharka132 | 3:d06d6759139b | 267 | } |
ovcharka132 | 3:d06d6759139b | 268 | |
ovcharka132 | 3:d06d6759139b | 269 | /** |
ovcharka132 | 3:d06d6759139b | 270 | * @brief Set High Pass Filter Modality |
ovcharka132 | 3:d06d6759139b | 271 | * @param FilterStruct: contains the configuration setting for the L3GD20. |
ovcharka132 | 3:d06d6759139b | 272 | * @retval None |
ovcharka132 | 3:d06d6759139b | 273 | */ |
ovcharka132 | 3:d06d6759139b | 274 | void I3G4250D_FilterConfig(uint8_t FilterStruct) |
ovcharka132 | 3:d06d6759139b | 275 | { |
ovcharka132 | 3:d06d6759139b | 276 | uint8_t tmpreg; |
ovcharka132 | 3:d06d6759139b | 277 | |
ovcharka132 | 3:d06d6759139b | 278 | /* Read CTRL_REG2 register */ |
ovcharka132 | 3:d06d6759139b | 279 | GYRO_IO_Read(&tmpreg, I3G4250D_CTRL_REG2_ADDR, 1); |
ovcharka132 | 3:d06d6759139b | 280 | |
ovcharka132 | 3:d06d6759139b | 281 | tmpreg &= 0xC0; |
ovcharka132 | 3:d06d6759139b | 282 | |
ovcharka132 | 3:d06d6759139b | 283 | /* Configure MEMS: mode and cutoff frequency */ |
ovcharka132 | 3:d06d6759139b | 284 | tmpreg |= FilterStruct; |
ovcharka132 | 3:d06d6759139b | 285 | |
ovcharka132 | 3:d06d6759139b | 286 | /* Write value to MEMS CTRL_REG2 register */ |
ovcharka132 | 3:d06d6759139b | 287 | GYRO_IO_Write(&tmpreg, I3G4250D_CTRL_REG2_ADDR, 1); |
ovcharka132 | 3:d06d6759139b | 288 | } |
ovcharka132 | 3:d06d6759139b | 289 | |
ovcharka132 | 3:d06d6759139b | 290 | /** |
ovcharka132 | 3:d06d6759139b | 291 | * @brief Enable or Disable High Pass Filter |
ovcharka132 | 3:d06d6759139b | 292 | * @param HighPassFilterState: new state of the High Pass Filter feature. |
ovcharka132 | 3:d06d6759139b | 293 | * This parameter can be: |
ovcharka132 | 3:d06d6759139b | 294 | * @arg: I3G4250D_HIGHPASSFILTER_DISABLE |
ovcharka132 | 3:d06d6759139b | 295 | * @arg: I3G4250D_HIGHPASSFILTER_ENABLE |
ovcharka132 | 3:d06d6759139b | 296 | * @retval None |
ovcharka132 | 3:d06d6759139b | 297 | */ |
ovcharka132 | 3:d06d6759139b | 298 | void I3G4250D_FilterCmd(uint8_t HighPassFilterState) |
ovcharka132 | 3:d06d6759139b | 299 | { |
ovcharka132 | 3:d06d6759139b | 300 | uint8_t tmpreg; |
ovcharka132 | 3:d06d6759139b | 301 | |
ovcharka132 | 3:d06d6759139b | 302 | /* Read CTRL_REG5 register */ |
ovcharka132 | 3:d06d6759139b | 303 | GYRO_IO_Read(&tmpreg, I3G4250D_CTRL_REG5_ADDR, 1); |
ovcharka132 | 3:d06d6759139b | 304 | |
ovcharka132 | 3:d06d6759139b | 305 | tmpreg &= 0xEF; |
ovcharka132 | 3:d06d6759139b | 306 | |
ovcharka132 | 3:d06d6759139b | 307 | tmpreg |= HighPassFilterState; |
ovcharka132 | 3:d06d6759139b | 308 | |
ovcharka132 | 3:d06d6759139b | 309 | /* Write value to MEMS CTRL_REG5 register */ |
ovcharka132 | 3:d06d6759139b | 310 | GYRO_IO_Write(&tmpreg, I3G4250D_CTRL_REG5_ADDR, 1); |
ovcharka132 | 3:d06d6759139b | 311 | } |
ovcharka132 | 3:d06d6759139b | 312 | |
ovcharka132 | 3:d06d6759139b | 313 | /** |
ovcharka132 | 3:d06d6759139b | 314 | * @brief Get status for I3G4250D data |
ovcharka132 | 3:d06d6759139b | 315 | * @param None |
ovcharka132 | 3:d06d6759139b | 316 | * @retval Data status in a I3G4250D Data |
ovcharka132 | 3:d06d6759139b | 317 | */ |
ovcharka132 | 3:d06d6759139b | 318 | uint8_t I3G4250D_GetDataStatus(void) |
ovcharka132 | 3:d06d6759139b | 319 | { |
ovcharka132 | 3:d06d6759139b | 320 | uint8_t tmpreg; |
ovcharka132 | 3:d06d6759139b | 321 | |
ovcharka132 | 3:d06d6759139b | 322 | /* Read STATUS_REG register */ |
ovcharka132 | 3:d06d6759139b | 323 | GYRO_IO_Read(&tmpreg, I3G4250D_STATUS_REG_ADDR, 1); |
ovcharka132 | 3:d06d6759139b | 324 | |
ovcharka132 | 3:d06d6759139b | 325 | return tmpreg; |
ovcharka132 | 3:d06d6759139b | 326 | } |
ovcharka132 | 3:d06d6759139b | 327 | |
ovcharka132 | 3:d06d6759139b | 328 | /** |
ovcharka132 | 3:d06d6759139b | 329 | * @brief Calculate the I3G4250D angular data. |
ovcharka132 | 3:d06d6759139b | 330 | * @param pfData: Data out pointer |
ovcharka132 | 3:d06d6759139b | 331 | * @retval None |
ovcharka132 | 3:d06d6759139b | 332 | */ |
ovcharka132 | 3:d06d6759139b | 333 | void I3G4250D_ReadXYZAngRate(float *pfData) |
ovcharka132 | 3:d06d6759139b | 334 | { |
ovcharka132 | 3:d06d6759139b | 335 | uint8_t tmpbuffer[6] = {0}; |
ovcharka132 | 3:d06d6759139b | 336 | int16_t RawData[3] = {0}; |
ovcharka132 | 3:d06d6759139b | 337 | uint8_t tmpreg = 0; |
ovcharka132 | 3:d06d6759139b | 338 | float sensitivity = 0; |
ovcharka132 | 3:d06d6759139b | 339 | int i = 0; |
ovcharka132 | 3:d06d6759139b | 340 | |
ovcharka132 | 3:d06d6759139b | 341 | GYRO_IO_Read(&tmpreg, I3G4250D_CTRL_REG4_ADDR, 1); |
ovcharka132 | 3:d06d6759139b | 342 | |
ovcharka132 | 3:d06d6759139b | 343 | GYRO_IO_Read(tmpbuffer, I3G4250D_OUT_X_L_ADDR, 6); |
ovcharka132 | 3:d06d6759139b | 344 | |
ovcharka132 | 3:d06d6759139b | 345 | /* check in the control register 4 the data alignment (Big Endian or Little Endian)*/ |
ovcharka132 | 3:d06d6759139b | 346 | if (!(tmpreg & I3G4250D_BLE_MSB)) |
ovcharka132 | 3:d06d6759139b | 347 | { |
ovcharka132 | 3:d06d6759139b | 348 | for (i = 0; i < 3; i++) |
ovcharka132 | 3:d06d6759139b | 349 | { |
ovcharka132 | 3:d06d6759139b | 350 | RawData[i] = (int16_t)(((uint16_t)tmpbuffer[2 * i + 1] << 8) + tmpbuffer[2 * i]); |
ovcharka132 | 3:d06d6759139b | 351 | } |
ovcharka132 | 3:d06d6759139b | 352 | } |
ovcharka132 | 3:d06d6759139b | 353 | else |
ovcharka132 | 3:d06d6759139b | 354 | { |
ovcharka132 | 3:d06d6759139b | 355 | for (i = 0; i < 3; i++) |
ovcharka132 | 3:d06d6759139b | 356 | { |
ovcharka132 | 3:d06d6759139b | 357 | RawData[i] = (int16_t)(((uint16_t)tmpbuffer[2 * i] << 8) + tmpbuffer[2 * i + 1]); |
ovcharka132 | 3:d06d6759139b | 358 | } |
ovcharka132 | 3:d06d6759139b | 359 | } |
ovcharka132 | 3:d06d6759139b | 360 | |
ovcharka132 | 3:d06d6759139b | 361 | /* Switch the sensitivity value set in the CRTL4 */ |
ovcharka132 | 3:d06d6759139b | 362 | switch (tmpreg & I3G4250D_FULLSCALE_SELECTION) |
ovcharka132 | 3:d06d6759139b | 363 | { |
ovcharka132 | 3:d06d6759139b | 364 | case I3G4250D_FULLSCALE_245: |
ovcharka132 | 3:d06d6759139b | 365 | sensitivity = I3G4250D_SENSITIVITY_245DPS; |
ovcharka132 | 3:d06d6759139b | 366 | break; |
ovcharka132 | 3:d06d6759139b | 367 | |
ovcharka132 | 3:d06d6759139b | 368 | case I3G4250D_FULLSCALE_500: |
ovcharka132 | 3:d06d6759139b | 369 | sensitivity = I3G4250D_SENSITIVITY_500DPS; |
ovcharka132 | 3:d06d6759139b | 370 | break; |
ovcharka132 | 3:d06d6759139b | 371 | |
ovcharka132 | 3:d06d6759139b | 372 | case I3G4250D_FULLSCALE_2000: |
ovcharka132 | 3:d06d6759139b | 373 | sensitivity = I3G4250D_SENSITIVITY_2000DPS; |
ovcharka132 | 3:d06d6759139b | 374 | break; |
ovcharka132 | 3:d06d6759139b | 375 | } |
ovcharka132 | 3:d06d6759139b | 376 | /* Multiplied by sensitivity */ |
ovcharka132 | 3:d06d6759139b | 377 | for (i = 0; i < 3; i++) |
ovcharka132 | 3:d06d6759139b | 378 | { |
ovcharka132 | 3:d06d6759139b | 379 | pfData[i] = (float)(RawData[i] * sensitivity); |
ovcharka132 | 3:d06d6759139b | 380 | } |
ovcharka132 | 3:d06d6759139b | 381 | } |
ovcharka132 | 3:d06d6759139b | 382 | |
ovcharka132 | 3:d06d6759139b | 383 | /** |
ovcharka132 | 3:d06d6759139b | 384 | * @} |
ovcharka132 | 3:d06d6759139b | 385 | */ |
ovcharka132 | 3:d06d6759139b | 386 | |
ovcharka132 | 3:d06d6759139b | 387 | /** |
ovcharka132 | 3:d06d6759139b | 388 | * @} |
ovcharka132 | 3:d06d6759139b | 389 | */ |
ovcharka132 | 3:d06d6759139b | 390 | |
ovcharka132 | 3:d06d6759139b | 391 | /** |
ovcharka132 | 3:d06d6759139b | 392 | * @} |
ovcharka132 | 3:d06d6759139b | 393 | */ |
ovcharka132 | 3:d06d6759139b | 394 | |
ovcharka132 | 3:d06d6759139b | 395 | /** |
ovcharka132 | 3:d06d6759139b | 396 | * @} |
ovcharka132 | 3:d06d6759139b | 397 | */ |
ovcharka132 | 3:d06d6759139b | 398 | |
ovcharka132 | 3:d06d6759139b | 399 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |