NUCLEO-F401RE + BlueNRG shield client test (TI Sensortag reading)
bluenrg/bluenrg_shield_bsp.h@0:aa1e012ec210, 2014-08-16 (annotated)
- Committer:
- ostapsky
- Date:
- Sat Aug 16 11:00:04 2014 +0000
- Revision:
- 0:aa1e012ec210
CLIENT mode first revision
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
ostapsky | 0:aa1e012ec210 | 1 | #ifndef __BLUENRG_SHIELD_BRP_H_ |
ostapsky | 0:aa1e012ec210 | 2 | #define __BLUENRG_SHIELD_BRP_H_ |
ostapsky | 0:aa1e012ec210 | 3 | |
ostapsky | 0:aa1e012ec210 | 4 | #ifdef __cplusplus |
ostapsky | 0:aa1e012ec210 | 5 | extern "C" { |
ostapsky | 0:aa1e012ec210 | 6 | #endif |
ostapsky | 0:aa1e012ec210 | 7 | |
ostapsky | 0:aa1e012ec210 | 8 | /* Includes ------------------------------------------------------------------*/ |
ostapsky | 0:aa1e012ec210 | 9 | #include "cube_hal.h" |
ostapsky | 0:aa1e012ec210 | 10 | #include "gp_timer.h" |
ostapsky | 0:aa1e012ec210 | 11 | |
ostapsky | 0:aa1e012ec210 | 12 | /* SPI communication details between Nucleo F4 and BlueNRG shield */ |
ostapsky | 0:aa1e012ec210 | 13 | |
ostapsky | 0:aa1e012ec210 | 14 | // SPI Instance |
ostapsky | 0:aa1e012ec210 | 15 | #define BNRG_SPI_INSTANCE SPI1 |
ostapsky | 0:aa1e012ec210 | 16 | #define BNRG_SPI_CLK_ENABLE() __SPI1_CLK_ENABLE() |
ostapsky | 0:aa1e012ec210 | 17 | |
ostapsky | 0:aa1e012ec210 | 18 | // SPI Configuration |
ostapsky | 0:aa1e012ec210 | 19 | #define BNRG_SPI_MODE SPI_MODE_MASTER |
ostapsky | 0:aa1e012ec210 | 20 | #define BNRG_SPI_DIRECTION SPI_DIRECTION_2LINES |
ostapsky | 0:aa1e012ec210 | 21 | #define BNRG_SPI_DATASIZE SPI_DATASIZE_8BIT |
ostapsky | 0:aa1e012ec210 | 22 | #define BNRG_SPI_CLKPOLARITY SPI_POLARITY_LOW |
ostapsky | 0:aa1e012ec210 | 23 | #define BNRG_SPI_CLKPHASE SPI_PHASE_1EDGE |
ostapsky | 0:aa1e012ec210 | 24 | #define BNRG_SPI_NSS SPI_NSS_SOFT |
ostapsky | 0:aa1e012ec210 | 25 | #define BNRG_SPI_FIRSTBIT SPI_FIRSTBIT_MSB |
ostapsky | 0:aa1e012ec210 | 26 | #define BNRG_SPI_TIMODE SPI_TIMODE_DISABLED |
ostapsky | 0:aa1e012ec210 | 27 | #define BNRG_SPI_CRCPOLYNOMIAL 7 |
ostapsky | 0:aa1e012ec210 | 28 | #define BNRG_SPI_BAUDRATEPRESCALER SPI_BAUDRATEPRESCALER_4 |
ostapsky | 0:aa1e012ec210 | 29 | #define BNRG_SPI_CRCCALCULATION SPI_CRCCALCULATION_DISABLED |
ostapsky | 0:aa1e012ec210 | 30 | |
ostapsky | 0:aa1e012ec210 | 31 | // SPI Reset Pin: PA.8 |
ostapsky | 0:aa1e012ec210 | 32 | #define BNRG_SPI_RESET_PIN GPIO_PIN_8 |
ostapsky | 0:aa1e012ec210 | 33 | #define BNRG_SPI_RESET_MODE GPIO_MODE_OUTPUT_PP |
ostapsky | 0:aa1e012ec210 | 34 | #define BNRG_SPI_RESET_PULL GPIO_NOPULL |
ostapsky | 0:aa1e012ec210 | 35 | #define BNRG_SPI_RESET_SPEED GPIO_SPEED_LOW |
ostapsky | 0:aa1e012ec210 | 36 | #define BNRG_SPI_RESET_ALTERNATE 0 |
ostapsky | 0:aa1e012ec210 | 37 | #define BNRG_SPI_RESET_PORT GPIOA |
ostapsky | 0:aa1e012ec210 | 38 | #define BNRG_SPI_RESET_CLK_ENABLE() __GPIOA_CLK_ENABLE() |
ostapsky | 0:aa1e012ec210 | 39 | |
ostapsky | 0:aa1e012ec210 | 40 | |
ostapsky | 0:aa1e012ec210 | 41 | #ifdef USE_PA5 |
ostapsky | 0:aa1e012ec210 | 42 | // SPI Clock (SCLK): PA.5 |
ostapsky | 0:aa1e012ec210 | 43 | #define BNRG_SPI_SCLK_PIN GPIO_PIN_5 |
ostapsky | 0:aa1e012ec210 | 44 | #define BNRG_SPI_SCLK_MODE GPIO_MODE_AF_PP |
ostapsky | 0:aa1e012ec210 | 45 | #define BNRG_SPI_SCLK_PULL GPIO_PULLDOWN |
ostapsky | 0:aa1e012ec210 | 46 | #define BNRG_SPI_SCLK_SPEED GPIO_SPEED_HIGH |
ostapsky | 0:aa1e012ec210 | 47 | #define BNRG_SPI_SCLK_ALTERNATE GPIO_AF5_SPI1 |
ostapsky | 0:aa1e012ec210 | 48 | #define BNRG_SPI_SCLK_PORT GPIOA |
ostapsky | 0:aa1e012ec210 | 49 | #define BNRG_SPI_SCLK_CLK_ENABLE() __GPIOA_CLK_ENABLE() |
ostapsky | 0:aa1e012ec210 | 50 | |
ostapsky | 0:aa1e012ec210 | 51 | #else //USE_PA5 |
ostapsky | 0:aa1e012ec210 | 52 | |
ostapsky | 0:aa1e012ec210 | 53 | // Alternative setting for SCLK: PB.3 |
ostapsky | 0:aa1e012ec210 | 54 | #define BNRG_SPI_SCLK_PIN GPIO_PIN_3 |
ostapsky | 0:aa1e012ec210 | 55 | #define BNRG_SPI_SCLK_MODE GPIO_MODE_AF_PP |
ostapsky | 0:aa1e012ec210 | 56 | #define BNRG_SPI_SCLK_PULL GPIO_PULLUP // or GPIO_PULLDOWN? |
ostapsky | 0:aa1e012ec210 | 57 | #define BNRG_SPI_SCLK_SPEED GPIO_SPEED_HIGH |
ostapsky | 0:aa1e012ec210 | 58 | #define BNRG_SPI_SCLK_ALTERNATE GPIO_AF5_SPI1 |
ostapsky | 0:aa1e012ec210 | 59 | #define BNRG_SPI_SCLK_PORT GPIOB |
ostapsky | 0:aa1e012ec210 | 60 | #define BNRG_SPI_SCLK_CLK_ENABLE() __GPIOB_CLK_ENABLE() |
ostapsky | 0:aa1e012ec210 | 61 | |
ostapsky | 0:aa1e012ec210 | 62 | #endif //USE_PA5 |
ostapsky | 0:aa1e012ec210 | 63 | |
ostapsky | 0:aa1e012ec210 | 64 | // MISO (Master Input Slave Output): PA.6 |
ostapsky | 0:aa1e012ec210 | 65 | #define BNRG_SPI_MISO_PIN GPIO_PIN_6 |
ostapsky | 0:aa1e012ec210 | 66 | #define BNRG_SPI_MISO_MODE GPIO_MODE_AF_PP |
ostapsky | 0:aa1e012ec210 | 67 | #define BNRG_SPI_MISO_PULL GPIO_PULLDOWN |
ostapsky | 0:aa1e012ec210 | 68 | #define BNRG_SPI_MISO_SPEED GPIO_SPEED_HIGH |
ostapsky | 0:aa1e012ec210 | 69 | #define BNRG_SPI_MISO_ALTERNATE GPIO_AF5_SPI1 |
ostapsky | 0:aa1e012ec210 | 70 | #define BNRG_SPI_MISO_PORT GPIOA |
ostapsky | 0:aa1e012ec210 | 71 | #define BNRG_SPI_MISO_CLK_ENABLE() __GPIOA_CLK_ENABLE() |
ostapsky | 0:aa1e012ec210 | 72 | |
ostapsky | 0:aa1e012ec210 | 73 | |
ostapsky | 0:aa1e012ec210 | 74 | // MOSI (Master Output Slave Input): PA.7 |
ostapsky | 0:aa1e012ec210 | 75 | #define BNRG_SPI_MOSI_PIN GPIO_PIN_7 |
ostapsky | 0:aa1e012ec210 | 76 | #define BNRG_SPI_MOSI_MODE GPIO_MODE_AF_PP |
ostapsky | 0:aa1e012ec210 | 77 | #define BNRG_SPI_MOSI_PULL GPIO_PULLUP |
ostapsky | 0:aa1e012ec210 | 78 | #define BNRG_SPI_MOSI_SPEED GPIO_SPEED_HIGH |
ostapsky | 0:aa1e012ec210 | 79 | #define BNRG_SPI_MOSI_ALTERNATE GPIO_AF5_SPI1 |
ostapsky | 0:aa1e012ec210 | 80 | #define BNRG_SPI_MOSI_PORT GPIOA |
ostapsky | 0:aa1e012ec210 | 81 | #define BNRG_SPI_MOSI_CLK_ENABLE() __GPIOA_CLK_ENABLE() |
ostapsky | 0:aa1e012ec210 | 82 | |
ostapsky | 0:aa1e012ec210 | 83 | // NSS/CSN/CS: PA.1 |
ostapsky | 0:aa1e012ec210 | 84 | #define BNRG_SPI_CS_PIN GPIO_PIN_1 |
ostapsky | 0:aa1e012ec210 | 85 | #define BNRG_SPI_CS_MODE GPIO_MODE_OUTPUT_PP |
ostapsky | 0:aa1e012ec210 | 86 | #define BNRG_SPI_CS_PULL GPIO_NOPULL |
ostapsky | 0:aa1e012ec210 | 87 | #define BNRG_SPI_CS_SPEED GPIO_SPEED_HIGH |
ostapsky | 0:aa1e012ec210 | 88 | #define BNRG_SPI_CS_ALTERNATE 0 |
ostapsky | 0:aa1e012ec210 | 89 | #define BNRG_SPI_CS_PORT GPIOA |
ostapsky | 0:aa1e012ec210 | 90 | #define BNRG_SPI_CS_CLK_ENABLE() __GPIOA_CLK_ENABLE() |
ostapsky | 0:aa1e012ec210 | 91 | |
ostapsky | 0:aa1e012ec210 | 92 | // IRQ: PA.0 |
ostapsky | 0:aa1e012ec210 | 93 | #define BNRG_SPI_IRQ_PIN GPIO_PIN_0 |
ostapsky | 0:aa1e012ec210 | 94 | #define BNRG_SPI_IRQ_MODE GPIO_MODE_IT_RISING |
ostapsky | 0:aa1e012ec210 | 95 | #define BNRG_SPI_IRQ_PULL GPIO_NOPULL |
ostapsky | 0:aa1e012ec210 | 96 | #define BNRG_SPI_IRQ_SPEED GPIO_SPEED_HIGH |
ostapsky | 0:aa1e012ec210 | 97 | #define BNRG_SPI_IRQ_ALTERNATE 0 |
ostapsky | 0:aa1e012ec210 | 98 | #define BNRG_SPI_IRQ_PORT GPIOA |
ostapsky | 0:aa1e012ec210 | 99 | #define BNRG_SPI_IRQ_CLK_ENABLE() __GPIOA_CLK_ENABLE() |
ostapsky | 0:aa1e012ec210 | 100 | |
ostapsky | 0:aa1e012ec210 | 101 | // EXTI External Interrupt for SPI |
ostapsky | 0:aa1e012ec210 | 102 | // NOTE: if you change the IRQ pin remember to implement a corresponding handler |
ostapsky | 0:aa1e012ec210 | 103 | // function like EXTI0_IRQHandler() in the user project |
ostapsky | 0:aa1e012ec210 | 104 | #define BNRG_SPI_EXTI_IRQn EXTI0_IRQn |
ostapsky | 0:aa1e012ec210 | 105 | #define BNRG_SPI_EXTI_PIN BNRG_SPI_IRQ_PIN |
ostapsky | 0:aa1e012ec210 | 106 | #define BNRG_SPI_EXTI_PORT BNRG_SPI_IRQ_PORT |
ostapsky | 0:aa1e012ec210 | 107 | |
ostapsky | 0:aa1e012ec210 | 108 | /* Exported functions --------------------------------------------------------*/ |
ostapsky | 0:aa1e012ec210 | 109 | void BNRG_SPI_Init(void); |
ostapsky | 0:aa1e012ec210 | 110 | void BlueNRG_RST(void); |
ostapsky | 0:aa1e012ec210 | 111 | int32_t BlueNRG_SPI_Read_All(SPI_HandleTypeDef *hspi, |
ostapsky | 0:aa1e012ec210 | 112 | uint8_t *buffer, |
ostapsky | 0:aa1e012ec210 | 113 | uint8_t buff_size); |
ostapsky | 0:aa1e012ec210 | 114 | int32_t BlueNRG_SPI_Write(SPI_HandleTypeDef *hspi, |
ostapsky | 0:aa1e012ec210 | 115 | uint8_t* data1, |
ostapsky | 0:aa1e012ec210 | 116 | uint8_t* data2, |
ostapsky | 0:aa1e012ec210 | 117 | uint8_t Nb_bytes1, |
ostapsky | 0:aa1e012ec210 | 118 | uint8_t Nb_bytes2); |
ostapsky | 0:aa1e012ec210 | 119 | void Hal_Write_Serial(const void* data1, const void* data2, tHalInt32 n_bytes1, tHalInt32 n_bytes2); |
ostapsky | 0:aa1e012ec210 | 120 | void Enable_SPI_IRQ(void); |
ostapsky | 0:aa1e012ec210 | 121 | void Disable_SPI_IRQ(void); |
ostapsky | 0:aa1e012ec210 | 122 | void Clear_SPI_IRQ(void); |
ostapsky | 0:aa1e012ec210 | 123 | void Clear_SPI_EXTI_Flag(void); |
ostapsky | 0:aa1e012ec210 | 124 | |
ostapsky | 0:aa1e012ec210 | 125 | #ifdef __cplusplus |
ostapsky | 0:aa1e012ec210 | 126 | } |
ostapsky | 0:aa1e012ec210 | 127 | #endif |
ostapsky | 0:aa1e012ec210 | 128 | |
ostapsky | 0:aa1e012ec210 | 129 | #endif //_BLUENRG_SHIELD_BRP_H_ |