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Dependencies:   BMP180 N5110 mbed

PowerControl/PowerControl.h@6:1b5603fd1a9c, 2015-05-11 (annotated)

Committer:
orlagilson
Date:
Mon May 11 14:25:05 2015 +0000
Revision:
6:1b5603fd1a9c
Finished project.; All functions working.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
orlagilson 6:1b5603fd1a9c 1 /* mbed PowerControl Library
orlagilson 6:1b5603fd1a9c 2 * Copyright (c) 2010 Michael Wei
orlagilson 6:1b5603fd1a9c 3 */
orlagilson 6:1b5603fd1a9c 4
orlagilson 6:1b5603fd1a9c 5 #ifndef MBED_POWERCONTROL_H
orlagilson 6:1b5603fd1a9c 6 #define MBED_POWERCONTROL_H
orlagilson 6:1b5603fd1a9c 7
orlagilson 6:1b5603fd1a9c 8 //shouldn't have to include, but fixes weird problems with defines
orlagilson 6:1b5603fd1a9c 9 //#include "LPC1768/LPC17xx.h"
orlagilson 6:1b5603fd1a9c 10
orlagilson 6:1b5603fd1a9c 11 //System Control Register
orlagilson 6:1b5603fd1a9c 12 // bit 0: Reserved
orlagilson 6:1b5603fd1a9c 13 // bit 1: Sleep on Exit
orlagilson 6:1b5603fd1a9c 14 #define LPC1768_SCR_SLEEPONEXIT 0x2
orlagilson 6:1b5603fd1a9c 15 // bit 2: Deep Sleep
orlagilson 6:1b5603fd1a9c 16 #define LPC1768_SCR_SLEEPDEEP 0x4
orlagilson 6:1b5603fd1a9c 17 // bit 3: Resereved
orlagilson 6:1b5603fd1a9c 18 // bit 4: Send on Pending
orlagilson 6:1b5603fd1a9c 19 #define LPC1768_SCR_SEVONPEND 0x10
orlagilson 6:1b5603fd1a9c 20 // bit 5-31: Reserved
orlagilson 6:1b5603fd1a9c 21
orlagilson 6:1b5603fd1a9c 22 //Power Control Register
orlagilson 6:1b5603fd1a9c 23 // bit 0: Power mode control bit 0 (power-down mode)
orlagilson 6:1b5603fd1a9c 24 #define LPC1768_PCON_PM0 0x1
orlagilson 6:1b5603fd1a9c 25 // bit 1: Power mode control bit 1 (deep power-down mode)
orlagilson 6:1b5603fd1a9c 26 #define LPC1768_PCON_PM1 0x2
orlagilson 6:1b5603fd1a9c 27 // bit 2: Brown-out reduced power mode
orlagilson 6:1b5603fd1a9c 28 #define LPC1768_PCON_BODRPM 0x4
orlagilson 6:1b5603fd1a9c 29 // bit 3: Brown-out global disable
orlagilson 6:1b5603fd1a9c 30 #define LPC1768_PCON_BOGD 0x8
orlagilson 6:1b5603fd1a9c 31 // bit 4: Brown-out reset disable
orlagilson 6:1b5603fd1a9c 32 #define LPC1768_PCON_BORD 0x10
orlagilson 6:1b5603fd1a9c 33 // bit 5-7 : Reserved
orlagilson 6:1b5603fd1a9c 34 // bit 8: Sleep Mode Entry Flag
orlagilson 6:1b5603fd1a9c 35 #define LPC1768_PCON_SMFLAG 0x100
orlagilson 6:1b5603fd1a9c 36 // bit 9: Deep Sleep Entry Flag
orlagilson 6:1b5603fd1a9c 37 #define LPC1768_PCON_DSFLAG 0x200
orlagilson 6:1b5603fd1a9c 38 // bit 10: Power Down Entry Flag
orlagilson 6:1b5603fd1a9c 39 #define LPC1768_PCON_PDFLAG 0x400
orlagilson 6:1b5603fd1a9c 40 // bit 11: Deep Power Down Entry Flag
orlagilson 6:1b5603fd1a9c 41 #define LPC1768_PCON_DPDFLAG 0x800
orlagilson 6:1b5603fd1a9c 42 // bit 12-31: Reserved
orlagilson 6:1b5603fd1a9c 43
orlagilson 6:1b5603fd1a9c 44 //"Sleep Mode" (WFI).
orlagilson 6:1b5603fd1a9c 45 inline void Sleep(void)
orlagilson 6:1b5603fd1a9c 46 {
orlagilson 6:1b5603fd1a9c 47 __WFI();
orlagilson 6:1b5603fd1a9c 48 }
orlagilson 6:1b5603fd1a9c 49
orlagilson 6:1b5603fd1a9c 50 //"Deep Sleep" Mode
orlagilson 6:1b5603fd1a9c 51 inline void DeepSleep(void)
orlagilson 6:1b5603fd1a9c 52 {
orlagilson 6:1b5603fd1a9c 53 SCB->SCR |= LPC1768_SCR_SLEEPDEEP;
orlagilson 6:1b5603fd1a9c 54 __WFI();
orlagilson 6:1b5603fd1a9c 55 }
orlagilson 6:1b5603fd1a9c 56
orlagilson 6:1b5603fd1a9c 57 //"Power-Down" Mode
orlagilson 6:1b5603fd1a9c 58 inline void PowerDown(void)
orlagilson 6:1b5603fd1a9c 59 {
orlagilson 6:1b5603fd1a9c 60 SCB->SCR |= LPC1768_SCR_SLEEPDEEP;
orlagilson 6:1b5603fd1a9c 61 LPC_SC->PCON &= ~LPC1768_PCON_PM1;
orlagilson 6:1b5603fd1a9c 62 LPC_SC->PCON |= LPC1768_PCON_PM0;
orlagilson 6:1b5603fd1a9c 63 __WFI();
orlagilson 6:1b5603fd1a9c 64 //reset back to normal
orlagilson 6:1b5603fd1a9c 65 LPC_SC->PCON &= ~(LPC1768_PCON_PM1 | LPC1768_PCON_PM0);
orlagilson 6:1b5603fd1a9c 66 }
orlagilson 6:1b5603fd1a9c 67
orlagilson 6:1b5603fd1a9c 68 //"Deep Power-Down" Mode
orlagilson 6:1b5603fd1a9c 69 inline void DeepPowerDown(void)
orlagilson 6:1b5603fd1a9c 70 {
orlagilson 6:1b5603fd1a9c 71 SCB->SCR |= LPC1768_SCR_SLEEPDEEP;
orlagilson 6:1b5603fd1a9c 72 LPC_SC->PCON |= LPC1768_PCON_PM1 | LPC1768_PCON_PM0;
orlagilson 6:1b5603fd1a9c 73 __WFI();
orlagilson 6:1b5603fd1a9c 74 //reset back to normal
orlagilson 6:1b5603fd1a9c 75 LPC_SC->PCON &= ~(LPC1768_PCON_PM1 | LPC1768_PCON_PM0);
orlagilson 6:1b5603fd1a9c 76 }
orlagilson 6:1b5603fd1a9c 77
orlagilson 6:1b5603fd1a9c 78 //shut down BOD during power-down/deep sleep
orlagilson 6:1b5603fd1a9c 79 inline void BrownOut_ReducedPowerMode_Enable(void)
orlagilson 6:1b5603fd1a9c 80 {
orlagilson 6:1b5603fd1a9c 81 LPC_SC->PCON |= LPC1768_PCON_BODRPM;
orlagilson 6:1b5603fd1a9c 82 }
orlagilson 6:1b5603fd1a9c 83
orlagilson 6:1b5603fd1a9c 84 //turn on BOD during power-down/deep sleep
orlagilson 6:1b5603fd1a9c 85 inline void BrownOut_ReducedPowerMode_Disable(void)
orlagilson 6:1b5603fd1a9c 86 {
orlagilson 6:1b5603fd1a9c 87 LPC_SC->PCON &= ~LPC1768_PCON_BODRPM;
orlagilson 6:1b5603fd1a9c 88 }
orlagilson 6:1b5603fd1a9c 89
orlagilson 6:1b5603fd1a9c 90 //turn off brown out circutry
orlagilson 6:1b5603fd1a9c 91 inline void BrownOut_Global_Disable(void)
orlagilson 6:1b5603fd1a9c 92 {
orlagilson 6:1b5603fd1a9c 93 LPC_SC->PCON |= LPC1768_PCON_BOGD;
orlagilson 6:1b5603fd1a9c 94 }
orlagilson 6:1b5603fd1a9c 95
orlagilson 6:1b5603fd1a9c 96 //turn on brown out circutry
orlagilson 6:1b5603fd1a9c 97 inline void BrownOut_Global_Enable(void)
orlagilson 6:1b5603fd1a9c 98 {
orlagilson 6:1b5603fd1a9c 99 LPC_SC->PCON &= !LPC1768_PCON_BOGD;
orlagilson 6:1b5603fd1a9c 100 }
orlagilson 6:1b5603fd1a9c 101
orlagilson 6:1b5603fd1a9c 102 //turn off brown out reset circutry
orlagilson 6:1b5603fd1a9c 103 inline void BrownOut_Reset_Disable(void)
orlagilson 6:1b5603fd1a9c 104 {
orlagilson 6:1b5603fd1a9c 105 LPC_SC->PCON |= LPC1768_PCON_BORD;
orlagilson 6:1b5603fd1a9c 106 }
orlagilson 6:1b5603fd1a9c 107
orlagilson 6:1b5603fd1a9c 108 //turn on brown outreset circutry
orlagilson 6:1b5603fd1a9c 109 inline void BrownOut_Reset_Enable(void)
orlagilson 6:1b5603fd1a9c 110 {
orlagilson 6:1b5603fd1a9c 111 LPC_SC->PCON &= ~LPC1768_PCON_BORD;
orlagilson 6:1b5603fd1a9c 112 }
orlagilson 6:1b5603fd1a9c 113 //Peripheral Control Register
orlagilson 6:1b5603fd1a9c 114 // bit 0: Reserved
orlagilson 6:1b5603fd1a9c 115 // bit 1: PCTIM0: Timer/Counter 0 power/clock enable
orlagilson 6:1b5603fd1a9c 116 #define LPC1768_PCONP_PCTIM0 0x2
orlagilson 6:1b5603fd1a9c 117 // bit 2: PCTIM1: Timer/Counter 1 power/clock enable
orlagilson 6:1b5603fd1a9c 118 #define LPC1768_PCONP_PCTIM1 0x4
orlagilson 6:1b5603fd1a9c 119 // bit 3: PCUART0: UART 0 power/clock enable
orlagilson 6:1b5603fd1a9c 120 #define LPC1768_PCONP_PCUART0 0x8
orlagilson 6:1b5603fd1a9c 121 // bit 4: PCUART1: UART 1 power/clock enable
orlagilson 6:1b5603fd1a9c 122 #define LPC1768_PCONP_PCUART1 0x10
orlagilson 6:1b5603fd1a9c 123 // bit 5: Reserved
orlagilson 6:1b5603fd1a9c 124 // bit 6: PCPWM1: PWM 1 power/clock enable
orlagilson 6:1b5603fd1a9c 125 #define LPC1768_PCONP_PCPWM1 0x40
orlagilson 6:1b5603fd1a9c 126 // bit 7: PCI2C0: I2C interface 0 power/clock enable
orlagilson 6:1b5603fd1a9c 127 #define LPC1768_PCONP_PCI2C0 0x80
orlagilson 6:1b5603fd1a9c 128 // bit 8: PCSPI: SPI interface power/clock enable
orlagilson 6:1b5603fd1a9c 129 #define LPC1768_PCONP_PCSPI 0x100
orlagilson 6:1b5603fd1a9c 130 // bit 9: PCRTC: RTC power/clock enable
orlagilson 6:1b5603fd1a9c 131 #define LPC1768_PCONP_PCRTC 0x200
orlagilson 6:1b5603fd1a9c 132 // bit 10: PCSSP1: SSP interface 1 power/clock enable
orlagilson 6:1b5603fd1a9c 133 #define LPC1768_PCONP_PCSSP1 0x400
orlagilson 6:1b5603fd1a9c 134 // bit 11: Reserved
orlagilson 6:1b5603fd1a9c 135 // bit 12: PCADC: A/D converter power/clock enable
orlagilson 6:1b5603fd1a9c 136 #define LPC1768_PCONP_PCADC 0x1000
orlagilson 6:1b5603fd1a9c 137 // bit 13: PCCAN1: CAN controller 1 power/clock enable
orlagilson 6:1b5603fd1a9c 138 #define LPC1768_PCONP_PCCAN1 0x2000
orlagilson 6:1b5603fd1a9c 139 // bit 14: PCCAN2: CAN controller 2 power/clock enable
orlagilson 6:1b5603fd1a9c 140 #define LPC1768_PCONP_PCCAN2 0x4000
orlagilson 6:1b5603fd1a9c 141 // bit 15: PCGPIO: GPIOs power/clock enable
orlagilson 6:1b5603fd1a9c 142 #define LPC1768_PCONP_PCGPIO 0x8000
orlagilson 6:1b5603fd1a9c 143 // bit 16: PCRIT: Repetitive interrupt timer power/clock enable
orlagilson 6:1b5603fd1a9c 144 #define LPC1768_PCONP_PCRIT 0x10000
orlagilson 6:1b5603fd1a9c 145 // bit 17: PCMCPWM: Motor control PWM power/clock enable
orlagilson 6:1b5603fd1a9c 146 #define LPC1768_PCONP_PCMCPWM 0x20000
orlagilson 6:1b5603fd1a9c 147 // bit 18: PCQEI: Quadrature encoder interface power/clock enable
orlagilson 6:1b5603fd1a9c 148 #define LPC1768_PCONP_PCQEI 0x40000
orlagilson 6:1b5603fd1a9c 149 // bit 19: PCI2C1: I2C interface 1 power/clock enable
orlagilson 6:1b5603fd1a9c 150 #define LPC1768_PCONP_PCI2C1 0x80000
orlagilson 6:1b5603fd1a9c 151 // bit 20: Reserved
orlagilson 6:1b5603fd1a9c 152 // bit 21: PCSSP0: SSP interface 0 power/clock enable
orlagilson 6:1b5603fd1a9c 153 #define LPC1768_PCONP_PCSSP0 0x200000
orlagilson 6:1b5603fd1a9c 154 // bit 22: PCTIM2: Timer 2 power/clock enable
orlagilson 6:1b5603fd1a9c 155 #define LPC1768_PCONP_PCTIM2 0x400000
orlagilson 6:1b5603fd1a9c 156 // bit 23: PCTIM3: Timer 3 power/clock enable
orlagilson 6:1b5603fd1a9c 157 #define LPC1768_PCONP_PCQTIM3 0x800000
orlagilson 6:1b5603fd1a9c 158 // bit 24: PCUART2: UART 2 power/clock enable
orlagilson 6:1b5603fd1a9c 159 #define LPC1768_PCONP_PCUART2 0x1000000
orlagilson 6:1b5603fd1a9c 160 // bit 25: PCUART3: UART 3 power/clock enable
orlagilson 6:1b5603fd1a9c 161 #define LPC1768_PCONP_PCUART3 0x2000000
orlagilson 6:1b5603fd1a9c 162 // bit 26: PCI2C2: I2C interface 2 power/clock enable
orlagilson 6:1b5603fd1a9c 163 #define LPC1768_PCONP_PCI2C2 0x4000000
orlagilson 6:1b5603fd1a9c 164 // bit 27: PCI2S: I2S interface power/clock enable
orlagilson 6:1b5603fd1a9c 165 #define LPC1768_PCONP_PCI2S 0x8000000
orlagilson 6:1b5603fd1a9c 166 // bit 28: Reserved
orlagilson 6:1b5603fd1a9c 167 // bit 29: PCGPDMA: GP DMA function power/clock enable
orlagilson 6:1b5603fd1a9c 168 #define LPC1768_PCONP_PCGPDMA 0x20000000
orlagilson 6:1b5603fd1a9c 169 // bit 30: PCENET: Ethernet block power/clock enable
orlagilson 6:1b5603fd1a9c 170 #define LPC1768_PCONP_PCENET 0x40000000
orlagilson 6:1b5603fd1a9c 171 // bit 31: PCUSB: USB interface power/clock enable
orlagilson 6:1b5603fd1a9c 172 #define LPC1768_PCONP_PCUSB 0x80000000
orlagilson 6:1b5603fd1a9c 173
orlagilson 6:1b5603fd1a9c 174 //Powers Up specified Peripheral(s)
orlagilson 6:1b5603fd1a9c 175 inline unsigned int Peripheral_PowerUp(unsigned int bitMask)
orlagilson 6:1b5603fd1a9c 176 {
orlagilson 6:1b5603fd1a9c 177 return LPC_SC->PCONP |= bitMask;
orlagilson 6:1b5603fd1a9c 178 }
orlagilson 6:1b5603fd1a9c 179
orlagilson 6:1b5603fd1a9c 180 //Powers Down specified Peripheral(s)
orlagilson 6:1b5603fd1a9c 181 inline unsigned int Peripheral_PowerDown(unsigned int bitMask)
orlagilson 6:1b5603fd1a9c 182 {
orlagilson 6:1b5603fd1a9c 183 return LPC_SC->PCONP &= ~bitMask;
orlagilson 6:1b5603fd1a9c 184 }
orlagilson 6:1b5603fd1a9c 185
orlagilson 6:1b5603fd1a9c 186 //returns if the peripheral is on or off
orlagilson 6:1b5603fd1a9c 187 inline bool Peripheral_GetStatus(unsigned int peripheral)
orlagilson 6:1b5603fd1a9c 188 {
orlagilson 6:1b5603fd1a9c 189 return (LPC_SC->PCONP & peripheral) ? true : false;
orlagilson 6:1b5603fd1a9c 190 }
orlagilson 6:1b5603fd1a9c 191
orlagilson 6:1b5603fd1a9c 192 #endif