Chau Vo / mbed-dev

mbed library sources. Supersedes mbed-src. RTC working even after reset

Fork of mbed-dev by mbed official

targets/hal/TARGET_STM/TARGET_STM32F4/pinmap.c@144:ef7eb2e8f9f7, 2016-09-02 (annotated)

Committer:
<>
Date:
Fri Sep 02 15:07:44 2016 +0100
Revision:
144:ef7eb2e8f9f7
Parent:
23:ee8ca7052b3c 
This updates the lib to the mbed lib v125

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /* mbed Microcontroller Library
<> 144:ef7eb2e8f9f7 2 *******************************************************************************
<> 144:ef7eb2e8f9f7 3 * Copyright (c) 2015, STMicroelectronics
<> 144:ef7eb2e8f9f7 4 * All rights reserved.
<> 144:ef7eb2e8f9f7 5 *
<> 144:ef7eb2e8f9f7 6 * Redistribution and use in source and binary forms, with or without
<> 144:ef7eb2e8f9f7 7 * modification, are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 8 *
<> 144:ef7eb2e8f9f7 9 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 10 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 12 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 13 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 15 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 16 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 17 *
<> 144:ef7eb2e8f9f7 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 28 *******************************************************************************
<> 144:ef7eb2e8f9f7 29 */
<> 144:ef7eb2e8f9f7 30 #include "mbed_assert.h"
<> 144:ef7eb2e8f9f7 31 #include "pinmap.h"
<> 144:ef7eb2e8f9f7 32 #include "PortNames.h"
<> 144:ef7eb2e8f9f7 33 #include "mbed_error.h"
<> 144:ef7eb2e8f9f7 34
<> 144:ef7eb2e8f9f7 35 // GPIO mode look-up table
<> 144:ef7eb2e8f9f7 36 static const uint32_t gpio_mode[13] = {
<> 144:ef7eb2e8f9f7 37 0x00000000, // 0 = GPIO_MODE_INPUT
<> 144:ef7eb2e8f9f7 38 0x00000001, // 1 = GPIO_MODE_OUTPUT_PP
<> 144:ef7eb2e8f9f7 39 0x00000011, // 2 = GPIO_MODE_OUTPUT_OD
<> 144:ef7eb2e8f9f7 40 0x00000002, // 3 = GPIO_MODE_AF_PP
<> 144:ef7eb2e8f9f7 41 0x00000012, // 4 = GPIO_MODE_AF_OD
<> 144:ef7eb2e8f9f7 42 0x00000003, // 5 = GPIO_MODE_ANALOG
<> 144:ef7eb2e8f9f7 43 0x10110000, // 6 = GPIO_MODE_IT_RISING
<> 144:ef7eb2e8f9f7 44 0x10210000, // 7 = GPIO_MODE_IT_FALLING
<> 144:ef7eb2e8f9f7 45 0x10310000, // 8 = GPIO_MODE_IT_RISING_FALLING
<> 144:ef7eb2e8f9f7 46 0x10120000, // 9 = GPIO_MODE_EVT_RISING
<> 144:ef7eb2e8f9f7 47 0x10220000, // 10 = GPIO_MODE_EVT_FALLING
<> 144:ef7eb2e8f9f7 48 0x10320000, // 11 = GPIO_MODE_EVT_RISING_FALLING
<> 144:ef7eb2e8f9f7 49 0x10000000 // 12 = Reset GPIO_MODE_IT_EVT
<> 144:ef7eb2e8f9f7 50 };
<> 144:ef7eb2e8f9f7 51
<> 144:ef7eb2e8f9f7 52 // Enable GPIO clock and return GPIO base address
<> 144:ef7eb2e8f9f7 53 uint32_t Set_GPIO_Clock(uint32_t port_idx)
<> 144:ef7eb2e8f9f7 54 {
<> 144:ef7eb2e8f9f7 55 uint32_t gpio_add = 0;
<> 144:ef7eb2e8f9f7 56 switch (port_idx) {
<> 144:ef7eb2e8f9f7 57 case PortA:
<> 144:ef7eb2e8f9f7 58 gpio_add = GPIOA_BASE;
<> 144:ef7eb2e8f9f7 59 __GPIOA_CLK_ENABLE();
<> 144:ef7eb2e8f9f7 60 break;
<> 144:ef7eb2e8f9f7 61 case PortB:
<> 144:ef7eb2e8f9f7 62 gpio_add = GPIOB_BASE;
<> 144:ef7eb2e8f9f7 63 __GPIOB_CLK_ENABLE();
<> 144:ef7eb2e8f9f7 64 break;
<> 144:ef7eb2e8f9f7 65 case PortC:
<> 144:ef7eb2e8f9f7 66 gpio_add = GPIOC_BASE;
<> 144:ef7eb2e8f9f7 67 __GPIOC_CLK_ENABLE();
<> 144:ef7eb2e8f9f7 68 break;
<> 144:ef7eb2e8f9f7 69 #if defined GPIOD_BASE
<> 144:ef7eb2e8f9f7 70 case PortD:
<> 144:ef7eb2e8f9f7 71 gpio_add = GPIOD_BASE;
<> 144:ef7eb2e8f9f7 72 __GPIOD_CLK_ENABLE();
<> 144:ef7eb2e8f9f7 73 break;
<> 144:ef7eb2e8f9f7 74 #endif
<> 144:ef7eb2e8f9f7 75 #if defined GPIOE_BASE
<> 144:ef7eb2e8f9f7 76 case PortE:
<> 144:ef7eb2e8f9f7 77 gpio_add = GPIOE_BASE;
<> 144:ef7eb2e8f9f7 78 __GPIOE_CLK_ENABLE();
<> 144:ef7eb2e8f9f7 79 break;
<> 144:ef7eb2e8f9f7 80 #endif
<> 144:ef7eb2e8f9f7 81 #if defined GPIOF_BASE
<> 144:ef7eb2e8f9f7 82 case PortF:
<> 144:ef7eb2e8f9f7 83 gpio_add = GPIOF_BASE;
<> 144:ef7eb2e8f9f7 84 __GPIOF_CLK_ENABLE();
<> 144:ef7eb2e8f9f7 85 break;
<> 144:ef7eb2e8f9f7 86 #endif
<> 144:ef7eb2e8f9f7 87 #if defined GPIOG_BASE
<> 144:ef7eb2e8f9f7 88 case PortG:
<> 144:ef7eb2e8f9f7 89 gpio_add = GPIOG_BASE;
<> 144:ef7eb2e8f9f7 90 __GPIOG_CLK_ENABLE();
<> 144:ef7eb2e8f9f7 91 break;
<> 144:ef7eb2e8f9f7 92 #endif
<> 144:ef7eb2e8f9f7 93 #if defined GPIOH_BASE
<> 144:ef7eb2e8f9f7 94 case PortH:
<> 144:ef7eb2e8f9f7 95 gpio_add = GPIOH_BASE;
<> 144:ef7eb2e8f9f7 96 __GPIOH_CLK_ENABLE();
<> 144:ef7eb2e8f9f7 97 break;
<> 144:ef7eb2e8f9f7 98 #endif
<> 144:ef7eb2e8f9f7 99 #if defined GPIOI_BASE
<> 144:ef7eb2e8f9f7 100 case PortI:
<> 144:ef7eb2e8f9f7 101 gpio_add = GPIOI_BASE;
<> 144:ef7eb2e8f9f7 102 __GPIOI_CLK_ENABLE();
<> 144:ef7eb2e8f9f7 103 break;
<> 144:ef7eb2e8f9f7 104 #endif
<> 144:ef7eb2e8f9f7 105 #if defined GPIOJ_BASE
<> 144:ef7eb2e8f9f7 106 case PortJ:
<> 144:ef7eb2e8f9f7 107 gpio_add = GPIOJ_BASE;
<> 144:ef7eb2e8f9f7 108 __GPIOJ_CLK_ENABLE();
<> 144:ef7eb2e8f9f7 109 break;
<> 144:ef7eb2e8f9f7 110 #endif
<> 144:ef7eb2e8f9f7 111 #if defined GPIOK_BASE
<> 144:ef7eb2e8f9f7 112 case PortK:
<> 144:ef7eb2e8f9f7 113 gpio_add = GPIOK_BASE;
<> 144:ef7eb2e8f9f7 114 __GPIOK_CLK_ENABLE();
<> 144:ef7eb2e8f9f7 115 break;
<> 144:ef7eb2e8f9f7 116 #endif
<> 144:ef7eb2e8f9f7 117 default:
<> 144:ef7eb2e8f9f7 118 error("Pinmap error: wrong port number.");
<> 144:ef7eb2e8f9f7 119 break;
<> 144:ef7eb2e8f9f7 120 }
<> 144:ef7eb2e8f9f7 121 return gpio_add;
<> 144:ef7eb2e8f9f7 122 }
<> 144:ef7eb2e8f9f7 123
<> 144:ef7eb2e8f9f7 124 /**
<> 144:ef7eb2e8f9f7 125 * Configure pin (mode, speed, output type and pull-up/pull-down)
<> 144:ef7eb2e8f9f7 126 */
<> 144:ef7eb2e8f9f7 127 void pin_function(PinName pin, int data)
<> 144:ef7eb2e8f9f7 128 {
<> 144:ef7eb2e8f9f7 129 MBED_ASSERT(pin != (PinName)NC);
<> 144:ef7eb2e8f9f7 130 // Get the pin informations
<> 144:ef7eb2e8f9f7 131 uint32_t mode = STM_PIN_MODE(data);
<> 144:ef7eb2e8f9f7 132 uint32_t pupd = STM_PIN_PUPD(data);
<> 144:ef7eb2e8f9f7 133 uint32_t afnum = STM_PIN_AFNUM(data);
<> 144:ef7eb2e8f9f7 134
<> 144:ef7eb2e8f9f7 135 uint32_t port_index = STM_PORT(pin);
<> 144:ef7eb2e8f9f7 136 uint32_t pin_index = STM_PIN(pin);
<> 144:ef7eb2e8f9f7 137
<> 144:ef7eb2e8f9f7 138 // Enable GPIO clock
<> 144:ef7eb2e8f9f7 139 uint32_t gpio_add = Set_GPIO_Clock(port_index);
<> 144:ef7eb2e8f9f7 140 GPIO_TypeDef *gpio = (GPIO_TypeDef *)gpio_add;
<> 144:ef7eb2e8f9f7 141
<> 144:ef7eb2e8f9f7 142 // Configure GPIO
<> 144:ef7eb2e8f9f7 143 GPIO_InitTypeDef GPIO_InitStructure;
<> 144:ef7eb2e8f9f7 144 GPIO_InitStructure.Pin = (uint32_t)(1 << pin_index);
<> 144:ef7eb2e8f9f7 145 GPIO_InitStructure.Mode = gpio_mode[mode];
<> 144:ef7eb2e8f9f7 146 GPIO_InitStructure.Pull = pupd;
<> 144:ef7eb2e8f9f7 147 GPIO_InitStructure.Speed = GPIO_SPEED_HIGH;
<> 144:ef7eb2e8f9f7 148 GPIO_InitStructure.Alternate = afnum;
<> 144:ef7eb2e8f9f7 149 HAL_GPIO_Init(gpio, &GPIO_InitStructure);
<> 144:ef7eb2e8f9f7 150
<> 144:ef7eb2e8f9f7 151 // [TODO] Disconnect JTAG-DP + SW-DP signals.
<> 144:ef7eb2e8f9f7 152 // Warning: Need to reconnect under reset
<> 144:ef7eb2e8f9f7 153 //if ((pin == PA_13) || (pin == PA_14)) {
<> 144:ef7eb2e8f9f7 154 //
<> 144:ef7eb2e8f9f7 155 //}
<> 144:ef7eb2e8f9f7 156 //if ((pin == PA_15) || (pin == PB_3) || (pin == PB_4)) {
<> 144:ef7eb2e8f9f7 157 //
<> 144:ef7eb2e8f9f7 158 //}
<> 144:ef7eb2e8f9f7 159 }
<> 144:ef7eb2e8f9f7 160
<> 144:ef7eb2e8f9f7 161 /**
<> 144:ef7eb2e8f9f7 162 * Configure pin pull-up/pull-down
<> 144:ef7eb2e8f9f7 163 */
<> 144:ef7eb2e8f9f7 164 void pin_mode(PinName pin, PinMode mode)
<> 144:ef7eb2e8f9f7 165 {
<> 144:ef7eb2e8f9f7 166 MBED_ASSERT(pin != (PinName)NC);
<> 144:ef7eb2e8f9f7 167 uint32_t port_index = STM_PORT(pin);
<> 144:ef7eb2e8f9f7 168 uint32_t pin_index = STM_PIN(pin);
<> 144:ef7eb2e8f9f7 169
<> 144:ef7eb2e8f9f7 170 // Enable GPIO clock
<> 144:ef7eb2e8f9f7 171 uint32_t gpio_add = Set_GPIO_Clock(port_index);
<> 144:ef7eb2e8f9f7 172 GPIO_TypeDef *gpio = (GPIO_TypeDef *)gpio_add;
<> 144:ef7eb2e8f9f7 173
<> 144:ef7eb2e8f9f7 174 // Configure pull-up/pull-down resistors
<> 144:ef7eb2e8f9f7 175 uint32_t pupd = (uint32_t)mode;
<> 144:ef7eb2e8f9f7 176 if (pupd > 2) {
<> 144:ef7eb2e8f9f7 177 pupd = 0; // Open-drain = No pull-up/No pull-down
<> 144:ef7eb2e8f9f7 178 }
<> 144:ef7eb2e8f9f7 179 gpio->PUPDR &= (uint32_t)(~(GPIO_PUPDR_PUPDR0 << (pin_index * 2)));
<> 144:ef7eb2e8f9f7 180 gpio->PUPDR |= (uint32_t)(pupd << (pin_index * 2));
<> 144:ef7eb2e8f9f7 181
<> 144:ef7eb2e8f9f7 182 }