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SPIRAM_23LC1024_DMA
SPI RAM 23LC1024 (Microchip) with DMA
Fork of SPIRAM_23LC1024 by
MODDMA/MODDMA.h@2:a3e0f7f37ac9, 2012-12-05 (annotated)
- Committer:
- okini3939
- Date:
- Wed Dec 05 07:56:09 2012 +0000
- Revision:
- 2:a3e0f7f37ac9
DMX
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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okini3939 | 2:a3e0f7f37ac9 | 1 | /* |
okini3939 | 2:a3e0f7f37ac9 | 2 | Copyright (c) 2010 Andy Kirkham |
okini3939 | 2:a3e0f7f37ac9 | 3 | |
okini3939 | 2:a3e0f7f37ac9 | 4 | Permission is hereby granted, free of charge, to any person obtaining a copy |
okini3939 | 2:a3e0f7f37ac9 | 5 | of this software and associated documentation files (the "Software"), to deal |
okini3939 | 2:a3e0f7f37ac9 | 6 | in the Software without restriction, including without limitation the rights |
okini3939 | 2:a3e0f7f37ac9 | 7 | to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
okini3939 | 2:a3e0f7f37ac9 | 8 | copies of the Software, and to permit persons to whom the Software is |
okini3939 | 2:a3e0f7f37ac9 | 9 | furnished to do so, subject to the following conditions: |
okini3939 | 2:a3e0f7f37ac9 | 10 | |
okini3939 | 2:a3e0f7f37ac9 | 11 | The above copyright notice and this permission notice shall be included in |
okini3939 | 2:a3e0f7f37ac9 | 12 | all copies or substantial portions of the Software. |
okini3939 | 2:a3e0f7f37ac9 | 13 | |
okini3939 | 2:a3e0f7f37ac9 | 14 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
okini3939 | 2:a3e0f7f37ac9 | 15 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
okini3939 | 2:a3e0f7f37ac9 | 16 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
okini3939 | 2:a3e0f7f37ac9 | 17 | AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
okini3939 | 2:a3e0f7f37ac9 | 18 | LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
okini3939 | 2:a3e0f7f37ac9 | 19 | OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
okini3939 | 2:a3e0f7f37ac9 | 20 | THE SOFTWARE. |
okini3939 | 2:a3e0f7f37ac9 | 21 | |
okini3939 | 2:a3e0f7f37ac9 | 22 | @file MODDMA.h |
okini3939 | 2:a3e0f7f37ac9 | 23 | @purpose Adds DMA controller and multiple transfer configurations |
okini3939 | 2:a3e0f7f37ac9 | 24 | @version see ChangeLog.c |
okini3939 | 2:a3e0f7f37ac9 | 25 | @date Nov 2010 |
okini3939 | 2:a3e0f7f37ac9 | 26 | @author Andy Kirkham |
okini3939 | 2:a3e0f7f37ac9 | 27 | */ |
okini3939 | 2:a3e0f7f37ac9 | 28 | |
okini3939 | 2:a3e0f7f37ac9 | 29 | #ifndef MODDMA_H |
okini3939 | 2:a3e0f7f37ac9 | 30 | #define MODDMA_H |
okini3939 | 2:a3e0f7f37ac9 | 31 | |
okini3939 | 2:a3e0f7f37ac9 | 32 | /** @defgroup API The MODDMA API */ |
okini3939 | 2:a3e0f7f37ac9 | 33 | /** @defgroup MISC Misc MODSERIAL functions */ |
okini3939 | 2:a3e0f7f37ac9 | 34 | /** @defgroup INTERNALS MODSERIAL Internals */ |
okini3939 | 2:a3e0f7f37ac9 | 35 | |
okini3939 | 2:a3e0f7f37ac9 | 36 | #include "mbed.h" |
okini3939 | 2:a3e0f7f37ac9 | 37 | #include "iomacros.h" |
okini3939 | 2:a3e0f7f37ac9 | 38 | |
okini3939 | 2:a3e0f7f37ac9 | 39 | namespace AjK { |
okini3939 | 2:a3e0f7f37ac9 | 40 | |
okini3939 | 2:a3e0f7f37ac9 | 41 | /** |
okini3939 | 2:a3e0f7f37ac9 | 42 | * @brief The MODDMA configuration system |
okini3939 | 2:a3e0f7f37ac9 | 43 | * @author Andy Kirkham |
okini3939 | 2:a3e0f7f37ac9 | 44 | * @see http://mbed.org/cookbook/MODDMA_Config |
okini3939 | 2:a3e0f7f37ac9 | 45 | * @see MODDMA |
okini3939 | 2:a3e0f7f37ac9 | 46 | * @see API |
okini3939 | 2:a3e0f7f37ac9 | 47 | * |
okini3939 | 2:a3e0f7f37ac9 | 48 | * <b>MODDMA_Config</b> defines a configuration that can be passed to the MODDMA controller |
okini3939 | 2:a3e0f7f37ac9 | 49 | * instance to perform a GPDMA data transfer. |
okini3939 | 2:a3e0f7f37ac9 | 50 | */ |
okini3939 | 2:a3e0f7f37ac9 | 51 | class MODDMA_Config { |
okini3939 | 2:a3e0f7f37ac9 | 52 | protected: |
okini3939 | 2:a3e0f7f37ac9 | 53 | |
okini3939 | 2:a3e0f7f37ac9 | 54 | // ***************************************** |
okini3939 | 2:a3e0f7f37ac9 | 55 | // From GPDMA by NXP MCU SW Application Team |
okini3939 | 2:a3e0f7f37ac9 | 56 | // ***************************************** |
okini3939 | 2:a3e0f7f37ac9 | 57 | |
okini3939 | 2:a3e0f7f37ac9 | 58 | uint32_t ChannelNum; //!< DMA channel number, should be in range from 0 to 7. |
okini3939 | 2:a3e0f7f37ac9 | 59 | uint32_t TransferSize; //!< Length/Size of transfer |
okini3939 | 2:a3e0f7f37ac9 | 60 | uint32_t TransferWidth; //!< Transfer width - used for TransferType is GPDMA_TRANSFERTYPE_m2m only |
okini3939 | 2:a3e0f7f37ac9 | 61 | uint32_t SrcMemAddr; //!< Physical Src Addr, used in case TransferType is chosen as MODDMA::GPDMA_TRANSFERTYPE::m2m or MODDMA::GPDMA_TRANSFERTYPE::m2p |
okini3939 | 2:a3e0f7f37ac9 | 62 | uint32_t DstMemAddr; //!< Physical Destination Address, used in case TransferType is chosen as MODDMA::GPDMA_TRANSFERTYPE::m2m or MODDMA::GPDMA_TRANSFERTYPE::p2m |
okini3939 | 2:a3e0f7f37ac9 | 63 | uint32_t TransferType; //!< Transfer Type |
okini3939 | 2:a3e0f7f37ac9 | 64 | uint32_t SrcConn; //!< Peripheral Source Connection type, used in case TransferType is chosen as |
okini3939 | 2:a3e0f7f37ac9 | 65 | uint32_t DstConn; //!< Peripheral Destination Connection type, used in case TransferType is chosen as |
okini3939 | 2:a3e0f7f37ac9 | 66 | uint32_t DMALLI; //!< Linker List Item structure data address if there's no Linker List, set as '0' |
okini3939 | 2:a3e0f7f37ac9 | 67 | uint32_t DMACSync; //!< DMACSync if required. |
okini3939 | 2:a3e0f7f37ac9 | 68 | |
okini3939 | 2:a3e0f7f37ac9 | 69 | // Mbed specifics. |
okini3939 | 2:a3e0f7f37ac9 | 70 | |
okini3939 | 2:a3e0f7f37ac9 | 71 | public: |
okini3939 | 2:a3e0f7f37ac9 | 72 | |
okini3939 | 2:a3e0f7f37ac9 | 73 | MODDMA_Config() { |
okini3939 | 2:a3e0f7f37ac9 | 74 | isrIntTCStat = new FunctionPointer; |
okini3939 | 2:a3e0f7f37ac9 | 75 | isrIntErrStat = new FunctionPointer; |
okini3939 | 2:a3e0f7f37ac9 | 76 | ChannelNum = 0xFFFF; |
okini3939 | 2:a3e0f7f37ac9 | 77 | TransferSize = 0; |
okini3939 | 2:a3e0f7f37ac9 | 78 | TransferWidth = 0; |
okini3939 | 2:a3e0f7f37ac9 | 79 | SrcMemAddr = 0; |
okini3939 | 2:a3e0f7f37ac9 | 80 | DstMemAddr = 0; |
okini3939 | 2:a3e0f7f37ac9 | 81 | TransferType = 0; |
okini3939 | 2:a3e0f7f37ac9 | 82 | SrcConn = 0; |
okini3939 | 2:a3e0f7f37ac9 | 83 | DstConn = 0; |
okini3939 | 2:a3e0f7f37ac9 | 84 | DMALLI = 0; |
okini3939 | 2:a3e0f7f37ac9 | 85 | DMACSync = 0; |
okini3939 | 2:a3e0f7f37ac9 | 86 | } |
okini3939 | 2:a3e0f7f37ac9 | 87 | |
okini3939 | 2:a3e0f7f37ac9 | 88 | ~MODDMA_Config() { |
okini3939 | 2:a3e0f7f37ac9 | 89 | delete(isrIntTCStat); |
okini3939 | 2:a3e0f7f37ac9 | 90 | delete(isrIntErrStat); |
okini3939 | 2:a3e0f7f37ac9 | 91 | } |
okini3939 | 2:a3e0f7f37ac9 | 92 | |
okini3939 | 2:a3e0f7f37ac9 | 93 | class MODDMA_Config * channelNum(uint32_t n) { ChannelNum = n & 0x7; return this; } |
okini3939 | 2:a3e0f7f37ac9 | 94 | class MODDMA_Config * transferSize(uint32_t n) { TransferSize = n; return this; } |
okini3939 | 2:a3e0f7f37ac9 | 95 | class MODDMA_Config * transferWidth(uint32_t n) { TransferWidth = n; return this; } |
okini3939 | 2:a3e0f7f37ac9 | 96 | class MODDMA_Config * srcMemAddr(uint32_t n) { SrcMemAddr = n; return this; } |
okini3939 | 2:a3e0f7f37ac9 | 97 | class MODDMA_Config * dstMemAddr(uint32_t n) { DstMemAddr = n; return this; } |
okini3939 | 2:a3e0f7f37ac9 | 98 | class MODDMA_Config * transferType(uint32_t n) { TransferType = n; return this; } |
okini3939 | 2:a3e0f7f37ac9 | 99 | class MODDMA_Config * srcConn(uint32_t n) { SrcConn = n; return this; } |
okini3939 | 2:a3e0f7f37ac9 | 100 | class MODDMA_Config * dstConn(uint32_t n) { DstConn = n; return this; } |
okini3939 | 2:a3e0f7f37ac9 | 101 | class MODDMA_Config * dmaLLI(uint32_t n) { DMALLI = n; return this; } |
okini3939 | 2:a3e0f7f37ac9 | 102 | class MODDMA_Config * dmacSync(uint32_t n) { DMACSync = n; return this; } |
okini3939 | 2:a3e0f7f37ac9 | 103 | |
okini3939 | 2:a3e0f7f37ac9 | 104 | uint32_t channelNum(void) { return ChannelNum; } |
okini3939 | 2:a3e0f7f37ac9 | 105 | uint32_t transferSize(void) { return TransferSize; } |
okini3939 | 2:a3e0f7f37ac9 | 106 | uint32_t transferWidth(void) { return TransferWidth; } |
okini3939 | 2:a3e0f7f37ac9 | 107 | uint32_t srcMemAddr(void) { return SrcMemAddr; } |
okini3939 | 2:a3e0f7f37ac9 | 108 | uint32_t dstMemAddr(void) { return DstMemAddr; } |
okini3939 | 2:a3e0f7f37ac9 | 109 | uint32_t transferType(void) { return TransferType; } |
okini3939 | 2:a3e0f7f37ac9 | 110 | uint32_t srcConn(void) { return SrcConn; } |
okini3939 | 2:a3e0f7f37ac9 | 111 | uint32_t dstConn(void) { return DstConn; } |
okini3939 | 2:a3e0f7f37ac9 | 112 | uint32_t dmaLLI(void) { return DMALLI; } |
okini3939 | 2:a3e0f7f37ac9 | 113 | uint32_t dmacSync(void) { return DMACSync; } |
okini3939 | 2:a3e0f7f37ac9 | 114 | |
okini3939 | 2:a3e0f7f37ac9 | 115 | /** |
okini3939 | 2:a3e0f7f37ac9 | 116 | * Attach a callback to the TC IRQ configuration. |
okini3939 | 2:a3e0f7f37ac9 | 117 | * |
okini3939 | 2:a3e0f7f37ac9 | 118 | * @param fptr A function pointer to call |
okini3939 | 2:a3e0f7f37ac9 | 119 | * @return this |
okini3939 | 2:a3e0f7f37ac9 | 120 | */ |
okini3939 | 2:a3e0f7f37ac9 | 121 | class MODDMA_Config * attach_tc(void (*fptr)(void)) { |
okini3939 | 2:a3e0f7f37ac9 | 122 | isrIntTCStat->attach(fptr); |
okini3939 | 2:a3e0f7f37ac9 | 123 | return this; |
okini3939 | 2:a3e0f7f37ac9 | 124 | } |
okini3939 | 2:a3e0f7f37ac9 | 125 | |
okini3939 | 2:a3e0f7f37ac9 | 126 | /** |
okini3939 | 2:a3e0f7f37ac9 | 127 | * Attach a callback to the ERR IRQ configuration. |
okini3939 | 2:a3e0f7f37ac9 | 128 | * |
okini3939 | 2:a3e0f7f37ac9 | 129 | * @param fptr A function pointer to call |
okini3939 | 2:a3e0f7f37ac9 | 130 | * @return this |
okini3939 | 2:a3e0f7f37ac9 | 131 | */ |
okini3939 | 2:a3e0f7f37ac9 | 132 | class MODDMA_Config * attach_err(void (*fptr)(void)) { |
okini3939 | 2:a3e0f7f37ac9 | 133 | isrIntErrStat->attach(fptr); |
okini3939 | 2:a3e0f7f37ac9 | 134 | return this; |
okini3939 | 2:a3e0f7f37ac9 | 135 | } |
okini3939 | 2:a3e0f7f37ac9 | 136 | |
okini3939 | 2:a3e0f7f37ac9 | 137 | /** |
okini3939 | 2:a3e0f7f37ac9 | 138 | * Attach a callback to the TC IRQ configuration. |
okini3939 | 2:a3e0f7f37ac9 | 139 | * |
okini3939 | 2:a3e0f7f37ac9 | 140 | * @param tptr A template pointer to the calling object |
okini3939 | 2:a3e0f7f37ac9 | 141 | * @param mptr A method pointer within the object to call. |
okini3939 | 2:a3e0f7f37ac9 | 142 | * @return this |
okini3939 | 2:a3e0f7f37ac9 | 143 | */ |
okini3939 | 2:a3e0f7f37ac9 | 144 | template<typename T> |
okini3939 | 2:a3e0f7f37ac9 | 145 | class MODDMA_Config * attach_tc(T* tptr, void (T::*mptr)(void)) { |
okini3939 | 2:a3e0f7f37ac9 | 146 | if((mptr != NULL) && (tptr != NULL)) { |
okini3939 | 2:a3e0f7f37ac9 | 147 | isrIntTCStat->attach(tptr, mptr); |
okini3939 | 2:a3e0f7f37ac9 | 148 | } |
okini3939 | 2:a3e0f7f37ac9 | 149 | return this; |
okini3939 | 2:a3e0f7f37ac9 | 150 | } |
okini3939 | 2:a3e0f7f37ac9 | 151 | |
okini3939 | 2:a3e0f7f37ac9 | 152 | /** |
okini3939 | 2:a3e0f7f37ac9 | 153 | * Attach a callback to the ERR IRQ configuration. |
okini3939 | 2:a3e0f7f37ac9 | 154 | * |
okini3939 | 2:a3e0f7f37ac9 | 155 | * @param tptr A template pointer to the calling object |
okini3939 | 2:a3e0f7f37ac9 | 156 | * @param mptr A method pointer within the object to call. |
okini3939 | 2:a3e0f7f37ac9 | 157 | * @return this |
okini3939 | 2:a3e0f7f37ac9 | 158 | */ |
okini3939 | 2:a3e0f7f37ac9 | 159 | template<typename T> |
okini3939 | 2:a3e0f7f37ac9 | 160 | class MODDMA_Config * attach_err(T* tptr, void (T::*mptr)(void)) { |
okini3939 | 2:a3e0f7f37ac9 | 161 | if((mptr != NULL) && (tptr != NULL)) { |
okini3939 | 2:a3e0f7f37ac9 | 162 | isrIntErrStat->attach(tptr, mptr); |
okini3939 | 2:a3e0f7f37ac9 | 163 | } |
okini3939 | 2:a3e0f7f37ac9 | 164 | return this; |
okini3939 | 2:a3e0f7f37ac9 | 165 | } |
okini3939 | 2:a3e0f7f37ac9 | 166 | FunctionPointer *isrIntTCStat; |
okini3939 | 2:a3e0f7f37ac9 | 167 | FunctionPointer *isrIntErrStat; |
okini3939 | 2:a3e0f7f37ac9 | 168 | }; |
okini3939 | 2:a3e0f7f37ac9 | 169 | |
okini3939 | 2:a3e0f7f37ac9 | 170 | /** |
okini3939 | 2:a3e0f7f37ac9 | 171 | * @brief The MODDMA configuration system (linked list items) |
okini3939 | 2:a3e0f7f37ac9 | 172 | * @author Andy Kirkham |
okini3939 | 2:a3e0f7f37ac9 | 173 | * @see http://mbed.org/cookbook/MODDMA_Config |
okini3939 | 2:a3e0f7f37ac9 | 174 | * @see MODDMA |
okini3939 | 2:a3e0f7f37ac9 | 175 | * @see MODDMA_Config |
okini3939 | 2:a3e0f7f37ac9 | 176 | * @see API |
okini3939 | 2:a3e0f7f37ac9 | 177 | */ |
okini3939 | 2:a3e0f7f37ac9 | 178 | class MODDMA_LLI { |
okini3939 | 2:a3e0f7f37ac9 | 179 | public: |
okini3939 | 2:a3e0f7f37ac9 | 180 | class MODDMA_LLI *srcAddr(uint32_t n) { SrcAddr = n; return this; } |
okini3939 | 2:a3e0f7f37ac9 | 181 | class MODDMA_LLI *dstAddr(uint32_t n) { DstAddr = n; return this; } |
okini3939 | 2:a3e0f7f37ac9 | 182 | class MODDMA_LLI *nextLLI(uint32_t n) { NextLLI = n; return this; } |
okini3939 | 2:a3e0f7f37ac9 | 183 | class MODDMA_LLI *control(uint32_t n) { Control = n; return this; } |
okini3939 | 2:a3e0f7f37ac9 | 184 | uint32_t srcAddr(void) { return SrcAddr; } |
okini3939 | 2:a3e0f7f37ac9 | 185 | uint32_t dstAddr(void) { return DstAddr; } |
okini3939 | 2:a3e0f7f37ac9 | 186 | uint32_t nextLLI(void) { return NextLLI; } |
okini3939 | 2:a3e0f7f37ac9 | 187 | uint32_t control(void) { return Control; } |
okini3939 | 2:a3e0f7f37ac9 | 188 | |
okini3939 | 2:a3e0f7f37ac9 | 189 | uint32_t SrcAddr; //!< Source Address |
okini3939 | 2:a3e0f7f37ac9 | 190 | uint32_t DstAddr; //!< Destination address |
okini3939 | 2:a3e0f7f37ac9 | 191 | uint32_t NextLLI; //!< Next LLI address, otherwise set to '0' |
okini3939 | 2:a3e0f7f37ac9 | 192 | uint32_t Control; //!< GPDMA Control of this LLI |
okini3939 | 2:a3e0f7f37ac9 | 193 | }; |
okini3939 | 2:a3e0f7f37ac9 | 194 | |
okini3939 | 2:a3e0f7f37ac9 | 195 | |
okini3939 | 2:a3e0f7f37ac9 | 196 | |
okini3939 | 2:a3e0f7f37ac9 | 197 | /** |
okini3939 | 2:a3e0f7f37ac9 | 198 | * @brief MODDMA GPDMA Controller |
okini3939 | 2:a3e0f7f37ac9 | 199 | * @author Andy Kirkham |
okini3939 | 2:a3e0f7f37ac9 | 200 | * @see http://mbed.org/cookbook/MODDMA |
okini3939 | 2:a3e0f7f37ac9 | 201 | * @see example1.cpp |
okini3939 | 2:a3e0f7f37ac9 | 202 | * @see API |
okini3939 | 2:a3e0f7f37ac9 | 203 | * |
okini3939 | 2:a3e0f7f37ac9 | 204 | * <b>MODDMA</b> defines a GPDMA controller and multiple DMA configurations that allow for DMA |
okini3939 | 2:a3e0f7f37ac9 | 205 | * transfers from memory to memory, memory to peripheral or peripheral to memory. |
okini3939 | 2:a3e0f7f37ac9 | 206 | * |
okini3939 | 2:a3e0f7f37ac9 | 207 | * At the heart of the library is the MODDMA class that defines a single instance controller that |
okini3939 | 2:a3e0f7f37ac9 | 208 | * manages all the GPDMA hardware registers and interrupts. The controller can accept multiple |
okini3939 | 2:a3e0f7f37ac9 | 209 | * configurations that define the channel transfers. Each configuration specifies the source and |
okini3939 | 2:a3e0f7f37ac9 | 210 | * destination information and other associated parts to maintain the transfer process. |
okini3939 | 2:a3e0f7f37ac9 | 211 | * |
okini3939 | 2:a3e0f7f37ac9 | 212 | * Standard example: |
okini3939 | 2:a3e0f7f37ac9 | 213 | * @code |
okini3939 | 2:a3e0f7f37ac9 | 214 | * #include "mbed.h" |
okini3939 | 2:a3e0f7f37ac9 | 215 | * #include "MODDMA.h" |
okini3939 | 2:a3e0f7f37ac9 | 216 | * |
okini3939 | 2:a3e0f7f37ac9 | 217 | * DigitalOut led1(LED1); |
okini3939 | 2:a3e0f7f37ac9 | 218 | * Serial pc(USBTX, USBRX); // tx, rx |
okini3939 | 2:a3e0f7f37ac9 | 219 | * MODDMA dma; |
okini3939 | 2:a3e0f7f37ac9 | 220 | * |
okini3939 | 2:a3e0f7f37ac9 | 221 | * int main() { |
okini3939 | 2:a3e0f7f37ac9 | 222 | * |
okini3939 | 2:a3e0f7f37ac9 | 223 | * // Create a string buffer to send directly to a Uart/Serial |
okini3939 | 2:a3e0f7f37ac9 | 224 | * char s[] = "***DMA*** ABCDEFGHIJKLMNOPQRSTUVWXYZ ***DMA***"; |
okini3939 | 2:a3e0f7f37ac9 | 225 | * |
okini3939 | 2:a3e0f7f37ac9 | 226 | * // Create a transfer configuarion |
okini3939 | 2:a3e0f7f37ac9 | 227 | * MODDMA_Config *config = new MODDMA_Config; |
okini3939 | 2:a3e0f7f37ac9 | 228 | * |
okini3939 | 2:a3e0f7f37ac9 | 229 | * // Provide a "minimal" setup for demo purposes. |
okini3939 | 2:a3e0f7f37ac9 | 230 | * config |
okini3939 | 2:a3e0f7f37ac9 | 231 | * ->channelNum ( MODDMA::Channel_0 ) // The DMA channel to use. |
okini3939 | 2:a3e0f7f37ac9 | 232 | * ->srcMemAddr ( (uint32_t) &s ) // A pointer to the buffer to send. |
okini3939 | 2:a3e0f7f37ac9 | 233 | * ->transferSize ( sizeof(s) ) // The size of that buffer. |
okini3939 | 2:a3e0f7f37ac9 | 234 | * ->transferType ( MODDMA::m2p ) // Source is memory, destination is peripheral |
okini3939 | 2:a3e0f7f37ac9 | 235 | * ->dstConn ( MODDMA::UART0_Tx ) // Specifically, peripheral is Uart0 TX (USBTX, USBRX) |
okini3939 | 2:a3e0f7f37ac9 | 236 | * ; // config end. |
okini3939 | 2:a3e0f7f37ac9 | 237 | * |
okini3939 | 2:a3e0f7f37ac9 | 238 | * // Pass the configuration to the MODDMA controller. |
okini3939 | 2:a3e0f7f37ac9 | 239 | * dma.Setup( config ); |
okini3939 | 2:a3e0f7f37ac9 | 240 | * |
okini3939 | 2:a3e0f7f37ac9 | 241 | * // Enable the channel and begin transfer. |
okini3939 | 2:a3e0f7f37ac9 | 242 | * dma.Enable( config->channelNum() ); |
okini3939 | 2:a3e0f7f37ac9 | 243 | * |
okini3939 | 2:a3e0f7f37ac9 | 244 | * while(1) { |
okini3939 | 2:a3e0f7f37ac9 | 245 | * led1 = !led1; |
okini3939 | 2:a3e0f7f37ac9 | 246 | * wait(0.25); |
okini3939 | 2:a3e0f7f37ac9 | 247 | * } |
okini3939 | 2:a3e0f7f37ac9 | 248 | * } |
okini3939 | 2:a3e0f7f37ac9 | 249 | * @endcode |
okini3939 | 2:a3e0f7f37ac9 | 250 | */ |
okini3939 | 2:a3e0f7f37ac9 | 251 | class MODDMA |
okini3939 | 2:a3e0f7f37ac9 | 252 | { |
okini3939 | 2:a3e0f7f37ac9 | 253 | public: |
okini3939 | 2:a3e0f7f37ac9 | 254 | |
okini3939 | 2:a3e0f7f37ac9 | 255 | //! Channel definitions. |
okini3939 | 2:a3e0f7f37ac9 | 256 | enum CHANNELS { |
okini3939 | 2:a3e0f7f37ac9 | 257 | Channel_0 = 0 /*!< Channel 0 */ |
okini3939 | 2:a3e0f7f37ac9 | 258 | , Channel_1 /*!< Channel 1 */ |
okini3939 | 2:a3e0f7f37ac9 | 259 | , Channel_2 /*!< Channel 2 */ |
okini3939 | 2:a3e0f7f37ac9 | 260 | , Channel_3 /*!< Channel 3 */ |
okini3939 | 2:a3e0f7f37ac9 | 261 | , Channel_4 /*!< Channel 4 */ |
okini3939 | 2:a3e0f7f37ac9 | 262 | , Channel_5 /*!< Channel 5 */ |
okini3939 | 2:a3e0f7f37ac9 | 263 | , Channel_6 /*!< Channel 6 */ |
okini3939 | 2:a3e0f7f37ac9 | 264 | , Channel_7 /*!< Channel 7 */ |
okini3939 | 2:a3e0f7f37ac9 | 265 | }; |
okini3939 | 2:a3e0f7f37ac9 | 266 | |
okini3939 | 2:a3e0f7f37ac9 | 267 | //! Interrupt callback types. |
okini3939 | 2:a3e0f7f37ac9 | 268 | enum IrqType_t { |
okini3939 | 2:a3e0f7f37ac9 | 269 | TcIrq = 0 /*!< Terminal Count interrupt */ |
okini3939 | 2:a3e0f7f37ac9 | 270 | , ErrIrq /*!< Error interrupt */ |
okini3939 | 2:a3e0f7f37ac9 | 271 | }; |
okini3939 | 2:a3e0f7f37ac9 | 272 | |
okini3939 | 2:a3e0f7f37ac9 | 273 | //! Return status codes. |
okini3939 | 2:a3e0f7f37ac9 | 274 | enum Status { |
okini3939 | 2:a3e0f7f37ac9 | 275 | Ok = 0 /*!< Ok, suceeded */ |
okini3939 | 2:a3e0f7f37ac9 | 276 | , Error = -1 /*!< General error */ |
okini3939 | 2:a3e0f7f37ac9 | 277 | , ErrChInUse = -2 /*!< Specific error, channel in use */ |
okini3939 | 2:a3e0f7f37ac9 | 278 | }; |
okini3939 | 2:a3e0f7f37ac9 | 279 | |
okini3939 | 2:a3e0f7f37ac9 | 280 | //! DMA Connection number definitions |
okini3939 | 2:a3e0f7f37ac9 | 281 | enum GPDMA_CONNECTION { |
okini3939 | 2:a3e0f7f37ac9 | 282 | SSP0_Tx = 0UL /*!< SSP0 Tx */ |
okini3939 | 2:a3e0f7f37ac9 | 283 | , SSP0_Rx = 1UL /*!< SSP0 Rx */ |
okini3939 | 2:a3e0f7f37ac9 | 284 | , SSP1_Tx = 2UL /*!< SSP1 Tx */ |
okini3939 | 2:a3e0f7f37ac9 | 285 | , SSP1_Rx = 3UL /*!< SSP1 Rx */ |
okini3939 | 2:a3e0f7f37ac9 | 286 | , ADC = 4UL /*!< ADC */ |
okini3939 | 2:a3e0f7f37ac9 | 287 | , I2S_Channel_0 = 5UL /*!< I2S channel 0 */ |
okini3939 | 2:a3e0f7f37ac9 | 288 | , I2S_Channel_1 = 6UL /*!< I2S channel 1 */ |
okini3939 | 2:a3e0f7f37ac9 | 289 | , DAC = 7UL /*!< DAC */ |
okini3939 | 2:a3e0f7f37ac9 | 290 | , UART0_Tx = 8UL /*!< UART0 Tx */ |
okini3939 | 2:a3e0f7f37ac9 | 291 | , UART0_Rx = 9UL /*!< UART0 Rx */ |
okini3939 | 2:a3e0f7f37ac9 | 292 | , UART1_Tx = 10UL /*!< UART1 Tx */ |
okini3939 | 2:a3e0f7f37ac9 | 293 | , UART1_Rx = 11UL /*!< UART1 Rx */ |
okini3939 | 2:a3e0f7f37ac9 | 294 | , UART2_Tx = 12UL /*!< UART2 Tx */ |
okini3939 | 2:a3e0f7f37ac9 | 295 | , UART2_Rx = 13UL /*!< UART2 Rx */ |
okini3939 | 2:a3e0f7f37ac9 | 296 | , UART3_Tx = 14UL /*!< UART3 Tx */ |
okini3939 | 2:a3e0f7f37ac9 | 297 | , UART3_Rx = 15UL /*!< UART3 Rx */ |
okini3939 | 2:a3e0f7f37ac9 | 298 | , MAT0_0 = 16UL /*!< MAT0.0 */ |
okini3939 | 2:a3e0f7f37ac9 | 299 | , MAT0_1 = 17UL /*!< MAT0.1 */ |
okini3939 | 2:a3e0f7f37ac9 | 300 | , MAT1_0 = 18UL /*!< MAT1.0 */ |
okini3939 | 2:a3e0f7f37ac9 | 301 | , MAT1_1 = 19UL /*!< MAT1.1 */ |
okini3939 | 2:a3e0f7f37ac9 | 302 | , MAT2_0 = 20UL /**< MAT2.0 */ |
okini3939 | 2:a3e0f7f37ac9 | 303 | , MAT2_1 = 21UL /*!< MAT2.1 */ |
okini3939 | 2:a3e0f7f37ac9 | 304 | , MAT3_0 = 22UL /*!< MAT3.0 */ |
okini3939 | 2:a3e0f7f37ac9 | 305 | , MAT3_1 = 23UL /*!< MAT3.1 */ |
okini3939 | 2:a3e0f7f37ac9 | 306 | }; |
okini3939 | 2:a3e0f7f37ac9 | 307 | |
okini3939 | 2:a3e0f7f37ac9 | 308 | //! GPDMA Transfer type definitions |
okini3939 | 2:a3e0f7f37ac9 | 309 | enum GPDMA_TRANSFERTYPE { |
okini3939 | 2:a3e0f7f37ac9 | 310 | m2m = 0UL /*!< Memory to memory - DMA control */ |
okini3939 | 2:a3e0f7f37ac9 | 311 | , m2p = 1UL /*!< Memory to peripheral - DMA control */ |
okini3939 | 2:a3e0f7f37ac9 | 312 | , p2m = 2UL /*!< Peripheral to memory - DMA control */ |
okini3939 | 2:a3e0f7f37ac9 | 313 | , p2p = 3UL /*!< Src peripheral to dest peripheral - DMA control */ |
okini3939 | 2:a3e0f7f37ac9 | 314 | , g2m = 4UL /*!< Psuedo special case for reading "peripheral GPIO" that's memory mapped. */ |
okini3939 | 2:a3e0f7f37ac9 | 315 | , m2g = 5UL /*!< Psuedo Special case for writing "peripheral GPIO" that's memory mapped. */ |
okini3939 | 2:a3e0f7f37ac9 | 316 | }; |
okini3939 | 2:a3e0f7f37ac9 | 317 | |
okini3939 | 2:a3e0f7f37ac9 | 318 | //! Burst size in Source and Destination definitions */ |
okini3939 | 2:a3e0f7f37ac9 | 319 | enum GPDMA_BSIZE { |
okini3939 | 2:a3e0f7f37ac9 | 320 | _1 = 0UL /*!< Burst size = 1 */ |
okini3939 | 2:a3e0f7f37ac9 | 321 | , _4 = 1UL /*!< Burst size = 4 */ |
okini3939 | 2:a3e0f7f37ac9 | 322 | , _8 = 2UL /*!< Burst size = 8 */ |
okini3939 | 2:a3e0f7f37ac9 | 323 | , _16 = 3UL /*!< Burst size = 16 */ |
okini3939 | 2:a3e0f7f37ac9 | 324 | , _32 = 4UL /*!< Burst size = 32 */ |
okini3939 | 2:a3e0f7f37ac9 | 325 | , _64 = 5UL /*!< Burst size = 64 */ |
okini3939 | 2:a3e0f7f37ac9 | 326 | , _128 = 6UL /*!< Burst size = 128 */ |
okini3939 | 2:a3e0f7f37ac9 | 327 | , _256 = 7UL /*!< Burst size = 256 */ |
okini3939 | 2:a3e0f7f37ac9 | 328 | }; |
okini3939 | 2:a3e0f7f37ac9 | 329 | |
okini3939 | 2:a3e0f7f37ac9 | 330 | //! Width in Src transfer width and Dest transfer width definitions */ |
okini3939 | 2:a3e0f7f37ac9 | 331 | enum GPDMA_WIDTH { |
okini3939 | 2:a3e0f7f37ac9 | 332 | byte = 0UL /*!< Width = 1 byte */ |
okini3939 | 2:a3e0f7f37ac9 | 333 | , halfword = 1UL /*!< Width = 2 bytes */ |
okini3939 | 2:a3e0f7f37ac9 | 334 | , word = 2UL /*!< Width = 4 bytes */ |
okini3939 | 2:a3e0f7f37ac9 | 335 | }; |
okini3939 | 2:a3e0f7f37ac9 | 336 | |
okini3939 | 2:a3e0f7f37ac9 | 337 | //! DMA Request Select Mode definitions. */ |
okini3939 | 2:a3e0f7f37ac9 | 338 | enum GPDMA_REQSEL { |
okini3939 | 2:a3e0f7f37ac9 | 339 | uart = 0UL /*!< UART TX/RX is selected */ |
okini3939 | 2:a3e0f7f37ac9 | 340 | , timer = 1UL /*!< Timer match is selected */ |
okini3939 | 2:a3e0f7f37ac9 | 341 | }; |
okini3939 | 2:a3e0f7f37ac9 | 342 | |
okini3939 | 2:a3e0f7f37ac9 | 343 | //! GPDMA Control register bits. |
okini3939 | 2:a3e0f7f37ac9 | 344 | enum Config { |
okini3939 | 2:a3e0f7f37ac9 | 345 | _E = 1 /*!< DMA Controller enable */ |
okini3939 | 2:a3e0f7f37ac9 | 346 | , _M = 2 /*!< AHB Master endianness configuration */ |
okini3939 | 2:a3e0f7f37ac9 | 347 | }; |
okini3939 | 2:a3e0f7f37ac9 | 348 | |
okini3939 | 2:a3e0f7f37ac9 | 349 | //! GPDMA Channel config register bits. |
okini3939 | 2:a3e0f7f37ac9 | 350 | enum CConfig { |
okini3939 | 2:a3e0f7f37ac9 | 351 | _CE = (1UL << 0) /*!< Channel enable */ |
okini3939 | 2:a3e0f7f37ac9 | 352 | , _IE = (1UL << 14) /*!< Interrupt error mask */ |
okini3939 | 2:a3e0f7f37ac9 | 353 | , _ITC = (1UL << 15) /*!< Terminal count interrupt mask */ |
okini3939 | 2:a3e0f7f37ac9 | 354 | , _L = (1UL << 16) /*!< Lock */ |
okini3939 | 2:a3e0f7f37ac9 | 355 | , _A = (1UL << 17) /*!< Active */ |
okini3939 | 2:a3e0f7f37ac9 | 356 | , _H = (1UL << 18) /*!< Halt */ |
okini3939 | 2:a3e0f7f37ac9 | 357 | }; |
okini3939 | 2:a3e0f7f37ac9 | 358 | |
okini3939 | 2:a3e0f7f37ac9 | 359 | /** |
okini3939 | 2:a3e0f7f37ac9 | 360 | * The MODDMA constructor is used to initialise the DMA controller object. |
okini3939 | 2:a3e0f7f37ac9 | 361 | */ |
okini3939 | 2:a3e0f7f37ac9 | 362 | MODDMA() { init(true); } |
okini3939 | 2:a3e0f7f37ac9 | 363 | |
okini3939 | 2:a3e0f7f37ac9 | 364 | /** |
okini3939 | 2:a3e0f7f37ac9 | 365 | * The MODDMA destructor. |
okini3939 | 2:a3e0f7f37ac9 | 366 | */ |
okini3939 | 2:a3e0f7f37ac9 | 367 | ~MODDMA() {} |
okini3939 | 2:a3e0f7f37ac9 | 368 | |
okini3939 | 2:a3e0f7f37ac9 | 369 | /** |
okini3939 | 2:a3e0f7f37ac9 | 370 | * Used to setup the DMA controller to prepare for a data transfer. |
okini3939 | 2:a3e0f7f37ac9 | 371 | * |
okini3939 | 2:a3e0f7f37ac9 | 372 | * @ingroup API |
okini3939 | 2:a3e0f7f37ac9 | 373 | * @param isConstructorCalling Set true when called from teh constructor |
okini3939 | 2:a3e0f7f37ac9 | 374 | * @param |
okini3939 | 2:a3e0f7f37ac9 | 375 | */ |
okini3939 | 2:a3e0f7f37ac9 | 376 | void init(bool isConstructorCalling, int Channels = 0xFF, int Tc = 0xFF, int Err = 0xFF); |
okini3939 | 2:a3e0f7f37ac9 | 377 | |
okini3939 | 2:a3e0f7f37ac9 | 378 | /** |
okini3939 | 2:a3e0f7f37ac9 | 379 | * Used to setup and enable the DMA controller. |
okini3939 | 2:a3e0f7f37ac9 | 380 | * |
okini3939 | 2:a3e0f7f37ac9 | 381 | * @see Setup |
okini3939 | 2:a3e0f7f37ac9 | 382 | * @see Enable |
okini3939 | 2:a3e0f7f37ac9 | 383 | * @ingroup API |
okini3939 | 2:a3e0f7f37ac9 | 384 | * @param c A pointer to an instance of MODDMA_Config to setup. |
okini3939 | 2:a3e0f7f37ac9 | 385 | */ |
okini3939 | 2:a3e0f7f37ac9 | 386 | uint32_t Prepare(MODDMA_Config *c) { |
okini3939 | 2:a3e0f7f37ac9 | 387 | uint32_t u = Setup(c); |
okini3939 | 2:a3e0f7f37ac9 | 388 | if (u) Enable(c); |
okini3939 | 2:a3e0f7f37ac9 | 389 | return u; |
okini3939 | 2:a3e0f7f37ac9 | 390 | } |
okini3939 | 2:a3e0f7f37ac9 | 391 | |
okini3939 | 2:a3e0f7f37ac9 | 392 | /** |
okini3939 | 2:a3e0f7f37ac9 | 393 | * Used to setup the DMA controller to prepare for a data transfer. |
okini3939 | 2:a3e0f7f37ac9 | 394 | * |
okini3939 | 2:a3e0f7f37ac9 | 395 | * @ingroup API |
okini3939 | 2:a3e0f7f37ac9 | 396 | * @param c A pointer to an instance of MODDMA_Config to setup. |
okini3939 | 2:a3e0f7f37ac9 | 397 | */ |
okini3939 | 2:a3e0f7f37ac9 | 398 | uint32_t Setup(MODDMA_Config *c); |
okini3939 | 2:a3e0f7f37ac9 | 399 | |
okini3939 | 2:a3e0f7f37ac9 | 400 | /** |
okini3939 | 2:a3e0f7f37ac9 | 401 | * Enable and begin data transfer. |
okini3939 | 2:a3e0f7f37ac9 | 402 | * |
okini3939 | 2:a3e0f7f37ac9 | 403 | * @ingroup API |
okini3939 | 2:a3e0f7f37ac9 | 404 | * @param ChannelNumber Type CHANNELS, the channel number to enable |
okini3939 | 2:a3e0f7f37ac9 | 405 | */ |
okini3939 | 2:a3e0f7f37ac9 | 406 | void Enable(CHANNELS ChannelNumber); |
okini3939 | 2:a3e0f7f37ac9 | 407 | |
okini3939 | 2:a3e0f7f37ac9 | 408 | /** |
okini3939 | 2:a3e0f7f37ac9 | 409 | * Enable and begin data transfer (overloaded function) |
okini3939 | 2:a3e0f7f37ac9 | 410 | * |
okini3939 | 2:a3e0f7f37ac9 | 411 | * @ingroup API |
okini3939 | 2:a3e0f7f37ac9 | 412 | * @param ChannelNumber Type uin32_t, the channel number to enable |
okini3939 | 2:a3e0f7f37ac9 | 413 | */ |
okini3939 | 2:a3e0f7f37ac9 | 414 | void Enable(uint32_t ChannelNumber) { Enable((CHANNELS)(ChannelNumber & 0x7)); } |
okini3939 | 2:a3e0f7f37ac9 | 415 | |
okini3939 | 2:a3e0f7f37ac9 | 416 | /** |
okini3939 | 2:a3e0f7f37ac9 | 417 | * Enable and begin data transfer (overloaded function) |
okini3939 | 2:a3e0f7f37ac9 | 418 | * |
okini3939 | 2:a3e0f7f37ac9 | 419 | * @ingroup API |
okini3939 | 2:a3e0f7f37ac9 | 420 | * @param config A pointer to teh configuration |
okini3939 | 2:a3e0f7f37ac9 | 421 | */ |
okini3939 | 2:a3e0f7f37ac9 | 422 | void Enable(MODDMA_Config *config) { Enable( config->channelNum() ); } |
okini3939 | 2:a3e0f7f37ac9 | 423 | |
okini3939 | 2:a3e0f7f37ac9 | 424 | |
okini3939 | 2:a3e0f7f37ac9 | 425 | /** |
okini3939 | 2:a3e0f7f37ac9 | 426 | * Disable a channel and end data transfer. |
okini3939 | 2:a3e0f7f37ac9 | 427 | * |
okini3939 | 2:a3e0f7f37ac9 | 428 | * @ingroup API |
okini3939 | 2:a3e0f7f37ac9 | 429 | * @param ChannelNumber Type CHANNELS, the channel number to enable |
okini3939 | 2:a3e0f7f37ac9 | 430 | */ |
okini3939 | 2:a3e0f7f37ac9 | 431 | void Disable(CHANNELS ChannelNumber); |
okini3939 | 2:a3e0f7f37ac9 | 432 | |
okini3939 | 2:a3e0f7f37ac9 | 433 | /** |
okini3939 | 2:a3e0f7f37ac9 | 434 | * Disable a channel and end data transfer (overloaded function) |
okini3939 | 2:a3e0f7f37ac9 | 435 | * |
okini3939 | 2:a3e0f7f37ac9 | 436 | * @ingroup API |
okini3939 | 2:a3e0f7f37ac9 | 437 | * @param ChannelNumber Type uin32_t, the channel number to disable |
okini3939 | 2:a3e0f7f37ac9 | 438 | */ |
okini3939 | 2:a3e0f7f37ac9 | 439 | void Disable(uint32_t ChannelNumber) { Disable((CHANNELS)(ChannelNumber & 0x7)); } |
okini3939 | 2:a3e0f7f37ac9 | 440 | |
okini3939 | 2:a3e0f7f37ac9 | 441 | /** |
okini3939 | 2:a3e0f7f37ac9 | 442 | * Is the specified channel enabled? |
okini3939 | 2:a3e0f7f37ac9 | 443 | * |
okini3939 | 2:a3e0f7f37ac9 | 444 | * @ingroup API |
okini3939 | 2:a3e0f7f37ac9 | 445 | * @param ChannelNumber Type CHANNELS, the channel number to test |
okini3939 | 2:a3e0f7f37ac9 | 446 | * @return bool true if enabled, false otherwise. |
okini3939 | 2:a3e0f7f37ac9 | 447 | */ |
okini3939 | 2:a3e0f7f37ac9 | 448 | bool Enabled(CHANNELS ChannelNumber); |
okini3939 | 2:a3e0f7f37ac9 | 449 | |
okini3939 | 2:a3e0f7f37ac9 | 450 | /** |
okini3939 | 2:a3e0f7f37ac9 | 451 | * Is the specified channel enabled? (overloaded function) |
okini3939 | 2:a3e0f7f37ac9 | 452 | * |
okini3939 | 2:a3e0f7f37ac9 | 453 | * @ingroup API |
okini3939 | 2:a3e0f7f37ac9 | 454 | * @param ChannelNumber Type uin32_t, the channel number to test |
okini3939 | 2:a3e0f7f37ac9 | 455 | * @return bool true if enabled, false otherwise. |
okini3939 | 2:a3e0f7f37ac9 | 456 | */ |
okini3939 | 2:a3e0f7f37ac9 | 457 | bool Enabled(uint32_t ChannelNumber) { return Enabled((CHANNELS)(ChannelNumber & 0x7)); } |
okini3939 | 2:a3e0f7f37ac9 | 458 | |
okini3939 | 2:a3e0f7f37ac9 | 459 | __INLINE uint32_t IntStat(uint32_t n) { return (1UL << n) & 0xFF; } |
okini3939 | 2:a3e0f7f37ac9 | 460 | __INLINE uint32_t IntTCStat_Ch(uint32_t n) { return (1UL << n) & 0xFF; } |
okini3939 | 2:a3e0f7f37ac9 | 461 | __INLINE uint32_t IntTCClear_Ch(uint32_t n) { return (1UL << n) & 0xFF; } |
okini3939 | 2:a3e0f7f37ac9 | 462 | __INLINE uint32_t IntErrStat_Ch(uint32_t n) { return (1UL << n) & 0xFF; } |
okini3939 | 2:a3e0f7f37ac9 | 463 | __INLINE uint32_t IntErrClr_Ch(uint32_t n) { return (1UL << n) & 0xFF; } |
okini3939 | 2:a3e0f7f37ac9 | 464 | __INLINE uint32_t RawIntErrStat_Ch(uint32_t n) { return (1UL << n) & 0xFF; } |
okini3939 | 2:a3e0f7f37ac9 | 465 | __INLINE uint32_t EnbldChns_Ch(uint32_t n) { return (1UL << n) & 0xFF; } |
okini3939 | 2:a3e0f7f37ac9 | 466 | __INLINE uint32_t SoftBReq_Src(uint32_t n) { return (1UL << n) & 0xFFFF; } |
okini3939 | 2:a3e0f7f37ac9 | 467 | __INLINE uint32_t SoftSReq_Src(uint32_t n) { return (1UL << n) & 0xFFFF; } |
okini3939 | 2:a3e0f7f37ac9 | 468 | __INLINE uint32_t SoftLBReq_Src(uint32_t n) { return (1UL << n) & 0xFFFF; } |
okini3939 | 2:a3e0f7f37ac9 | 469 | __INLINE uint32_t SoftLSReq_Src(uint32_t n) { return (1UL << n) & 0xFFFF; } |
okini3939 | 2:a3e0f7f37ac9 | 470 | __INLINE uint32_t Sync_Src(uint32_t n) { return (1UL << n) & 0xFFFF; } |
okini3939 | 2:a3e0f7f37ac9 | 471 | __INLINE uint32_t ReqSel_Input(uint32_t n) { return (1UL << (n - 8)) & 0xFF; } |
okini3939 | 2:a3e0f7f37ac9 | 472 | |
okini3939 | 2:a3e0f7f37ac9 | 473 | |
okini3939 | 2:a3e0f7f37ac9 | 474 | __INLINE uint32_t CxControl_TransferSize(uint32_t n) { return (n & 0xFFF) << 0; } |
okini3939 | 2:a3e0f7f37ac9 | 475 | __INLINE uint32_t CxControl_SBSize(uint32_t n) { return (n & 0x7) << 12; } |
okini3939 | 2:a3e0f7f37ac9 | 476 | __INLINE uint32_t CxControl_DBSize(uint32_t n) { return (n & 0x7) << 15; } |
okini3939 | 2:a3e0f7f37ac9 | 477 | __INLINE uint32_t CxControl_SWidth(uint32_t n) { return (n & 0x7) << 18; } |
okini3939 | 2:a3e0f7f37ac9 | 478 | __INLINE uint32_t CxControl_DWidth(uint32_t n) { return (n & 0x7) << 21; } |
okini3939 | 2:a3e0f7f37ac9 | 479 | __INLINE uint32_t CxControl_SI() { return (1UL << 26); } |
okini3939 | 2:a3e0f7f37ac9 | 480 | __INLINE uint32_t CxControl_DI() { return (1UL << 27); } |
okini3939 | 2:a3e0f7f37ac9 | 481 | __INLINE uint32_t CxControl_Prot1() { return (1UL << 28); } |
okini3939 | 2:a3e0f7f37ac9 | 482 | __INLINE uint32_t CxControl_Prot2() { return (1UL << 29); } |
okini3939 | 2:a3e0f7f37ac9 | 483 | __INLINE uint32_t CxControl_Prot3() { return (1UL << 30); } |
okini3939 | 2:a3e0f7f37ac9 | 484 | __INLINE uint32_t CxControl_I() { return (1UL << 31); } |
okini3939 | 2:a3e0f7f37ac9 | 485 | __INLINE uint32_t CxControl_E() { return (1UL << 0); } |
okini3939 | 2:a3e0f7f37ac9 | 486 | __INLINE uint32_t CxConfig_SrcPeripheral(uint32_t n) { return (n & 0x1F) << 1; } |
okini3939 | 2:a3e0f7f37ac9 | 487 | __INLINE uint32_t CxConfig_DestPeripheral(uint32_t n) { return (n & 0x1F) << 6; } |
okini3939 | 2:a3e0f7f37ac9 | 488 | __INLINE uint32_t CxConfig_TransferType(uint32_t n) { return (n & 0x7) << 11; } |
okini3939 | 2:a3e0f7f37ac9 | 489 | __INLINE uint32_t CxConfig_IE() { return (1UL << 14); } |
okini3939 | 2:a3e0f7f37ac9 | 490 | __INLINE uint32_t CxConfig_ITC() { return (1UL << 15); } |
okini3939 | 2:a3e0f7f37ac9 | 491 | __INLINE uint32_t CxConfig_L() { return (1UL << 16); } |
okini3939 | 2:a3e0f7f37ac9 | 492 | __INLINE uint32_t CxConfig_A() { return (1UL << 17); } |
okini3939 | 2:a3e0f7f37ac9 | 493 | __INLINE uint32_t CxConfig_H() { return (1UL << 18); } |
okini3939 | 2:a3e0f7f37ac9 | 494 | |
okini3939 | 2:a3e0f7f37ac9 | 495 | /** |
okini3939 | 2:a3e0f7f37ac9 | 496 | * A store for up to 8 (8 channels) of configurations. |
okini3939 | 2:a3e0f7f37ac9 | 497 | * @see MODDMA_Config |
okini3939 | 2:a3e0f7f37ac9 | 498 | */ |
okini3939 | 2:a3e0f7f37ac9 | 499 | MODDMA_Config *setups[8]; |
okini3939 | 2:a3e0f7f37ac9 | 500 | |
okini3939 | 2:a3e0f7f37ac9 | 501 | /** |
okini3939 | 2:a3e0f7f37ac9 | 502 | * Get a pointer to the current configuration the ISR is servicing. |
okini3939 | 2:a3e0f7f37ac9 | 503 | * |
okini3939 | 2:a3e0f7f37ac9 | 504 | * @ingroup API |
okini3939 | 2:a3e0f7f37ac9 | 505 | * @return MODDMA_Config * A pointer to the setup the ISR is currently servicing. |
okini3939 | 2:a3e0f7f37ac9 | 506 | */ |
okini3939 | 2:a3e0f7f37ac9 | 507 | MODDMA_Config *getConfig(void) { return setups[IrqProcessingChannel]; } |
okini3939 | 2:a3e0f7f37ac9 | 508 | |
okini3939 | 2:a3e0f7f37ac9 | 509 | /** |
okini3939 | 2:a3e0f7f37ac9 | 510 | * Set which channel the ISR is currently servicing. |
okini3939 | 2:a3e0f7f37ac9 | 511 | * |
okini3939 | 2:a3e0f7f37ac9 | 512 | * *** USED INTERNALLY. DO NOT CALL FROM USER PROGRAMS *** |
okini3939 | 2:a3e0f7f37ac9 | 513 | * |
okini3939 | 2:a3e0f7f37ac9 | 514 | * Must be public so the extern "C" ISR can use it. |
okini3939 | 2:a3e0f7f37ac9 | 515 | */ |
okini3939 | 2:a3e0f7f37ac9 | 516 | void setIrqProcessingChannel(CHANNELS n) { IrqProcessingChannel = n; } |
okini3939 | 2:a3e0f7f37ac9 | 517 | |
okini3939 | 2:a3e0f7f37ac9 | 518 | /** |
okini3939 | 2:a3e0f7f37ac9 | 519 | * Gets which channel the ISR is currently servicing. |
okini3939 | 2:a3e0f7f37ac9 | 520 | * |
okini3939 | 2:a3e0f7f37ac9 | 521 | * @ingroup API |
okini3939 | 2:a3e0f7f37ac9 | 522 | * @return CHANNELS The current channel the ISR is servicing. |
okini3939 | 2:a3e0f7f37ac9 | 523 | */ |
okini3939 | 2:a3e0f7f37ac9 | 524 | CHANNELS irqProcessingChannel(void) { return IrqProcessingChannel; } |
okini3939 | 2:a3e0f7f37ac9 | 525 | |
okini3939 | 2:a3e0f7f37ac9 | 526 | /** |
okini3939 | 2:a3e0f7f37ac9 | 527 | * Sets which type of IRQ the ISR is making a callback for. |
okini3939 | 2:a3e0f7f37ac9 | 528 | * |
okini3939 | 2:a3e0f7f37ac9 | 529 | * *** USED INTERNALLY. DO NOT CALL FROM USER PROGRAMS *** |
okini3939 | 2:a3e0f7f37ac9 | 530 | * |
okini3939 | 2:a3e0f7f37ac9 | 531 | * Must be public so the extern "C" ISR can use it. |
okini3939 | 2:a3e0f7f37ac9 | 532 | */ |
okini3939 | 2:a3e0f7f37ac9 | 533 | void setIrqType(IrqType_t n) { IrqType = n; } |
okini3939 | 2:a3e0f7f37ac9 | 534 | |
okini3939 | 2:a3e0f7f37ac9 | 535 | /** |
okini3939 | 2:a3e0f7f37ac9 | 536 | * Get which type of IRQ the ISR is calling you about, |
okini3939 | 2:a3e0f7f37ac9 | 537 | * terminal count or error. |
okini3939 | 2:a3e0f7f37ac9 | 538 | */ |
okini3939 | 2:a3e0f7f37ac9 | 539 | IrqType_t irqType(void) { return IrqType; } |
okini3939 | 2:a3e0f7f37ac9 | 540 | |
okini3939 | 2:a3e0f7f37ac9 | 541 | /** |
okini3939 | 2:a3e0f7f37ac9 | 542 | * Clear the interrupt after handling. |
okini3939 | 2:a3e0f7f37ac9 | 543 | * |
okini3939 | 2:a3e0f7f37ac9 | 544 | * @param CHANNELS The channel the IQR occured on. |
okini3939 | 2:a3e0f7f37ac9 | 545 | */ |
okini3939 | 2:a3e0f7f37ac9 | 546 | void clearTcIrq(CHANNELS n) { LPC_GPDMA->DMACIntTCClear = (uint32_t)(1UL << n); } |
okini3939 | 2:a3e0f7f37ac9 | 547 | |
okini3939 | 2:a3e0f7f37ac9 | 548 | /** |
okini3939 | 2:a3e0f7f37ac9 | 549 | * Clear the interrupt the ISR is currently handing.. |
okini3939 | 2:a3e0f7f37ac9 | 550 | */ |
okini3939 | 2:a3e0f7f37ac9 | 551 | void clearTcIrq(void) { clearTcIrq( IrqProcessingChannel ); } |
okini3939 | 2:a3e0f7f37ac9 | 552 | |
okini3939 | 2:a3e0f7f37ac9 | 553 | /** |
okini3939 | 2:a3e0f7f37ac9 | 554 | * Clear the error interrupt after handling. |
okini3939 | 2:a3e0f7f37ac9 | 555 | * |
okini3939 | 2:a3e0f7f37ac9 | 556 | * @ingroup API |
okini3939 | 2:a3e0f7f37ac9 | 557 | * @param CHANNELS The channel the IQR occured on. |
okini3939 | 2:a3e0f7f37ac9 | 558 | */ |
okini3939 | 2:a3e0f7f37ac9 | 559 | void clearErrIrq(CHANNELS n) { LPC_GPDMA->DMACIntTCClear = (uint32_t)(1UL << n); } |
okini3939 | 2:a3e0f7f37ac9 | 560 | |
okini3939 | 2:a3e0f7f37ac9 | 561 | /** |
okini3939 | 2:a3e0f7f37ac9 | 562 | * Clear the error interrupt the ISR is currently handing. |
okini3939 | 2:a3e0f7f37ac9 | 563 | * @ingroup API |
okini3939 | 2:a3e0f7f37ac9 | 564 | */ |
okini3939 | 2:a3e0f7f37ac9 | 565 | void clearErrIrq(void) { clearErrIrq( IrqProcessingChannel ); } |
okini3939 | 2:a3e0f7f37ac9 | 566 | |
okini3939 | 2:a3e0f7f37ac9 | 567 | /** |
okini3939 | 2:a3e0f7f37ac9 | 568 | * Is the supplied channel currently active? |
okini3939 | 2:a3e0f7f37ac9 | 569 | * |
okini3939 | 2:a3e0f7f37ac9 | 570 | * @ingroup API |
okini3939 | 2:a3e0f7f37ac9 | 571 | * @param CHANNELS The channel to inquire about. |
okini3939 | 2:a3e0f7f37ac9 | 572 | * @return bool true if active, false otherwise. |
okini3939 | 2:a3e0f7f37ac9 | 573 | */ |
okini3939 | 2:a3e0f7f37ac9 | 574 | bool isActive(CHANNELS ChannelNumber); |
okini3939 | 2:a3e0f7f37ac9 | 575 | |
okini3939 | 2:a3e0f7f37ac9 | 576 | /** |
okini3939 | 2:a3e0f7f37ac9 | 577 | * Halt the supplied channel. |
okini3939 | 2:a3e0f7f37ac9 | 578 | * |
okini3939 | 2:a3e0f7f37ac9 | 579 | * @ingroup API |
okini3939 | 2:a3e0f7f37ac9 | 580 | * @param CHANNELS The channel to halt. |
okini3939 | 2:a3e0f7f37ac9 | 581 | */ |
okini3939 | 2:a3e0f7f37ac9 | 582 | void haltChannel(CHANNELS ChannelNumber); |
okini3939 | 2:a3e0f7f37ac9 | 583 | |
okini3939 | 2:a3e0f7f37ac9 | 584 | /** |
okini3939 | 2:a3e0f7f37ac9 | 585 | * get a channels control register. |
okini3939 | 2:a3e0f7f37ac9 | 586 | * |
okini3939 | 2:a3e0f7f37ac9 | 587 | * @ingroup API |
okini3939 | 2:a3e0f7f37ac9 | 588 | * @param CHANNELS The channel to get the control register for. |
okini3939 | 2:a3e0f7f37ac9 | 589 | */ |
okini3939 | 2:a3e0f7f37ac9 | 590 | uint32_t getControl(CHANNELS ChannelNumber); |
okini3939 | 2:a3e0f7f37ac9 | 591 | |
okini3939 | 2:a3e0f7f37ac9 | 592 | /** |
okini3939 | 2:a3e0f7f37ac9 | 593 | * Wait for channel transfer to complete and then halt. |
okini3939 | 2:a3e0f7f37ac9 | 594 | * |
okini3939 | 2:a3e0f7f37ac9 | 595 | * @ingroup API |
okini3939 | 2:a3e0f7f37ac9 | 596 | * @param CHANNELS The channel to wait for then halt. |
okini3939 | 2:a3e0f7f37ac9 | 597 | */ |
okini3939 | 2:a3e0f7f37ac9 | 598 | void haltAndWaitChannelComplete(CHANNELS n) { haltChannel(n); while (isActive(n)); } |
okini3939 | 2:a3e0f7f37ac9 | 599 | |
okini3939 | 2:a3e0f7f37ac9 | 600 | /** |
okini3939 | 2:a3e0f7f37ac9 | 601 | * Attach a callback to the TC IRQ controller. |
okini3939 | 2:a3e0f7f37ac9 | 602 | * |
okini3939 | 2:a3e0f7f37ac9 | 603 | * @ingroup API |
okini3939 | 2:a3e0f7f37ac9 | 604 | * @param fptr A function pointer to call |
okini3939 | 2:a3e0f7f37ac9 | 605 | * @return this |
okini3939 | 2:a3e0f7f37ac9 | 606 | */ |
okini3939 | 2:a3e0f7f37ac9 | 607 | void attach_tc(void (*fptr)(void)) { |
okini3939 | 2:a3e0f7f37ac9 | 608 | isrIntTCStat.attach(fptr); |
okini3939 | 2:a3e0f7f37ac9 | 609 | } |
okini3939 | 2:a3e0f7f37ac9 | 610 | |
okini3939 | 2:a3e0f7f37ac9 | 611 | /** |
okini3939 | 2:a3e0f7f37ac9 | 612 | * Attach a callback to the TC IRQ controller. |
okini3939 | 2:a3e0f7f37ac9 | 613 | * |
okini3939 | 2:a3e0f7f37ac9 | 614 | * @ingroup API |
okini3939 | 2:a3e0f7f37ac9 | 615 | * @param tptr A template pointer to the calling object |
okini3939 | 2:a3e0f7f37ac9 | 616 | * @param mptr A method pointer within the object to call. |
okini3939 | 2:a3e0f7f37ac9 | 617 | * @return this |
okini3939 | 2:a3e0f7f37ac9 | 618 | */ |
okini3939 | 2:a3e0f7f37ac9 | 619 | template<typename T> |
okini3939 | 2:a3e0f7f37ac9 | 620 | void attach_tc(T* tptr, void (T::*mptr)(void)) { |
okini3939 | 2:a3e0f7f37ac9 | 621 | if((mptr != NULL) && (tptr != NULL)) { |
okini3939 | 2:a3e0f7f37ac9 | 622 | isrIntTCStat.attach(tptr, mptr); |
okini3939 | 2:a3e0f7f37ac9 | 623 | } |
okini3939 | 2:a3e0f7f37ac9 | 624 | } |
okini3939 | 2:a3e0f7f37ac9 | 625 | |
okini3939 | 2:a3e0f7f37ac9 | 626 | /** |
okini3939 | 2:a3e0f7f37ac9 | 627 | * The MODDMA controllers terminal count interrupt callback. |
okini3939 | 2:a3e0f7f37ac9 | 628 | */ |
okini3939 | 2:a3e0f7f37ac9 | 629 | FunctionPointer isrIntTCStat; |
okini3939 | 2:a3e0f7f37ac9 | 630 | |
okini3939 | 2:a3e0f7f37ac9 | 631 | /** |
okini3939 | 2:a3e0f7f37ac9 | 632 | * Attach a callback to the ERR IRQ controller. |
okini3939 | 2:a3e0f7f37ac9 | 633 | * |
okini3939 | 2:a3e0f7f37ac9 | 634 | * @ingroup API |
okini3939 | 2:a3e0f7f37ac9 | 635 | * @param fptr A function pointer to call |
okini3939 | 2:a3e0f7f37ac9 | 636 | * @return this |
okini3939 | 2:a3e0f7f37ac9 | 637 | */ |
okini3939 | 2:a3e0f7f37ac9 | 638 | void attach_err(void (*fptr)(void)) { |
okini3939 | 2:a3e0f7f37ac9 | 639 | isrIntErrStat.attach(fptr); |
okini3939 | 2:a3e0f7f37ac9 | 640 | } |
okini3939 | 2:a3e0f7f37ac9 | 641 | |
okini3939 | 2:a3e0f7f37ac9 | 642 | /** |
okini3939 | 2:a3e0f7f37ac9 | 643 | * Attach a callback to the ERR IRQ controller. |
okini3939 | 2:a3e0f7f37ac9 | 644 | * |
okini3939 | 2:a3e0f7f37ac9 | 645 | * @ingroup API |
okini3939 | 2:a3e0f7f37ac9 | 646 | * @param tptr A template pointer to the calling object |
okini3939 | 2:a3e0f7f37ac9 | 647 | * @param mptr A method pointer within the object to call. |
okini3939 | 2:a3e0f7f37ac9 | 648 | * @return this |
okini3939 | 2:a3e0f7f37ac9 | 649 | */ |
okini3939 | 2:a3e0f7f37ac9 | 650 | template<typename T> |
okini3939 | 2:a3e0f7f37ac9 | 651 | void attach_err(T* tptr, void (T::*mptr)(void)) { |
okini3939 | 2:a3e0f7f37ac9 | 652 | if((mptr != NULL) && (tptr != NULL)) { |
okini3939 | 2:a3e0f7f37ac9 | 653 | isrIntErrStat.attach(tptr, mptr); |
okini3939 | 2:a3e0f7f37ac9 | 654 | } |
okini3939 | 2:a3e0f7f37ac9 | 655 | } |
okini3939 | 2:a3e0f7f37ac9 | 656 | |
okini3939 | 2:a3e0f7f37ac9 | 657 | /** |
okini3939 | 2:a3e0f7f37ac9 | 658 | * Get the Linked List index regsiter for the requested channel. |
okini3939 | 2:a3e0f7f37ac9 | 659 | * |
okini3939 | 2:a3e0f7f37ac9 | 660 | * @param channelNum The channel number. |
okini3939 | 2:a3e0f7f37ac9 | 661 | * @return uint32_t The value of the DMACCLLI register |
okini3939 | 2:a3e0f7f37ac9 | 662 | */ |
okini3939 | 2:a3e0f7f37ac9 | 663 | uint32_t lli(CHANNELS ChannelNumber, MODDMA_LLI *set = 0) { |
okini3939 | 2:a3e0f7f37ac9 | 664 | LPC_GPDMACH_TypeDef *pChannel = (LPC_GPDMACH_TypeDef *)Channel_p( ChannelNumber & 0x7 ); |
okini3939 | 2:a3e0f7f37ac9 | 665 | if (set) pChannel->DMACCLLI = (uint32_t)set; |
okini3939 | 2:a3e0f7f37ac9 | 666 | return pChannel->DMACCLLI; |
okini3939 | 2:a3e0f7f37ac9 | 667 | } |
okini3939 | 2:a3e0f7f37ac9 | 668 | |
okini3939 | 2:a3e0f7f37ac9 | 669 | /** |
okini3939 | 2:a3e0f7f37ac9 | 670 | * The MODDMA controllers error interrupt callback. |
okini3939 | 2:a3e0f7f37ac9 | 671 | */ |
okini3939 | 2:a3e0f7f37ac9 | 672 | FunctionPointer isrIntErrStat; |
okini3939 | 2:a3e0f7f37ac9 | 673 | |
okini3939 | 2:a3e0f7f37ac9 | 674 | uint32_t Channel_p(int channel); |
okini3939 | 2:a3e0f7f37ac9 | 675 | |
okini3939 | 2:a3e0f7f37ac9 | 676 | protected: |
okini3939 | 2:a3e0f7f37ac9 | 677 | |
okini3939 | 2:a3e0f7f37ac9 | 678 | // Data LUTs. |
okini3939 | 2:a3e0f7f37ac9 | 679 | uint32_t LUTPerAddr(int n); |
okini3939 | 2:a3e0f7f37ac9 | 680 | uint8_t LUTPerBurst(int n); |
okini3939 | 2:a3e0f7f37ac9 | 681 | uint8_t LUTPerWid(int n); |
okini3939 | 2:a3e0f7f37ac9 | 682 | //uint32_t Channel_p(int channel); |
okini3939 | 2:a3e0f7f37ac9 | 683 | |
okini3939 | 2:a3e0f7f37ac9 | 684 | CHANNELS IrqProcessingChannel; |
okini3939 | 2:a3e0f7f37ac9 | 685 | |
okini3939 | 2:a3e0f7f37ac9 | 686 | IrqType_t IrqType; |
okini3939 | 2:a3e0f7f37ac9 | 687 | }; |
okini3939 | 2:a3e0f7f37ac9 | 688 | |
okini3939 | 2:a3e0f7f37ac9 | 689 | }; // namespace AjK ends. |
okini3939 | 2:a3e0f7f37ac9 | 690 | |
okini3939 | 2:a3e0f7f37ac9 | 691 | using namespace AjK; |
okini3939 | 2:a3e0f7f37ac9 | 692 | |
okini3939 | 2:a3e0f7f37ac9 | 693 | #endif |