GPDMA (Direct Memory Access) and LLI (Link List Item) test see: http://mbed.org/users/okini3939/notebook/dma_jp/

Dependencies:   mbed

Committer:
okini3939
Date:
Fri Sep 13 15:19:09 2013 +0000
Revision:
1:1a77fa863282
Parent:
0:de79d4a48e63
fix more lli

Who changed what in which revision?

UserRevisionLine numberNew contents of line
okini3939 0:de79d4a48e63 1 /*
okini3939 0:de79d4a48e63 2 Copyright (c) 2010 Andy Kirkham
okini3939 0:de79d4a48e63 3
okini3939 0:de79d4a48e63 4 Permission is hereby granted, free of charge, to any person obtaining a copy
okini3939 0:de79d4a48e63 5 of this software and associated documentation files (the "Software"), to deal
okini3939 0:de79d4a48e63 6 in the Software without restriction, including without limitation the rights
okini3939 0:de79d4a48e63 7 to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
okini3939 0:de79d4a48e63 8 copies of the Software, and to permit persons to whom the Software is
okini3939 0:de79d4a48e63 9 furnished to do so, subject to the following conditions:
okini3939 0:de79d4a48e63 10
okini3939 0:de79d4a48e63 11 The above copyright notice and this permission notice shall be included in
okini3939 0:de79d4a48e63 12 all copies or substantial portions of the Software.
okini3939 0:de79d4a48e63 13
okini3939 0:de79d4a48e63 14 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
okini3939 0:de79d4a48e63 15 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
okini3939 0:de79d4a48e63 16 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
okini3939 0:de79d4a48e63 17 AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
okini3939 0:de79d4a48e63 18 LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
okini3939 0:de79d4a48e63 19 OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
okini3939 0:de79d4a48e63 20 THE SOFTWARE.
okini3939 0:de79d4a48e63 21 */
okini3939 0:de79d4a48e63 22
okini3939 0:de79d4a48e63 23 #include "MODDMA.h"
okini3939 0:de79d4a48e63 24
okini3939 0:de79d4a48e63 25 namespace AjK {
okini3939 0:de79d4a48e63 26
okini3939 0:de79d4a48e63 27 uint32_t
okini3939 0:de79d4a48e63 28 MODDMA::Setup(MODDMA_Config *config)
okini3939 0:de79d4a48e63 29 {
okini3939 0:de79d4a48e63 30 LPC_GPDMACH_TypeDef *pChannel = (LPC_GPDMACH_TypeDef *)Channel_p( config->channelNum() );
okini3939 0:de79d4a48e63 31
okini3939 0:de79d4a48e63 32 setups[config->channelNum() & 0x7] = config;
okini3939 0:de79d4a48e63 33
okini3939 0:de79d4a48e63 34 // Reset the Interrupt status
okini3939 0:de79d4a48e63 35 LPC_GPDMA->DMACIntTCClear = IntTCClear_Ch( config->channelNum() );
okini3939 0:de79d4a48e63 36 LPC_GPDMA->DMACIntErrClr = IntErrClr_Ch ( config->channelNum() );
okini3939 0:de79d4a48e63 37
okini3939 0:de79d4a48e63 38 // Clear DMA configure
okini3939 0:de79d4a48e63 39 pChannel->DMACCControl = 0x00;
okini3939 0:de79d4a48e63 40 pChannel->DMACCConfig = 0x00;
okini3939 0:de79d4a48e63 41
okini3939 0:de79d4a48e63 42 // Assign Linker List Item value
okini3939 0:de79d4a48e63 43 pChannel->DMACCLLI = config->dmaLLI();
okini3939 0:de79d4a48e63 44
okini3939 0:de79d4a48e63 45 // Set value to Channel Control Registers
okini3939 0:de79d4a48e63 46 switch (config->transferType()) {
okini3939 0:de79d4a48e63 47
okini3939 0:de79d4a48e63 48 // Memory to memory
okini3939 0:de79d4a48e63 49 case m2m:
okini3939 0:de79d4a48e63 50 // Assign physical source and destination address
okini3939 0:de79d4a48e63 51 pChannel->DMACCSrcAddr = config->srcMemAddr();
okini3939 0:de79d4a48e63 52 pChannel->DMACCDestAddr = config->dstMemAddr();
okini3939 0:de79d4a48e63 53 pChannel->DMACCControl
okini3939 0:de79d4a48e63 54 = CxControl_TransferSize(config->transferSize())
okini3939 0:de79d4a48e63 55 | CxControl_SBSize(_32)
okini3939 0:de79d4a48e63 56 | CxControl_DBSize(_32)
okini3939 0:de79d4a48e63 57 | CxControl_SWidth(config->transferWidth())
okini3939 0:de79d4a48e63 58 | CxControl_DWidth(config->transferWidth())
okini3939 0:de79d4a48e63 59 | CxControl_SI()
okini3939 0:de79d4a48e63 60 | CxControl_DI()
okini3939 0:de79d4a48e63 61 | CxControl_I();
okini3939 0:de79d4a48e63 62 break;
okini3939 0:de79d4a48e63 63
okini3939 0:de79d4a48e63 64 // Memory to peripheral
okini3939 0:de79d4a48e63 65 case m2p:
okini3939 0:de79d4a48e63 66 // Assign physical source
okini3939 0:de79d4a48e63 67 pChannel->DMACCSrcAddr = config->srcMemAddr();
okini3939 0:de79d4a48e63 68 // Assign peripheral destination address
okini3939 0:de79d4a48e63 69 pChannel->DMACCDestAddr = (uint32_t)LUTPerAddr(config->dstConn());
okini3939 0:de79d4a48e63 70 pChannel->DMACCControl
okini3939 0:de79d4a48e63 71 = CxControl_TransferSize((uint32_t)config->transferSize())
okini3939 0:de79d4a48e63 72 | CxControl_SBSize((uint32_t)LUTPerBurst(config->dstConn()))
okini3939 0:de79d4a48e63 73 | CxControl_DBSize((uint32_t)LUTPerBurst(config->dstConn()))
okini3939 0:de79d4a48e63 74 | CxControl_SWidth((uint32_t)LUTPerWid(config->dstConn()))
okini3939 0:de79d4a48e63 75 | CxControl_DWidth((uint32_t)LUTPerWid(config->dstConn()))
okini3939 0:de79d4a48e63 76 | CxControl_SI()
okini3939 0:de79d4a48e63 77 | CxControl_I();
okini3939 0:de79d4a48e63 78 break;
okini3939 0:de79d4a48e63 79
okini3939 0:de79d4a48e63 80 // Peripheral to memory
okini3939 0:de79d4a48e63 81 case p2m:
okini3939 0:de79d4a48e63 82 // Assign peripheral source address
okini3939 0:de79d4a48e63 83 pChannel->DMACCSrcAddr = (uint32_t)LUTPerAddr(config->srcConn());
okini3939 0:de79d4a48e63 84 // Assign memory destination address
okini3939 0:de79d4a48e63 85 pChannel->DMACCDestAddr = config->dstMemAddr();
okini3939 0:de79d4a48e63 86 pChannel->DMACCControl
okini3939 0:de79d4a48e63 87 = CxControl_TransferSize((uint32_t)config->transferSize())
okini3939 0:de79d4a48e63 88 | CxControl_SBSize((uint32_t)LUTPerBurst(config->srcConn()))
okini3939 0:de79d4a48e63 89 | CxControl_DBSize((uint32_t)LUTPerBurst(config->srcConn()))
okini3939 0:de79d4a48e63 90 | CxControl_SWidth((uint32_t)LUTPerWid(config->srcConn()))
okini3939 0:de79d4a48e63 91 | CxControl_DWidth((uint32_t)LUTPerWid(config->srcConn()))
okini3939 0:de79d4a48e63 92 | CxControl_DI()
okini3939 0:de79d4a48e63 93 | CxControl_I();
okini3939 0:de79d4a48e63 94 break;
okini3939 0:de79d4a48e63 95
okini3939 0:de79d4a48e63 96 // Peripheral to peripheral
okini3939 0:de79d4a48e63 97 case p2p:
okini3939 0:de79d4a48e63 98 // Assign peripheral source address
okini3939 0:de79d4a48e63 99 pChannel->DMACCSrcAddr = (uint32_t)LUTPerAddr(config->srcConn());
okini3939 0:de79d4a48e63 100 // Assign peripheral destination address
okini3939 0:de79d4a48e63 101 pChannel->DMACCDestAddr = (uint32_t)LUTPerAddr(config->dstConn());
okini3939 0:de79d4a48e63 102 pChannel->DMACCControl
okini3939 0:de79d4a48e63 103 = CxControl_TransferSize((uint32_t)config->transferSize())
okini3939 0:de79d4a48e63 104 | CxControl_SBSize((uint32_t)LUTPerBurst(config->srcConn()))
okini3939 0:de79d4a48e63 105 | CxControl_DBSize((uint32_t)LUTPerBurst(config->dstConn()))
okini3939 0:de79d4a48e63 106 | CxControl_SWidth((uint32_t)LUTPerWid(config->srcConn()))
okini3939 0:de79d4a48e63 107 | CxControl_DWidth((uint32_t)LUTPerWid(config->dstConn()))
okini3939 0:de79d4a48e63 108 | CxControl_I();
okini3939 0:de79d4a48e63 109 break;
okini3939 0:de79d4a48e63 110
okini3939 0:de79d4a48e63 111 // GPIO to memory
okini3939 0:de79d4a48e63 112 case g2m:
okini3939 0:de79d4a48e63 113 // Assign GPIO source address
okini3939 0:de79d4a48e63 114 pChannel->DMACCSrcAddr = config->srcMemAddr();
okini3939 0:de79d4a48e63 115 // Assign memory destination address
okini3939 0:de79d4a48e63 116 pChannel->DMACCDestAddr = config->dstMemAddr();
okini3939 0:de79d4a48e63 117 pChannel->DMACCControl
okini3939 0:de79d4a48e63 118 = CxControl_TransferSize((uint32_t)config->transferSize())
okini3939 0:de79d4a48e63 119 | CxControl_SBSize((uint32_t)LUTPerBurst(config->srcConn()))
okini3939 0:de79d4a48e63 120 | CxControl_DBSize((uint32_t)LUTPerBurst(config->srcConn()))
okini3939 0:de79d4a48e63 121 | CxControl_SWidth((uint32_t)LUTPerWid(config->srcConn()))
okini3939 0:de79d4a48e63 122 | CxControl_DWidth((uint32_t)LUTPerWid(config->srcConn()))
okini3939 0:de79d4a48e63 123 | CxControl_DI()
okini3939 0:de79d4a48e63 124 | CxControl_I();
okini3939 0:de79d4a48e63 125 break;
okini3939 0:de79d4a48e63 126
okini3939 0:de79d4a48e63 127 // Memory to GPIO
okini3939 0:de79d4a48e63 128 case m2g:
okini3939 0:de79d4a48e63 129 // Assign physical source
okini3939 0:de79d4a48e63 130 pChannel->DMACCSrcAddr = config->srcMemAddr();
okini3939 0:de79d4a48e63 131 // Assign peripheral destination address
okini3939 0:de79d4a48e63 132 pChannel->DMACCDestAddr = config->dstMemAddr();
okini3939 0:de79d4a48e63 133 pChannel->DMACCControl
okini3939 0:de79d4a48e63 134 = CxControl_TransferSize((uint32_t)config->transferSize())
okini3939 0:de79d4a48e63 135 | CxControl_SBSize((uint32_t)LUTPerBurst(config->dstConn()))
okini3939 0:de79d4a48e63 136 | CxControl_DBSize((uint32_t)LUTPerBurst(config->dstConn()))
okini3939 0:de79d4a48e63 137 | CxControl_SWidth((uint32_t)LUTPerWid(config->dstConn()))
okini3939 0:de79d4a48e63 138 | CxControl_DWidth((uint32_t)LUTPerWid(config->dstConn()))
okini3939 0:de79d4a48e63 139 | CxControl_SI()
okini3939 0:de79d4a48e63 140 | CxControl_I();
okini3939 0:de79d4a48e63 141 break;
okini3939 0:de79d4a48e63 142
okini3939 0:de79d4a48e63 143 // Do not support any more transfer type, return ERROR
okini3939 0:de79d4a48e63 144 default:
okini3939 0:de79d4a48e63 145 return 0;
okini3939 0:de79d4a48e63 146 }
okini3939 0:de79d4a48e63 147
okini3939 0:de79d4a48e63 148 // Re-Configure DMA Request Select for source peripheral
okini3939 0:de79d4a48e63 149 if (config->srcConn() > 15) {
okini3939 0:de79d4a48e63 150 LPC_SC->DMAREQSEL |= (1 << (config->srcConn() - 16));
okini3939 0:de79d4a48e63 151 }
okini3939 0:de79d4a48e63 152 else {
okini3939 0:de79d4a48e63 153 LPC_SC->DMAREQSEL &= ~(1 << (config->srcConn() - 8));
okini3939 0:de79d4a48e63 154 }
okini3939 0:de79d4a48e63 155
okini3939 0:de79d4a48e63 156 // Re-Configure DMA Request Select for destination peripheral
okini3939 0:de79d4a48e63 157 if (config->dstConn() > 15) {
okini3939 0:de79d4a48e63 158 LPC_SC->DMAREQSEL |= (1 << (config->dstConn() - 16));
okini3939 0:de79d4a48e63 159 }
okini3939 0:de79d4a48e63 160 else {
okini3939 0:de79d4a48e63 161 LPC_SC->DMAREQSEL &= ~(1 << (config->dstConn() - 8));
okini3939 0:de79d4a48e63 162 }
okini3939 0:de79d4a48e63 163
okini3939 0:de79d4a48e63 164 // Enable DMA channels, little endian
okini3939 0:de79d4a48e63 165 LPC_GPDMA->DMACConfig = _E;
okini3939 0:de79d4a48e63 166 while (!(LPC_GPDMA->DMACConfig & _E));
okini3939 0:de79d4a48e63 167
okini3939 0:de79d4a48e63 168 // Calculate absolute value for Connection number
okini3939 0:de79d4a48e63 169 uint32_t tmp1 = config->srcConn(); tmp1 = ((tmp1 > 15) ? (tmp1 - 8) : tmp1);
okini3939 0:de79d4a48e63 170 uint32_t tmp2 = config->dstConn(); tmp2 = ((tmp2 > 15) ? (tmp2 - 8) : tmp2);
okini3939 0:de79d4a48e63 171
okini3939 0:de79d4a48e63 172 if (config->dmacSync()) {
okini3939 0:de79d4a48e63 173 uint32_t tmp3 = config->dmacSync(); tmp3 = ((tmp3 > 15) ? (tmp3 - 8) : tmp3);
okini3939 0:de79d4a48e63 174 LPC_GPDMA->DMACSync |= Sync_Src( tmp3 );
okini3939 0:de79d4a48e63 175 }
okini3939 0:de79d4a48e63 176
okini3939 0:de79d4a48e63 177 uint32_t tfer_type = (uint32_t)config->transferType();
okini3939 0:de79d4a48e63 178 if (tfer_type == g2m || tfer_type == m2g) {
okini3939 0:de79d4a48e63 179 tfer_type -= 2; // Adjust psuedo transferType to a real transferType.
okini3939 0:de79d4a48e63 180 }
okini3939 0:de79d4a48e63 181
okini3939 0:de79d4a48e63 182 // Configure DMA Channel, enable Error Counter and Terminate counter
okini3939 0:de79d4a48e63 183 pChannel->DMACCConfig
okini3939 0:de79d4a48e63 184 = CxConfig_IE()
okini3939 0:de79d4a48e63 185 | CxConfig_ITC()
okini3939 0:de79d4a48e63 186 | CxConfig_TransferType(tfer_type)
okini3939 0:de79d4a48e63 187 | CxConfig_SrcPeripheral(tmp1)
okini3939 0:de79d4a48e63 188 | CxConfig_DestPeripheral(tmp2);
okini3939 0:de79d4a48e63 189
okini3939 0:de79d4a48e63 190 return pChannel->DMACCControl;
okini3939 0:de79d4a48e63 191 }
okini3939 0:de79d4a48e63 192
okini3939 0:de79d4a48e63 193 }; // namespace AjK ends
okini3939 0:de79d4a48e63 194