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ADMX2001.cpp@5:b9608e6cc24b, 2021-10-07 (annotated)
- Committer:
- nsheth
- Date:
- Thu Oct 07 09:36:40 2021 +0000
- Revision:
- 5:b9608e6cc24b
- Parent:
- 4:eb7a23c25751
- Child:
- 6:7d8f30b3bc57
Removed app config
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| nsheth | 2:4af4940055a7 | 1 | /****************************************************************************** |
| nsheth | 2:4af4940055a7 | 2 | Copyright (c) 2020 - 2021 Analog Devices Inc. All Rights Reserved. |
| nsheth | 2:4af4940055a7 | 3 | This software is proprietary & confidential to Analog Devices, Inc. |
| nsheth | 2:4af4940055a7 | 4 | and its licensors. |
| nsheth | 2:4af4940055a7 | 5 | ******************************************************************************/ |
| nsheth | 2:4af4940055a7 | 6 | /** |
| nsheth | 2:4af4940055a7 | 7 | * @file admx200x.c |
| nsheth | 2:4af4940055a7 | 8 | * @brief This file contains admx200x APIs for sdpk1 host |
| nsheth | 2:4af4940055a7 | 9 | * @addtogroup SDPK1 |
| nsheth | 2:4af4940055a7 | 10 | * @{ |
| nsheth | 2:4af4940055a7 | 11 | */ |
| nsheth | 2:4af4940055a7 | 12 | /*============= I N C L U D E S =============*/ |
| nsheth | 4:eb7a23c25751 | 13 | #include "ADMX2001.h" |
| nsheth | 4:eb7a23c25751 | 14 | #include "ADMX2001_commands.h" |
| nsheth | 2:4af4940055a7 | 15 | #include "message.h" |
| nsheth | 2:4af4940055a7 | 16 | #include <stdlib.h> |
| nsheth | 2:4af4940055a7 | 17 | #include <string.h> |
| nsheth | 2:4af4940055a7 | 18 | |
| nsheth | 2:4af4940055a7 | 19 | static uint32_t SwapEndian(uint32_t *pData); |
| nsheth | 2:4af4940055a7 | 20 | /** milli second delay**/ |
| nsheth | 2:4af4940055a7 | 21 | static void Admx200xDelay(uint32_t msec); |
| nsheth | 2:4af4940055a7 | 22 | |
| nsheth | 2:4af4940055a7 | 23 | /** |
| nsheth | 2:4af4940055a7 | 24 | * Swaps endian of a 32 bit number |
| nsheth | 2:4af4940055a7 | 25 | * @param data - 32 bit number |
| nsheth | 2:4af4940055a7 | 26 | * @return |
| nsheth | 2:4af4940055a7 | 27 | */ |
| nsheth | 2:4af4940055a7 | 28 | uint32_t SwapEndian(uint32_t *pData) |
| nsheth | 2:4af4940055a7 | 29 | { |
| nsheth | 2:4af4940055a7 | 30 | uint8_t *pDataU8 = (uint8_t *)pData; |
| nsheth | 2:4af4940055a7 | 31 | |
| nsheth | 2:4af4940055a7 | 32 | return (uint32_t)pDataU8[0] << 24 | (uint32_t)pDataU8[1] << 16 | |
| nsheth | 2:4af4940055a7 | 33 | (uint32_t)pDataU8[2] << 8 | (uint32_t)pDataU8[3]; |
| nsheth | 2:4af4940055a7 | 34 | } |
| nsheth | 2:4af4940055a7 | 35 | |
| nsheth | 2:4af4940055a7 | 36 | /** |
| nsheth | 2:4af4940055a7 | 37 | * @brief Initializes the ADMX200X. |
| nsheth | 2:4af4940055a7 | 38 | * |
| nsheth | 2:4af4940055a7 | 39 | * @param pDevice - The device structure. |
| nsheth | 2:4af4940055a7 | 40 | * @param pSpiDesc - Pointer to spi device |
| nsheth | 2:4af4940055a7 | 41 | * @return Returns 0 for success or negative error code. |
| nsheth | 2:4af4940055a7 | 42 | */ |
| nsheth | 2:4af4940055a7 | 43 | int32_t Admx200xInit(Admx200xDev *pDevice, spi_desc *pSpiDesc) |
| nsheth | 2:4af4940055a7 | 44 | { |
| nsheth | 2:4af4940055a7 | 45 | int32_t ret = 0; |
| nsheth | 2:4af4940055a7 | 46 | |
| nsheth | 2:4af4940055a7 | 47 | pDevice->pSpiDesc = pSpiDesc; |
| nsheth | 2:4af4940055a7 | 48 | |
| nsheth | 2:4af4940055a7 | 49 | return ret; |
| nsheth | 2:4af4940055a7 | 50 | } |
| nsheth | 2:4af4940055a7 | 51 | |
| nsheth | 2:4af4940055a7 | 52 | /** |
| nsheth | 2:4af4940055a7 | 53 | * Wrapper fro delay |
| nsheth | 2:4af4940055a7 | 54 | * @param msecs - delay in milliseconds |
| nsheth | 2:4af4940055a7 | 55 | */ |
| nsheth | 2:4af4940055a7 | 56 | void Admx200xDelay(uint32_t msecs) |
| nsheth | 2:4af4940055a7 | 57 | { |
| nsheth | 2:4af4940055a7 | 58 | mdelay(msecs); |
| nsheth | 2:4af4940055a7 | 59 | } |
| nsheth | 2:4af4940055a7 | 60 | |
| nsheth | 2:4af4940055a7 | 61 | /** |
| nsheth | 2:4af4940055a7 | 62 | * @brief Create a command payload in buffer with inputs. |
| nsheth | 2:4af4940055a7 | 63 | * |
| nsheth | 2:4af4940055a7 | 64 | * @param pCmdId - Command ID. |
| nsheth | 2:4af4940055a7 | 65 | * @param pAddr - Sub commands addresses. |
| nsheth | 2:4af4940055a7 | 66 | * @param pData - Data to wildcat. |
| nsheth | 2:4af4940055a7 | 67 | * @param pBuffer - Data to wildcat. |
| nsheth | 2:4af4940055a7 | 68 | * |
| nsheth | 2:4af4940055a7 | 69 | * @return Returns 0 for success or negative error code. |
| nsheth | 2:4af4940055a7 | 70 | */ |
| nsheth | 2:4af4940055a7 | 71 | int32_t Admx200xCreateCmdPayload(uint8_t *pCmdId, uint16_t *pAddr, |
| nsheth | 2:4af4940055a7 | 72 | uint32_t *pData, uint8_t *pBuffer) |
| nsheth | 2:4af4940055a7 | 73 | { |
| nsheth | 2:4af4940055a7 | 74 | int32_t ret = 0; |
| nsheth | 5:b9608e6cc24b | 75 | //DEBUG_MSG("cmd:%d,addr:%d, data: 0x%x\n\r", *pCmdId, *pAddr, *pData); |
| nsheth | 2:4af4940055a7 | 76 | pBuffer[0] = pCmdId[0]; |
| nsheth | 2:4af4940055a7 | 77 | pBuffer[1] = ((uint8_t *)pAddr)[1]; |
| nsheth | 2:4af4940055a7 | 78 | pBuffer[2] = ((uint8_t *)pAddr)[0]; |
| nsheth | 2:4af4940055a7 | 79 | pBuffer[3] = ((uint8_t *)pData)[3]; |
| nsheth | 2:4af4940055a7 | 80 | pBuffer[4] = ((uint8_t *)pData)[2]; |
| nsheth | 2:4af4940055a7 | 81 | pBuffer[5] = ((uint8_t *)pData)[1]; |
| nsheth | 2:4af4940055a7 | 82 | pBuffer[6] = ((uint8_t *)pData)[0]; |
| nsheth | 2:4af4940055a7 | 83 | |
| nsheth | 2:4af4940055a7 | 84 | return ret; |
| nsheth | 2:4af4940055a7 | 85 | } |
| nsheth | 2:4af4940055a7 | 86 | |
| nsheth | 2:4af4940055a7 | 87 | /** |
| nsheth | 2:4af4940055a7 | 88 | * @brief Parse the payload to get cmdID, addr and data. |
| nsheth | 2:4af4940055a7 | 89 | |
| nsheth | 2:4af4940055a7 | 90 | * @param[in] pBuffer - Data from wildcat. |
| nsheth | 2:4af4940055a7 | 91 | * @param[out] pCmdId - Pointer to store Command ID. |
| nsheth | 2:4af4940055a7 | 92 | * @param[out] pAddr - Pointer to store addresses. |
| nsheth | 2:4af4940055a7 | 93 | * @param[out] pData - Pointer to store Data |
| nsheth | 2:4af4940055a7 | 94 | * |
| nsheth | 2:4af4940055a7 | 95 | * @return Returns 0 for success or negative error code. |
| nsheth | 2:4af4940055a7 | 96 | */ |
| nsheth | 2:4af4940055a7 | 97 | int32_t Admx200xParseCmdPayload(uint8_t *pBuffer, uint8_t *pCmdId, |
| nsheth | 2:4af4940055a7 | 98 | uint16_t *pAddr, uint32_t *pData) |
| nsheth | 2:4af4940055a7 | 99 | { |
| nsheth | 2:4af4940055a7 | 100 | int32_t ret = 0; |
| nsheth | 2:4af4940055a7 | 101 | |
| nsheth | 2:4af4940055a7 | 102 | *pCmdId = pBuffer[0]; |
| nsheth | 2:4af4940055a7 | 103 | *pAddr = ((uint16_t)pBuffer[1] << 8) | ((uint16_t)pBuffer[2]); |
| nsheth | 2:4af4940055a7 | 104 | |
| nsheth | 2:4af4940055a7 | 105 | *pData = SwapEndian((uint32_t *)&pBuffer[3]); |
| nsheth | 2:4af4940055a7 | 106 | |
| nsheth | 2:4af4940055a7 | 107 | return ret; |
| nsheth | 2:4af4940055a7 | 108 | } |
| nsheth | 2:4af4940055a7 | 109 | |
| nsheth | 2:4af4940055a7 | 110 | /** |
| nsheth | 2:4af4940055a7 | 111 | * @brief Waits till done bit is set in the status |
| nsheth | 2:4af4940055a7 | 112 | * |
| nsheth | 2:4af4940055a7 | 113 | * @param pDevice - The handler of the instance of the driver. |
| nsheth | 2:4af4940055a7 | 114 | * @param timeout - Count representing the number of polls to be done until the |
| nsheth | 2:4af4940055a7 | 115 | * function returns if no new data is available. |
| nsheth | 2:4af4940055a7 | 116 | * @param reqStatus - The status to be checked is passed via this argument. |
| nsheth | 2:4af4940055a7 | 117 | * @param pStatReg - Get the status word in pStatReg. |
| nsheth | 2:4af4940055a7 | 118 | * |
| nsheth | 2:4af4940055a7 | 119 | * @return Returns 0 for success or negative error code. |
| nsheth | 2:4af4940055a7 | 120 | */ |
| nsheth | 2:4af4940055a7 | 121 | int32_t Admx200xWaitForStatus(Admx200xDev *pDevice, uint32_t timeout, |
| nsheth | 2:4af4940055a7 | 122 | uint32_t reqStatus, uint32_t *pStatReg) |
| nsheth | 2:4af4940055a7 | 123 | { |
| nsheth | 2:4af4940055a7 | 124 | int32_t status = ADMX_STATUS_SUCCESS; |
| nsheth | 2:4af4940055a7 | 125 | int8_t done = 0; |
| nsheth | 2:4af4940055a7 | 126 | uint8_t cmdId = CMD_STATUS_READ; |
| nsheth | 2:4af4940055a7 | 127 | |
| nsheth | 2:4af4940055a7 | 128 | if (pDevice != NULL) |
| nsheth | 2:4af4940055a7 | 129 | { |
| nsheth | 2:4af4940055a7 | 130 | while (!done && --timeout) |
| nsheth | 2:4af4940055a7 | 131 | { |
| nsheth | 2:4af4940055a7 | 132 | |
| nsheth | 2:4af4940055a7 | 133 | status = Admx200xReadData(pDevice, cmdId, pStatReg); |
| nsheth | 2:4af4940055a7 | 134 | |
| nsheth | 2:4af4940055a7 | 135 | if (status == 0) |
| nsheth | 2:4af4940055a7 | 136 | { |
| nsheth | 2:4af4940055a7 | 137 | /* Check the DONE bit in the Status Register */ |
| nsheth | 2:4af4940055a7 | 138 | if (((*pStatReg) & reqStatus) == reqStatus) |
| nsheth | 2:4af4940055a7 | 139 | { |
| nsheth | 2:4af4940055a7 | 140 | done = 1; |
| nsheth | 2:4af4940055a7 | 141 | if (*pStatReg & ADMX200X_STATUS_ERROR_BITM) |
| nsheth | 2:4af4940055a7 | 142 | { |
| nsheth | 2:4af4940055a7 | 143 | status = *pStatReg & ADMX200X_STATUS_CODE_BITM; |
| nsheth | 2:4af4940055a7 | 144 | if (status & ADMX_STATUS_LOG_ZERO_ERROR) |
| nsheth | 2:4af4940055a7 | 145 | { |
| nsheth | 2:4af4940055a7 | 146 | ERROR_MSG("sweep_start/sweep_end cannot be zero " |
| nsheth | 2:4af4940055a7 | 147 | "for logarithmic sweep"); |
| nsheth | 2:4af4940055a7 | 148 | status &= (~ADMX_STATUS_LOG_ZERO_ERROR); |
| nsheth | 2:4af4940055a7 | 149 | } |
| nsheth | 2:4af4940055a7 | 150 | if (status & ADMX_STATUS_LOG_SIGN_ERROR) |
| nsheth | 2:4af4940055a7 | 151 | { |
| nsheth | 2:4af4940055a7 | 152 | ERROR_MSG("sweep_start and sweep_end need to have " |
| nsheth | 2:4af4940055a7 | 153 | "the same sign " |
| nsheth | 2:4af4940055a7 | 154 | "for logarithmic sweep"); |
| nsheth | 2:4af4940055a7 | 155 | status &= (~ADMX_STATUS_LOG_SIGN_ERROR); |
| nsheth | 2:4af4940055a7 | 156 | } |
| nsheth | 2:4af4940055a7 | 157 | if (status & ADMX_STATUS_VOLT_ADC_ERROR) |
| nsheth | 2:4af4940055a7 | 158 | { |
| nsheth | 2:4af4940055a7 | 159 | ERROR_MSG("Voltage ADC Saturated\n"); |
| nsheth | 2:4af4940055a7 | 160 | status &= (~ADMX_STATUS_VOLT_ADC_ERROR); |
| nsheth | 2:4af4940055a7 | 161 | } |
| nsheth | 2:4af4940055a7 | 162 | if (status & ADMX_STATUS_CURR_ADC_ERROR) |
| nsheth | 2:4af4940055a7 | 163 | { |
| nsheth | 2:4af4940055a7 | 164 | ERROR_MSG("Current ADC Saturated\n"); |
| nsheth | 2:4af4940055a7 | 165 | status &= (~ADMX_STATUS_CURR_ADC_ERROR); |
| nsheth | 2:4af4940055a7 | 166 | } |
| nsheth | 2:4af4940055a7 | 167 | if (status & ADMX_STATUS_FIFO_ERROR) |
| nsheth | 2:4af4940055a7 | 168 | { |
| nsheth | 2:4af4940055a7 | 169 | ERROR_MSG( |
| nsheth | 2:4af4940055a7 | 170 | "FIFO either Overflowed or Underflowed\n"); |
| nsheth | 2:4af4940055a7 | 171 | status &= (~ADMX_STATUS_FIFO_ERROR); |
| nsheth | 2:4af4940055a7 | 172 | } |
| nsheth | 2:4af4940055a7 | 173 | if (status & ADMX_STATUS_COUNT_EXCEEDED) |
| nsheth | 2:4af4940055a7 | 174 | { |
| nsheth | 2:4af4940055a7 | 175 | ERROR_MSG("Sweep count exceeded maximum value"); |
| nsheth | 2:4af4940055a7 | 176 | status &= (~ADMX_STATUS_COUNT_EXCEEDED); |
| nsheth | 2:4af4940055a7 | 177 | } |
| nsheth | 2:4af4940055a7 | 178 | } |
| nsheth | 2:4af4940055a7 | 179 | } |
| nsheth | 2:4af4940055a7 | 180 | } |
| nsheth | 2:4af4940055a7 | 181 | } |
| nsheth | 2:4af4940055a7 | 182 | |
| nsheth | 2:4af4940055a7 | 183 | if (!timeout) |
| nsheth | 2:4af4940055a7 | 184 | { |
| nsheth | 2:4af4940055a7 | 185 | status = ADMX_STATUS_TIMEOUT; |
| nsheth | 2:4af4940055a7 | 186 | } |
| nsheth | 2:4af4940055a7 | 187 | } |
| nsheth | 2:4af4940055a7 | 188 | else |
| nsheth | 2:4af4940055a7 | 189 | { |
| nsheth | 2:4af4940055a7 | 190 | status = ADMX_STATUS_FAILED; |
| nsheth | 2:4af4940055a7 | 191 | } |
| nsheth | 2:4af4940055a7 | 192 | return status; |
| nsheth | 2:4af4940055a7 | 193 | } |
| nsheth | 2:4af4940055a7 | 194 | |
| nsheth | 2:4af4940055a7 | 195 | /** |
| nsheth | 2:4af4940055a7 | 196 | * @brief Sends teh command to ADMX200x and wait till done bit is set |
| nsheth | 2:4af4940055a7 | 197 | * @param pDevice - Device Handle |
| nsheth | 2:4af4940055a7 | 198 | * @param pCmdId - The command ID |
| nsheth | 2:4af4940055a7 | 199 | * @param pAddr - Address |
| nsheth | 2:4af4940055a7 | 200 | * @param pData - Data |
| nsheth | 2:4af4940055a7 | 201 | * @param pStatReg - Status register info |
| nsheth | 2:4af4940055a7 | 202 | * @return Returns 0 for success or negative error code. |
| nsheth | 2:4af4940055a7 | 203 | */ |
| nsheth | 2:4af4940055a7 | 204 | int32_t Admx200xSendCmd(Admx200xDev *pDevice, uint8_t *pCmdId, uint16_t *pAddr, |
| nsheth | 2:4af4940055a7 | 205 | uint32_t *pData, uint32_t *pStatReg) |
| nsheth | 2:4af4940055a7 | 206 | { |
| nsheth | 2:4af4940055a7 | 207 | |
| nsheth | 2:4af4940055a7 | 208 | int32_t status = ADMX_STATUS_SUCCESS; |
| nsheth | 2:4af4940055a7 | 209 | uint8_t cmdPayload[ADMX200X_CMD_LENGTH]; |
| nsheth | 2:4af4940055a7 | 210 | |
| nsheth | 2:4af4940055a7 | 211 | Admx200xCreateCmdPayload(pCmdId, pAddr, pData, &cmdPayload[0]); |
| nsheth | 2:4af4940055a7 | 212 | |
| nsheth | 2:4af4940055a7 | 213 | status = spi_write_and_read(pDevice->pSpiDesc, &cmdPayload[0], |
| nsheth | 2:4af4940055a7 | 214 | ADMX200X_CMD_LENGTH); |
| nsheth | 2:4af4940055a7 | 215 | Admx200xDelay(100); |
| nsheth | 2:4af4940055a7 | 216 | // printf("CMD :%02x ADDR: %04x DATA: %08x\n\r",*pCmdId, *pAddr, *pData); |
| nsheth | 2:4af4940055a7 | 217 | if (!status) |
| nsheth | 2:4af4940055a7 | 218 | { |
| nsheth | 2:4af4940055a7 | 219 | /** Wait for status done = 1,Warn/error/command result = 0 from result |
| nsheth | 2:4af4940055a7 | 220 | */ |
| nsheth | 2:4af4940055a7 | 221 | status = Admx200xWaitForStatus(pDevice, SPI_TIMEOUT, |
| nsheth | 2:4af4940055a7 | 222 | ADMX200X_STATUS_DONE_BITM, pStatReg); |
| nsheth | 2:4af4940055a7 | 223 | |
| nsheth | 2:4af4940055a7 | 224 | // printf("Stat Reg: %08x\n\r", *pStatReg); |
| nsheth | 2:4af4940055a7 | 225 | if (status == ADMX_STATUS_SUCCESS) |
| nsheth | 2:4af4940055a7 | 226 | { |
| nsheth | 2:4af4940055a7 | 227 | status = *pStatReg & ADMX200X_STATUS_CODE_BITM; |
| nsheth | 2:4af4940055a7 | 228 | } |
| nsheth | 2:4af4940055a7 | 229 | } |
| nsheth | 2:4af4940055a7 | 230 | if (status == ADMX_STATUS_TIMEOUT) |
| nsheth | 2:4af4940055a7 | 231 | { |
| nsheth | 2:4af4940055a7 | 232 | ERROR_MSG("SPI interface timed out : Not responding"); |
| nsheth | 2:4af4940055a7 | 233 | } |
| nsheth | 2:4af4940055a7 | 234 | return status; |
| nsheth | 2:4af4940055a7 | 235 | } |
| nsheth | 2:4af4940055a7 | 236 | |
| nsheth | 2:4af4940055a7 | 237 | /** |
| nsheth | 2:4af4940055a7 | 238 | * @brief Read result register from the WILDCAT |
| nsheth | 2:4af4940055a7 | 239 | * @param pDevice - Device Handle |
| nsheth | 2:4af4940055a7 | 240 | * @param cmdId - This determines where the data is read from - result |
| nsheth | 2:4af4940055a7 | 241 | * register, status register or Fifo |
| nsheth | 2:4af4940055a7 | 242 | * @param pResult - The data in the result register |
| nsheth | 2:4af4940055a7 | 243 | * @return Returns 0 for success or negative error code. |
| nsheth | 2:4af4940055a7 | 244 | */ |
| nsheth | 2:4af4940055a7 | 245 | int32_t Admx200xReadData(Admx200xDev *pDevice, uint8_t cmdId, uint32_t *pResult) |
| nsheth | 2:4af4940055a7 | 246 | { |
| nsheth | 2:4af4940055a7 | 247 | int32_t ret = ADMX_STATUS_SUCCESS; |
| nsheth | 2:4af4940055a7 | 248 | uint8_t cmdTemp; |
| nsheth | 2:4af4940055a7 | 249 | uint16_t addrTemp; |
| nsheth | 2:4af4940055a7 | 250 | uint16_t addr; |
| nsheth | 2:4af4940055a7 | 251 | uint32_t data; |
| nsheth | 2:4af4940055a7 | 252 | uint8_t cmdPayload[ADMX200X_CMD_LENGTH]; |
| nsheth | 2:4af4940055a7 | 253 | |
| nsheth | 2:4af4940055a7 | 254 | /*FIXME: Insert checks here. Not all command IDs are accepted here */ |
| nsheth | 2:4af4940055a7 | 255 | addr = 0; |
| nsheth | 2:4af4940055a7 | 256 | data = 0; |
| nsheth | 2:4af4940055a7 | 257 | |
| nsheth | 2:4af4940055a7 | 258 | Admx200xCreateCmdPayload(&cmdId, &addr, &data, &cmdPayload[0]); |
| nsheth | 2:4af4940055a7 | 259 | |
| nsheth | 2:4af4940055a7 | 260 | /* Send command and Read response from the slave */ |
| nsheth | 2:4af4940055a7 | 261 | ret = spi_write_and_read(pDevice->pSpiDesc, &cmdPayload[0], |
| nsheth | 2:4af4940055a7 | 262 | ADMX200X_CMD_LENGTH); |
| nsheth | 2:4af4940055a7 | 263 | Admx200xDelay(100); |
| nsheth | 2:4af4940055a7 | 264 | Admx200xParseCmdPayload(&cmdPayload[0], &cmdTemp, &addrTemp, pResult); |
| nsheth | 2:4af4940055a7 | 265 | |
| nsheth | 2:4af4940055a7 | 266 | return ret; |
| nsheth | 2:4af4940055a7 | 267 | } |
| nsheth | 2:4af4940055a7 | 268 | |
| nsheth | 2:4af4940055a7 | 269 | /** |
| nsheth | 2:4af4940055a7 | 270 | * @brief Read array of datatype doube from the fifo of the WILDCAT |
| nsheth | 2:4af4940055a7 | 271 | * @param pDevice - Device Handle |
| nsheth | 2:4af4940055a7 | 272 | * @param pFifo - Double array that stores the data |
| nsheth | 2:4af4940055a7 | 273 | * @param pCount - Stores the number of double values stored in the pFifo array |
| nsheth | 2:4af4940055a7 | 274 | */ |
| nsheth | 2:4af4940055a7 | 275 | int32_t Admx200xReadFifo(Admx200xDev *pDevice, double *pFifo, int32_t *pCount) |
| nsheth | 2:4af4940055a7 | 276 | { |
| nsheth | 2:4af4940055a7 | 277 | int32_t status = ADMX_STATUS_SUCCESS; |
| nsheth | 2:4af4940055a7 | 278 | int32_t i; |
| nsheth | 2:4af4940055a7 | 279 | uint32_t *pData = (uint32_t *)pFifo; |
| nsheth | 2:4af4940055a7 | 280 | uint8_t cmdId = CMD_STATUS_READ; |
| nsheth | 2:4af4940055a7 | 281 | uint32_t statusReg; |
| nsheth | 2:4af4940055a7 | 282 | int32_t numDoublesInFifo; |
| nsheth | 2:4af4940055a7 | 283 | |
| nsheth | 2:4af4940055a7 | 284 | status = Admx200xReadData(pDevice, cmdId, &statusReg); |
| nsheth | 2:4af4940055a7 | 285 | |
| nsheth | 2:4af4940055a7 | 286 | /* Fifo depth in doubles */ |
| nsheth | 2:4af4940055a7 | 287 | numDoublesInFifo = (statusReg & ADMX200X_STATUS_FIFO_DEPTH_BITM) >> 17; |
| nsheth | 2:4af4940055a7 | 288 | |
| nsheth | 2:4af4940055a7 | 289 | if (numDoublesInFifo < *pCount) |
| nsheth | 2:4af4940055a7 | 290 | { |
| nsheth | 2:4af4940055a7 | 291 | *pCount = numDoublesInFifo; |
| nsheth | 2:4af4940055a7 | 292 | } |
| nsheth | 2:4af4940055a7 | 293 | |
| nsheth | 2:4af4940055a7 | 294 | for (i = 0; i < *pCount; i++) |
| nsheth | 2:4af4940055a7 | 295 | { |
| nsheth | 2:4af4940055a7 | 296 | /* Read a double -- Split it into two reads for redability*/ |
| nsheth | 2:4af4940055a7 | 297 | Admx200xReadData(pDevice, CMD_FIFO_READ, &pData[2 * i]); |
| nsheth | 2:4af4940055a7 | 298 | Admx200xReadData(pDevice, CMD_FIFO_READ, &pData[2 * i + 1]); |
| nsheth | 2:4af4940055a7 | 299 | } |
| nsheth | 2:4af4940055a7 | 300 | return status; |
| nsheth | 2:4af4940055a7 | 301 | } |
| nsheth | 2:4af4940055a7 | 302 | |
| nsheth | 2:4af4940055a7 | 303 | /** |
| nsheth | 2:4af4940055a7 | 304 | * @brief Clears the Admx2001 SPI FIFO & errors |
| nsheth | 2:4af4940055a7 | 305 | * |
| nsheth | 2:4af4940055a7 | 306 | * @param pDevice - Device Handle |
| nsheth | 2:4af4940055a7 | 307 | * @return Returns 0 for success or error code. |
| nsheth | 2:4af4940055a7 | 308 | */ |
| nsheth | 2:4af4940055a7 | 309 | int32_t Admx200xClearSPI(Admx200xDev *pDevice) |
| nsheth | 2:4af4940055a7 | 310 | { |
| nsheth | 2:4af4940055a7 | 311 | int32_t status = ADMX_STATUS_SUCCESS; |
| nsheth | 2:4af4940055a7 | 312 | uint8_t cmdID; |
| nsheth | 2:4af4940055a7 | 313 | uint16_t addr = 0; |
| nsheth | 2:4af4940055a7 | 314 | uint32_t statReg = 0; |
| nsheth | 2:4af4940055a7 | 315 | uint32_t data = 0; |
| nsheth | 2:4af4940055a7 | 316 | |
| nsheth | 2:4af4940055a7 | 317 | cmdID = CMD_CLEAR_ERROR; |
| nsheth | 2:4af4940055a7 | 318 | status = Admx200xSendCmd(pDevice, &cmdID, &addr, &data, &statReg); |
| nsheth | 2:4af4940055a7 | 319 | |
| nsheth | 2:4af4940055a7 | 320 | return status; |
| nsheth | 2:4af4940055a7 | 321 | } |
| nsheth | 2:4af4940055a7 | 322 | |
| nsheth | 2:4af4940055a7 | 323 | /** |
| nsheth | 2:4af4940055a7 | 324 | * @} |
| nsheth | 2:4af4940055a7 | 325 | */ |
