Diff: DW1000/DW1000.cpp

Revision:

44:2e0045042a59

Parent:

42:83931678c4de

Child:

45:01a33363bc21

diff -r d89fe237a684 -r 2e0045042a59 DW1000/DW1000.cpp
--- a/DW1000/DW1000.cpp	Thu Mar 05 10:26:51 2015 +0000
+++ b/DW1000/DW1000.cpp	Thu Mar 05 12:18:37 2015 +0000
@@ -8,9 +8,9 @@
     spi.frequency(1000000);             // with a 1MHz clock rate (worked up to 49MHz in our Test)
     
     resetAll();                         // we do a soft reset of the DW1000 everytime the driver starts
-    
+
     // Configuration TODO: make method for that
-    
+
     // User Manual "2.5.5 Default Configurations that should be modified" p. 22
     writeRegister16(DW1000_AGC_CTRL, 0x04, 0x8870);
     writeRegister32(DW1000_AGC_CTRL, 0x0C, 0x2502A907);
@@ -26,10 +26,10 @@
     // 110kbps CAUTION: a lot of other registers have to be set for an optimized operation on 110kbps
     //writeRegister16(DW1000_TX_FCTRL, 1, 0x2800 | 0x0100 | 0x0080); // use 2048 symbols preable (0x2800), 16MHz pulse repetition frequency (0x0100), 110kbps bit rate (0x0080) see p.69 of DW1000 User Manual
     //writeRegister8(DW1000_SYS_CFG, 2, 0x40);    // enable special receiving option for 110kbps!! (0x40) see p.64 of DW1000 User Manual [DO NOT enable 1024 byte frames (0x03) becuase it generates disturbance of ranging don't know why...]
-    
+
     writeRegister16(DW1000_TX_ANTD, 0, 16384); // set TX and RX Antenna delay to neutral because we calibrate afterwards
     writeRegister16(DW1000_LDE_CTRL, 0x1804, 16384); // = 2^14 a qurter of the range of the 16-Bit register which corresponds to zero calibration in a round trip (TX1+RX2+TX2+RX1)
-    
+
     writeRegister8(DW1000_SYS_CFG, 3, 0x20);    // enable auto reenabling receiver after error
     
     irq.rise(this, &DW1000::ISR);       // attach interrupt handler to rising edge of interrupt pin from DW1000
@@ -112,6 +112,23 @@
     startRX();                                                      // enable receiver again
 }
 
+void DW1000::sendDelayedFrame(uint8_t* message, uint16_t length, uint64_t TxTimestamp) {
+    //if (length >= 1021) length = 1021;                            // check for maximim length a frame can have with 1024 Byte frames [not used, see constructor]
+    if (length >= 125) length = 125;                                // check for maximim length a frame can have with 127 Byte frames
+    writeRegister(DW1000_TX_BUFFER, 0, message, length);            // fill buffer
+
+    uint8_t backup = readRegister8(DW1000_TX_FCTRL, 1);             // put length of frame
+    length += 2;                                                    // including 2 CRC Bytes
+    length = ((backup & 0xFC) << 8) | (length & 0x03FF);
+    writeRegister16(DW1000_TX_FCTRL, 0, length);
+
+    writeRegister40(DW1000_DX_TIME, 0, TxTimestamp);
+
+    stopTRX();                                                      // stop receiving
+    writeRegister8(DW1000_SYS_CTRL, 0, 0x02 | 0x04);                // trigger sending process by setting the TXSTRT and TXDLYS bit
+    startRX();                                                      // enable receiver again
+}
+
 void DW1000::startRX() {
     writeRegister8(DW1000_SYS_CTRL, 0x01, 0x01);                    // start listening for preamble by setting the RXENAB bit
 }
@@ -195,6 +212,10 @@
     writeRegister(reg, subaddress, (uint8_t*)&buffer, 4);
 }
 
+void DW1000::writeRegister40(uint8_t reg, uint16_t subaddress, uint64_t buffer) {
+    writeRegister(reg, subaddress, (uint8_t*)&buffer, 5);
+}
+
 void DW1000::readRegister(uint8_t reg, uint16_t subaddress, uint8_t *buffer, int length) {
     setupTransaction(reg, subaddress, false);
     for(int i=0; i<length; i++)                             // get data