InterruptMask library allows masking/unmasking GPIO interrupts (attached to either the rise or falling edges). It also allows clearing pending interrupts which may come handy before unmasking them.

Committer:
nleoni
Date:
Wed Feb 19 04:35:24 2014 +0000
Revision:
4:a34eddd0a2be
Parent:
3:7b8a744ac27a
Updated comments in main CPP file

Who changed what in which revision?

UserRevisionLine numberNew contents of line
nleoni 4:a34eddd0a2be 1 //***************************************************************************//
nleoni 4:a34eddd0a2be 2 /* InterruptMask Library */
nleoni 4:a34eddd0a2be 3 /* Napoleon Leoni, February 18,2014*/
nleoni 4:a34eddd0a2be 4 /* This class enables masking a GPIO interrupt from a specific MBED pin */
nleoni 4:a34eddd0a2be 5 // Note to get the actual pin number in the LPC of an mbed pin in P0
nleoni 4:a34eddd0a2be 6 // simply do pN-P0_0, for example p12-P0_0=17, that is pin 12 in the mbed
nleoni 4:a34eddd0a2be 7 // corresponds to Port[0].17 or bit 17 of port 0.
nleoni 4:a34eddd0a2be 8 //***************************************************************************//
nleoni 4:a34eddd0a2be 9 // Example Code is in the header file: InterruptMask.h //
nleoni 0:9db76e6c71ce 10 #include "InterruptMask.h"
nleoni 0:9db76e6c71ce 11
nleoni 2:0e3b2bc65131 12 //default constructor required, should not be use will yield error
nleoni 0:9db76e6c71ce 13 InterruptMask::InterruptMask(void){
nleoni 2:0e3b2bc65131 14 exit(1);
nleoni 0:9db76e6c71ce 15 };
nleoni 2:0e3b2bc65131 16
nleoni 2:0e3b2bc65131 17 //Constructor to be used, initialize with any valid mbed pin (p5 thru p30 except pins 19-20)
nleoni 2:0e3b2bc65131 18 //you will need one InterruptMask for every pin you want ot have control over. The constructor
nleoni 2:0e3b2bc65131 19 //will only accept a valid pin, otherwise it will cause the prgram to exit with an error.
nleoni 3:7b8a744ac27a 20 InterruptMask::InterruptMask(PinName somePin){
nleoni 0:9db76e6c71ce 21 switch(somePin){
nleoni 0:9db76e6c71ce 22 case p5:
nleoni 0:9db76e6c71ce 23 case p6:
nleoni 0:9db76e6c71ce 24 case p7:
nleoni 0:9db76e6c71ce 25 case p8:
nleoni 0:9db76e6c71ce 26 case p9:
nleoni 0:9db76e6c71ce 27 case p10:
nleoni 0:9db76e6c71ce 28 case p11:
nleoni 0:9db76e6c71ce 29 case p12:
nleoni 0:9db76e6c71ce 30 case p13:
nleoni 0:9db76e6c71ce 31 case p14:
nleoni 0:9db76e6c71ce 32 case p15:
nleoni 0:9db76e6c71ce 33 case p16:
nleoni 0:9db76e6c71ce 34 case p17:
nleoni 0:9db76e6c71ce 35 case p18:
nleoni 0:9db76e6c71ce 36 //These pins are in Port 0 of the LPC1768, so the proper register is selected below
nleoni 0:9db76e6c71ce 37 IOIntEnF = &(LPC_GPIOINT->IO0IntEnF);
nleoni 0:9db76e6c71ce 38 IOIntEnR = &(LPC_GPIOINT->IO0IntEnR);
nleoni 0:9db76e6c71ce 39 IOIntClr = &(LPC_GPIOINT->IO0IntClr);
nleoni 0:9db76e6c71ce 40 this->mPin=somePin; //assign pin to internal member variable
nleoni 0:9db76e6c71ce 41 mask=~(1<<( (this->mPin)-P0_0));
nleoni 0:9db76e6c71ce 42 unmask=~mask;
nleoni 0:9db76e6c71ce 43 break;
nleoni 0:9db76e6c71ce 44 case p21:
nleoni 0:9db76e6c71ce 45 case p22:
nleoni 0:9db76e6c71ce 46 case p23:
nleoni 0:9db76e6c71ce 47 case p24:
nleoni 0:9db76e6c71ce 48 case p25:
nleoni 0:9db76e6c71ce 49 case p26:
nleoni 0:9db76e6c71ce 50 case p27:
nleoni 0:9db76e6c71ce 51 case p28:
nleoni 0:9db76e6c71ce 52 case p29:
nleoni 0:9db76e6c71ce 53 case p30:
nleoni 4:a34eddd0a2be 54 //These pins are in Port 2 of the LPC1768, so the proper register is selected below
nleoni 0:9db76e6c71ce 55 IOIntEnF = &(LPC_GPIOINT->IO2IntEnF);
nleoni 0:9db76e6c71ce 56 IOIntEnR = &(LPC_GPIOINT->IO2IntEnR);
nleoni 0:9db76e6c71ce 57 IOIntClr = &(LPC_GPIOINT->IO2IntClr);
nleoni 0:9db76e6c71ce 58 this->mPin=somePin; //assign pin to internal member variable
nleoni 0:9db76e6c71ce 59 mask=~(1<<( (this->mPin)-P2_0));
nleoni 0:9db76e6c71ce 60 unmask=~mask;
nleoni 0:9db76e6c71ce 61 break;
nleoni 0:9db76e6c71ce 62 default:
nleoni 0:9db76e6c71ce 63 exit(1);
nleoni 0:9db76e6c71ce 64 }
nleoni 0:9db76e6c71ce 65 }
nleoni 0:9db76e6c71ce 66
nleoni 2:0e3b2bc65131 67
nleoni 2:0e3b2bc65131 68 //This method will mask (disable) any rising edge interrupts of the specified pin
nleoni 0:9db76e6c71ce 69 void InterruptMask::maskIntR(void){
nleoni 0:9db76e6c71ce 70 (*(this->IOIntEnR)) &= this->mask;
nleoni 0:9db76e6c71ce 71 }
nleoni 0:9db76e6c71ce 72
nleoni 2:0e3b2bc65131 73 //This method will mask (disable) any faling edge interrupts of the specified pin
nleoni 0:9db76e6c71ce 74 void InterruptMask::maskIntF(void){
nleoni 0:9db76e6c71ce 75 (*(this->IOIntEnF)) &= this->mask;
nleoni 0:9db76e6c71ce 76 }
nleoni 0:9db76e6c71ce 77
nleoni 2:0e3b2bc65131 78 //This method will unmask (enable) any rising edge interrupts of the specified pin
nleoni 0:9db76e6c71ce 79 void InterruptMask::unMaskIntR(void){
nleoni 0:9db76e6c71ce 80 (*(this->IOIntEnR)) |= this->unmask;
nleoni 0:9db76e6c71ce 81 }
nleoni 0:9db76e6c71ce 82
nleoni 2:0e3b2bc65131 83 //This method will unmask (enable) any falling edge interrupts of the specified pin
nleoni 0:9db76e6c71ce 84 void InterruptMask::unMaskIntF(void){
nleoni 0:9db76e6c71ce 85 (*(this->IOIntEnF)) |= this->unmask;
nleoni 0:9db76e6c71ce 86 }
nleoni 0:9db76e6c71ce 87
nleoni 2:0e3b2bc65131 88 //This method will clear any pending interrupts of the specified pin
nleoni 0:9db76e6c71ce 89 void InterruptMask::ClrInt(void){
nleoni 0:9db76e6c71ce 90 (*(this->IOIntClr)) |= this->unmask;
nleoni 0:9db76e6c71ce 91 }
nleoni 0:9db76e6c71ce 92