napoleon leoni / InterruptMask

InterruptMask library allows masking/unmasking GPIO interrupts (attached to either the rise or falling edges). It also allows clearing pending interrupts which may come handy before unmasking them.

InterruptMask.cpp@0:9db76e6c71ce, 2014-02-18 (annotated)

Committer:
nleoni
Date:
Tue Feb 18 02:29:52 2014 +0000
Revision:
0:9db76e6c71ce
Child:
2:0e3b2bc65131
InterruptMask library; Allows masking/unmasking GPIO interrupts (attach to either rise or falling edges). It also allows clearing the interrupt.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
nleoni 0:9db76e6c71ce 1 #include "InterruptMask.h"
nleoni 0:9db76e6c71ce 2
nleoni 0:9db76e6c71ce 3 InterruptMask::InterruptMask(void){
nleoni 0:9db76e6c71ce 4 };
nleoni 0:9db76e6c71ce 5
nleoni 0:9db76e6c71ce 6 InterruptMask::InterruptMask(int somePin){
nleoni 0:9db76e6c71ce 7 switch(somePin){
nleoni 0:9db76e6c71ce 8 case p5:
nleoni 0:9db76e6c71ce 9 case p6:
nleoni 0:9db76e6c71ce 10 case p7:
nleoni 0:9db76e6c71ce 11 case p8:
nleoni 0:9db76e6c71ce 12 case p9:
nleoni 0:9db76e6c71ce 13 case p10:
nleoni 0:9db76e6c71ce 14 case p11:
nleoni 0:9db76e6c71ce 15 case p12:
nleoni 0:9db76e6c71ce 16 case p13:
nleoni 0:9db76e6c71ce 17 case p14:
nleoni 0:9db76e6c71ce 18 case p15:
nleoni 0:9db76e6c71ce 19 case p16:
nleoni 0:9db76e6c71ce 20 case p17:
nleoni 0:9db76e6c71ce 21 case p18:
nleoni 0:9db76e6c71ce 22 //These pins are in Port 0 of the LPC1768, so the proper register is selected below
nleoni 0:9db76e6c71ce 23 IOIntEnF = &(LPC_GPIOINT->IO0IntEnF);
nleoni 0:9db76e6c71ce 24 IOIntEnR = &(LPC_GPIOINT->IO0IntEnR);
nleoni 0:9db76e6c71ce 25 IOIntClr = &(LPC_GPIOINT->IO0IntClr);
nleoni 0:9db76e6c71ce 26 this->mPin=somePin; //assign pin to internal member variable
nleoni 0:9db76e6c71ce 27 mask=~(1<<( (this->mPin)-P0_0));
nleoni 0:9db76e6c71ce 28 unmask=~mask;
nleoni 0:9db76e6c71ce 29 break;
nleoni 0:9db76e6c71ce 30 case p21:
nleoni 0:9db76e6c71ce 31 case p22:
nleoni 0:9db76e6c71ce 32 case p23:
nleoni 0:9db76e6c71ce 33 case p24:
nleoni 0:9db76e6c71ce 34 case p25:
nleoni 0:9db76e6c71ce 35 case p26:
nleoni 0:9db76e6c71ce 36 case p27:
nleoni 0:9db76e6c71ce 37 case p28:
nleoni 0:9db76e6c71ce 38 case p29:
nleoni 0:9db76e6c71ce 39 case p30:
nleoni 0:9db76e6c71ce 40 //These pins are in Port 0 of the LPC1768, so the proper register is selected below
nleoni 0:9db76e6c71ce 41 IOIntEnF = &(LPC_GPIOINT->IO2IntEnF);
nleoni 0:9db76e6c71ce 42 IOIntEnR = &(LPC_GPIOINT->IO2IntEnR);
nleoni 0:9db76e6c71ce 43 IOIntClr = &(LPC_GPIOINT->IO2IntClr);
nleoni 0:9db76e6c71ce 44 this->mPin=somePin; //assign pin to internal member variable
nleoni 0:9db76e6c71ce 45 mask=~(1<<( (this->mPin)-P2_0));
nleoni 0:9db76e6c71ce 46 unmask=~mask;
nleoni 0:9db76e6c71ce 47 break;
nleoni 0:9db76e6c71ce 48 default:
nleoni 0:9db76e6c71ce 49 exit(1);
nleoni 0:9db76e6c71ce 50 }
nleoni 0:9db76e6c71ce 51 }
nleoni 0:9db76e6c71ce 52
nleoni 0:9db76e6c71ce 53 void InterruptMask::maskIntR(void){
nleoni 0:9db76e6c71ce 54 (*(this->IOIntEnR)) &= this->mask;
nleoni 0:9db76e6c71ce 55 }
nleoni 0:9db76e6c71ce 56
nleoni 0:9db76e6c71ce 57 void InterruptMask::maskIntF(void){
nleoni 0:9db76e6c71ce 58 (*(this->IOIntEnF)) &= this->mask;
nleoni 0:9db76e6c71ce 59 }
nleoni 0:9db76e6c71ce 60
nleoni 0:9db76e6c71ce 61 void InterruptMask::unMaskIntR(void){
nleoni 0:9db76e6c71ce 62 (*(this->IOIntEnR)) |= this->unmask;
nleoni 0:9db76e6c71ce 63 }
nleoni 0:9db76e6c71ce 64
nleoni 0:9db76e6c71ce 65 void InterruptMask::unMaskIntF(void){
nleoni 0:9db76e6c71ce 66 (*(this->IOIntEnF)) |= this->unmask;
nleoni 0:9db76e6c71ce 67 }
nleoni 0:9db76e6c71ce 68
nleoni 0:9db76e6c71ce 69 void InterruptMask::ClrInt(void){
nleoni 0:9db76e6c71ce 70 (*(this->IOIntClr)) |= this->unmask;
nleoni 0:9db76e6c71ce 71 }
nleoni 0:9db76e6c71ce 72