Nivedita Mukka / Mbed 2 deprecated Personal Alert System using RFID with FRDM K64F Featured

This is a cost effective alert system that uses radio frequency identification. RC522 module and 13.56MHz RFID tags are used. Differentiates between registered and unregistered users based on UID of the tag, then displays alerts in serial terminal. The code presently has two registered users; can be easily expanded to have more registered users.

Dependencies:   MFRC522 mbed

MFRC522.h@1:d950cea9271b, 2016-03-27 (annotated)

Committer:
nivmukka
Date:
Sun Mar 27 03:35:10 2016 +0000
Revision:
1:d950cea9271b
Parent:
0:1026a98e87f4 
Differentiates between registered and unregistered users based on UID of the tag, then displays alerts in serial terminal.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
nivmukka 0:1026a98e87f4 1 /**
nivmukka 0:1026a98e87f4 2 * MFRC522.h - Library to use ARDUINO RFID MODULE KIT 13.56 MHZ WITH TAGS SPI W AND R BY COOQROBOT.
nivmukka 0:1026a98e87f4 3 * Based on code Dr.Leong ( WWW.B2CQSHOP.COM )
nivmukka 0:1026a98e87f4 4 * Created by Miguel Balboa (circuitito.com), Jan, 2012.
nivmukka 0:1026a98e87f4 5 * Rewritten by Soren Thing Andersen (access.thing.dk), fall of 2013 (Translation to English, refactored, comments, anti collision, cascade levels.)
nivmukka 0:1026a98e87f4 6 * Ported to mbed by Martin Olejar, Dec, 2013
nivmukka 0:1026a98e87f4 7 *
nivmukka 0:1026a98e87f4 8 * Please read this file for an overview and then MFRC522.cpp for comments on the specific functions.
nivmukka 0:1026a98e87f4 9 * Search for "mf-rc522" on ebay.com to purchase the MF-RC522 board.
nivmukka 0:1026a98e87f4 10 *
nivmukka 0:1026a98e87f4 11 * There are three hardware components involved:
nivmukka 0:1026a98e87f4 12 * 1) The micro controller: An Arduino
nivmukka 0:1026a98e87f4 13 * 2) The PCD (short for Proximity Coupling Device): NXP MFRC522 Contactless Reader IC
nivmukka 0:1026a98e87f4 14 * 3) The PICC (short for Proximity Integrated Circuit Card): A card or tag using the ISO 14443A interface, eg Mifare or NTAG203.
nivmukka 0:1026a98e87f4 15 *
nivmukka 0:1026a98e87f4 16 * The microcontroller and card reader uses SPI for communication.
nivmukka 0:1026a98e87f4 17 * The protocol is described in the MFRC522 datasheet: http://www.nxp.com/documents/data_sheet/MFRC522.pdf
nivmukka 0:1026a98e87f4 18 *
nivmukka 0:1026a98e87f4 19 * The card reader and the tags communicate using a 13.56MHz electromagnetic field.
nivmukka 0:1026a98e87f4 20 * The protocol is defined in ISO/IEC 14443-3 Identification cards -- Contactless integrated circuit cards -- Proximity cards -- Part 3: Initialization and anticollision".
nivmukka 0:1026a98e87f4 21 * A free version of the final draft can be found at http://wg8.de/wg8n1496_17n3613_Ballot_FCD14443-3.pdf
nivmukka 0:1026a98e87f4 22 * Details are found in chapter 6, Type A: Initialization and anticollision.
nivmukka 0:1026a98e87f4 23 *
nivmukka 0:1026a98e87f4 24 * If only the PICC UID is wanted, the above documents has all the needed information.
nivmukka 0:1026a98e87f4 25 * To read and write from MIFARE PICCs, the MIFARE protocol is used after the PICC has been selected.
nivmukka 0:1026a98e87f4 26 * The MIFARE Classic chips and protocol is described in the datasheets:
nivmukka 0:1026a98e87f4 27 * 1K: http://www.nxp.com/documents/data_sheet/MF1S503x.pdf
nivmukka 0:1026a98e87f4 28 * 4K: http://www.nxp.com/documents/data_sheet/MF1S703x.pdf
nivmukka 0:1026a98e87f4 29 * Mini: http://www.idcardmarket.com/download/mifare_S20_datasheet.pdf
nivmukka 0:1026a98e87f4 30 * The MIFARE Ultralight chip and protocol is described in the datasheets:
nivmukka 0:1026a98e87f4 31 * Ultralight: http://www.nxp.com/documents/data_sheet/MF0ICU1.pdf
nivmukka 0:1026a98e87f4 32 * Ultralight C: http://www.nxp.com/documents/short_data_sheet/MF0ICU2_SDS.pdf
nivmukka 0:1026a98e87f4 33 *
nivmukka 0:1026a98e87f4 34 * MIFARE Classic 1K (MF1S503x):
nivmukka 0:1026a98e87f4 35 * Has 16 sectors * 4 blocks/sector * 16 bytes/block = 1024 bytes.
nivmukka 0:1026a98e87f4 36 * The blocks are numbered 0-63.
nivmukka 0:1026a98e87f4 37 * Block 3 in each sector is the Sector Trailer. See http://www.nxp.com/documents/data_sheet/MF1S503x.pdf sections 8.6 and 8.7:
nivmukka 0:1026a98e87f4 38 * Bytes 0-5: Key A
nivmukka 0:1026a98e87f4 39 * Bytes 6-8: Access Bits
nivmukka 0:1026a98e87f4 40 * Bytes 9: User data
nivmukka 0:1026a98e87f4 41 * Bytes 10-15: Key B (or user data)
nivmukka 0:1026a98e87f4 42 * Block 0 is read only manufacturer data.
nivmukka 0:1026a98e87f4 43 * To access a block, an authentication using a key from the block's sector must be performed first.
nivmukka 0:1026a98e87f4 44 * Example: To read from block 10, first authenticate using a key from sector 3 (blocks 8-11).
nivmukka 0:1026a98e87f4 45 * All keys are set to FFFFFFFFFFFFh at chip delivery.
nivmukka 0:1026a98e87f4 46 * Warning: Please read section 8.7 "Memory Access". It includes this text: if the PICC detects a format violation the whole sector is irreversibly blocked.
nivmukka 0:1026a98e87f4 47 * To use a block in "value block" mode (for Increment/Decrement operations) you need to change the sector trailer. Use PICC_SetAccessBits() to calculate the bit patterns.
nivmukka 0:1026a98e87f4 48 * MIFARE Classic 4K (MF1S703x):
nivmukka 0:1026a98e87f4 49 * Has (32 sectors * 4 blocks/sector + 8 sectors * 16 blocks/sector) * 16 bytes/block = 4096 bytes.
nivmukka 0:1026a98e87f4 50 * The blocks are numbered 0-255.
nivmukka 0:1026a98e87f4 51 * The last block in each sector is the Sector Trailer like above.
nivmukka 0:1026a98e87f4 52 * MIFARE Classic Mini (MF1 IC S20):
nivmukka 0:1026a98e87f4 53 * Has 5 sectors * 4 blocks/sector * 16 bytes/block = 320 bytes.
nivmukka 0:1026a98e87f4 54 * The blocks are numbered 0-19.
nivmukka 0:1026a98e87f4 55 * The last block in each sector is the Sector Trailer like above.
nivmukka 0:1026a98e87f4 56 *
nivmukka 0:1026a98e87f4 57 * MIFARE Ultralight (MF0ICU1):
nivmukka 0:1026a98e87f4 58 * Has 16 pages of 4 bytes = 64 bytes.
nivmukka 0:1026a98e87f4 59 * Pages 0 + 1 is used for the 7-byte UID.
nivmukka 0:1026a98e87f4 60 * Page 2 contains the last chech digit for the UID, one byte manufacturer internal data, and the lock bytes (see http://www.nxp.com/documents/data_sheet/MF0ICU1.pdf section 8.5.2)
nivmukka 0:1026a98e87f4 61 * Page 3 is OTP, One Time Programmable bits. Once set to 1 they cannot revert to 0.
nivmukka 0:1026a98e87f4 62 * Pages 4-15 are read/write unless blocked by the lock bytes in page 2.
nivmukka 0:1026a98e87f4 63 * MIFARE Ultralight C (MF0ICU2):
nivmukka 0:1026a98e87f4 64 * Has 48 pages of 4 bytes = 64 bytes.
nivmukka 0:1026a98e87f4 65 * Pages 0 + 1 is used for the 7-byte UID.
nivmukka 0:1026a98e87f4 66 * Page 2 contains the last chech digit for the UID, one byte manufacturer internal data, and the lock bytes (see http://www.nxp.com/documents/data_sheet/MF0ICU1.pdf section 8.5.2)
nivmukka 0:1026a98e87f4 67 * Page 3 is OTP, One Time Programmable bits. Once set to 1 they cannot revert to 0.
nivmukka 0:1026a98e87f4 68 * Pages 4-39 are read/write unless blocked by the lock bytes in page 2.
nivmukka 0:1026a98e87f4 69 * Page 40 Lock bytes
nivmukka 0:1026a98e87f4 70 * Page 41 16 bit one way counter
nivmukka 0:1026a98e87f4 71 * Pages 42-43 Authentication configuration
nivmukka 0:1026a98e87f4 72 * Pages 44-47 Authentication key
nivmukka 0:1026a98e87f4 73 */
nivmukka 0:1026a98e87f4 74 #ifndef MFRC522_h
nivmukka 0:1026a98e87f4 75 #define MFRC522_h
nivmukka 0:1026a98e87f4 76
nivmukka 0:1026a98e87f4 77 #include "mbed.h"
nivmukka 0:1026a98e87f4 78
nivmukka 0:1026a98e87f4 79 class MFRC522 {
nivmukka 0:1026a98e87f4 80 public:
nivmukka 0:1026a98e87f4 81
nivmukka 0:1026a98e87f4 82 /**
nivmukka 0:1026a98e87f4 83 * MFRC522 registers (described in chapter 9 of the datasheet).
nivmukka 0:1026a98e87f4 84 * When using SPI all addresses are shifted one bit left in the "SPI address byte" (section 8.1.2.3)
nivmukka 0:1026a98e87f4 85 */
nivmukka 0:1026a98e87f4 86 enum PCD_Register {
nivmukka 0:1026a98e87f4 87 // Page 0: Command and status
nivmukka 0:1026a98e87f4 88 // 0x00 // reserved for future use
nivmukka 0:1026a98e87f4 89 CommandReg = 0x01 << 1, // starts and stops command execution
nivmukka 0:1026a98e87f4 90 ComIEnReg = 0x02 << 1, // enable and disable interrupt request control bits
nivmukka 0:1026a98e87f4 91 DivIEnReg = 0x03 << 1, // enable and disable interrupt request control bits
nivmukka 0:1026a98e87f4 92 ComIrqReg = 0x04 << 1, // interrupt request bits
nivmukka 0:1026a98e87f4 93 DivIrqReg = 0x05 << 1, // interrupt request bits
nivmukka 0:1026a98e87f4 94 ErrorReg = 0x06 << 1, // error bits showing the error status of the last command executed
nivmukka 0:1026a98e87f4 95 Status1Reg = 0x07 << 1, // communication status bits
nivmukka 0:1026a98e87f4 96 Status2Reg = 0x08 << 1, // receiver and transmitter status bits
nivmukka 0:1026a98e87f4 97 FIFODataReg = 0x09 << 1, // input and output of 64 byte FIFO buffer
nivmukka 0:1026a98e87f4 98 FIFOLevelReg = 0x0A << 1, // number of bytes stored in the FIFO buffer
nivmukka 0:1026a98e87f4 99 WaterLevelReg = 0x0B << 1, // level for FIFO underflow and overflow warning
nivmukka 0:1026a98e87f4 100 ControlReg = 0x0C << 1, // miscellaneous control registers
nivmukka 0:1026a98e87f4 101 BitFramingReg = 0x0D << 1, // adjustments for bit-oriented frames
nivmukka 0:1026a98e87f4 102 CollReg = 0x0E << 1, // bit position of the first bit-collision detected on the RF interface
nivmukka 0:1026a98e87f4 103 // 0x0F // reserved for future use
nivmukka 0:1026a98e87f4 104
nivmukka 0:1026a98e87f4 105 // Page 1:Command
nivmukka 0:1026a98e87f4 106 // 0x10 // reserved for future use
nivmukka 0:1026a98e87f4 107 ModeReg = 0x11 << 1, // defines general modes for transmitting and receiving
nivmukka 0:1026a98e87f4 108 TxModeReg = 0x12 << 1, // defines transmission data rate and framing
nivmukka 0:1026a98e87f4 109 RxModeReg = 0x13 << 1, // defines reception data rate and framing
nivmukka 0:1026a98e87f4 110 TxControlReg = 0x14 << 1, // controls the logical behavior of the antenna driver pins TX1 and TX2
nivmukka 0:1026a98e87f4 111 TxASKReg = 0x15 << 1, // controls the setting of the transmission modulation
nivmukka 0:1026a98e87f4 112 TxSelReg = 0x16 << 1, // selects the internal sources for the antenna driver
nivmukka 0:1026a98e87f4 113 RxSelReg = 0x17 << 1, // selects internal receiver settings
nivmukka 0:1026a98e87f4 114 RxThresholdReg = 0x18 << 1, // selects thresholds for the bit decoder
nivmukka 0:1026a98e87f4 115 DemodReg = 0x19 << 1, // defines demodulator settings
nivmukka 0:1026a98e87f4 116 // 0x1A // reserved for future use
nivmukka 0:1026a98e87f4 117 // 0x1B // reserved for future use
nivmukka 0:1026a98e87f4 118 MfTxReg = 0x1C << 1, // controls some MIFARE communication transmit parameters
nivmukka 0:1026a98e87f4 119 MfRxReg = 0x1D << 1, // controls some MIFARE communication receive parameters
nivmukka 0:1026a98e87f4 120 // 0x1E // reserved for future use
nivmukka 0:1026a98e87f4 121 SerialSpeedReg = 0x1F << 1, // selects the speed of the serial UART interface
nivmukka 0:1026a98e87f4 122
nivmukka 0:1026a98e87f4 123 // Page 2: Configuration
nivmukka 0:1026a98e87f4 124 // 0x20 // reserved for future use
nivmukka 0:1026a98e87f4 125 CRCResultRegH = 0x21 << 1, // shows the MSB and LSB values of the CRC calculation
nivmukka 0:1026a98e87f4 126 CRCResultRegL = 0x22 << 1,
nivmukka 0:1026a98e87f4 127 // 0x23 // reserved for future use
nivmukka 0:1026a98e87f4 128 ModWidthReg = 0x24 << 1, // controls the ModWidth setting?
nivmukka 0:1026a98e87f4 129 // 0x25 // reserved for future use
nivmukka 0:1026a98e87f4 130 RFCfgReg = 0x26 << 1, // configures the receiver gain
nivmukka 0:1026a98e87f4 131 GsNReg = 0x27 << 1, // selects the conductance of the antenna driver pins TX1 and TX2 for modulation
nivmukka 0:1026a98e87f4 132 CWGsPReg = 0x28 << 1, // defines the conductance of the p-driver output during periods of no modulation
nivmukka 0:1026a98e87f4 133 ModGsPReg = 0x29 << 1, // defines the conductance of the p-driver output during periods of modulation
nivmukka 0:1026a98e87f4 134 TModeReg = 0x2A << 1, // defines settings for the internal timer
nivmukka 0:1026a98e87f4 135 TPrescalerReg = 0x2B << 1, // the lower 8 bits of the TPrescaler value. The 4 high bits are in TModeReg.
nivmukka 0:1026a98e87f4 136 TReloadRegH = 0x2C << 1, // defines the 16-bit timer reload value
nivmukka 0:1026a98e87f4 137 TReloadRegL = 0x2D << 1,
nivmukka 0:1026a98e87f4 138 TCntValueRegH = 0x2E << 1, // shows the 16-bit timer value
nivmukka 0:1026a98e87f4 139 TCntValueRegL = 0x2F << 1,
nivmukka 0:1026a98e87f4 140
nivmukka 0:1026a98e87f4 141 // Page 3:Test Registers
nivmukka 0:1026a98e87f4 142 // 0x30 // reserved for future use
nivmukka 0:1026a98e87f4 143 TestSel1Reg = 0x31 << 1, // general test signal configuration
nivmukka 0:1026a98e87f4 144 TestSel2Reg = 0x32 << 1, // general test signal configuration
nivmukka 0:1026a98e87f4 145 TestPinEnReg = 0x33 << 1, // enables pin output driver on pins D1 to D7
nivmukka 0:1026a98e87f4 146 TestPinValueReg = 0x34 << 1, // defines the values for D1 to D7 when it is used as an I/O bus
nivmukka 0:1026a98e87f4 147 TestBusReg = 0x35 << 1, // shows the status of the internal test bus
nivmukka 0:1026a98e87f4 148 AutoTestReg = 0x36 << 1, // controls the digital self test
nivmukka 0:1026a98e87f4 149 VersionReg = 0x37 << 1, // shows the software version
nivmukka 0:1026a98e87f4 150 AnalogTestReg = 0x38 << 1, // controls the pins AUX1 and AUX2
nivmukka 0:1026a98e87f4 151 TestDAC1Reg = 0x39 << 1, // defines the test value for TestDAC1
nivmukka 0:1026a98e87f4 152 TestDAC2Reg = 0x3A << 1, // defines the test value for TestDAC2
nivmukka 0:1026a98e87f4 153 TestADCReg = 0x3B << 1 // shows the value of ADC I and Q channels
nivmukka 0:1026a98e87f4 154 // 0x3C // reserved for production tests
nivmukka 0:1026a98e87f4 155 // 0x3D // reserved for production tests
nivmukka 0:1026a98e87f4 156 // 0x3E // reserved for production tests
nivmukka 0:1026a98e87f4 157 // 0x3F // reserved for production tests
nivmukka 0:1026a98e87f4 158 };
nivmukka 0:1026a98e87f4 159
nivmukka 0:1026a98e87f4 160 // MFRC522 commands Described in chapter 10 of the datasheet.
nivmukka 0:1026a98e87f4 161 enum PCD_Command {
nivmukka 0:1026a98e87f4 162 PCD_Idle = 0x00, // no action, cancels current command execution
nivmukka 0:1026a98e87f4 163 PCD_Mem = 0x01, // stores 25 bytes into the internal buffer
nivmukka 0:1026a98e87f4 164 PCD_GenerateRandomID = 0x02, // generates a 10-byte random ID number
nivmukka 0:1026a98e87f4 165 PCD_CalcCRC = 0x03, // activates the CRC coprocessor or performs a self test
nivmukka 0:1026a98e87f4 166 PCD_Transmit = 0x04, // transmits data from the FIFO buffer
nivmukka 0:1026a98e87f4 167 PCD_NoCmdChange = 0x07, // no command change, can be used to modify the CommandReg register bits without affecting the command, for example, the PowerDown bit
nivmukka 0:1026a98e87f4 168 PCD_Receive = 0x08, // activates the receiver circuits
nivmukka 0:1026a98e87f4 169 PCD_Transceive = 0x0C, // transmits data from FIFO buffer to antenna and automatically activates the receiver after transmission
nivmukka 0:1026a98e87f4 170 PCD_MFAuthent = 0x0E, // performs the MIFARE standard authentication as a reader
nivmukka 0:1026a98e87f4 171 PCD_SoftReset = 0x0F // resets the MFRC522
nivmukka 0:1026a98e87f4 172 };
nivmukka 0:1026a98e87f4 173
nivmukka 0:1026a98e87f4 174 // Commands sent to the PICC.
nivmukka 0:1026a98e87f4 175 enum PICC_Command {
nivmukka 0:1026a98e87f4 176 // The commands used by the PCD to manage communication with several PICCs (ISO 14443-3, Type A, section 6.4)
nivmukka 0:1026a98e87f4 177 PICC_CMD_REQA = 0x26, // REQuest command, Type A. Invites PICCs in state IDLE to go to READY and prepare for anticollision or selection. 7 bit frame.
nivmukka 0:1026a98e87f4 178 PICC_CMD_WUPA = 0x52, // Wake-UP command, Type A. Invites PICCs in state IDLE and HALT to go to READY(*) and prepare for anticollision or selection. 7 bit frame.
nivmukka 0:1026a98e87f4 179 PICC_CMD_CT = 0x88, // Cascade Tag. Not really a command, but used during anti collision.
nivmukka 0:1026a98e87f4 180 PICC_CMD_SEL_CL1 = 0x93, // Anti collision/Select, Cascade Level 1
nivmukka 0:1026a98e87f4 181 PICC_CMD_SEL_CL2 = 0x95, // Anti collision/Select, Cascade Level 1
nivmukka 0:1026a98e87f4 182 PICC_CMD_SEL_CL3 = 0x97, // Anti collision/Select, Cascade Level 1
nivmukka 0:1026a98e87f4 183 PICC_CMD_HLTA = 0x50, // HaLT command, Type A. Instructs an ACTIVE PICC to go to state HALT.
nivmukka 0:1026a98e87f4 184
nivmukka 0:1026a98e87f4 185 // The commands used for MIFARE Classic (from http://www.nxp.com/documents/data_sheet/MF1S503x.pdf, Section 9)
nivmukka 0:1026a98e87f4 186 // Use PCD_MFAuthent to authenticate access to a sector, then use these commands to read/write/modify the blocks on the sector.
nivmukka 0:1026a98e87f4 187 // The read/write commands can also be used for MIFARE Ultralight.
nivmukka 0:1026a98e87f4 188 PICC_CMD_MF_AUTH_KEY_A = 0x60, // Perform authentication with Key A
nivmukka 0:1026a98e87f4 189 PICC_CMD_MF_AUTH_KEY_B = 0x61, // Perform authentication with Key B
nivmukka 0:1026a98e87f4 190 PICC_CMD_MF_READ = 0x30, // Reads one 16 byte block from the authenticated sector of the PICC. Also used for MIFARE Ultralight.
nivmukka 0:1026a98e87f4 191 PICC_CMD_MF_WRITE = 0xA0, // Writes one 16 byte block to the authenticated sector of the PICC. Called "COMPATIBILITY WRITE" for MIFARE Ultralight.
nivmukka 0:1026a98e87f4 192 PICC_CMD_MF_DECREMENT = 0xC0, // Decrements the contents of a block and stores the result in the internal data register.
nivmukka 0:1026a98e87f4 193 PICC_CMD_MF_INCREMENT = 0xC1, // Increments the contents of a block and stores the result in the internal data register.
nivmukka 0:1026a98e87f4 194 PICC_CMD_MF_RESTORE = 0xC2, // Reads the contents of a block into the internal data register.
nivmukka 0:1026a98e87f4 195 PICC_CMD_MF_TRANSFER = 0xB0, // Writes the contents of the internal data register to a block.
nivmukka 0:1026a98e87f4 196
nivmukka 0:1026a98e87f4 197 // The commands used for MIFARE Ultralight (from http://www.nxp.com/documents/data_sheet/MF0ICU1.pdf, Section 8.6)
nivmukka 0:1026a98e87f4 198 // The PICC_CMD_MF_READ and PICC_CMD_MF_WRITE can also be used for MIFARE Ultralight.
nivmukka 0:1026a98e87f4 199 PICC_CMD_UL_WRITE = 0xA2 // Writes one 4 byte page to the PICC.
nivmukka 0:1026a98e87f4 200 };
nivmukka 0:1026a98e87f4 201
nivmukka 0:1026a98e87f4 202 // MIFARE constants that does not fit anywhere else
nivmukka 0:1026a98e87f4 203 enum MIFARE_Misc {
nivmukka 0:1026a98e87f4 204 MF_ACK = 0xA, // The MIFARE Classic uses a 4 bit ACK/NAK. Any other value than 0xA is NAK.
nivmukka 0:1026a98e87f4 205 MF_KEY_SIZE = 6 // A Mifare Crypto1 key is 6 bytes.
nivmukka 0:1026a98e87f4 206 };
nivmukka 0:1026a98e87f4 207
nivmukka 0:1026a98e87f4 208 // PICC types we can detect. Remember to update PICC_GetTypeName() if you add more.
nivmukka 0:1026a98e87f4 209 enum PICC_Type {
nivmukka 0:1026a98e87f4 210 PICC_TYPE_UNKNOWN = 0,
nivmukka 0:1026a98e87f4 211 PICC_TYPE_ISO_14443_4 = 1, // PICC compliant with ISO/IEC 14443-4
nivmukka 0:1026a98e87f4 212 PICC_TYPE_ISO_18092 = 2, // PICC compliant with ISO/IEC 18092 (NFC)
nivmukka 0:1026a98e87f4 213 PICC_TYPE_MIFARE_MINI = 3, // MIFARE Classic protocol, 320 bytes
nivmukka 0:1026a98e87f4 214 PICC_TYPE_MIFARE_1K = 4, // MIFARE Classic protocol, 1KB
nivmukka 0:1026a98e87f4 215 PICC_TYPE_MIFARE_4K = 5, // MIFARE Classic protocol, 4KB
nivmukka 0:1026a98e87f4 216 PICC_TYPE_MIFARE_UL = 6, // MIFARE Ultralight or Ultralight C
nivmukka 0:1026a98e87f4 217 PICC_TYPE_MIFARE_PLUS = 7, // MIFARE Plus
nivmukka 0:1026a98e87f4 218 PICC_TYPE_TNP3XXX = 8, // Only mentioned in NXP AN 10833 MIFARE Type Identification Procedure
nivmukka 0:1026a98e87f4 219 PICC_TYPE_NOT_COMPLETE = 255 // SAK indicates UID is not complete.
nivmukka 0:1026a98e87f4 220 };
nivmukka 0:1026a98e87f4 221
nivmukka 0:1026a98e87f4 222 // Return codes from the functions in this class. Remember to update GetStatusCodeName() if you add more.
nivmukka 0:1026a98e87f4 223 enum StatusCode {
nivmukka 0:1026a98e87f4 224 STATUS_OK = 1, // Success
nivmukka 0:1026a98e87f4 225 STATUS_ERROR = 2, // Error in communication
nivmukka 0:1026a98e87f4 226 STATUS_COLLISION = 3, // Collision detected
nivmukka 0:1026a98e87f4 227 STATUS_TIMEOUT = 4, // Timeout in communication.
nivmukka 0:1026a98e87f4 228 STATUS_NO_ROOM = 5, // A buffer is not big enough.
nivmukka 0:1026a98e87f4 229 STATUS_INTERNAL_ERROR = 6, // Internal error in the code. Should not happen ;-)
nivmukka 0:1026a98e87f4 230 STATUS_INVALID = 7, // Invalid argument.
nivmukka 0:1026a98e87f4 231 STATUS_CRC_WRONG = 8, // The CRC_A does not match
nivmukka 0:1026a98e87f4 232 STATUS_MIFARE_NACK = 9 // A MIFARE PICC responded with NAK.
nivmukka 0:1026a98e87f4 233 };
nivmukka 0:1026a98e87f4 234
nivmukka 0:1026a98e87f4 235 // A struct used for passing the UID of a PICC.
nivmukka 0:1026a98e87f4 236 typedef struct {
nivmukka 0:1026a98e87f4 237 uint8_t size; // Number of bytes in the UID. 4, 7 or 10.
nivmukka 0:1026a98e87f4 238 uint8_t uidByte[10];
nivmukka 0:1026a98e87f4 239 uint8_t sak; // The SAK (Select acknowledge) byte returned from the PICC after successful selection.
nivmukka 0:1026a98e87f4 240 } Uid;
nivmukka 0:1026a98e87f4 241
nivmukka 0:1026a98e87f4 242 // A struct used for passing a MIFARE Crypto1 key
nivmukka 0:1026a98e87f4 243 typedef struct {
nivmukka 0:1026a98e87f4 244 uint8_t keyByte[MF_KEY_SIZE];
nivmukka 0:1026a98e87f4 245 } MIFARE_Key;
nivmukka 0:1026a98e87f4 246
nivmukka 0:1026a98e87f4 247 // Member variables
nivmukka 0:1026a98e87f4 248 Uid uid; // Used by PICC_ReadCardSerial().
nivmukka 0:1026a98e87f4 249
nivmukka 0:1026a98e87f4 250 // Size of the MFRC522 FIFO
nivmukka 0:1026a98e87f4 251 static const uint8_t FIFO_SIZE = 64; // The FIFO is 64 bytes.
nivmukka 0:1026a98e87f4 252
nivmukka 0:1026a98e87f4 253 /**
nivmukka 0:1026a98e87f4 254 * MFRC522 constructor
nivmukka 0:1026a98e87f4 255 *
nivmukka 0:1026a98e87f4 256 * @param mosi SPI MOSI pin
nivmukka 0:1026a98e87f4 257 * @param miso SPI MISO pin
nivmukka 0:1026a98e87f4 258 * @param sclk SPI SCLK pin
nivmukka 0:1026a98e87f4 259 * @param cs SPI CS pin
nivmukka 0:1026a98e87f4 260 * @param reset Reset pin
nivmukka 0:1026a98e87f4 261 */
nivmukka 0:1026a98e87f4 262 MFRC522(PinName mosi, PinName miso, PinName sclk, PinName cs, PinName reset);
nivmukka 0:1026a98e87f4 263
nivmukka 0:1026a98e87f4 264 /**
nivmukka 0:1026a98e87f4 265 * MFRC522 destructor
nivmukka 0:1026a98e87f4 266 */
nivmukka 0:1026a98e87f4 267 ~MFRC522();
nivmukka 0:1026a98e87f4 268
nivmukka 0:1026a98e87f4 269
nivmukka 0:1026a98e87f4 270 // ************************************************************************************
nivmukka 0:1026a98e87f4 271 //! @name Functions for manipulating the MFRC522
nivmukka 0:1026a98e87f4 272 // ************************************************************************************
nivmukka 0:1026a98e87f4 273 //@{
nivmukka 0:1026a98e87f4 274
nivmukka 0:1026a98e87f4 275 /**
nivmukka 0:1026a98e87f4 276 * Initializes the MFRC522 chip.
nivmukka 0:1026a98e87f4 277 */
nivmukka 0:1026a98e87f4 278 void PCD_Init (void);
nivmukka 0:1026a98e87f4 279
nivmukka 0:1026a98e87f4 280 /**
nivmukka 0:1026a98e87f4 281 * Performs a soft reset on the MFRC522 chip and waits for it to be ready again.
nivmukka 0:1026a98e87f4 282 */
nivmukka 0:1026a98e87f4 283 void PCD_Reset (void);
nivmukka 0:1026a98e87f4 284
nivmukka 0:1026a98e87f4 285 /**
nivmukka 0:1026a98e87f4 286 * Turns the antenna on by enabling pins TX1 and TX2.
nivmukka 0:1026a98e87f4 287 * After a reset these pins disabled.
nivmukka 0:1026a98e87f4 288 */
nivmukka 0:1026a98e87f4 289 void PCD_AntennaOn (void);
nivmukka 0:1026a98e87f4 290
nivmukka 0:1026a98e87f4 291 /**
nivmukka 0:1026a98e87f4 292 * Writes a byte to the specified register in the MFRC522 chip.
nivmukka 0:1026a98e87f4 293 * The interface is described in the datasheet section 8.1.2.
nivmukka 0:1026a98e87f4 294 *
nivmukka 0:1026a98e87f4 295 * @param reg The register to write to. One of the PCD_Register enums.
nivmukka 0:1026a98e87f4 296 * @param value The value to write.
nivmukka 0:1026a98e87f4 297 */
nivmukka 0:1026a98e87f4 298 void PCD_WriteRegister (uint8_t reg, uint8_t value);
nivmukka 0:1026a98e87f4 299
nivmukka 0:1026a98e87f4 300 /**
nivmukka 0:1026a98e87f4 301 * Writes a number of bytes to the specified register in the MFRC522 chip.
nivmukka 0:1026a98e87f4 302 * The interface is described in the datasheet section 8.1.2.
nivmukka 0:1026a98e87f4 303 *
nivmukka 0:1026a98e87f4 304 * @param reg The register to write to. One of the PCD_Register enums.
nivmukka 0:1026a98e87f4 305 * @param count The number of bytes to write to the register
nivmukka 0:1026a98e87f4 306 * @param values The values to write. Byte array.
nivmukka 0:1026a98e87f4 307 */
nivmukka 0:1026a98e87f4 308 void PCD_WriteRegister (uint8_t reg, uint8_t count, uint8_t *values);
nivmukka 0:1026a98e87f4 309
nivmukka 0:1026a98e87f4 310 /**
nivmukka 0:1026a98e87f4 311 * Reads a byte from the specified register in the MFRC522 chip.
nivmukka 0:1026a98e87f4 312 * The interface is described in the datasheet section 8.1.2.
nivmukka 0:1026a98e87f4 313 *
nivmukka 0:1026a98e87f4 314 * @param reg The register to read from. One of the PCD_Register enums.
nivmukka 0:1026a98e87f4 315 * @returns Register value
nivmukka 0:1026a98e87f4 316 */
nivmukka 0:1026a98e87f4 317 uint8_t PCD_ReadRegister (uint8_t reg);
nivmukka 0:1026a98e87f4 318
nivmukka 0:1026a98e87f4 319 /**
nivmukka 0:1026a98e87f4 320 * Reads a number of bytes from the specified register in the MFRC522 chip.
nivmukka 0:1026a98e87f4 321 * The interface is described in the datasheet section 8.1.2.
nivmukka 0:1026a98e87f4 322 *
nivmukka 0:1026a98e87f4 323 * @param reg The register to read from. One of the PCD_Register enums.
nivmukka 0:1026a98e87f4 324 * @param count The number of bytes to read.
nivmukka 0:1026a98e87f4 325 * @param values Byte array to store the values in.
nivmukka 0:1026a98e87f4 326 * @param rxAlign Only bit positions rxAlign..7 in values[0] are updated.
nivmukka 0:1026a98e87f4 327 */
nivmukka 0:1026a98e87f4 328 void PCD_ReadRegister (uint8_t reg, uint8_t count, uint8_t *values, uint8_t rxAlign = 0);
nivmukka 0:1026a98e87f4 329
nivmukka 0:1026a98e87f4 330 /**
nivmukka 0:1026a98e87f4 331 * Sets the bits given in mask in register reg.
nivmukka 0:1026a98e87f4 332 *
nivmukka 0:1026a98e87f4 333 * @param reg The register to update. One of the PCD_Register enums.
nivmukka 0:1026a98e87f4 334 * @param mask The bits to set.
nivmukka 0:1026a98e87f4 335 */
nivmukka 0:1026a98e87f4 336 void PCD_SetRegisterBits(uint8_t reg, uint8_t mask);
nivmukka 0:1026a98e87f4 337
nivmukka 0:1026a98e87f4 338 /**
nivmukka 0:1026a98e87f4 339 * Clears the bits given in mask from register reg.
nivmukka 0:1026a98e87f4 340 *
nivmukka 0:1026a98e87f4 341 * @param reg The register to update. One of the PCD_Register enums.
nivmukka 0:1026a98e87f4 342 * @param mask The bits to clear.
nivmukka 0:1026a98e87f4 343 */
nivmukka 0:1026a98e87f4 344 void PCD_ClrRegisterBits(uint8_t reg, uint8_t mask);
nivmukka 0:1026a98e87f4 345
nivmukka 0:1026a98e87f4 346 /**
nivmukka 0:1026a98e87f4 347 * Use the CRC coprocessor in the MFRC522 to calculate a CRC_A.
nivmukka 0:1026a98e87f4 348 *
nivmukka 0:1026a98e87f4 349 * @param data Pointer to the data to transfer to the FIFO for CRC calculation.
nivmukka 0:1026a98e87f4 350 * @param length The number of bytes to transfer.
nivmukka 0:1026a98e87f4 351 * @param result Pointer to result buffer. Result is written to result[0..1], low byte first.
nivmukka 0:1026a98e87f4 352 * @return STATUS_OK on success, STATUS_??? otherwise.
nivmukka 0:1026a98e87f4 353 */
nivmukka 0:1026a98e87f4 354 uint8_t PCD_CalculateCRC (uint8_t *data, uint8_t length, uint8_t *result);
nivmukka 0:1026a98e87f4 355
nivmukka 0:1026a98e87f4 356 /**
nivmukka 0:1026a98e87f4 357 * Executes the Transceive command.
nivmukka 0:1026a98e87f4 358 * CRC validation can only be done if backData and backLen are specified.
nivmukka 0:1026a98e87f4 359 *
nivmukka 0:1026a98e87f4 360 * @param sendData Pointer to the data to transfer to the FIFO.
nivmukka 0:1026a98e87f4 361 * @param sendLen Number of bytes to transfer to the FIFO.
nivmukka 0:1026a98e87f4 362 * @param backData NULL or pointer to buffer if data should be read back after executing the command.
nivmukka 0:1026a98e87f4 363 * @param backLen Max number of bytes to write to *backData. Out: The number of bytes returned.
nivmukka 0:1026a98e87f4 364 * @param validBits The number of valid bits in the last byte. 0 for 8 valid bits. Default NULL.
nivmukka 0:1026a98e87f4 365 * @param rxAlign Defines the bit position in backData[0] for the first bit received. Default 0.
nivmukka 0:1026a98e87f4 366 * @param checkCRC True => The last two bytes of the response is assumed to be a CRC_A that must be validated.
nivmukka 0:1026a98e87f4 367 *
nivmukka 0:1026a98e87f4 368 * @return STATUS_OK on success, STATUS_??? otherwise.
nivmukka 0:1026a98e87f4 369 */
nivmukka 0:1026a98e87f4 370 uint8_t PCD_TransceiveData (uint8_t *sendData,
nivmukka 0:1026a98e87f4 371 uint8_t sendLen,
nivmukka 0:1026a98e87f4 372 uint8_t *backData,
nivmukka 0:1026a98e87f4 373 uint8_t *backLen,
nivmukka 0:1026a98e87f4 374 uint8_t *validBits = NULL,
nivmukka 0:1026a98e87f4 375 uint8_t rxAlign = 0,
nivmukka 0:1026a98e87f4 376 bool checkCRC = false);
nivmukka 0:1026a98e87f4 377
nivmukka 0:1026a98e87f4 378
nivmukka 0:1026a98e87f4 379 /**
nivmukka 0:1026a98e87f4 380 * Transfers data to the MFRC522 FIFO, executes a commend, waits for completion and transfers data back from the FIFO.
nivmukka 0:1026a98e87f4 381 * CRC validation can only be done if backData and backLen are specified.
nivmukka 0:1026a98e87f4 382 *
nivmukka 0:1026a98e87f4 383 * @param command The command to execute. One of the PCD_Command enums.
nivmukka 0:1026a98e87f4 384 * @param waitIRq The bits in the ComIrqReg register that signals successful completion of the command.
nivmukka 0:1026a98e87f4 385 * @param sendData Pointer to the data to transfer to the FIFO.
nivmukka 0:1026a98e87f4 386 * @param sendLen Number of bytes to transfer to the FIFO.
nivmukka 0:1026a98e87f4 387 * @param backData NULL or pointer to buffer if data should be read back after executing the command.
nivmukka 0:1026a98e87f4 388 * @param backLen In: Max number of bytes to write to *backData. Out: The number of bytes returned.
nivmukka 0:1026a98e87f4 389 * @param validBits In/Out: The number of valid bits in the last byte. 0 for 8 valid bits.
nivmukka 0:1026a98e87f4 390 * @param rxAlign In: Defines the bit position in backData[0] for the first bit received. Default 0.
nivmukka 0:1026a98e87f4 391 * @param checkCRC In: True => The last two bytes of the response is assumed to be a CRC_A that must be validated.
nivmukka 0:1026a98e87f4 392 *
nivmukka 0:1026a98e87f4 393 * @return STATUS_OK on success, STATUS_??? otherwise.
nivmukka 0:1026a98e87f4 394 */
nivmukka 0:1026a98e87f4 395 uint8_t PCD_CommunicateWithPICC(uint8_t command,
nivmukka 0:1026a98e87f4 396 uint8_t waitIRq,
nivmukka 0:1026a98e87f4 397 uint8_t *sendData,
nivmukka 0:1026a98e87f4 398 uint8_t sendLen,
nivmukka 0:1026a98e87f4 399 uint8_t *backData = NULL,
nivmukka 0:1026a98e87f4 400 uint8_t *backLen = NULL,
nivmukka 0:1026a98e87f4 401 uint8_t *validBits = NULL,
nivmukka 0:1026a98e87f4 402 uint8_t rxAlign = 0,
nivmukka 0:1026a98e87f4 403 bool checkCRC = false);
nivmukka 0:1026a98e87f4 404
nivmukka 0:1026a98e87f4 405 /**
nivmukka 0:1026a98e87f4 406 * Transmits a REQuest command, Type A. Invites PICCs in state IDLE to go to READY and prepare for anticollision or selection. 7 bit frame.
nivmukka 0:1026a98e87f4 407 * Beware: When two PICCs are in the field at the same time I often get STATUS_TIMEOUT - probably due do bad antenna design.
nivmukka 0:1026a98e87f4 408 *
nivmukka 0:1026a98e87f4 409 * @param bufferATQA The buffer to store the ATQA (Answer to request) in
nivmukka 0:1026a98e87f4 410 * @param bufferSize Buffer size, at least two bytes. Also number of bytes returned if STATUS_OK.
nivmukka 0:1026a98e87f4 411 *
nivmukka 0:1026a98e87f4 412 * @return STATUS_OK on success, STATUS_??? otherwise.
nivmukka 0:1026a98e87f4 413 */
nivmukka 0:1026a98e87f4 414 uint8_t PICC_RequestA (uint8_t *bufferATQA, uint8_t *bufferSize);
nivmukka 0:1026a98e87f4 415
nivmukka 0:1026a98e87f4 416 /**
nivmukka 0:1026a98e87f4 417 * Transmits a Wake-UP command, Type A. Invites PICCs in state IDLE and HALT to go to READY(*) and prepare for anticollision or selection. 7 bit frame.
nivmukka 0:1026a98e87f4 418 * Beware: When two PICCs are in the field at the same time I often get STATUS_TIMEOUT - probably due do bad antenna design.
nivmukka 0:1026a98e87f4 419 *
nivmukka 0:1026a98e87f4 420 * @param bufferATQA The buffer to store the ATQA (Answer to request) in
nivmukka 0:1026a98e87f4 421 * @param bufferSize Buffer size, at least two bytes. Also number of bytes returned if STATUS_OK.
nivmukka 0:1026a98e87f4 422 *
nivmukka 0:1026a98e87f4 423 * @return STATUS_OK on success, STATUS_??? otherwise.
nivmukka 0:1026a98e87f4 424 */
nivmukka 0:1026a98e87f4 425 uint8_t PICC_WakeupA (uint8_t *bufferATQA, uint8_t *bufferSize);
nivmukka 0:1026a98e87f4 426
nivmukka 0:1026a98e87f4 427 /**
nivmukka 0:1026a98e87f4 428 * Transmits REQA or WUPA commands.
nivmukka 0:1026a98e87f4 429 * Beware: When two PICCs are in the field at the same time I often get STATUS_TIMEOUT - probably due do bad antenna design.
nivmukka 0:1026a98e87f4 430 *
nivmukka 0:1026a98e87f4 431 * @param command The command to send - PICC_CMD_REQA or PICC_CMD_WUPA
nivmukka 0:1026a98e87f4 432 * @param bufferATQA The buffer to store the ATQA (Answer to request) in
nivmukka 0:1026a98e87f4 433 * @param bufferSize Buffer size, at least two bytes. Also number of bytes returned if STATUS_OK.
nivmukka 0:1026a98e87f4 434 *
nivmukka 0:1026a98e87f4 435 * @return STATUS_OK on success, STATUS_??? otherwise.
nivmukka 0:1026a98e87f4 436 */
nivmukka 0:1026a98e87f4 437 uint8_t PICC_REQA_or_WUPA (uint8_t command, uint8_t *bufferATQA, uint8_t *bufferSize);
nivmukka 0:1026a98e87f4 438
nivmukka 0:1026a98e87f4 439 /**
nivmukka 0:1026a98e87f4 440 * Transmits SELECT/ANTICOLLISION commands to select a single PICC.
nivmukka 0:1026a98e87f4 441 * Before calling this function the PICCs must be placed in the READY(*) state by calling PICC_RequestA() or PICC_WakeupA().
nivmukka 0:1026a98e87f4 442 * On success:
nivmukka 0:1026a98e87f4 443 * - The chosen PICC is in state ACTIVE(*) and all other PICCs have returned to state IDLE/HALT. (Figure 7 of the ISO/IEC 14443-3 draft.)
nivmukka 0:1026a98e87f4 444 * - The UID size and value of the chosen PICC is returned in *uid along with the SAK.
nivmukka 0:1026a98e87f4 445 *
nivmukka 0:1026a98e87f4 446 * A PICC UID consists of 4, 7 or 10 bytes.
nivmukka 0:1026a98e87f4 447 * Only 4 bytes can be specified in a SELECT command, so for the longer UIDs two or three iterations are used:
nivmukka 0:1026a98e87f4 448 *
nivmukka 0:1026a98e87f4 449 * UID size Number of UID bytes Cascade levels Example of PICC
nivmukka 0:1026a98e87f4 450 * ======== =================== ============== ===============
nivmukka 0:1026a98e87f4 451 * single 4 1 MIFARE Classic
nivmukka 0:1026a98e87f4 452 * double 7 2 MIFARE Ultralight
nivmukka 0:1026a98e87f4 453 * triple 10 3 Not currently in use?
nivmukka 0:1026a98e87f4 454 *
nivmukka 0:1026a98e87f4 455 *
nivmukka 0:1026a98e87f4 456 * @param uid Pointer to Uid struct. Normally output, but can also be used to supply a known UID.
nivmukka 0:1026a98e87f4 457 * @param validBits The number of known UID bits supplied in *uid. Normally 0. If set you must also supply uid->size.
nivmukka 0:1026a98e87f4 458 *
nivmukka 0:1026a98e87f4 459 * @return STATUS_OK on success, STATUS_??? otherwise.
nivmukka 0:1026a98e87f4 460 */
nivmukka 0:1026a98e87f4 461 uint8_t PICC_Select (Uid *uid, uint8_t validBits = 0);
nivmukka 0:1026a98e87f4 462
nivmukka 0:1026a98e87f4 463 /**
nivmukka 0:1026a98e87f4 464 * Instructs a PICC in state ACTIVE(*) to go to state HALT.
nivmukka 0:1026a98e87f4 465 *
nivmukka 0:1026a98e87f4 466 * @return STATUS_OK on success, STATUS_??? otherwise.
nivmukka 0:1026a98e87f4 467 */
nivmukka 0:1026a98e87f4 468 uint8_t PICC_HaltA (void);
nivmukka 0:1026a98e87f4 469
nivmukka 0:1026a98e87f4 470 // ************************************************************************************
nivmukka 0:1026a98e87f4 471 //@}
nivmukka 0:1026a98e87f4 472
nivmukka 0:1026a98e87f4 473
nivmukka 0:1026a98e87f4 474 // ************************************************************************************
nivmukka 0:1026a98e87f4 475 //! @name Functions for communicating with MIFARE PICCs
nivmukka 0:1026a98e87f4 476 // ************************************************************************************
nivmukka 0:1026a98e87f4 477 //@{
nivmukka 0:1026a98e87f4 478
nivmukka 0:1026a98e87f4 479 /**
nivmukka 0:1026a98e87f4 480 * Executes the MFRC522 MFAuthent command.
nivmukka 0:1026a98e87f4 481 * This command manages MIFARE authentication to enable a secure communication to any MIFARE Mini, MIFARE 1K and MIFARE 4K card.
nivmukka 0:1026a98e87f4 482 * The authentication is described in the MFRC522 datasheet section 10.3.1.9 and http://www.nxp.com/documents/data_sheet/MF1S503x.pdf section 10.1.
nivmukka 0:1026a98e87f4 483 * For use with MIFARE Classic PICCs.
nivmukka 0:1026a98e87f4 484 * The PICC must be selected - ie in state ACTIVE(*) - before calling this function.
nivmukka 0:1026a98e87f4 485 * Remember to call PCD_StopCrypto1() after communicating with the authenticated PICC - otherwise no new communications can start.
nivmukka 0:1026a98e87f4 486 *
nivmukka 0:1026a98e87f4 487 * All keys are set to FFFFFFFFFFFFh at chip delivery.
nivmukka 0:1026a98e87f4 488 *
nivmukka 0:1026a98e87f4 489 * @param command PICC_CMD_MF_AUTH_KEY_A or PICC_CMD_MF_AUTH_KEY_B
nivmukka 0:1026a98e87f4 490 * @param blockAddr The block number. See numbering in the comments in the .h file.
nivmukka 0:1026a98e87f4 491 * @param key Pointer to the Crypteo1 key to use (6 bytes)
nivmukka 0:1026a98e87f4 492 * @param uid Pointer to Uid struct. The first 4 bytes of the UID is used.
nivmukka 0:1026a98e87f4 493 *
nivmukka 0:1026a98e87f4 494 * @return STATUS_OK on success, STATUS_??? otherwise. Probably STATUS_TIMEOUT if you supply the wrong key.
nivmukka 0:1026a98e87f4 495 */
nivmukka 0:1026a98e87f4 496 uint8_t PCD_Authenticate (uint8_t command, uint8_t blockAddr, MIFARE_Key *key, Uid *uid);
nivmukka 0:1026a98e87f4 497
nivmukka 0:1026a98e87f4 498 /**
nivmukka 0:1026a98e87f4 499 * Used to exit the PCD from its authenticated state.
nivmukka 0:1026a98e87f4 500 * Remember to call this function after communicating with an authenticated PICC - otherwise no new communications can start.
nivmukka 0:1026a98e87f4 501 */
nivmukka 0:1026a98e87f4 502 void PCD_StopCrypto1 (void);
nivmukka 0:1026a98e87f4 503
nivmukka 0:1026a98e87f4 504 /**
nivmukka 0:1026a98e87f4 505 * Reads 16 bytes (+ 2 bytes CRC_A) from the active PICC.
nivmukka 0:1026a98e87f4 506 *
nivmukka 0:1026a98e87f4 507 * For MIFARE Classic the sector containing the block must be authenticated before calling this function.
nivmukka 0:1026a98e87f4 508 *
nivmukka 0:1026a98e87f4 509 * For MIFARE Ultralight only addresses 00h to 0Fh are decoded.
nivmukka 0:1026a98e87f4 510 * The MF0ICU1 returns a NAK for higher addresses.
nivmukka 0:1026a98e87f4 511 * The MF0ICU1 responds to the READ command by sending 16 bytes starting from the page address defined by the command argument.
nivmukka 0:1026a98e87f4 512 * For example; if blockAddr is 03h then pages 03h, 04h, 05h, 06h are returned.
nivmukka 0:1026a98e87f4 513 * A roll-back is implemented: If blockAddr is 0Eh, then the contents of pages 0Eh, 0Fh, 00h and 01h are returned.
nivmukka 0:1026a98e87f4 514 *
nivmukka 0:1026a98e87f4 515 * The buffer must be at least 18 bytes because a CRC_A is also returned.
nivmukka 0:1026a98e87f4 516 * Checks the CRC_A before returning STATUS_OK.
nivmukka 0:1026a98e87f4 517 *
nivmukka 0:1026a98e87f4 518 * @param blockAddr MIFARE Classic: The block (0-0xff) number. MIFARE Ultralight: The first page to return data from.
nivmukka 0:1026a98e87f4 519 * @param buffer The buffer to store the data in
nivmukka 0:1026a98e87f4 520 * @param bufferSize Buffer size, at least 18 bytes. Also number of bytes returned if STATUS_OK.
nivmukka 0:1026a98e87f4 521 *
nivmukka 0:1026a98e87f4 522 * @return STATUS_OK on success, STATUS_??? otherwise.
nivmukka 0:1026a98e87f4 523 */
nivmukka 0:1026a98e87f4 524 uint8_t MIFARE_Read (uint8_t blockAddr, uint8_t *buffer, uint8_t *bufferSize);
nivmukka 0:1026a98e87f4 525
nivmukka 0:1026a98e87f4 526 /**
nivmukka 0:1026a98e87f4 527 * Writes 16 bytes to the active PICC.
nivmukka 0:1026a98e87f4 528 *
nivmukka 0:1026a98e87f4 529 * For MIFARE Classic the sector containing the block must be authenticated before calling this function.
nivmukka 0:1026a98e87f4 530 *
nivmukka 0:1026a98e87f4 531 * For MIFARE Ultralight the opretaion is called "COMPATIBILITY WRITE".
nivmukka 0:1026a98e87f4 532 * Even though 16 bytes are transferred to the Ultralight PICC, only the least significant 4 bytes (bytes 0 to 3)
nivmukka 0:1026a98e87f4 533 * are written to the specified address. It is recommended to set the remaining bytes 04h to 0Fh to all logic 0.
nivmukka 0:1026a98e87f4 534 *
nivmukka 0:1026a98e87f4 535 * @param blockAddr MIFARE Classic: The block (0-0xff) number. MIFARE Ultralight: The page (2-15) to write to.
nivmukka 0:1026a98e87f4 536 * @param buffer The 16 bytes to write to the PICC
nivmukka 0:1026a98e87f4 537 * @param bufferSize Buffer size, must be at least 16 bytes. Exactly 16 bytes are written.
nivmukka 0:1026a98e87f4 538 *
nivmukka 0:1026a98e87f4 539 * @return STATUS_OK on success, STATUS_??? otherwise.
nivmukka 0:1026a98e87f4 540 */
nivmukka 0:1026a98e87f4 541 uint8_t MIFARE_Write (uint8_t blockAddr, uint8_t *buffer, uint8_t bufferSize);
nivmukka 0:1026a98e87f4 542
nivmukka 0:1026a98e87f4 543 /**
nivmukka 0:1026a98e87f4 544 * Writes a 4 byte page to the active MIFARE Ultralight PICC.
nivmukka 0:1026a98e87f4 545 *
nivmukka 0:1026a98e87f4 546 * @param page The page (2-15) to write to.
nivmukka 0:1026a98e87f4 547 * @param buffer The 4 bytes to write to the PICC
nivmukka 0:1026a98e87f4 548 * @param bufferSize Buffer size, must be at least 4 bytes. Exactly 4 bytes are written.
nivmukka 0:1026a98e87f4 549 *
nivmukka 0:1026a98e87f4 550 * @return STATUS_OK on success, STATUS_??? otherwise.
nivmukka 0:1026a98e87f4 551 */
nivmukka 0:1026a98e87f4 552 uint8_t MIFARE_UltralightWrite(uint8_t page, uint8_t *buffer, uint8_t bufferSize);
nivmukka 0:1026a98e87f4 553
nivmukka 0:1026a98e87f4 554 /**
nivmukka 0:1026a98e87f4 555 * MIFARE Decrement subtracts the delta from the value of the addressed block, and stores the result in a volatile memory.
nivmukka 0:1026a98e87f4 556 * For MIFARE Classic only. The sector containing the block must be authenticated before calling this function.
nivmukka 0:1026a98e87f4 557 * Only for blocks in "value block" mode, ie with access bits [C1 C2 C3] = [110] or [001].
nivmukka 0:1026a98e87f4 558 * Use MIFARE_Transfer() to store the result in a block.
nivmukka 0:1026a98e87f4 559 *
nivmukka 0:1026a98e87f4 560 * @param blockAddr The block (0-0xff) number.
nivmukka 0:1026a98e87f4 561 * @param delta This number is subtracted from the value of block blockAddr.
nivmukka 0:1026a98e87f4 562 *
nivmukka 0:1026a98e87f4 563 * @return STATUS_OK on success, STATUS_??? otherwise.
nivmukka 0:1026a98e87f4 564 */
nivmukka 0:1026a98e87f4 565 uint8_t MIFARE_Decrement (uint8_t blockAddr, uint32_t delta);
nivmukka 0:1026a98e87f4 566
nivmukka 0:1026a98e87f4 567 /**
nivmukka 0:1026a98e87f4 568 * MIFARE Increment adds the delta to the value of the addressed block, and stores the result in a volatile memory.
nivmukka 0:1026a98e87f4 569 * For MIFARE Classic only. The sector containing the block must be authenticated before calling this function.
nivmukka 0:1026a98e87f4 570 * Only for blocks in "value block" mode, ie with access bits [C1 C2 C3] = [110] or [001].
nivmukka 0:1026a98e87f4 571 * Use MIFARE_Transfer() to store the result in a block.
nivmukka 0:1026a98e87f4 572 *
nivmukka 0:1026a98e87f4 573 * @param blockAddr The block (0-0xff) number.
nivmukka 0:1026a98e87f4 574 * @param delta This number is added to the value of block blockAddr.
nivmukka 0:1026a98e87f4 575 *
nivmukka 0:1026a98e87f4 576 * @return STATUS_OK on success, STATUS_??? otherwise.
nivmukka 0:1026a98e87f4 577 */
nivmukka 0:1026a98e87f4 578 uint8_t MIFARE_Increment (uint8_t blockAddr, uint32_t delta);
nivmukka 0:1026a98e87f4 579
nivmukka 0:1026a98e87f4 580 /**
nivmukka 0:1026a98e87f4 581 * MIFARE Restore copies the value of the addressed block into a volatile memory.
nivmukka 0:1026a98e87f4 582 * For MIFARE Classic only. The sector containing the block must be authenticated before calling this function.
nivmukka 0:1026a98e87f4 583 * Only for blocks in "value block" mode, ie with access bits [C1 C2 C3] = [110] or [001].
nivmukka 0:1026a98e87f4 584 * Use MIFARE_Transfer() to store the result in a block.
nivmukka 0:1026a98e87f4 585 *
nivmukka 0:1026a98e87f4 586 * @param blockAddr The block (0-0xff) number.
nivmukka 0:1026a98e87f4 587 *
nivmukka 0:1026a98e87f4 588 * @return STATUS_OK on success, STATUS_??? otherwise.
nivmukka 0:1026a98e87f4 589 */
nivmukka 0:1026a98e87f4 590 uint8_t MIFARE_Restore (uint8_t blockAddr);
nivmukka 0:1026a98e87f4 591
nivmukka 0:1026a98e87f4 592 /**
nivmukka 0:1026a98e87f4 593 * MIFARE Transfer writes the value stored in the volatile memory into one MIFARE Classic block.
nivmukka 0:1026a98e87f4 594 * For MIFARE Classic only. The sector containing the block must be authenticated before calling this function.
nivmukka 0:1026a98e87f4 595 * Only for blocks in "value block" mode, ie with access bits [C1 C2 C3] = [110] or [001].
nivmukka 0:1026a98e87f4 596 *
nivmukka 0:1026a98e87f4 597 * @param blockAddr The block (0-0xff) number.
nivmukka 0:1026a98e87f4 598 *
nivmukka 0:1026a98e87f4 599 * @return STATUS_OK on success, STATUS_??? otherwise.
nivmukka 0:1026a98e87f4 600 */
nivmukka 0:1026a98e87f4 601 uint8_t MIFARE_Transfer (uint8_t blockAddr);
nivmukka 0:1026a98e87f4 602
nivmukka 0:1026a98e87f4 603 // ************************************************************************************
nivmukka 0:1026a98e87f4 604 //@}
nivmukka 0:1026a98e87f4 605
nivmukka 0:1026a98e87f4 606
nivmukka 0:1026a98e87f4 607 // ************************************************************************************
nivmukka 0:1026a98e87f4 608 //! @name Support functions
nivmukka 0:1026a98e87f4 609 // ************************************************************************************
nivmukka 0:1026a98e87f4 610 //@{
nivmukka 0:1026a98e87f4 611
nivmukka 0:1026a98e87f4 612 /**
nivmukka 0:1026a98e87f4 613 * Wrapper for MIFARE protocol communication.
nivmukka 0:1026a98e87f4 614 * Adds CRC_A, executes the Transceive command and checks that the response is MF_ACK or a timeout.
nivmukka 0:1026a98e87f4 615 *
nivmukka 0:1026a98e87f4 616 * @param sendData Pointer to the data to transfer to the FIFO. Do NOT include the CRC_A.
nivmukka 0:1026a98e87f4 617 * @param sendLen Number of bytes in sendData.
nivmukka 0:1026a98e87f4 618 * @param acceptTimeout True => A timeout is also success
nivmukka 0:1026a98e87f4 619 *
nivmukka 0:1026a98e87f4 620 * @return STATUS_OK on success, STATUS_??? otherwise.
nivmukka 0:1026a98e87f4 621 */
nivmukka 0:1026a98e87f4 622 uint8_t PCD_MIFARE_Transceive(uint8_t *sendData, uint8_t sendLen, bool acceptTimeout = false);
nivmukka 0:1026a98e87f4 623
nivmukka 0:1026a98e87f4 624 /**
nivmukka 0:1026a98e87f4 625 * Translates the SAK (Select Acknowledge) to a PICC type.
nivmukka 0:1026a98e87f4 626 *
nivmukka 0:1026a98e87f4 627 * @param sak The SAK byte returned from PICC_Select().
nivmukka 0:1026a98e87f4 628 *
nivmukka 0:1026a98e87f4 629 * @return PICC_Type
nivmukka 0:1026a98e87f4 630 */
nivmukka 0:1026a98e87f4 631 uint8_t PICC_GetType (uint8_t sak);
nivmukka 0:1026a98e87f4 632
nivmukka 0:1026a98e87f4 633 /**
nivmukka 0:1026a98e87f4 634 * Returns a string pointer to the PICC type name.
nivmukka 0:1026a98e87f4 635 *
nivmukka 0:1026a98e87f4 636 * @param type One of the PICC_Type enums.
nivmukka 0:1026a98e87f4 637 *
nivmukka 0:1026a98e87f4 638 * @return A string pointer to the PICC type name.
nivmukka 0:1026a98e87f4 639 */
nivmukka 0:1026a98e87f4 640 char* PICC_GetTypeName (uint8_t type);
nivmukka 0:1026a98e87f4 641
nivmukka 0:1026a98e87f4 642 /**
nivmukka 0:1026a98e87f4 643 * Returns a string pointer to a status code name.
nivmukka 0:1026a98e87f4 644 *
nivmukka 0:1026a98e87f4 645 * @param code One of the StatusCode enums.
nivmukka 0:1026a98e87f4 646 *
nivmukka 0:1026a98e87f4 647 * @return A string pointer to a status code name.
nivmukka 0:1026a98e87f4 648 */
nivmukka 0:1026a98e87f4 649 char* GetStatusCodeName (uint8_t code);
nivmukka 0:1026a98e87f4 650
nivmukka 0:1026a98e87f4 651 /**
nivmukka 0:1026a98e87f4 652 * Calculates the bit pattern needed for the specified access bits. In the [C1 C2 C3] tupples C1 is MSB (=4) and C3 is LSB (=1).
nivmukka 0:1026a98e87f4 653 *
nivmukka 0:1026a98e87f4 654 * @param accessBitBuffer Pointer to byte 6, 7 and 8 in the sector trailer. Bytes [0..2] will be set.
nivmukka 0:1026a98e87f4 655 * @param g0 Access bits [C1 C2 C3] for block 0 (for sectors 0-31) or blocks 0-4 (for sectors 32-39)
nivmukka 0:1026a98e87f4 656 * @param g1 Access bits [C1 C2 C3] for block 1 (for sectors 0-31) or blocks 5-9 (for sectors 32-39)
nivmukka 0:1026a98e87f4 657 * @param g2 Access bits [C1 C2 C3] for block 2 (for sectors 0-31) or blocks 10-14 (for sectors 32-39)
nivmukka 0:1026a98e87f4 658 * @param g3 Access bits [C1 C2 C3] for the sector trailer, block 3 (for sectors 0-31) or block 15 (for sectors 32-39)
nivmukka 0:1026a98e87f4 659 */
nivmukka 0:1026a98e87f4 660 void MIFARE_SetAccessBits (uint8_t *accessBitBuffer,
nivmukka 0:1026a98e87f4 661 uint8_t g0,
nivmukka 0:1026a98e87f4 662 uint8_t g1,
nivmukka 0:1026a98e87f4 663 uint8_t g2,
nivmukka 0:1026a98e87f4 664 uint8_t g3);
nivmukka 0:1026a98e87f4 665
nivmukka 0:1026a98e87f4 666 // ************************************************************************************
nivmukka 0:1026a98e87f4 667 //@}
nivmukka 0:1026a98e87f4 668
nivmukka 0:1026a98e87f4 669
nivmukka 0:1026a98e87f4 670 // ************************************************************************************
nivmukka 0:1026a98e87f4 671 //! @name Convenience functions - does not add extra functionality
nivmukka 0:1026a98e87f4 672 // ************************************************************************************
nivmukka 0:1026a98e87f4 673 //@{
nivmukka 0:1026a98e87f4 674
nivmukka 0:1026a98e87f4 675 /**
nivmukka 0:1026a98e87f4 676 * Returns true if a PICC responds to PICC_CMD_REQA.
nivmukka 0:1026a98e87f4 677 * Only "new" cards in state IDLE are invited. Sleeping cards in state HALT are ignored.
nivmukka 0:1026a98e87f4 678 *
nivmukka 0:1026a98e87f4 679 * @return bool
nivmukka 0:1026a98e87f4 680 */
nivmukka 0:1026a98e87f4 681 bool PICC_IsNewCardPresent(void);
nivmukka 0:1026a98e87f4 682
nivmukka 0:1026a98e87f4 683 /**
nivmukka 0:1026a98e87f4 684 * Simple wrapper around PICC_Select.
nivmukka 0:1026a98e87f4 685 * Returns true if a UID could be read.
nivmukka 0:1026a98e87f4 686 * Remember to call PICC_IsNewCardPresent(), PICC_RequestA() or PICC_WakeupA() first.
nivmukka 0:1026a98e87f4 687 * The read UID is available in the class variable uid.
nivmukka 0:1026a98e87f4 688 *
nivmukka 0:1026a98e87f4 689 * @return bool
nivmukka 0:1026a98e87f4 690 */
nivmukka 0:1026a98e87f4 691 bool PICC_ReadCardSerial (void);
nivmukka 0:1026a98e87f4 692
nivmukka 0:1026a98e87f4 693 // ************************************************************************************
nivmukka 0:1026a98e87f4 694 //@}
nivmukka 0:1026a98e87f4 695
nivmukka 0:1026a98e87f4 696
nivmukka 0:1026a98e87f4 697 private:
nivmukka 0:1026a98e87f4 698 SPI m_SPI;
nivmukka 0:1026a98e87f4 699 DigitalOut m_CS;
nivmukka 0:1026a98e87f4 700 DigitalOut m_RESET;
nivmukka 0:1026a98e87f4 701
nivmukka 0:1026a98e87f4 702 /**
nivmukka 0:1026a98e87f4 703 * Helper function for the two-step MIFARE Classic protocol operations Decrement, Increment and Restore.
nivmukka 0:1026a98e87f4 704 *
nivmukka 0:1026a98e87f4 705 * @param command The command to use
nivmukka 0:1026a98e87f4 706 * @param blockAddr The block (0-0xff) number.
nivmukka 0:1026a98e87f4 707 * @param data The data to transfer in step 2
nivmukka 0:1026a98e87f4 708 *
nivmukka 0:1026a98e87f4 709 * @return STATUS_OK on success, STATUS_??? otherwise.
nivmukka 0:1026a98e87f4 710 */
nivmukka 0:1026a98e87f4 711 uint8_t MIFARE_TwoStepHelper(uint8_t command, uint8_t blockAddr, uint32_t data);
nivmukka 0:1026a98e87f4 712 };
nivmukka 0:1026a98e87f4 713
nivmukka 0:1026a98e87f4 714 #endif