Nitin Shukla / LED_Demo

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Dependencies:   MAX44000 nexpaq_mdk

Fork of LED_Demo by Maxim nexpaq

mbd_os/libraries/fs/sd/SDFileSystem.cpp@7:3a65ef12ba31, 2016-11-04 (annotated)

Committer:
nitsshukla
Date:
Fri Nov 04 12:06:04 2016 +0000
Revision:
7:3a65ef12ba31
Parent:
1:55a6170b404f 
kghj;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
nexpaq 1:55a6170b404f 1 /* mbed Microcontroller Library
nexpaq 1:55a6170b404f 2 * Copyright (c) 2006-2012 ARM Limited
nexpaq 1:55a6170b404f 3 *
nexpaq 1:55a6170b404f 4 * Permission is hereby granted, free of charge, to any person obtaining a copy
nexpaq 1:55a6170b404f 5 * of this software and associated documentation files (the "Software"), to deal
nexpaq 1:55a6170b404f 6 * in the Software without restriction, including without limitation the rights
nexpaq 1:55a6170b404f 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
nexpaq 1:55a6170b404f 8 * copies of the Software, and to permit persons to whom the Software is
nexpaq 1:55a6170b404f 9 * furnished to do so, subject to the following conditions:
nexpaq 1:55a6170b404f 10 *
nexpaq 1:55a6170b404f 11 * The above copyright notice and this permission notice shall be included in
nexpaq 1:55a6170b404f 12 * all copies or substantial portions of the Software.
nexpaq 1:55a6170b404f 13 *
nexpaq 1:55a6170b404f 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
nexpaq 1:55a6170b404f 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
nexpaq 1:55a6170b404f 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
nexpaq 1:55a6170b404f 17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
nexpaq 1:55a6170b404f 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
nexpaq 1:55a6170b404f 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
nexpaq 1:55a6170b404f 20 * SOFTWARE.
nexpaq 1:55a6170b404f 21 */
nexpaq 1:55a6170b404f 22 /* Introduction
nexpaq 1:55a6170b404f 23 * ------------
nexpaq 1:55a6170b404f 24 * SD and MMC cards support a number of interfaces, but common to them all
nexpaq 1:55a6170b404f 25 * is one based on SPI. This is the one I'm implmenting because it means
nexpaq 1:55a6170b404f 26 * it is much more portable even though not so performant, and we already
nexpaq 1:55a6170b404f 27 * have the mbed SPI Interface!
nexpaq 1:55a6170b404f 28 *
nexpaq 1:55a6170b404f 29 * The main reference I'm using is Chapter 7, "SPI Mode" of:
nexpaq 1:55a6170b404f 30 * http://www.sdcard.org/developers/tech/sdcard/pls/Simplified_Physical_Layer_Spec.pdf
nexpaq 1:55a6170b404f 31 *
nexpaq 1:55a6170b404f 32 * SPI Startup
nexpaq 1:55a6170b404f 33 * -----------
nexpaq 1:55a6170b404f 34 * The SD card powers up in SD mode. The SPI interface mode is selected by
nexpaq 1:55a6170b404f 35 * asserting CS low and sending the reset command (CMD0). The card will
nexpaq 1:55a6170b404f 36 * respond with a (R1) response.
nexpaq 1:55a6170b404f 37 *
nexpaq 1:55a6170b404f 38 * CMD8 is optionally sent to determine the voltage range supported, and
nexpaq 1:55a6170b404f 39 * indirectly determine whether it is a version 1.x SD/non-SD card or
nexpaq 1:55a6170b404f 40 * version 2.x. I'll just ignore this for now.
nexpaq 1:55a6170b404f 41 *
nexpaq 1:55a6170b404f 42 * ACMD41 is repeatedly issued to initialise the card, until "in idle"
nexpaq 1:55a6170b404f 43 * (bit 0) of the R1 response goes to '0', indicating it is initialised.
nexpaq 1:55a6170b404f 44 *
nexpaq 1:55a6170b404f 45 * You should also indicate whether the host supports High Capicity cards,
nexpaq 1:55a6170b404f 46 * and check whether the card is high capacity - i'll also ignore this
nexpaq 1:55a6170b404f 47 *
nexpaq 1:55a6170b404f 48 * SPI Protocol
nexpaq 1:55a6170b404f 49 * ------------
nexpaq 1:55a6170b404f 50 * The SD SPI protocol is based on transactions made up of 8-bit words, with
nexpaq 1:55a6170b404f 51 * the host starting every bus transaction by asserting the CS signal low. The
nexpaq 1:55a6170b404f 52 * card always responds to commands, data blocks and errors.
nexpaq 1:55a6170b404f 53 *
nexpaq 1:55a6170b404f 54 * The protocol supports a CRC, but by default it is off (except for the
nexpaq 1:55a6170b404f 55 * first reset CMD0, where the CRC can just be pre-calculated, and CMD8)
nexpaq 1:55a6170b404f 56 * I'll leave the CRC off I think!
nexpaq 1:55a6170b404f 57 *
nexpaq 1:55a6170b404f 58 * Standard capacity cards have variable data block sizes, whereas High
nexpaq 1:55a6170b404f 59 * Capacity cards fix the size of data block to 512 bytes. I'll therefore
nexpaq 1:55a6170b404f 60 * just always use the Standard Capacity cards with a block size of 512 bytes.
nexpaq 1:55a6170b404f 61 * This is set with CMD16.
nexpaq 1:55a6170b404f 62 *
nexpaq 1:55a6170b404f 63 * You can read and write single blocks (CMD17, CMD25) or multiple blocks
nexpaq 1:55a6170b404f 64 * (CMD18, CMD25). For simplicity, I'll just use single block accesses. When
nexpaq 1:55a6170b404f 65 * the card gets a read command, it responds with a response token, and then
nexpaq 1:55a6170b404f 66 * a data token or an error.
nexpaq 1:55a6170b404f 67 *
nexpaq 1:55a6170b404f 68 * SPI Command Format
nexpaq 1:55a6170b404f 69 * ------------------
nexpaq 1:55a6170b404f 70 * Commands are 6-bytes long, containing the command, 32-bit argument, and CRC.
nexpaq 1:55a6170b404f 71 *
nexpaq 1:55a6170b404f 72 * +---------------+------------+------------+-----------+----------+--------------+
nexpaq 1:55a6170b404f 73 * | 01 | cmd[5:0] | arg[31:24] | arg[23:16] | arg[15:8] | arg[7:0] | crc[6:0] | 1 |
nexpaq 1:55a6170b404f 74 * +---------------+------------+------------+-----------+----------+--------------+
nexpaq 1:55a6170b404f 75 *
nexpaq 1:55a6170b404f 76 * As I'm not using CRC, I can fix that byte to what is needed for CMD0 (0x95)
nexpaq 1:55a6170b404f 77 *
nexpaq 1:55a6170b404f 78 * All Application Specific commands shall be preceded with APP_CMD (CMD55).
nexpaq 1:55a6170b404f 79 *
nexpaq 1:55a6170b404f 80 * SPI Response Format
nexpaq 1:55a6170b404f 81 * -------------------
nexpaq 1:55a6170b404f 82 * The main response format (R1) is a status byte (normally zero). Key flags:
nexpaq 1:55a6170b404f 83 * idle - 1 if the card is in an idle state/initialising
nexpaq 1:55a6170b404f 84 * cmd - 1 if an illegal command code was detected
nexpaq 1:55a6170b404f 85 *
nexpaq 1:55a6170b404f 86 * +-------------------------------------------------+
nexpaq 1:55a6170b404f 87 * R1 | 0 | arg | addr | seq | crc | cmd | erase | idle |
nexpaq 1:55a6170b404f 88 * +-------------------------------------------------+
nexpaq 1:55a6170b404f 89 *
nexpaq 1:55a6170b404f 90 * R1b is the same, except it is followed by a busy signal (zeros) until
nexpaq 1:55a6170b404f 91 * the first non-zero byte when it is ready again.
nexpaq 1:55a6170b404f 92 *
nexpaq 1:55a6170b404f 93 * Data Response Token
nexpaq 1:55a6170b404f 94 * -------------------
nexpaq 1:55a6170b404f 95 * Every data block written to the card is acknowledged by a byte
nexpaq 1:55a6170b404f 96 * response token
nexpaq 1:55a6170b404f 97 *
nexpaq 1:55a6170b404f 98 * +----------------------+
nexpaq 1:55a6170b404f 99 * | xxx | 0 | status | 1 |
nexpaq 1:55a6170b404f 100 * +----------------------+
nexpaq 1:55a6170b404f 101 * 010 - OK!
nexpaq 1:55a6170b404f 102 * 101 - CRC Error
nexpaq 1:55a6170b404f 103 * 110 - Write Error
nexpaq 1:55a6170b404f 104 *
nexpaq 1:55a6170b404f 105 * Single Block Read and Write
nexpaq 1:55a6170b404f 106 * ---------------------------
nexpaq 1:55a6170b404f 107 *
nexpaq 1:55a6170b404f 108 * Block transfers have a byte header, followed by the data, followed
nexpaq 1:55a6170b404f 109 * by a 16-bit CRC. In our case, the data will always be 512 bytes.
nexpaq 1:55a6170b404f 110 *
nexpaq 1:55a6170b404f 111 * +------+---------+---------+- - - -+---------+-----------+----------+
nexpaq 1:55a6170b404f 112 * | 0xFE | data[0] | data[1] | | data[n] | crc[15:8] | crc[7:0] |
nexpaq 1:55a6170b404f 113 * +------+---------+---------+- - - -+---------+-----------+----------+
nexpaq 1:55a6170b404f 114 */
nexpaq 1:55a6170b404f 115 #include "SDFileSystem.h"
nexpaq 1:55a6170b404f 116 #include "mbed_debug.h"
nexpaq 1:55a6170b404f 117
nexpaq 1:55a6170b404f 118 #define SD_COMMAND_TIMEOUT 5000
nexpaq 1:55a6170b404f 119
nexpaq 1:55a6170b404f 120 #define SD_DBG 0
nexpaq 1:55a6170b404f 121
nexpaq 1:55a6170b404f 122 SDFileSystem::SDFileSystem(PinName mosi, PinName miso, PinName sclk, PinName cs, const char* name) :
nexpaq 1:55a6170b404f 123 FATFileSystem(name), _spi(mosi, miso, sclk), _cs(cs), _is_initialized(0) {
nexpaq 1:55a6170b404f 124 _cs = 1;
nexpaq 1:55a6170b404f 125
nexpaq 1:55a6170b404f 126 // Set default to 100kHz for initialisation and 1MHz for data transfer
nexpaq 1:55a6170b404f 127 _init_sck = 100000;
nexpaq 1:55a6170b404f 128 _transfer_sck = 1000000;
nexpaq 1:55a6170b404f 129 }
nexpaq 1:55a6170b404f 130
nexpaq 1:55a6170b404f 131 #define R1_IDLE_STATE (1 << 0)
nexpaq 1:55a6170b404f 132 #define R1_ERASE_RESET (1 << 1)
nexpaq 1:55a6170b404f 133 #define R1_ILLEGAL_COMMAND (1 << 2)
nexpaq 1:55a6170b404f 134 #define R1_COM_CRC_ERROR (1 << 3)
nexpaq 1:55a6170b404f 135 #define R1_ERASE_SEQUENCE_ERROR (1 << 4)
nexpaq 1:55a6170b404f 136 #define R1_ADDRESS_ERROR (1 << 5)
nexpaq 1:55a6170b404f 137 #define R1_PARAMETER_ERROR (1 << 6)
nexpaq 1:55a6170b404f 138
nexpaq 1:55a6170b404f 139 // Types
nexpaq 1:55a6170b404f 140 // - v1.x Standard Capacity
nexpaq 1:55a6170b404f 141 // - v2.x Standard Capacity
nexpaq 1:55a6170b404f 142 // - v2.x High Capacity
nexpaq 1:55a6170b404f 143 // - Not recognised as an SD Card
nexpaq 1:55a6170b404f 144 #define SDCARD_FAIL 0
nexpaq 1:55a6170b404f 145 #define SDCARD_V1 1
nexpaq 1:55a6170b404f 146 #define SDCARD_V2 2
nexpaq 1:55a6170b404f 147 #define SDCARD_V2HC 3
nexpaq 1:55a6170b404f 148
nexpaq 1:55a6170b404f 149 int SDFileSystem::initialise_card() {
nexpaq 1:55a6170b404f 150 // Set to SCK for initialisation, and clock card with cs = 1
nexpaq 1:55a6170b404f 151 _spi.lock();
nexpaq 1:55a6170b404f 152 _spi.frequency(_init_sck);
nexpaq 1:55a6170b404f 153 _cs = 1;
nexpaq 1:55a6170b404f 154 for (int i = 0; i < 16; i++) {
nexpaq 1:55a6170b404f 155 _spi.write(0xFF);
nexpaq 1:55a6170b404f 156 }
nexpaq 1:55a6170b404f 157 _spi.unlock();
nexpaq 1:55a6170b404f 158
nexpaq 1:55a6170b404f 159 // send CMD0, should return with all zeros except IDLE STATE set (bit 0)
nexpaq 1:55a6170b404f 160 if (_cmd(0, 0) != R1_IDLE_STATE) {
nexpaq 1:55a6170b404f 161 debug("No disk, or could not put SD card in to SPI idle state\n");
nexpaq 1:55a6170b404f 162 return SDCARD_FAIL;
nexpaq 1:55a6170b404f 163 }
nexpaq 1:55a6170b404f 164
nexpaq 1:55a6170b404f 165 // send CMD8 to determine whther it is ver 2.x
nexpaq 1:55a6170b404f 166 int r = _cmd8();
nexpaq 1:55a6170b404f 167 if (r == R1_IDLE_STATE) {
nexpaq 1:55a6170b404f 168 return initialise_card_v2();
nexpaq 1:55a6170b404f 169 } else if (r == (R1_IDLE_STATE | R1_ILLEGAL_COMMAND)) {
nexpaq 1:55a6170b404f 170 return initialise_card_v1();
nexpaq 1:55a6170b404f 171 } else {
nexpaq 1:55a6170b404f 172 debug("Not in idle state after sending CMD8 (not an SD card?)\n");
nexpaq 1:55a6170b404f 173 return SDCARD_FAIL;
nexpaq 1:55a6170b404f 174 }
nexpaq 1:55a6170b404f 175 }
nexpaq 1:55a6170b404f 176
nexpaq 1:55a6170b404f 177 int SDFileSystem::initialise_card_v1() {
nexpaq 1:55a6170b404f 178 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
nexpaq 1:55a6170b404f 179 _cmd(55, 0);
nexpaq 1:55a6170b404f 180 if (_cmd(41, 0) == 0) {
nexpaq 1:55a6170b404f 181 cdv = 512;
nexpaq 1:55a6170b404f 182 debug_if(SD_DBG, "\n\rInit: SEDCARD_V1\n\r");
nexpaq 1:55a6170b404f 183 return SDCARD_V1;
nexpaq 1:55a6170b404f 184 }
nexpaq 1:55a6170b404f 185 }
nexpaq 1:55a6170b404f 186
nexpaq 1:55a6170b404f 187 debug("Timeout waiting for v1.x card\n");
nexpaq 1:55a6170b404f 188 return SDCARD_FAIL;
nexpaq 1:55a6170b404f 189 }
nexpaq 1:55a6170b404f 190
nexpaq 1:55a6170b404f 191 int SDFileSystem::initialise_card_v2() {
nexpaq 1:55a6170b404f 192 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
nexpaq 1:55a6170b404f 193 wait_ms(50);
nexpaq 1:55a6170b404f 194 _cmd58();
nexpaq 1:55a6170b404f 195 _cmd(55, 0);
nexpaq 1:55a6170b404f 196 if (_cmd(41, 0x40000000) == 0) {
nexpaq 1:55a6170b404f 197 _cmd58();
nexpaq 1:55a6170b404f 198 debug_if(SD_DBG, "\n\rInit: SDCARD_V2\n\r");
nexpaq 1:55a6170b404f 199 cdv = 1;
nexpaq 1:55a6170b404f 200 return SDCARD_V2;
nexpaq 1:55a6170b404f 201 }
nexpaq 1:55a6170b404f 202 }
nexpaq 1:55a6170b404f 203
nexpaq 1:55a6170b404f 204 debug("Timeout waiting for v2.x card\n");
nexpaq 1:55a6170b404f 205 return SDCARD_FAIL;
nexpaq 1:55a6170b404f 206 }
nexpaq 1:55a6170b404f 207
nexpaq 1:55a6170b404f 208 int SDFileSystem::disk_initialize() {
nexpaq 1:55a6170b404f 209 lock();
nexpaq 1:55a6170b404f 210 _is_initialized = initialise_card();
nexpaq 1:55a6170b404f 211 if (_is_initialized == 0) {
nexpaq 1:55a6170b404f 212 debug("Fail to initialize card\n");
nexpaq 1:55a6170b404f 213 unlock();
nexpaq 1:55a6170b404f 214 return 1;
nexpaq 1:55a6170b404f 215 }
nexpaq 1:55a6170b404f 216 debug_if(SD_DBG, "init card = %d\n", _is_initialized);
nexpaq 1:55a6170b404f 217 _sectors = _sd_sectors();
nexpaq 1:55a6170b404f 218
nexpaq 1:55a6170b404f 219 // Set block length to 512 (CMD16)
nexpaq 1:55a6170b404f 220 if (_cmd(16, 512) != 0) {
nexpaq 1:55a6170b404f 221 debug("Set 512-byte block timed out\n");
nexpaq 1:55a6170b404f 222 unlock();
nexpaq 1:55a6170b404f 223 return 1;
nexpaq 1:55a6170b404f 224 }
nexpaq 1:55a6170b404f 225
nexpaq 1:55a6170b404f 226 // Set SCK for data transfer
nexpaq 1:55a6170b404f 227 _spi.frequency(_transfer_sck);
nexpaq 1:55a6170b404f 228 unlock();
nexpaq 1:55a6170b404f 229 return 0;
nexpaq 1:55a6170b404f 230 }
nexpaq 1:55a6170b404f 231
nexpaq 1:55a6170b404f 232 int SDFileSystem::disk_write(const uint8_t* buffer, uint32_t block_number, uint32_t count) {
nexpaq 1:55a6170b404f 233 lock();
nexpaq 1:55a6170b404f 234 if (!_is_initialized) {
nexpaq 1:55a6170b404f 235 unlock();
nexpaq 1:55a6170b404f 236 return -1;
nexpaq 1:55a6170b404f 237 }
nexpaq 1:55a6170b404f 238
nexpaq 1:55a6170b404f 239 for (uint32_t b = block_number; b < block_number + count; b++) {
nexpaq 1:55a6170b404f 240 // set write address for single block (CMD24)
nexpaq 1:55a6170b404f 241 if (_cmd(24, b * cdv) != 0) {
nexpaq 1:55a6170b404f 242 unlock();
nexpaq 1:55a6170b404f 243 return 1;
nexpaq 1:55a6170b404f 244 }
nexpaq 1:55a6170b404f 245
nexpaq 1:55a6170b404f 246 // send the data block
nexpaq 1:55a6170b404f 247 _write(buffer, 512);
nexpaq 1:55a6170b404f 248 buffer += 512;
nexpaq 1:55a6170b404f 249 }
nexpaq 1:55a6170b404f 250
nexpaq 1:55a6170b404f 251 unlock();
nexpaq 1:55a6170b404f 252 return 0;
nexpaq 1:55a6170b404f 253 }
nexpaq 1:55a6170b404f 254
nexpaq 1:55a6170b404f 255 int SDFileSystem::disk_read(uint8_t* buffer, uint32_t block_number, uint32_t count) {
nexpaq 1:55a6170b404f 256 lock();
nexpaq 1:55a6170b404f 257 if (!_is_initialized) {
nexpaq 1:55a6170b404f 258 unlock();
nexpaq 1:55a6170b404f 259 return -1;
nexpaq 1:55a6170b404f 260 }
nexpaq 1:55a6170b404f 261
nexpaq 1:55a6170b404f 262 for (uint32_t b = block_number; b < block_number + count; b++) {
nexpaq 1:55a6170b404f 263 // set read address for single block (CMD17)
nexpaq 1:55a6170b404f 264 if (_cmd(17, b * cdv) != 0) {
nexpaq 1:55a6170b404f 265 unlock();
nexpaq 1:55a6170b404f 266 return 1;
nexpaq 1:55a6170b404f 267 }
nexpaq 1:55a6170b404f 268
nexpaq 1:55a6170b404f 269 // receive the data
nexpaq 1:55a6170b404f 270 _read(buffer, 512);
nexpaq 1:55a6170b404f 271 buffer += 512;
nexpaq 1:55a6170b404f 272 }
nexpaq 1:55a6170b404f 273
nexpaq 1:55a6170b404f 274 unlock();
nexpaq 1:55a6170b404f 275 return 0;
nexpaq 1:55a6170b404f 276 }
nexpaq 1:55a6170b404f 277
nexpaq 1:55a6170b404f 278 int SDFileSystem::disk_status() {
nexpaq 1:55a6170b404f 279 lock();
nexpaq 1:55a6170b404f 280 // FATFileSystem::disk_status() returns 0 when initialized
nexpaq 1:55a6170b404f 281 int ret = _is_initialized ? 0 : 1;
nexpaq 1:55a6170b404f 282 unlock();
nexpaq 1:55a6170b404f 283 return ret;
nexpaq 1:55a6170b404f 284 }
nexpaq 1:55a6170b404f 285
nexpaq 1:55a6170b404f 286 int SDFileSystem::disk_sync() { return 0; }
nexpaq 1:55a6170b404f 287 uint32_t SDFileSystem::disk_sectors() {
nexpaq 1:55a6170b404f 288 lock();
nexpaq 1:55a6170b404f 289 uint32_t sectors = _sectors;
nexpaq 1:55a6170b404f 290 unlock();
nexpaq 1:55a6170b404f 291 return sectors;
nexpaq 1:55a6170b404f 292 }
nexpaq 1:55a6170b404f 293
nexpaq 1:55a6170b404f 294
nexpaq 1:55a6170b404f 295 // PRIVATE FUNCTIONS
nexpaq 1:55a6170b404f 296 int SDFileSystem::_cmd(int cmd, int arg) {
nexpaq 1:55a6170b404f 297 _spi.lock();
nexpaq 1:55a6170b404f 298 _cs = 0;
nexpaq 1:55a6170b404f 299
nexpaq 1:55a6170b404f 300 // send a command
nexpaq 1:55a6170b404f 301 _spi.write(0x40 | cmd);
nexpaq 1:55a6170b404f 302 _spi.write(arg >> 24);
nexpaq 1:55a6170b404f 303 _spi.write(arg >> 16);
nexpaq 1:55a6170b404f 304 _spi.write(arg >> 8);
nexpaq 1:55a6170b404f 305 _spi.write(arg >> 0);
nexpaq 1:55a6170b404f 306 _spi.write(0x95);
nexpaq 1:55a6170b404f 307
nexpaq 1:55a6170b404f 308 // wait for the repsonse (response[7] == 0)
nexpaq 1:55a6170b404f 309 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
nexpaq 1:55a6170b404f 310 int response = _spi.write(0xFF);
nexpaq 1:55a6170b404f 311 if (!(response & 0x80)) {
nexpaq 1:55a6170b404f 312 _cs = 1;
nexpaq 1:55a6170b404f 313 _spi.write(0xFF);
nexpaq 1:55a6170b404f 314 _spi.unlock();
nexpaq 1:55a6170b404f 315 return response;
nexpaq 1:55a6170b404f 316 }
nexpaq 1:55a6170b404f 317 }
nexpaq 1:55a6170b404f 318 _cs = 1;
nexpaq 1:55a6170b404f 319 _spi.write(0xFF);
nexpaq 1:55a6170b404f 320 _spi.unlock();
nexpaq 1:55a6170b404f 321 return -1; // timeout
nexpaq 1:55a6170b404f 322 }
nexpaq 1:55a6170b404f 323 int SDFileSystem::_cmdx(int cmd, int arg) {
nexpaq 1:55a6170b404f 324 _spi.lock();
nexpaq 1:55a6170b404f 325 _cs = 0;
nexpaq 1:55a6170b404f 326
nexpaq 1:55a6170b404f 327 // send a command
nexpaq 1:55a6170b404f 328 _spi.write(0x40 | cmd);
nexpaq 1:55a6170b404f 329 _spi.write(arg >> 24);
nexpaq 1:55a6170b404f 330 _spi.write(arg >> 16);
nexpaq 1:55a6170b404f 331 _spi.write(arg >> 8);
nexpaq 1:55a6170b404f 332 _spi.write(arg >> 0);
nexpaq 1:55a6170b404f 333 _spi.write(0x95);
nexpaq 1:55a6170b404f 334
nexpaq 1:55a6170b404f 335 // wait for the repsonse (response[7] == 0)
nexpaq 1:55a6170b404f 336 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
nexpaq 1:55a6170b404f 337 int response = _spi.write(0xFF);
nexpaq 1:55a6170b404f 338 if (!(response & 0x80)) {
nexpaq 1:55a6170b404f 339 _cs = 1;
nexpaq 1:55a6170b404f 340 _spi.unlock();
nexpaq 1:55a6170b404f 341 return response;
nexpaq 1:55a6170b404f 342 }
nexpaq 1:55a6170b404f 343 }
nexpaq 1:55a6170b404f 344 _cs = 1;
nexpaq 1:55a6170b404f 345 _spi.write(0xFF);
nexpaq 1:55a6170b404f 346 _spi.unlock();
nexpaq 1:55a6170b404f 347 return -1; // timeout
nexpaq 1:55a6170b404f 348 }
nexpaq 1:55a6170b404f 349
nexpaq 1:55a6170b404f 350
nexpaq 1:55a6170b404f 351 int SDFileSystem::_cmd58() {
nexpaq 1:55a6170b404f 352 _spi.lock();
nexpaq 1:55a6170b404f 353 _cs = 0;
nexpaq 1:55a6170b404f 354 int arg = 0;
nexpaq 1:55a6170b404f 355
nexpaq 1:55a6170b404f 356 // send a command
nexpaq 1:55a6170b404f 357 _spi.write(0x40 | 58);
nexpaq 1:55a6170b404f 358 _spi.write(arg >> 24);
nexpaq 1:55a6170b404f 359 _spi.write(arg >> 16);
nexpaq 1:55a6170b404f 360 _spi.write(arg >> 8);
nexpaq 1:55a6170b404f 361 _spi.write(arg >> 0);
nexpaq 1:55a6170b404f 362 _spi.write(0x95);
nexpaq 1:55a6170b404f 363
nexpaq 1:55a6170b404f 364 // wait for the repsonse (response[7] == 0)
nexpaq 1:55a6170b404f 365 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
nexpaq 1:55a6170b404f 366 int response = _spi.write(0xFF);
nexpaq 1:55a6170b404f 367 if (!(response & 0x80)) {
nexpaq 1:55a6170b404f 368 int ocr = _spi.write(0xFF) << 24;
nexpaq 1:55a6170b404f 369 ocr |= _spi.write(0xFF) << 16;
nexpaq 1:55a6170b404f 370 ocr |= _spi.write(0xFF) << 8;
nexpaq 1:55a6170b404f 371 ocr |= _spi.write(0xFF) << 0;
nexpaq 1:55a6170b404f 372 _cs = 1;
nexpaq 1:55a6170b404f 373 _spi.write(0xFF);
nexpaq 1:55a6170b404f 374 _spi.unlock();
nexpaq 1:55a6170b404f 375 return response;
nexpaq 1:55a6170b404f 376 }
nexpaq 1:55a6170b404f 377 }
nexpaq 1:55a6170b404f 378 _cs = 1;
nexpaq 1:55a6170b404f 379 _spi.write(0xFF);
nexpaq 1:55a6170b404f 380 _spi.unlock();
nexpaq 1:55a6170b404f 381 return -1; // timeout
nexpaq 1:55a6170b404f 382 }
nexpaq 1:55a6170b404f 383
nexpaq 1:55a6170b404f 384 int SDFileSystem::_cmd8() {
nexpaq 1:55a6170b404f 385 _spi.lock();
nexpaq 1:55a6170b404f 386 _cs = 0;
nexpaq 1:55a6170b404f 387
nexpaq 1:55a6170b404f 388 // send a command
nexpaq 1:55a6170b404f 389 _spi.write(0x40 | 8); // CMD8
nexpaq 1:55a6170b404f 390 _spi.write(0x00); // reserved
nexpaq 1:55a6170b404f 391 _spi.write(0x00); // reserved
nexpaq 1:55a6170b404f 392 _spi.write(0x01); // 3.3v
nexpaq 1:55a6170b404f 393 _spi.write(0xAA); // check pattern
nexpaq 1:55a6170b404f 394 _spi.write(0x87); // crc
nexpaq 1:55a6170b404f 395
nexpaq 1:55a6170b404f 396 // wait for the repsonse (response[7] == 0)
nexpaq 1:55a6170b404f 397 for (int i = 0; i < SD_COMMAND_TIMEOUT * 1000; i++) {
nexpaq 1:55a6170b404f 398 char response[5];
nexpaq 1:55a6170b404f 399 response[0] = _spi.write(0xFF);
nexpaq 1:55a6170b404f 400 if (!(response[0] & 0x80)) {
nexpaq 1:55a6170b404f 401 for (int j = 1; j < 5; j++) {
nexpaq 1:55a6170b404f 402 response[i] = _spi.write(0xFF);
nexpaq 1:55a6170b404f 403 }
nexpaq 1:55a6170b404f 404 _cs = 1;
nexpaq 1:55a6170b404f 405 _spi.write(0xFF);
nexpaq 1:55a6170b404f 406 _spi.unlock();
nexpaq 1:55a6170b404f 407 return response[0];
nexpaq 1:55a6170b404f 408 }
nexpaq 1:55a6170b404f 409 }
nexpaq 1:55a6170b404f 410 _cs = 1;
nexpaq 1:55a6170b404f 411 _spi.write(0xFF);
nexpaq 1:55a6170b404f 412 _spi.unlock();
nexpaq 1:55a6170b404f 413 return -1; // timeout
nexpaq 1:55a6170b404f 414 }
nexpaq 1:55a6170b404f 415
nexpaq 1:55a6170b404f 416 int SDFileSystem::_read(uint8_t *buffer, uint32_t length) {
nexpaq 1:55a6170b404f 417 _spi.lock();
nexpaq 1:55a6170b404f 418 _cs = 0;
nexpaq 1:55a6170b404f 419
nexpaq 1:55a6170b404f 420 // read until start byte (0xFF)
nexpaq 1:55a6170b404f 421 while (_spi.write(0xFF) != 0xFE);
nexpaq 1:55a6170b404f 422
nexpaq 1:55a6170b404f 423 // read data
nexpaq 1:55a6170b404f 424 for (uint32_t i = 0; i < length; i++) {
nexpaq 1:55a6170b404f 425 buffer[i] = _spi.write(0xFF);
nexpaq 1:55a6170b404f 426 }
nexpaq 1:55a6170b404f 427 _spi.write(0xFF); // checksum
nexpaq 1:55a6170b404f 428 _spi.write(0xFF);
nexpaq 1:55a6170b404f 429
nexpaq 1:55a6170b404f 430 _cs = 1;
nexpaq 1:55a6170b404f 431 _spi.write(0xFF);
nexpaq 1:55a6170b404f 432 _spi.unlock();
nexpaq 1:55a6170b404f 433 return 0;
nexpaq 1:55a6170b404f 434 }
nexpaq 1:55a6170b404f 435
nexpaq 1:55a6170b404f 436 int SDFileSystem::_write(const uint8_t*buffer, uint32_t length) {
nexpaq 1:55a6170b404f 437 _spi.lock();
nexpaq 1:55a6170b404f 438 _cs = 0;
nexpaq 1:55a6170b404f 439
nexpaq 1:55a6170b404f 440 // indicate start of block
nexpaq 1:55a6170b404f 441 _spi.write(0xFE);
nexpaq 1:55a6170b404f 442
nexpaq 1:55a6170b404f 443 // write the data
nexpaq 1:55a6170b404f 444 for (uint32_t i = 0; i < length; i++) {
nexpaq 1:55a6170b404f 445 _spi.write(buffer[i]);
nexpaq 1:55a6170b404f 446 }
nexpaq 1:55a6170b404f 447
nexpaq 1:55a6170b404f 448 // write the checksum
nexpaq 1:55a6170b404f 449 _spi.write(0xFF);
nexpaq 1:55a6170b404f 450 _spi.write(0xFF);
nexpaq 1:55a6170b404f 451
nexpaq 1:55a6170b404f 452 // check the response token
nexpaq 1:55a6170b404f 453 if ((_spi.write(0xFF) & 0x1F) != 0x05) {
nexpaq 1:55a6170b404f 454 _cs = 1;
nexpaq 1:55a6170b404f 455 _spi.write(0xFF);
nexpaq 1:55a6170b404f 456 _spi.unlock();
nexpaq 1:55a6170b404f 457 return 1;
nexpaq 1:55a6170b404f 458 }
nexpaq 1:55a6170b404f 459
nexpaq 1:55a6170b404f 460 // wait for write to finish
nexpaq 1:55a6170b404f 461 while (_spi.write(0xFF) == 0);
nexpaq 1:55a6170b404f 462
nexpaq 1:55a6170b404f 463 _cs = 1;
nexpaq 1:55a6170b404f 464 _spi.write(0xFF);
nexpaq 1:55a6170b404f 465 _spi.unlock();
nexpaq 1:55a6170b404f 466 return 0;
nexpaq 1:55a6170b404f 467 }
nexpaq 1:55a6170b404f 468
nexpaq 1:55a6170b404f 469 static uint32_t ext_bits(unsigned char *data, int msb, int lsb) {
nexpaq 1:55a6170b404f 470 uint32_t bits = 0;
nexpaq 1:55a6170b404f 471 uint32_t size = 1 + msb - lsb;
nexpaq 1:55a6170b404f 472 for (uint32_t i = 0; i < size; i++) {
nexpaq 1:55a6170b404f 473 uint32_t position = lsb + i;
nexpaq 1:55a6170b404f 474 uint32_t byte = 15 - (position >> 3);
nexpaq 1:55a6170b404f 475 uint32_t bit = position & 0x7;
nexpaq 1:55a6170b404f 476 uint32_t value = (data[byte] >> bit) & 1;
nexpaq 1:55a6170b404f 477 bits |= value << i;
nexpaq 1:55a6170b404f 478 }
nexpaq 1:55a6170b404f 479 return bits;
nexpaq 1:55a6170b404f 480 }
nexpaq 1:55a6170b404f 481
nexpaq 1:55a6170b404f 482 uint32_t SDFileSystem::_sd_sectors() {
nexpaq 1:55a6170b404f 483 uint32_t c_size, c_size_mult, read_bl_len;
nexpaq 1:55a6170b404f 484 uint32_t block_len, mult, blocknr, capacity;
nexpaq 1:55a6170b404f 485 uint32_t hc_c_size;
nexpaq 1:55a6170b404f 486 uint32_t blocks;
nexpaq 1:55a6170b404f 487
nexpaq 1:55a6170b404f 488 // CMD9, Response R2 (R1 byte + 16-byte block read)
nexpaq 1:55a6170b404f 489 if (_cmdx(9, 0) != 0) {
nexpaq 1:55a6170b404f 490 debug("Didn't get a response from the disk\n");
nexpaq 1:55a6170b404f 491 return 0;
nexpaq 1:55a6170b404f 492 }
nexpaq 1:55a6170b404f 493
nexpaq 1:55a6170b404f 494 uint8_t csd[16];
nexpaq 1:55a6170b404f 495 if (_read(csd, 16) != 0) {
nexpaq 1:55a6170b404f 496 debug("Couldn't read csd response from disk\n");
nexpaq 1:55a6170b404f 497 return 0;
nexpaq 1:55a6170b404f 498 }
nexpaq 1:55a6170b404f 499
nexpaq 1:55a6170b404f 500 // csd_structure : csd[127:126]
nexpaq 1:55a6170b404f 501 // c_size : csd[73:62]
nexpaq 1:55a6170b404f 502 // c_size_mult : csd[49:47]
nexpaq 1:55a6170b404f 503 // read_bl_len : csd[83:80] - the *maximum* read block length
nexpaq 1:55a6170b404f 504
nexpaq 1:55a6170b404f 505 int csd_structure = ext_bits(csd, 127, 126);
nexpaq 1:55a6170b404f 506
nexpaq 1:55a6170b404f 507 switch (csd_structure) {
nexpaq 1:55a6170b404f 508 case 0:
nexpaq 1:55a6170b404f 509 cdv = 512;
nexpaq 1:55a6170b404f 510 c_size = ext_bits(csd, 73, 62);
nexpaq 1:55a6170b404f 511 c_size_mult = ext_bits(csd, 49, 47);
nexpaq 1:55a6170b404f 512 read_bl_len = ext_bits(csd, 83, 80);
nexpaq 1:55a6170b404f 513
nexpaq 1:55a6170b404f 514 block_len = 1 << read_bl_len;
nexpaq 1:55a6170b404f 515 mult = 1 << (c_size_mult + 2);
nexpaq 1:55a6170b404f 516 blocknr = (c_size + 1) * mult;
nexpaq 1:55a6170b404f 517 capacity = blocknr * block_len;
nexpaq 1:55a6170b404f 518 blocks = capacity / 512;
nexpaq 1:55a6170b404f 519 debug_if(SD_DBG, "\n\rSDCard\n\rc_size: %d \n\rcapacity: %ld \n\rsectors: %lld\n\r", c_size, capacity, blocks);
nexpaq 1:55a6170b404f 520 break;
nexpaq 1:55a6170b404f 521
nexpaq 1:55a6170b404f 522 case 1:
nexpaq 1:55a6170b404f 523 cdv = 1;
nexpaq 1:55a6170b404f 524 hc_c_size = ext_bits(csd, 63, 48);
nexpaq 1:55a6170b404f 525 blocks = (hc_c_size+1)*1024;
nexpaq 1:55a6170b404f 526 debug_if(SD_DBG, "\n\rSDHC Card \n\rhc_c_size: %d\n\rcapacity: %lld \n\rsectors: %lld\n\r", hc_c_size, blocks*512, blocks);
nexpaq 1:55a6170b404f 527 break;
nexpaq 1:55a6170b404f 528
nexpaq 1:55a6170b404f 529 default:
nexpaq 1:55a6170b404f 530 debug("CSD struct unsupported\r\n");
nexpaq 1:55a6170b404f 531 return 0;
nexpaq 1:55a6170b404f 532 };
nexpaq 1:55a6170b404f 533 return blocks;
nexpaq 1:55a6170b404f 534 }