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hal/spi_api.h@0:e87aa4c49e95, 2019-06-04 (annotated)

Committer:
phungductung
Date:
Tue Jun 04 21:51:46 2019 +0000
Revision:
0:e87aa4c49e95
libray

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phungductung 0:e87aa4c49e95 1 /* mbed Microcontroller Library
phungductung 0:e87aa4c49e95 2 * Copyright (c) 2006-2013 ARM Limited
phungductung 0:e87aa4c49e95 3 *
phungductung 0:e87aa4c49e95 4 * Licensed under the Apache License, Version 2.0 (the "License");
phungductung 0:e87aa4c49e95 5 * you may not use this file except in compliance with the License.
phungductung 0:e87aa4c49e95 6 * You may obtain a copy of the License at
phungductung 0:e87aa4c49e95 7 *
phungductung 0:e87aa4c49e95 8 * http://www.apache.org/licenses/LICENSE-2.0
phungductung 0:e87aa4c49e95 9 *
phungductung 0:e87aa4c49e95 10 * Unless required by applicable law or agreed to in writing, software
phungductung 0:e87aa4c49e95 11 * distributed under the License is distributed on an "AS IS" BASIS,
phungductung 0:e87aa4c49e95 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
phungductung 0:e87aa4c49e95 13 * See the License for the specific language governing permissions and
phungductung 0:e87aa4c49e95 14 * limitations under the License.
phungductung 0:e87aa4c49e95 15 */
phungductung 0:e87aa4c49e95 16 #ifndef MBED_SPI_API_H
phungductung 0:e87aa4c49e95 17 #define MBED_SPI_API_H
phungductung 0:e87aa4c49e95 18
phungductung 0:e87aa4c49e95 19 #include "device.h"
phungductung 0:e87aa4c49e95 20 #include "dma_api.h"
phungductung 0:e87aa4c49e95 21 #include "buffer.h"
phungductung 0:e87aa4c49e95 22
phungductung 0:e87aa4c49e95 23 #if DEVICE_SPI
phungductung 0:e87aa4c49e95 24
phungductung 0:e87aa4c49e95 25 #define SPI_EVENT_ERROR (1 << 1)
phungductung 0:e87aa4c49e95 26 #define SPI_EVENT_COMPLETE (1 << 2)
phungductung 0:e87aa4c49e95 27 #define SPI_EVENT_RX_OVERFLOW (1 << 3)
phungductung 0:e87aa4c49e95 28 #define SPI_EVENT_ALL (SPI_EVENT_ERROR | SPI_EVENT_COMPLETE | SPI_EVENT_RX_OVERFLOW)
phungductung 0:e87aa4c49e95 29
phungductung 0:e87aa4c49e95 30 #define SPI_EVENT_INTERNAL_TRANSFER_COMPLETE (1 << 30) // internal flag to report an event occurred
phungductung 0:e87aa4c49e95 31
phungductung 0:e87aa4c49e95 32 #define SPI_FILL_WORD (0xFFFF)
phungductung 0:e87aa4c49e95 33
phungductung 0:e87aa4c49e95 34 #if DEVICE_SPI_ASYNCH
phungductung 0:e87aa4c49e95 35 /** Asynch spi hal structure
phungductung 0:e87aa4c49e95 36 */
phungductung 0:e87aa4c49e95 37 typedef struct {
phungductung 0:e87aa4c49e95 38 struct spi_s spi; /**< Target specific spi structure */
phungductung 0:e87aa4c49e95 39 struct buffer_s tx_buff; /**< Tx buffer */
phungductung 0:e87aa4c49e95 40 struct buffer_s rx_buff; /**< Rx buffer */
phungductung 0:e87aa4c49e95 41 } spi_t;
phungductung 0:e87aa4c49e95 42
phungductung 0:e87aa4c49e95 43 #else
phungductung 0:e87aa4c49e95 44 /** Non-asynch spi hal structure
phungductung 0:e87aa4c49e95 45 */
phungductung 0:e87aa4c49e95 46 typedef struct spi_s spi_t;
phungductung 0:e87aa4c49e95 47
phungductung 0:e87aa4c49e95 48 #endif
phungductung 0:e87aa4c49e95 49
phungductung 0:e87aa4c49e95 50 #ifdef __cplusplus
phungductung 0:e87aa4c49e95 51 extern "C" {
phungductung 0:e87aa4c49e95 52 #endif
phungductung 0:e87aa4c49e95 53
phungductung 0:e87aa4c49e95 54 /**
phungductung 0:e87aa4c49e95 55 * \defgroup GeneralSPI SPI Configuration Functions
phungductung 0:e87aa4c49e95 56 * @{
phungductung 0:e87aa4c49e95 57 */
phungductung 0:e87aa4c49e95 58
phungductung 0:e87aa4c49e95 59 /** Initialize the SPI peripheral
phungductung 0:e87aa4c49e95 60 *
phungductung 0:e87aa4c49e95 61 * Configures the pins used by SPI, sets a default format and frequency, and enables the peripheral
phungductung 0:e87aa4c49e95 62 * @param[out] obj The SPI object to initialize
phungductung 0:e87aa4c49e95 63 * @param[in] mosi The pin to use for MOSI
phungductung 0:e87aa4c49e95 64 * @param[in] miso The pin to use for MISO
phungductung 0:e87aa4c49e95 65 * @param[in] sclk The pin to use for SCLK
phungductung 0:e87aa4c49e95 66 * @param[in] ssel The pin to use for SSEL
phungductung 0:e87aa4c49e95 67 */
phungductung 0:e87aa4c49e95 68 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel);
phungductung 0:e87aa4c49e95 69
phungductung 0:e87aa4c49e95 70 /** Release a SPI object
phungductung 0:e87aa4c49e95 71 *
phungductung 0:e87aa4c49e95 72 * TODO: spi_free is currently unimplemented
phungductung 0:e87aa4c49e95 73 * This will require reference counting at the C++ level to be safe
phungductung 0:e87aa4c49e95 74 *
phungductung 0:e87aa4c49e95 75 * Return the pins owned by the SPI object to their reset state
phungductung 0:e87aa4c49e95 76 * Disable the SPI peripheral
phungductung 0:e87aa4c49e95 77 * Disable the SPI clock
phungductung 0:e87aa4c49e95 78 * @param[in] obj The SPI object to deinitialize
phungductung 0:e87aa4c49e95 79 */
phungductung 0:e87aa4c49e95 80 void spi_free(spi_t *obj);
phungductung 0:e87aa4c49e95 81
phungductung 0:e87aa4c49e95 82 /** Configure the SPI format
phungductung 0:e87aa4c49e95 83 *
phungductung 0:e87aa4c49e95 84 * Set the number of bits per frame, configure clock polarity and phase, shift order and master/slave mode
phungductung 0:e87aa4c49e95 85 * @param[in,out] obj The SPI object to configure
phungductung 0:e87aa4c49e95 86 * @param[in] bits The number of bits per frame
phungductung 0:e87aa4c49e95 87 * @param[in] mode The SPI mode (clock polarity, phase, and shift direction)
phungductung 0:e87aa4c49e95 88 * @param[in] slave Zero for master mode or non-zero for slave mode
phungductung 0:e87aa4c49e95 89 */
phungductung 0:e87aa4c49e95 90 void spi_format(spi_t *obj, int bits, int mode, int slave);
phungductung 0:e87aa4c49e95 91
phungductung 0:e87aa4c49e95 92 /** Set the SPI baud rate
phungductung 0:e87aa4c49e95 93 *
phungductung 0:e87aa4c49e95 94 * Actual frequency may differ from the desired frequency due to available dividers and bus clock
phungductung 0:e87aa4c49e95 95 * Configures the SPI peripheral's baud rate
phungductung 0:e87aa4c49e95 96 * @param[in,out] obj The SPI object to configure
phungductung 0:e87aa4c49e95 97 * @param[in] hz The baud rate in Hz
phungductung 0:e87aa4c49e95 98 */
phungductung 0:e87aa4c49e95 99 void spi_frequency(spi_t *obj, int hz);
phungductung 0:e87aa4c49e95 100
phungductung 0:e87aa4c49e95 101 /**@}*/
phungductung 0:e87aa4c49e95 102 /**
phungductung 0:e87aa4c49e95 103 * \defgroup SynchSPI Synchronous SPI Hardware Abstraction Layer
phungductung 0:e87aa4c49e95 104 * @{
phungductung 0:e87aa4c49e95 105 */
phungductung 0:e87aa4c49e95 106
phungductung 0:e87aa4c49e95 107 /** Write a byte out in master mode and receive a value
phungductung 0:e87aa4c49e95 108 *
phungductung 0:e87aa4c49e95 109 * @param[in] obj The SPI peripheral to use for sending
phungductung 0:e87aa4c49e95 110 * @param[in] value The value to send
phungductung 0:e87aa4c49e95 111 * @return Returns the value received during send
phungductung 0:e87aa4c49e95 112 */
phungductung 0:e87aa4c49e95 113 int spi_master_write(spi_t *obj, int value);
phungductung 0:e87aa4c49e95 114
phungductung 0:e87aa4c49e95 115 /** Check if a value is available to read
phungductung 0:e87aa4c49e95 116 *
phungductung 0:e87aa4c49e95 117 * @param[in] obj The SPI peripheral to check
phungductung 0:e87aa4c49e95 118 * @return non-zero if a value is available
phungductung 0:e87aa4c49e95 119 */
phungductung 0:e87aa4c49e95 120 int spi_slave_receive(spi_t *obj);
phungductung 0:e87aa4c49e95 121
phungductung 0:e87aa4c49e95 122 /** Get a received value out of the SPI receive buffer in slave mode
phungductung 0:e87aa4c49e95 123 *
phungductung 0:e87aa4c49e95 124 * Blocks until a value is available
phungductung 0:e87aa4c49e95 125 * @param[in] obj The SPI peripheral to read
phungductung 0:e87aa4c49e95 126 * @return The value received
phungductung 0:e87aa4c49e95 127 */
phungductung 0:e87aa4c49e95 128 int spi_slave_read(spi_t *obj);
phungductung 0:e87aa4c49e95 129
phungductung 0:e87aa4c49e95 130 /** Write a value to the SPI peripheral in slave mode
phungductung 0:e87aa4c49e95 131 *
phungductung 0:e87aa4c49e95 132 * Blocks until the SPI peripheral can be written to
phungductung 0:e87aa4c49e95 133 * @param[in] obj The SPI peripheral to write
phungductung 0:e87aa4c49e95 134 * @param[in] value The value to write
phungductung 0:e87aa4c49e95 135 */
phungductung 0:e87aa4c49e95 136 void spi_slave_write(spi_t *obj, int value);
phungductung 0:e87aa4c49e95 137
phungductung 0:e87aa4c49e95 138 /** Checks if the specified SPI peripheral is in use
phungductung 0:e87aa4c49e95 139 *
phungductung 0:e87aa4c49e95 140 * @param[in] obj The SPI peripheral to check
phungductung 0:e87aa4c49e95 141 * @return non-zero if the peripheral is currently transmitting
phungductung 0:e87aa4c49e95 142 */
phungductung 0:e87aa4c49e95 143 int spi_busy(spi_t *obj);
phungductung 0:e87aa4c49e95 144
phungductung 0:e87aa4c49e95 145 /** Get the module number
phungductung 0:e87aa4c49e95 146 *
phungductung 0:e87aa4c49e95 147 * @param[in] obj The SPI peripheral to check
phungductung 0:e87aa4c49e95 148 * @return The module number
phungductung 0:e87aa4c49e95 149 */
phungductung 0:e87aa4c49e95 150 uint8_t spi_get_module(spi_t *obj);
phungductung 0:e87aa4c49e95 151
phungductung 0:e87aa4c49e95 152 /**@}*/
phungductung 0:e87aa4c49e95 153
phungductung 0:e87aa4c49e95 154 #if DEVICE_SPI_ASYNCH
phungductung 0:e87aa4c49e95 155 /**
phungductung 0:e87aa4c49e95 156 * \defgroup AsynchSPI Asynchronous SPI Hardware Abstraction Layer
phungductung 0:e87aa4c49e95 157 * @{
phungductung 0:e87aa4c49e95 158 */
phungductung 0:e87aa4c49e95 159
phungductung 0:e87aa4c49e95 160 /** Begin the SPI transfer. Buffer pointers and lengths are specified in tx_buff and rx_buff
phungductung 0:e87aa4c49e95 161 *
phungductung 0:e87aa4c49e95 162 * @param[in] obj The SPI object which holds the transfer information
phungductung 0:e87aa4c49e95 163 * @param[in] tx The buffer to send
phungductung 0:e87aa4c49e95 164 * @param[in] tx_length The number of words to transmit
phungductung 0:e87aa4c49e95 165 * @param[in] rx The buffer to receive
phungductung 0:e87aa4c49e95 166 * @param[in] rx_length The number of words to receive
phungductung 0:e87aa4c49e95 167 * @param[in] bit_width The bit width of buffer words
phungductung 0:e87aa4c49e95 168 * @param[in] event The logical OR of events to be registered
phungductung 0:e87aa4c49e95 169 * @param[in] handler SPI interrupt handler
phungductung 0:e87aa4c49e95 170 * @param[in] hint A suggestion for how to use DMA with this transfer
phungductung 0:e87aa4c49e95 171 */
phungductung 0:e87aa4c49e95 172 void spi_master_transfer(spi_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint8_t bit_width, uint32_t handler, uint32_t event, DMAUsage hint);
phungductung 0:e87aa4c49e95 173
phungductung 0:e87aa4c49e95 174 /** The asynchronous IRQ handler
phungductung 0:e87aa4c49e95 175 *
phungductung 0:e87aa4c49e95 176 * Reads the received values out of the RX FIFO, writes values into the TX FIFO and checks for transfer termination
phungductung 0:e87aa4c49e95 177 * conditions, such as buffer overflows or transfer complete.
phungductung 0:e87aa4c49e95 178 * @param[in] obj The SPI object which holds the transfer information
phungductung 0:e87aa4c49e95 179 * @return event flags if a transfer termination condition was met or 0 otherwise.
phungductung 0:e87aa4c49e95 180 */
phungductung 0:e87aa4c49e95 181 uint32_t spi_irq_handler_asynch(spi_t *obj);
phungductung 0:e87aa4c49e95 182
phungductung 0:e87aa4c49e95 183 /** Attempts to determine if the SPI peripheral is already in use.
phungductung 0:e87aa4c49e95 184 *
phungductung 0:e87aa4c49e95 185 * If a temporary DMA channel has been allocated, peripheral is in use.
phungductung 0:e87aa4c49e95 186 * If a permanent DMA channel has been allocated, check if the DMA channel is in use. If not, proceed as though no DMA
phungductung 0:e87aa4c49e95 187 * channel were allocated.
phungductung 0:e87aa4c49e95 188 * If no DMA channel is allocated, check whether tx and rx buffers have been assigned. For each assigned buffer, check
phungductung 0:e87aa4c49e95 189 * if the corresponding buffer position is less than the buffer length. If buffers do not indicate activity, check if
phungductung 0:e87aa4c49e95 190 * there are any bytes in the FIFOs.
phungductung 0:e87aa4c49e95 191 * @param[in] obj The SPI object to check for activity
phungductung 0:e87aa4c49e95 192 * @return non-zero if the SPI port is active or zero if it is not.
phungductung 0:e87aa4c49e95 193 */
phungductung 0:e87aa4c49e95 194 uint8_t spi_active(spi_t *obj);
phungductung 0:e87aa4c49e95 195
phungductung 0:e87aa4c49e95 196 /** Abort an SPI transfer
phungductung 0:e87aa4c49e95 197 *
phungductung 0:e87aa4c49e95 198 * @param obj The SPI peripheral to stop
phungductung 0:e87aa4c49e95 199 */
phungductung 0:e87aa4c49e95 200 void spi_abort_asynch(spi_t *obj);
phungductung 0:e87aa4c49e95 201
phungductung 0:e87aa4c49e95 202
phungductung 0:e87aa4c49e95 203 #endif
phungductung 0:e87aa4c49e95 204
phungductung 0:e87aa4c49e95 205 /**@}*/
phungductung 0:e87aa4c49e95 206
phungductung 0:e87aa4c49e95 207 #ifdef __cplusplus
phungductung 0:e87aa4c49e95 208 }
phungductung 0:e87aa4c49e95 209 #endif // __cplusplus
phungductung 0:e87aa4c49e95 210
phungductung 0:e87aa4c49e95 211 #endif // SPI_DEVICE
phungductung 0:e87aa4c49e95 212
phungductung 0:e87aa4c49e95 213 #endif // MBED_SPI_API_H