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BSP_DISCO_F746NG/n25q128a.h@0:4e245f4bc8ac, 2019-06-07 (annotated)

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phungductung
Date:
Fri Jun 07 05:06:42 2019 +0000
Revision:
0:4e245f4bc8ac
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phungductung 0:4e245f4bc8ac 1 /**
phungductung 0:4e245f4bc8ac 2 ******************************************************************************
phungductung 0:4e245f4bc8ac 3 * @file n25q128a.h
phungductung 0:4e245f4bc8ac 4 * @author MCD Application Team
phungductung 0:4e245f4bc8ac 5 * @version V1.0.0
phungductung 0:4e245f4bc8ac 6 * @date 29-May-2015
phungductung 0:4e245f4bc8ac 7 * @brief This file contains all the description of the N25Q128A QSPI memory.
phungductung 0:4e245f4bc8ac 8 ******************************************************************************
phungductung 0:4e245f4bc8ac 9 * @attention
phungductung 0:4e245f4bc8ac 10 *
phungductung 0:4e245f4bc8ac 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
phungductung 0:4e245f4bc8ac 12 *
phungductung 0:4e245f4bc8ac 13 * Redistribution and use in source and binary forms, with or without modification,
phungductung 0:4e245f4bc8ac 14 * are permitted provided that the following conditions are met:
phungductung 0:4e245f4bc8ac 15 * 1. Redistributions of source code must retain the above copyright notice,
phungductung 0:4e245f4bc8ac 16 * this list of conditions and the following disclaimer.
phungductung 0:4e245f4bc8ac 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
phungductung 0:4e245f4bc8ac 18 * this list of conditions and the following disclaimer in the documentation
phungductung 0:4e245f4bc8ac 19 * and/or other materials provided with the distribution.
phungductung 0:4e245f4bc8ac 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
phungductung 0:4e245f4bc8ac 21 * may be used to endorse or promote products derived from this software
phungductung 0:4e245f4bc8ac 22 * without specific prior written permission.
phungductung 0:4e245f4bc8ac 23 *
phungductung 0:4e245f4bc8ac 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
phungductung 0:4e245f4bc8ac 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
phungductung 0:4e245f4bc8ac 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
phungductung 0:4e245f4bc8ac 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
phungductung 0:4e245f4bc8ac 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
phungductung 0:4e245f4bc8ac 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
phungductung 0:4e245f4bc8ac 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
phungductung 0:4e245f4bc8ac 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
phungductung 0:4e245f4bc8ac 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
phungductung 0:4e245f4bc8ac 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
phungductung 0:4e245f4bc8ac 34 *
phungductung 0:4e245f4bc8ac 35 ******************************************************************************
phungductung 0:4e245f4bc8ac 36 */
phungductung 0:4e245f4bc8ac 37
phungductung 0:4e245f4bc8ac 38 /* Define to prevent recursive inclusion -------------------------------------*/
phungductung 0:4e245f4bc8ac 39 #ifndef __N25Q128A_H
phungductung 0:4e245f4bc8ac 40 #define __N25Q128A_H
phungductung 0:4e245f4bc8ac 41
phungductung 0:4e245f4bc8ac 42 #ifdef __cplusplus
phungductung 0:4e245f4bc8ac 43 extern "C" {
phungductung 0:4e245f4bc8ac 44 #endif
phungductung 0:4e245f4bc8ac 45
phungductung 0:4e245f4bc8ac 46 /* Includes ------------------------------------------------------------------*/
phungductung 0:4e245f4bc8ac 47
phungductung 0:4e245f4bc8ac 48 /** @addtogroup BSP
phungductung 0:4e245f4bc8ac 49 * @{
phungductung 0:4e245f4bc8ac 50 */
phungductung 0:4e245f4bc8ac 51
phungductung 0:4e245f4bc8ac 52 /** @addtogroup Components
phungductung 0:4e245f4bc8ac 53 * @{
phungductung 0:4e245f4bc8ac 54 */
phungductung 0:4e245f4bc8ac 55
phungductung 0:4e245f4bc8ac 56 /** @addtogroup n25q128a
phungductung 0:4e245f4bc8ac 57 * @{
phungductung 0:4e245f4bc8ac 58 */
phungductung 0:4e245f4bc8ac 59
phungductung 0:4e245f4bc8ac 60 /** @defgroup N25Q128A_Exported_Types
phungductung 0:4e245f4bc8ac 61 * @{
phungductung 0:4e245f4bc8ac 62 */
phungductung 0:4e245f4bc8ac 63
phungductung 0:4e245f4bc8ac 64 /**
phungductung 0:4e245f4bc8ac 65 * @}
phungductung 0:4e245f4bc8ac 66 */
phungductung 0:4e245f4bc8ac 67
phungductung 0:4e245f4bc8ac 68 /** @defgroup N25Q128A_Exported_Constants
phungductung 0:4e245f4bc8ac 69 * @{
phungductung 0:4e245f4bc8ac 70 */
phungductung 0:4e245f4bc8ac 71
phungductung 0:4e245f4bc8ac 72 /**
phungductung 0:4e245f4bc8ac 73 * @brief N25Q128A Configuration
phungductung 0:4e245f4bc8ac 74 */
phungductung 0:4e245f4bc8ac 75 #define N25Q128A_FLASH_SIZE 0x1000000 /* 128 MBits => 16MBytes */
phungductung 0:4e245f4bc8ac 76 #define N25Q128A_SECTOR_SIZE 0x10000 /* 256 sectors of 64KBytes */
phungductung 0:4e245f4bc8ac 77 #define N25Q128A_SUBSECTOR_SIZE 0x1000 /* 4096 subsectors of 4kBytes */
phungductung 0:4e245f4bc8ac 78 #define N25Q128A_PAGE_SIZE 0x100 /* 65536 pages of 256 bytes */
phungductung 0:4e245f4bc8ac 79
phungductung 0:4e245f4bc8ac 80 #define N25Q128A_DUMMY_CYCLES_READ 8
phungductung 0:4e245f4bc8ac 81 #define N25Q128A_DUMMY_CYCLES_READ_QUAD 10
phungductung 0:4e245f4bc8ac 82
phungductung 0:4e245f4bc8ac 83 #define N25Q128A_BULK_ERASE_MAX_TIME 250000
phungductung 0:4e245f4bc8ac 84 #define N25Q128A_SECTOR_ERASE_MAX_TIME 3000
phungductung 0:4e245f4bc8ac 85 #define N25Q128A_SUBSECTOR_ERASE_MAX_TIME 800
phungductung 0:4e245f4bc8ac 86
phungductung 0:4e245f4bc8ac 87 /**
phungductung 0:4e245f4bc8ac 88 * @brief N25Q128A Commands
phungductung 0:4e245f4bc8ac 89 */
phungductung 0:4e245f4bc8ac 90 /* Reset Operations */
phungductung 0:4e245f4bc8ac 91 #define RESET_ENABLE_CMD 0x66
phungductung 0:4e245f4bc8ac 92 #define RESET_MEMORY_CMD 0x99
phungductung 0:4e245f4bc8ac 93
phungductung 0:4e245f4bc8ac 94 /* Identification Operations */
phungductung 0:4e245f4bc8ac 95 #define READ_ID_CMD 0x9E
phungductung 0:4e245f4bc8ac 96 #define READ_ID_CMD2 0x9F
phungductung 0:4e245f4bc8ac 97 #define MULTIPLE_IO_READ_ID_CMD 0xAF
phungductung 0:4e245f4bc8ac 98 #define READ_SERIAL_FLASH_DISCO_PARAM_CMD 0x5A
phungductung 0:4e245f4bc8ac 99
phungductung 0:4e245f4bc8ac 100 /* Read Operations */
phungductung 0:4e245f4bc8ac 101 #define READ_CMD 0x03
phungductung 0:4e245f4bc8ac 102 #define FAST_READ_CMD 0x0B
phungductung 0:4e245f4bc8ac 103 #define DUAL_OUT_FAST_READ_CMD 0x3B
phungductung 0:4e245f4bc8ac 104 #define DUAL_INOUT_FAST_READ_CMD 0xBB
phungductung 0:4e245f4bc8ac 105 #define QUAD_OUT_FAST_READ_CMD 0x6B
phungductung 0:4e245f4bc8ac 106 #define QUAD_INOUT_FAST_READ_CMD 0xEB
phungductung 0:4e245f4bc8ac 107
phungductung 0:4e245f4bc8ac 108 /* Write Operations */
phungductung 0:4e245f4bc8ac 109 #define WRITE_ENABLE_CMD 0x06
phungductung 0:4e245f4bc8ac 110 #define WRITE_DISABLE_CMD 0x04
phungductung 0:4e245f4bc8ac 111
phungductung 0:4e245f4bc8ac 112 /* Register Operations */
phungductung 0:4e245f4bc8ac 113 #define READ_STATUS_REG_CMD 0x05
phungductung 0:4e245f4bc8ac 114 #define WRITE_STATUS_REG_CMD 0x01
phungductung 0:4e245f4bc8ac 115
phungductung 0:4e245f4bc8ac 116 #define READ_LOCK_REG_CMD 0xE8
phungductung 0:4e245f4bc8ac 117 #define WRITE_LOCK_REG_CMD 0xE5
phungductung 0:4e245f4bc8ac 118
phungductung 0:4e245f4bc8ac 119 #define READ_FLAG_STATUS_REG_CMD 0x70
phungductung 0:4e245f4bc8ac 120 #define CLEAR_FLAG_STATUS_REG_CMD 0x50
phungductung 0:4e245f4bc8ac 121
phungductung 0:4e245f4bc8ac 122 #define READ_NONVOL_CFG_REG_CMD 0xB5
phungductung 0:4e245f4bc8ac 123 #define WRITE_NONVOL_CFG_REG_CMD 0xB1
phungductung 0:4e245f4bc8ac 124
phungductung 0:4e245f4bc8ac 125 #define READ_VOL_CFG_REG_CMD 0x85
phungductung 0:4e245f4bc8ac 126 #define WRITE_VOL_CFG_REG_CMD 0x81
phungductung 0:4e245f4bc8ac 127
phungductung 0:4e245f4bc8ac 128 #define READ_ENHANCED_VOL_CFG_REG_CMD 0x65
phungductung 0:4e245f4bc8ac 129 #define WRITE_ENHANCED_VOL_CFG_REG_CMD 0x61
phungductung 0:4e245f4bc8ac 130
phungductung 0:4e245f4bc8ac 131 /* Program Operations */
phungductung 0:4e245f4bc8ac 132 #define PAGE_PROG_CMD 0x02
phungductung 0:4e245f4bc8ac 133 #define DUAL_IN_FAST_PROG_CMD 0xA2
phungductung 0:4e245f4bc8ac 134 #define EXT_DUAL_IN_FAST_PROG_CMD 0xD2
phungductung 0:4e245f4bc8ac 135 #define QUAD_IN_FAST_PROG_CMD 0x32
phungductung 0:4e245f4bc8ac 136 #define EXT_QUAD_IN_FAST_PROG_CMD 0x12
phungductung 0:4e245f4bc8ac 137
phungductung 0:4e245f4bc8ac 138 /* Erase Operations */
phungductung 0:4e245f4bc8ac 139 #define SUBSECTOR_ERASE_CMD 0x20
phungductung 0:4e245f4bc8ac 140 #define SECTOR_ERASE_CMD 0xD8
phungductung 0:4e245f4bc8ac 141 #define BULK_ERASE_CMD 0xC7
phungductung 0:4e245f4bc8ac 142
phungductung 0:4e245f4bc8ac 143 #define PROG_ERASE_RESUME_CMD 0x7A
phungductung 0:4e245f4bc8ac 144 #define PROG_ERASE_SUSPEND_CMD 0x75
phungductung 0:4e245f4bc8ac 145
phungductung 0:4e245f4bc8ac 146 /* One-Time Programmable Operations */
phungductung 0:4e245f4bc8ac 147 #define READ_OTP_ARRAY_CMD 0x4B
phungductung 0:4e245f4bc8ac 148 #define PROG_OTP_ARRAY_CMD 0x42
phungductung 0:4e245f4bc8ac 149
phungductung 0:4e245f4bc8ac 150 /**
phungductung 0:4e245f4bc8ac 151 * @brief N25Q128A Registers
phungductung 0:4e245f4bc8ac 152 */
phungductung 0:4e245f4bc8ac 153 /* Status Register */
phungductung 0:4e245f4bc8ac 154 #define N25Q128A_SR_WIP ((uint8_t)0x01) /*!< Write in progress */
phungductung 0:4e245f4bc8ac 155 #define N25Q128A_SR_WREN ((uint8_t)0x02) /*!< Write enable latch */
phungductung 0:4e245f4bc8ac 156 #define N25Q128A_SR_BLOCKPR ((uint8_t)0x5C) /*!< Block protected against program and erase operations */
phungductung 0:4e245f4bc8ac 157 #define N25Q128A_SR_PRBOTTOM ((uint8_t)0x20) /*!< Protected memory area defined by BLOCKPR starts from top or bottom */
phungductung 0:4e245f4bc8ac 158 #define N25Q128A_SR_SRWREN ((uint8_t)0x80) /*!< Status register write enable/disable */
phungductung 0:4e245f4bc8ac 159
phungductung 0:4e245f4bc8ac 160 /* Nonvolatile Configuration Register */
phungductung 0:4e245f4bc8ac 161 #define N25Q128A_NVCR_LOCK ((uint16_t)0x0001) /*!< Lock nonvolatile configuration register */
phungductung 0:4e245f4bc8ac 162 #define N25Q128A_NVCR_DUAL ((uint16_t)0x0004) /*!< Dual I/O protocol */
phungductung 0:4e245f4bc8ac 163 #define N25Q128A_NVCR_QUAB ((uint16_t)0x0008) /*!< Quad I/O protocol */
phungductung 0:4e245f4bc8ac 164 #define N25Q128A_NVCR_RH ((uint16_t)0x0010) /*!< Reset/hold */
phungductung 0:4e245f4bc8ac 165 #define N25Q128A_NVCR_ODS ((uint16_t)0x01C0) /*!< Output driver strength */
phungductung 0:4e245f4bc8ac 166 #define N25Q128A_NVCR_XIP ((uint16_t)0x0E00) /*!< XIP mode at power-on reset */
phungductung 0:4e245f4bc8ac 167 #define N25Q128A_NVCR_NB_DUMMY ((uint16_t)0xF000) /*!< Number of dummy clock cycles */
phungductung 0:4e245f4bc8ac 168
phungductung 0:4e245f4bc8ac 169 /* Volatile Configuration Register */
phungductung 0:4e245f4bc8ac 170 #define N25Q128A_VCR_WRAP ((uint8_t)0x03) /*!< Wrap */
phungductung 0:4e245f4bc8ac 171 #define N25Q128A_VCR_XIP ((uint8_t)0x08) /*!< XIP */
phungductung 0:4e245f4bc8ac 172 #define N25Q128A_VCR_NB_DUMMY ((uint8_t)0xF0) /*!< Number of dummy clock cycles */
phungductung 0:4e245f4bc8ac 173
phungductung 0:4e245f4bc8ac 174 /* Enhanced Volatile Configuration Register */
phungductung 0:4e245f4bc8ac 175 #define N25Q128A_EVCR_ODS ((uint8_t)0x07) /*!< Output driver strength */
phungductung 0:4e245f4bc8ac 176 #define N25Q128A_EVCR_VPPA ((uint8_t)0x08) /*!< Vpp accelerator */
phungductung 0:4e245f4bc8ac 177 #define N25Q128A_EVCR_RH ((uint8_t)0x10) /*!< Reset/hold */
phungductung 0:4e245f4bc8ac 178 #define N25Q128A_EVCR_DUAL ((uint8_t)0x40) /*!< Dual I/O protocol */
phungductung 0:4e245f4bc8ac 179 #define N25Q128A_EVCR_QUAD ((uint8_t)0x80) /*!< Quad I/O protocol */
phungductung 0:4e245f4bc8ac 180
phungductung 0:4e245f4bc8ac 181 /* Flag Status Register */
phungductung 0:4e245f4bc8ac 182 #define N25Q128A_FSR_PRERR ((uint8_t)0x02) /*!< Protection error */
phungductung 0:4e245f4bc8ac 183 #define N25Q128A_FSR_PGSUS ((uint8_t)0x04) /*!< Program operation suspended */
phungductung 0:4e245f4bc8ac 184 #define N25Q128A_FSR_VPPERR ((uint8_t)0x08) /*!< Invalid voltage during program or erase */
phungductung 0:4e245f4bc8ac 185 #define N25Q128A_FSR_PGERR ((uint8_t)0x10) /*!< Program error */
phungductung 0:4e245f4bc8ac 186 #define N25Q128A_FSR_ERERR ((uint8_t)0x20) /*!< Erase error */
phungductung 0:4e245f4bc8ac 187 #define N25Q128A_FSR_ERSUS ((uint8_t)0x40) /*!< Erase operation suspended */
phungductung 0:4e245f4bc8ac 188 #define N25Q128A_FSR_READY ((uint8_t)0x80) /*!< Ready or command in progress */
phungductung 0:4e245f4bc8ac 189
phungductung 0:4e245f4bc8ac 190 /**
phungductung 0:4e245f4bc8ac 191 * @}
phungductung 0:4e245f4bc8ac 192 */
phungductung 0:4e245f4bc8ac 193
phungductung 0:4e245f4bc8ac 194 /** @defgroup N25Q128A_Exported_Functions
phungductung 0:4e245f4bc8ac 195 * @{
phungductung 0:4e245f4bc8ac 196 */
phungductung 0:4e245f4bc8ac 197 /**
phungductung 0:4e245f4bc8ac 198 * @}
phungductung 0:4e245f4bc8ac 199 */
phungductung 0:4e245f4bc8ac 200
phungductung 0:4e245f4bc8ac 201 /**
phungductung 0:4e245f4bc8ac 202 * @}
phungductung 0:4e245f4bc8ac 203 */
phungductung 0:4e245f4bc8ac 204
phungductung 0:4e245f4bc8ac 205 /**
phungductung 0:4e245f4bc8ac 206 * @}
phungductung 0:4e245f4bc8ac 207 */
phungductung 0:4e245f4bc8ac 208
phungductung 0:4e245f4bc8ac 209 /**
phungductung 0:4e245f4bc8ac 210 * @}
phungductung 0:4e245f4bc8ac 211 */
phungductung 0:4e245f4bc8ac 212
phungductung 0:4e245f4bc8ac 213 #ifdef __cplusplus
phungductung 0:4e245f4bc8ac 214 }
phungductung 0:4e245f4bc8ac 215 #endif
phungductung 0:4e245f4bc8ac 216
phungductung 0:4e245f4bc8ac 217 #endif /* __N25Q128A_H */
phungductung 0:4e245f4bc8ac 218
phungductung 0:4e245f4bc8ac 219 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/